Semiconductor device and power conversion device
The semiconductor device addresses thermal stress and alignment issues by direct bonding of the heat spreader to the semiconductor element, enhancing thermal management and precision while reducing manufacturing costs.
Patent Information
- Application Number
- CN202080094197.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2020-01-30
- Publication Date
- 2025-07-15
- Estimated Expiration
- 2040-01-30
AI Technical Summary
In existing semiconductor devices, the connection between the semiconductor chip and the radiator is not accurate enough, resulting in thermal stress concentrated at the end of the chip, affecting the reliability and stability of the device.
The projection is directly bonded to the main surface of the semiconductor element through the bonding material, combined with the use of sealing resin, to ensure the precise alignment of the semiconductor element and the heat sink, and to reduce thermal stress through the sealing resin to achieve direct bonding.
It effectively reduces the thermal stress at the end of the semiconductor element, improves the reliability and stability of the device, reduces the risk of sealing resin peeling and cracks, simplifies the manufacturing process, and reduces the cost.
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Figure CN115023810B_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to a semiconductor device and a power conversion device. Background Art
[0002] Conventionally, for the purpose of miniaturization and high heat dissipation of a semiconductor device, there is a semiconductor device in which a semiconductor element is bonded to a heat spreader made of a metal having excellent thermal conductivity using a bonding material. The heat spreader, the semiconductor element, and the bonding material are sealed with a sealing resin.
[0003] For example, in Japanese Patent Laid-Open No. 9-8209 (Patent Document 1), the semiconductor device includes a heat dissipation member (heat spreader), an Ag (silver) paste (bonding material), a semiconductor chip (semiconductor element), a molding resin (sealing resin), a tab, and an adhesive. The Ag paste is disposed inside relative to the outer peripheral end of the semiconductor chip. The semiconductor chip has an exposed surface disposed between the outer peripheral end of the semiconductor chip and the Ag paste. The outer peripheral end and the exposed surface are exposed from the Ag paste.
[0004] The tab is sandwiched between the semiconductor chip and the heat dissipation member inside relative to the outer peripheral end of the semiconductor chip. One end of the tab is bonded to the semiconductor chip through the Ag paste. The other end of the tab is bonded to the heat dissipation member through the adhesive. Therefore, the semiconductor chip is connected to the heat dissipation member via the Ag paste, the tab, and the adhesive.
[0005] Prior Art Documents
[0006] Patent Documents
[0007] Patent Document 1: Japanese Patent Laid-Open No. 9-8209 Summary of the Invention
[0008] In the semiconductor device described in the above publication, since the outer peripheral end (first outer peripheral end) and the exposed surface of the semiconductor chip (semiconductor element) are exposed from the Ag paste (bonding material), the thermal stress generated at the end of the semiconductor chip may be reduced. However, the semiconductor chip is connected to the heat dissipation member (heat spreader) via the Ag paste, the tab, and the adhesive. Therefore, the semiconductor chip and the heat dissipation member are not directly bonded through the Ag paste. Therefore, it is difficult to accurately arrange the semiconductor chip and the heat dissipation member.
[0009] The present disclosure has been made in view of the above problems, and an object thereof is to provide a semiconductor device and a power conversion device capable of reducing the thermal stress generated at the end of a semiconductor element and accurately arranging the semiconductor element and a heat sink.
[0010] The semiconductor device of the present disclosure includes a semiconductor element, a bonding material, a heat sink, and a sealing resin. The semiconductor element includes a main surface. The main surface has a first outer peripheral end. The bonding material is disposed on the main surface. The heat sink is bonded to the main surface through the bonding material. The sealing resin seals the semiconductor element, the bonding material, and the heat sink. The heat sink includes a main body portion and a protruding portion. The main body portion is disposed on the side opposite to the semiconductor element with respect to the bonding material. The protruding portion protrudes from the main body portion toward the main surface inside the first outer peripheral end. The protruding portion is bonded to the main surface through the bonding material. The main surface has an exposed surface. The exposed surface is disposed between the first outer peripheral end and the bonding material. The first outer peripheral end and the exposed surface are exposed from the bonding material. The first outer peripheral end and the exposed surface are sealed by the sealing resin.
[0011] In the semiconductor device according to the present disclosure, the first outer peripheral end and the exposed surface are exposed from the bonding material. Therefore, the thermal stress generated at the end of the semiconductor element can be reduced. In addition, the protruding portion is bonded to the main surface through the bonding material. Therefore, the semiconductor element and the heat sink are directly bonded through the bonding material. Therefore, the semiconductor element and the heat sink can be accurately arranged. BRIEF DESCRIPTION OF THE DRAWINGS
[0012] Figure 1 is a cross-sectional view schematically showing a first structure of the semiconductor device according to Embodiment 1.
[0013] Figure 2 is along Figure 1 sectional view taken along line II-II.
[0014] Figure 3 is Figure 1 an enlarged view of Region III of.
[0015] Figure 4 Schematically showing a second structure of the semiconductor device according to Embodiment 1, is an enlarged view corresponding to Figure 3 corresponding.
[0016] Figure 5 Schematically showing a third structure of the semiconductor device according to Embodiment 1, is an enlarged view corresponding to Figure 3 corresponding.
[0017] Figure 6 is a top view schematically showing the structure of the heat sink according to Embodiment 1.
[0018] Figure 7 is along Figure 6 sectional view taken along line VII-VII.
[0019] Figure 8 is a graph schematically showing the relationship between the first distance and the shear stress ratio and the threshold value.
[0020] Figure 9 It is a cross-sectional view schematically showing the structure of a semiconductor device according to a modification of Embodiment 1.
[0021] Figure 10 is Figure 9 an enlarged view of the X region of.
[0022] Figure 11 It is a cross-sectional view schematically showing the structure of a semiconductor device according to Embodiment 2.
[0023] Figure 12 It is a top view schematically showing the structure of a heat sink according to Embodiment 2.
[0024] Figure 13 is along Figure 12 a cross-sectional view taken along line XIII-XIII of.
[0025] Figure 14 It is a cross-sectional view schematically showing the structure of a semiconductor device according to Embodiment 3.
[0026] Figure 15 It is a block diagram schematically showing the structure of a power conversion device according to Embodiment 4.
[0027] (Symbol Explanation)
[0028] 1: Semiconductor element; 1M: Main surface; 1e: Exposed surface; 1o: First outer peripheral end; 2: Bonding material; 2o: Second outer peripheral end; 3: Heat sink; 3o: Third outer peripheral end; 4: Housing; 9: Sealing resin; 30: Main body portion; 31: Protrusion; 32: Peripheral portion; 101: Power supply; 200: Power conversion device; 201: Main conversion circuit; 203: Control circuit; 300: Load; D1: First distance; D2: Second distance; IS: Internal space. Detailed Embodiments
[0029] Hereinafter, embodiments will be described with reference to the drawings. In addition, hereinafter, the same or corresponding parts will be given the same reference numerals and repeated explanations will not be made.
[0030] Embodiment 1.
[0031] Using Figures 1 to 8 , the structure of the semiconductor device 100 according to Embodiment 1 will be described. In addition, in Figure 2 , for ease of explanation, the sealing resin 9 and the second wiring component 61 are not shown. As Figure 1As shown, the semiconductor device 100 includes a semiconductor element 1, a bonding material 2, a heat sink 3, and a sealing resin 9. The semiconductor device 100 may also include a wire bonding material 5, a metal layer 7, an insulating layer 8, a first wiring component 60, and a second wiring component 61. The semiconductor device 100 is a power semiconductor device for power use.
[0032] As Figure 1 shown, the semiconductor element 1 includes a main surface 1M, a back surface 1B, and a side surface 1S. The main surface 1M has a first outer peripheral end 1o. The main surface 1M has an exposed surface 1e and a bonding surface 1j. The exposed surface 1e is disposed between the first outer peripheral end 1o and the bonding material 2. The first outer peripheral end 1o and the exposed surface 1e are exposed from the bonding material 2. The first outer peripheral end 1o and the exposed surface 1e are sealed by the sealing resin 9. The bonding surface 1j is covered by the bonding material 2.
[0033] The back surface 1B faces the main surface 1M. The back surface 1B is disposed on the side opposite to the main surface 1M with respect to the center of the semiconductor element 1. The back surface 1B has a back outer peripheral end 1o2 (see Figure 3 ). The back outer peripheral end 1o2 (see Figure 3 ) is exposed from the bonding material 2 and the wire bonding material 5. The back outer peripheral end 1o2 (see Figure 3 ) is sealed by the sealing resin 9.
[0034] As Figure 1 shown, in the present embodiment, the semiconductor element 1 includes an element portion 10, a first electrode 11, and a second electrode 12. The element portion 10 is sandwiched between the first electrode 11 and the second electrode 12. The first electrode 11 is joined to the protruding portion 31 through the bonding material 2. In the present embodiment, the first electrode 11 includes the main surface 1M. The second electrode 12 is disposed on the side opposite to the first electrode 11 with respect to the element portion 10. The second electrode 12 is joined to the wiring component through the wire bonding material 5. In the present embodiment, the second electrode 12 includes the back surface 1B.
[0035] The semiconductor element 1 is a power semiconductor element for power use. The material of the semiconductor element 1 includes, for example, silicon (Si) or silicon carbide (SiC). The type of the semiconductor element 1 is, for example, an insulated gate bipolar transistor (IGBT: Insulated Gate Bipolar Transistor), a free wheel diode (FWD: Free Wheel Diode), or a metal oxide semiconductor field effect transistor (MOSFET: Metal Oxide Semiconductor Field Effect Transistor). In addition, the type of the semiconductor element 1 is not limited to these. In the present embodiment, the semiconductor device 100 includes one semiconductor element 1, but the semiconductor device 100 may also include a plurality of semiconductor elements 1.
[0036] The first electrode 11 and the second electrode 12 are, for example, at least any one of a control signal electrode and a main electrode. In addition, the first electrode 11 and the second electrode 12 are not limited to these. The materials of the first electrode 11 and the second electrode 12 are metals having excellent electrical characteristics and mechanical characteristics. The materials of the first electrode 11 and the second electrode 12 include, for example, at least any one of aluminum (Al), copper (Cu), silver (Ag), nickel (Ni), and gold (Au). The materials of the first electrode 11 and the second electrode 12 may also be alloys containing at least one of aluminum (Al), copper (Cu), silver (Ag), nickel (Ni), and gold (Au) as a main component.
[0037] As Figure 1 shown, the heat sink 3 is joined to the main surface 1M by the joining material 2. The heat sink 3 includes a main body portion 30 and a protruding portion 31. The main body portion 30 is disposed on the side opposite to the semiconductor element 1 with respect to the joining material 2. In the present embodiment, the main body portion 30 is disposed away from the joining material 2.
[0038] As Figure 1 shown, the protruding portion 31 protrudes from the main body portion 30 toward the main surface 1M inside the first outer peripheral end 1o. The protruding portion 31 is joined to the main surface 1M by the joining material 2. The protruding portion 31 and the main surface 1M sandwich the joining material 2.
[0039] The material of the heat sink 3 is a metal having excellent electrical characteristics and mechanical characteristics. The material of the heat sink 3 may also include, for example, at least any one of aluminum (Al), copper (Cu), silver (Ag), nickel (Ni), and gold (Au). The material of the heat sink 3 may also be an alloy containing at least one of aluminum (Al), copper (Cu), silver (Ag), nickel (Ni), and gold (Au) as a main component. The material of the heat sink 3 may also be a composite material (Al-SiC) containing silicon carbide (SiC) and aluminum (Al). In addition, the material of the heat sink 3 is not limited to these. In the present embodiment, the semiconductor device 100 includes one heat sink 3, but the semiconductor device 100 may also include a plurality of heat sinks 3.
[0040] As Figure 1 shown, the joining material 2 is disposed on the main surface 1M. The joining material 2 is disposed between the main surface 1M and the protruding portion 31. The joining material 2 is disposed on the joining surface 1j. The joining material 2 does not reach the first outer peripheral end 1o. The semiconductor element 1 is electrically connected to the heat sink 3 through the joining material 2.
[0041] The wiring bonding material 5 is disposed on the side opposite to the bonding material 2 with respect to the semiconductor element 1. The wiring bonding material 5 is disposed between the back surface 1B and the first wiring component 60. The wiring bonding material 5 is disposed on the back surface 1B inside compared to the outer peripheral end 1o2 of the back surface (refer to Figure 3 ). In addition, in the present embodiment, the direction in a plan view is the direction from the heat sink 3 toward the semiconductor element 1. The wiring bonding material 5 does not reach the outer peripheral end 1o2 of the back surface (refer to Figure 3 ).
[0042] The materials of the bonding material 2 and the wiring bonding material 5 are, for example, high-temperature solders containing lead (Pb) or tin (Sn), silver (Ag) nanoparticle pastes, or conductive adhesives containing silver (Ag) particles and epoxy resins, etc. In addition, the materials of the bonding material 2 and the wiring bonding material 5 are not limited to these.
[0043] As Figure 1 shown, the first wiring component 60 is joined to the second electrode 12 through the wiring bonding material 5. Thus, the first wiring component 60 is electrically connected to the semiconductor element 1. In addition, when the semiconductor device 100 does not include the wiring bonding material 5, the first wiring component 60 is electrically connected to the semiconductor element 1 through, for example, a wire or the like. The second wiring component 61 is joined to the heat sink 3. Thus, the second wiring component 61 is electrically connected to the semiconductor element 1 via the heat sink 3 and the bonding material 2.
[0044] The materials of the first wiring component 60 and the second wiring component 61 preferably have high electrical conductivity. The materials of the first wiring component 60 and the second wiring component 61 are, for example, copper (Cu), aluminum (Al), or alloys containing copper (Cu) or aluminum (Al), etc. In addition, the materials of the first wiring component 60 and the second wiring component 61 are not limited to these.
[0045] As Figure 1 shown, the insulating layer 8 is disposed on the side opposite to the semiconductor element 1 with respect to the heat sink 3. The insulating layer 8 is joined to the main body portion 30. The insulating layer 8 is sandwiched between the heat sink 3 and the metal layer 7. The insulating layer 8 electrically insulates the heat sink 3 and the metal layer 7. The insulating layer 8 may be sealed by the sealing resin 9 or may be exposed from the sealing resin 9. The insulating layer 8 may not be disposed inside the sealing resin 9.
[0046] The material of the insulating layer 8 is, for example, an organic material filled with a ceramic filler (not shown). The organic material is, for example, an epoxy resin, a polyimide resin, or a cyanate resin. The material of the ceramic filler (not shown) is, for example, aluminum oxide, aluminum nitride (AlN), or boron nitride (BN). The insulating layer 8 may also be a ceramic substrate, for example. The material of the ceramic substrate is, for example, aluminum oxide, aluminum nitride (AlN), or boron nitride (BN). In addition, the material of the insulating layer 8 is not limited to these.
[0047] As Figure 1 shown, the metal layer 7 is disposed on the side opposite to the heat sink 3 with respect to the insulating layer 8. The metal layer 7 is connected to the insulating layer 8. The metal layer 7 is at least partially exposed from the sealing resin 9. The metal layer 7 is located on the side opposite to the heat sink 3 with respect to the insulating layer 8 and is exposed from the sealing resin 9. The metal layer 7 may not be disposed inside the sealing resin 9.
[0048] The material of the metal layer 7 is a metal having excellent thermal characteristics and mechanical characteristics. The material of the metal layer 7 contains, for example, at least any one of aluminum (Al), copper (Cu), nickel (Ni), and gold (Au). The material of the metal layer 7 may also be an alloy containing at least one of aluminum (Al), copper (Cu), nickel (Ni), and gold (Au) as a main component, for example.
[0049] As Figure 1 shown, the sealing resin 9 seals the semiconductor element 1, the bonding material 2, and the heat sink 3. The first wiring component 60 and the second wiring component 61 are partially exposed from the sealing resin 9. The sealing resin 9 has a lower elastic modulus than the bonding material 2 and the wiring bonding material 5. The sealing resin 9 has insulation properties. The material of the sealing resin 9 is, for example, a thermosetting resin, a polyurethane resin, an epoxy resin, a polyimide resin, a polyamide resin, a polyamideimide resin, an acrylic resin, and a rubber material. The materials of the sealing resin 9 may be combined. The material of the sealing resin 9 may also contain, for example, a gel-like silicone resin and an epoxy resin overlapped on the silicone resin.
[0050] In the present embodiment, the material of the sealing resin 9 is a transfer molding resin. Therefore, the sealing resin 9 is formed by being pressurized and heated.
[0051] As Figure 2 shown, the bonding material 2 is disposed inside with respect to the first outer peripheral end 1o in a plan view. The bonding material 2 includes a second outer peripheral end 2o. The second outer peripheral end 2o is disposed inside with respect to the first outer peripheral end 1o in a plan view. The second outer peripheral end 2o is surrounded by the first outer peripheral end 1o.
[0052] AsFigure 2 and Figure 3 As shown, the protrusion 31 is disposed inside the first outer peripheral end 1o in a plan view. The protrusion 31 includes a protruding surface 3s. The protruding surface 3s has a third outer peripheral end 3o. The third outer peripheral end 3o is disposed inside the first outer peripheral end 1o in a plan view. The third outer peripheral end 3o is surrounded by the first outer peripheral end 1o in a plan view. The third outer peripheral end 3o may also be disposed inside the second outer peripheral end 2o in a plan view.
[0053] As Figure 3 shown, the exposed surface 1e is disposed between the first outer peripheral end 1o and the bonding material 2. The exposed surface 1e extends inward from the first outer peripheral end 1o. The exposed surface 1e extends from the first outer peripheral end 1o to the second outer peripheral end 2o. The bonding surface 1j is disposed inside the second outer peripheral end 2o. The side surface 1S is disposed between the first outer peripheral end 1o of the main surface 1M and the back outer peripheral end 1o2 of the back surface 1B. The side surface 1S is exposed from the bonding material 2 and the wiring bonding material 5. The side surface 1S is sealed by the sealing resin 9.
[0054] As Figure 3 shown, the second outer peripheral end 2o of the bonding material 2 is disposed on the main surface 1M. The first distance D1 between the first outer peripheral end 1o and the second outer peripheral end 2o that sandwiches the exposed surface 1e is 50 μm or more and 300 μm or less. As Figure 2 and Figure 3 shown, the first distance D1 is the shortest distance between the first outer peripheral end 1o and the second outer peripheral end 2o.
[0055] As Figure 3 shown, the protruding surface 3s is joined to the bonding material 2. The bonding material 2 covers the entire surface of the protruding surface 3s. The bonding material 2 reaches the third outer peripheral end 3o of the protruding surface 3s. The second distance D2 between the first outer peripheral end 1o and the third outer peripheral end 3o along the protruding surface 3s is 50 μm or more and 300 μm or less. As Figure 2 and Figure 3 shown, the second distance D2 is the shortest distance between the first outer peripheral end 1o and the third outer peripheral end 3o in a plan view.
[0056] As long as the bonding material 2 is disposed inside the first outer peripheral end 1o in a plan view and the first distance D1 is 50 μm or more and 300 μm or less, the shape of the bonding material 2 can also be appropriately determined. For example, the bonding material 2 may be configured such that the size of the bonding material 2 increases from the protruding surface 3s toward the bonding surface 1j. The bonding material 2 may also wet-expand outward at the bonding surface 1j compared to the protruding surface 3s. The first distance D1 may also be less than the second distance D2.
[0057] As Figure 4As shown, for example, the bonding material 2 can also be configured such that the dimensions of the bonding material 2 are the same at the protruding surface 3s and the bonding surface 1j. The bonding material 2 can also wet-expand in the same manner as the protruding surface 3s at the bonding surface 1j. The first distance D1 can also be the same as the second distance D2. The third outer peripheral end 3o can also overlap with the second outer peripheral end 2o in a top view.
[0058] As Figure 5 shown, for example, the bonding material 2 can also be configured such that the dimensions of the bonding material 2 become smaller from the protruding surface 3s toward the bonding surface 1j. The bonding material 2 can also wet-expand inward compared to the protruding surface 3s at the bonding surface 1j. The first distance D1 can also be greater than the second distance D2. The third outer peripheral end 3o can also be arranged outside the second outer peripheral end 2o in a top view.
[0059] As Figure 6 and Figure 7 shown, the outer peripheral end (the third outer peripheral end 3o) of the protruding portion 31 is arranged inside the outer peripheral end of the main body portion 30.
[0060] Refer to Figure 8 and Figure 3 , and the relationship between the first distance D1 and the shear stress ratio R will be described. In the present embodiment, the shear stress ratio R is calculated by analyzing the shear stress (thermal stress) generated at the outer peripheral end 1o2 of the back surface 1B. The shear stress ratio R means the magnitude of the shear stress generated at the outer peripheral end 1o2 of the back surface when the magnitude of the shear stress generated at the outer peripheral end 1o2 when the first distance D1 is 0 (when the bonding material 2 reaches the first outer peripheral end 1o) is regarded as 1.
[0061] In Figure 8 , the dashed line represents the threshold value T. When the shear stress ratio R is greater than the threshold value T, a failure may occur near the end of the semiconductor element 1. When the shear stress ratio R is greater than the threshold value T, for example, the sealing resin 9 may peel off from the semiconductor element 1 at the end of the semiconductor element 1. When the shear stress ratio R is greater than the threshold value T, for example, cracks may occur in the sealing resin 9 covering the end of the semiconductor element 1. By analyzing the structure of the semiconductor device 100 in which cracks actually occur in the sealing resin 9, the threshold value T is calculated. In the present embodiment, as Figure 8 shown, the threshold value T is 0.945.
[0062] As Figure 8 shown, when the first distance D1 is 50 μm or more and 300 μm or less, the shear stress ratio R is below the threshold value T. Therefore, when the first distance D1 is 50 μm or more and 300 μm or less, the occurrence of a failure near the end of the semiconductor element 1 is suppressed.
[0063] AsFigure 8 As shown, when the first distance D1 is less than 50 μm, the shear stress ratio R is above the threshold value T. Therefore, when the first distance D1 is less than 50 μm, a failure may occur near the end of the semiconductor element 1. When the bonding material 2 reaches the first outer peripheral end 1o, the first distance D1 is 0, so a failure may occur near the end of the semiconductor element 1.
[0064] As Figure 8 shown, when the first distance D1 is large, the shear stress ratio R is above the threshold value T. Therefore, when the first distance D1 is large, a failure may occur near the end of the semiconductor element 1. Specifically, when the first distance D1 is greater than 300 μm, a failure may occur near the end of the semiconductor element 1.
[0065] Next, use Figure 9 and Figure 10 to describe the structure of the semiconductor device 100 according to the modification of Embodiment 1. Hereinafter, according to Figure 9 and Figure 10 to describe the modification of Embodiment 1. In addition, hereinafter, the same or corresponding parts are given the same reference numerals and repeated descriptions are not repeated.
[0066] As Figure 9 shown, in the modification of Embodiment 1, the bonding material 2 is disposed between the main surface 1M and the main body portion 30. As Figure 10 shown, the bonding material 2 includes a first bonding portion 20 and a second bonding portion 21. The first bonding portion 20 extends from the main surface 1M to the protruding surface 3s in the height position inside the first outer peripheral end 1o. The second bonding portion 21 extends from the protruding surface 3s toward the main body portion 30 in the height position inside the first outer peripheral end 1o. The second bonding portion 21 may also reach the main body portion 30. The second bonding portion 21 is disposed outside the third outer peripheral end 3o. As Figure 9 and Figure 10 shown, the second bonding portion 21 may at least partially cover the side surface 1S of the protruding portion 31.
[0067] Next, the effects of the present embodiment will be described.
[0068] According to the semiconductor device 100 according to Embodiment 1, as Figure 3 shown, the exposed surface 1e is disposed between the first outer peripheral end 1o and the bonding material 2. The first outer peripheral end 1o and the exposed surface 1e are exposed from the bonding material 2. Therefore, the bonding material 2 does not reach the first outer peripheral end 1o. Therefore, the thermal stress generated at the end of the semiconductor element 1 can be reduced.
[0069] Refer to Figure 3, a detailed description is given of the mechanism for reducing the thermal stress generated at the end of the semiconductor element 1 by exposing the first outer peripheral end 1o and the exposed surface 1e from the bonding material 2. As Figure 3 shown, the first outer peripheral end 1o and the exposed surface 1e are exposed from the bonding material 2. The exposed surface 1e and the first outer peripheral end 1o are sealed with a sealing resin 9. The sealing resin 9 has a lower elastic modulus than the bonding material 2. Therefore, the end portion (the first outer peripheral end 1o) of the semiconductor element 1 is more likely to deform than when the bonding material 2 reaches the first outer peripheral end 1o. Specifically, the end portion of the semiconductor element 1 is likely to deform in the vertical direction. Therefore, compared with the case where the bonding material 2 reaches the first outer peripheral end 1o, the thermal stress generated between the first outer peripheral end 1o of the semiconductor element 1 and the sealing resin 9 can be reduced.
[0070] As Figure 3 shown, since the first outer peripheral end 1o and the exposed surface 1e are exposed from the bonding material 2, the thermal stress generated at the end of the semiconductor element 1 can be reduced. Therefore, it is possible to suppress the semiconductor element 1 from peeling off from the sealing resin 9 at the end of the semiconductor element 1, and it is possible to suppress cracks from occurring in the sealing resin 9 covering the end of the semiconductor element 1.
[0071] As Figure 3 shown, the protruding portion 31 protrudes from the main body portion 30 toward the main surface 1M inside the first outer peripheral end 1o. The protruding portion 31 is joined to the main surface 1M by the bonding material 2. Therefore, the semiconductor element 1 and the heat sink 3 are directly joined by the bonding material 2. Therefore, the semiconductor element 1 and the heat sink 3 can be accurately arranged.
[0072] As Figure 3 shown, the first distance D1 between the first outer peripheral end 1o and the second outer peripheral end 2o that sandwich the exposed surface 1e is 50 μm or more and 300 μm or less. As Figure 8 shown, when the first distance D1 is 50 μm or more and 300 μm or less, the shear stress ratio R is lower than the threshold value T, so it is possible to suppress the sealing resin 9 from peeling off from the semiconductor element 1 at the end of the semiconductor element 1, and it is possible to suppress cracks from occurring in the sealing resin 9 covering the end of the semiconductor element 1. According to the semiconductor device 100 according to Embodiment 1, since the first distance D1 is 50 μm or more and 300 μm or less, it is possible to suppress the sealing resin 9 from peeling off from the semiconductor element 1 at the end of the semiconductor element 1, and it is possible to suppress cracks from occurring in the sealing resin 9 covering the end of the semiconductor element 1.
[0073] As Figure 3 shown, the second distance D2 between the first outer peripheral end 1o and the third outer peripheral end 3o along the protruding surface 3s is 50 μm or more and 300 μm or less. The bonding material 2 is disposed between the protruding surface 3s and the main surface 1M. As Figure 3 andFigure 4 As shown, the second outer peripheral end 2o can be arranged at a position outside the third outer peripheral end 3o or overlapping with the third outer peripheral end 3o in a plan view. Therefore, when the second distance D2 is 50 μm or more and 300 μm or less, the first distance D1 may be 50 μm or more and 300 μm or less. Therefore, since the first distance D1 is 50 μm or more and 300 μm or less, it is possible to suppress the sealing resin 9 from peeling off from the semiconductor element 1 at the end of the semiconductor element 1, and it is possible to suppress cracks from occurring in the sealing resin 9 covering the end of the semiconductor element 1.
[0074] The material of the sealing resin 9 is a transfer molding resin. Therefore, the sealing resin 9 can be formed by a transfer molding process.
[0075] As Figure 3 shown, the back outer peripheral end 1o2 and the side surface 1S are exposed from the bonding material 2 and the wiring bonding material 5. The back outer peripheral end 1o2 and the side surface 1S are sealed with the sealing resin 9. The sealing resin 9 has a lower elastic modulus than the bonding material 2 and the wiring bonding material 5. Therefore, the end portions (the back outer peripheral end 1o2 and the side surface 1S) of the semiconductor element 1 are more easily deformed than when the bonding material 2 and the wiring bonding material 5 reach the back outer peripheral end 1o2 and the side surface 1S. Therefore, compared with the case where the bonding material 2 and the wiring bonding material 5 reach the back outer peripheral end 1o2 and the side surface 1S, the thermal stress generated between the end portions of the semiconductor element 1 at the back outer peripheral end 1o2 and the side surface 1S and the sealing resin 9 can be reduced.
[0076] In the case where it is assumed that the bonding material 2 is arranged only between the main surface 1M and the protruding surface 3s in the height position, when the amount of the bonding material 2 increases, the bonding material 2 easily expands on the main surface 1M, so the bonding material 2 may reach the first outer peripheral end 1o. In this case, the thermal stress generated between the first outer peripheral end 1o and the sealing resin 9 may become large.
[0077] According to the semiconductor device 100 according to the modification of Embodiment 1, as Figure 10 shown, the bonding material 2 includes a second bonding portion 21. The second bonding portion 21 extends from the protruding surface 3s toward the main body portion 30 in the height position. Thus, even when the amount of the bonding material 2 increases, the second bonding portion 21 can flow out from the protruding surface 3s toward the main body portion 30. Therefore, the expansion of the bonding material 2 on the main surface 1M is suppressed, so even when the amount of the bonding material 2 increases, it is possible to suppress the bonding material 2 from reaching the first outer peripheral end 1o. Therefore, even when the amount of the bonding material 2 increases, the exposed surface 1e may be exposed from the bonding material 2. Thus, even when the amount of the bonding material 2 increases, the semiconductor device 100 can be easily manufactured, so the manufacturing cost of the semiconductor device 100 can be reduced.
[0078] Embodiment 2.
[0079] Next, use Figures 11 to 13 to illustrate the structure of the semiconductor device 100 according to Embodiment 2. Unless otherwise specified, Embodiment 2 has the same structure and effects as those of the above-described Embodiment 1. Therefore, the same reference numerals are assigned to the same structures as those of the above-described Embodiment 1, and repeated descriptions are omitted.
[0080] As Figure 11 shown, in Embodiment 2, the heat sink 3 further includes a peripheral portion 32. The peripheral portion 32 protrudes from the main body portion 30 toward the main surface 1M.
[0081] As Figure 12 shown, the peripheral portion 32 is disposed away from the bonding material 2. The peripheral portion 32 surrounds the protruding portion 31 with a gap therebetween.
[0082] As Figure 13 shown, the peripheral portion 32 has the same thickness as the protruding portion 31. The heat sink 3 including the main body portion 30, the protruding portion 31, and the peripheral portion 32 can also be formed by providing a groove G in a plate-like member. The protruding portion 31 is separated from the peripheral portion 32 by the groove G.
[0083] Next, the effects of this embodiment will be described.
[0084] According to the semiconductor device 100 according to Embodiment 2, as Figure 12 shown, the heat sink 3 further includes a peripheral portion 32. The peripheral portion 32 surrounds the protruding portion 31 with a gap therebetween. Therefore, compared with the case where the protruding portion 31 is not surrounded by the peripheral portion 32, the machining for cutting the heat sink 3 can be reduced. Therefore, the processes required for machining the heat sink 3 can be simplified. Therefore, the manufacturing cost of the semiconductor device 100 can be reduced.
[0085] Embodiment 3.
[0086] Next, use Figure 14 to illustrate the structure of the semiconductor device 100 according to Embodiment 3. Unless otherwise specified, Embodiment 3 has the same structure and effects as those of the above-described Embodiment 1. Therefore, the same reference numerals are assigned to the same structures as those of the above-described Embodiment 1, and repeated descriptions are omitted.
[0087] As Figure 14 shown, the semiconductor device 100 further includes a housing 4. The housing 4 includes an internal space IS. The sealing resin 9 is filled into the internal space IS of the housing 4 in a state where the heat sink 3, the bonding material 2, and the semiconductor element 1 are disposed in the internal space IS. The difference between the semiconductor device 100 according to Embodiment 3 and the semiconductor device 100 according to Embodiment 1 is that the housing 4 is included.
[0088] The housing 4 is joined to the metal layer 7 by a joining material (not shown). The housing 4 and the metal layer 7 form the housing of the semiconductor device 100. The material of the housing 4 is an insulating material that can be injection-molded and has high heat resistance. Specifically, the material of the housing 4 contains, for example, at least any one of polyphenylene sulfide, polybutylene terephthalate, liquid crystal resin, and fluororesin.
[0089] Next, the operation and effect of this embodiment will be described.
[0090] According to the semiconductor device 100 according to Embodiment 3, as Figure 14 shown, the semiconductor device 100 further includes a housing 4. The housing 4 and the metal layer 7 form the housing of the semiconductor device 100. Therefore, it is possible to easily connect a cooler (not shown) and external wirings (not shown) to the housing of the semiconductor device 100. Accordingly, the manufacturing process of the semiconductor device 100 is simplified, and thus the manufacturing cost of the semiconductor device 100 can be reduced.
[0091] Embodiment 4.
[0092] This embodiment is an example in which the semiconductor devices of the above Embodiments 1 to 3 are applied to a power conversion device. The present disclosure is not limited to a specific power conversion device. Hereinafter, as Embodiment 4, the case where the present disclosure is applied to a three-phase inverter will be described.
[0093] Figure 15 A block diagram showing the structure of a power conversion system of a power conversion device to which this embodiment is applied.
[0094] Figure 15 The power conversion system shown includes a power source 101, a power conversion device 200, and a load 300. The power source 101 is a DC power source that supplies DC power to the power conversion device 200. The power source 101 can be configured in various forms. For example, it can be composed of a DC system, a solar cell, a storage battery, or can also be composed of a rectifier circuit or an AC / DC converter connected to an AC system. In addition, the power source 101 can also be composed of a DC / DC converter that converts the DC power output from the DC system into predetermined power.
[0095] The power conversion device 200 is a three-phase inverter connected between the power source 101 and the load 300, which converts the DC power supplied from the power source 101 into AC power and supplies the AC power to the load 300. The power conversion device 200 includes, as Figure 15 shown: a main conversion circuit 201 that converts DC power into AC power and outputs it; and a control circuit 203 that outputs a control signal for controlling the main conversion circuit 201 to the main conversion circuit 201.
[0096] The load 300 is a three-phase motor driven by AC power supplied from the power conversion device 200. In addition, the load 300 is not limited to a specific use and is a motor mounted on various electrical devices, such as a motor for a hybrid vehicle, an electric vehicle, a railway vehicle, an elevator, or an air conditioning device.
[0097] Hereinafter, the power conversion device 200 will be described in detail. The main conversion circuit 201 includes switching elements and freewheeling diodes (not shown). By switching the switching elements, the DC power supplied from the power source 101 is converted into AC power and supplied to the load 300. The specific circuit structure of the main conversion circuit 201 has various forms, but the main conversion circuit 201 of the present embodiment is a two-level three-phase full-bridge circuit, which can include six switching elements and six freewheeling diodes connected in anti-parallel with each switching element. At least any one of the switching elements and the freewheeling diodes of the main conversion circuit 201 is a switching element or a freewheeling diode of the semiconductor device 100 corresponding to any one of the above-described Embodiments 1 to 3. The six switching elements are connected in series in pairs of two switching elements to form upper and lower branches, and each upper and lower branch forms each phase (U phase, V phase, W phase) of the full-bridge circuit. Moreover, the output terminals of each upper and lower branch, that is, the three output terminals of the main conversion circuit 201 are connected to the load 300.
[0098] In addition, the main conversion circuit 201 includes a drive circuit (not shown) for driving each switching element, but the drive circuit may be built into the semiconductor device 100 or may have a structure in which the drive circuit is independent of the semiconductor device 100. The drive circuit generates a drive signal for driving the switching elements of the main conversion circuit 201 and supplies it to the control electrodes of the switching elements of the main conversion circuit 201. Specifically, in accordance with a control signal from the control circuit 203 described later, a drive signal that makes the switching element in the conduction state and a drive signal that makes the switching element in the cut-off state are output to the control electrodes of each switching element. When the switching element is maintained in the conduction state, the drive signal is a voltage signal (conduction signal) above the threshold voltage of the switching element, and when the switching element is maintained in the cut-off state, the drive signal becomes a voltage signal (cut-off signal) below the threshold voltage of the switching element.
[0099] The control circuit 203 controls the switching elements of the main conversion circuit 201 in such a way as to supply the desired power to the load 300. Specifically, the time (on-time) during which each switching element of the main conversion circuit 201 should be in the on-state is calculated based on the power to be supplied to the load 300. For example, the main conversion circuit 201 can be controlled by PWM control that modulates the on-time of the switching elements according to the voltage to be output. Further, at each time point, a control instruction (control signal) is output to the drive circuit included in the main conversion circuit 201 in such a way that an on-signal is output to the switching element that should be in the on-state and an off-signal is output to the switching element that should be in the off-state. The drive circuit outputs an on-signal or an off-signal as a drive signal to the control electrode of each switching element in accordance with this control signal.
[0100] In the power conversion device according to the present embodiment, as the semiconductor device 100 constituting the main conversion circuit 201, the semiconductor devices of Embodiment 1 to Embodiment 3 are applied, so that a power conversion device can be realized which can reduce the thermal stress generated at the ends of the semiconductor elements and can accurately arrange the semiconductor elements and the heat sink.
[0101] In the present embodiment, an example in which the present disclosure is applied to a two-level three-phase inverter has been described, but the present disclosure is not limited thereto, and can be applied to various power conversion devices. In the present embodiment, a two-level power conversion device is assumed, but it may also be a three-level or multi-level power conversion device. When supplying power to a single-phase load, the present disclosure can also be applied to a single-phase inverter. Further, when supplying power to a DC load or the like, the present disclosure can also be applied to a DC / DC converter or an AC / DC converter.
[0102] In addition, the power conversion device to which the present disclosure is applied is not limited to the case where the above load is a motor. For example, it can be used as a power supply device for an electric discharge machine, a laser processing machine, an induction heating cooker, or a non-contact power supply system, and further can also be used as a power conditioner for a solar power generation system, a power storage system, or the like.
[0103] It should be considered that the embodiments disclosed herein are illustrative only and not restrictive in all respects. The scope of the present disclosure is shown not by the above description but by the claims, and is intended to include all modifications within the meaning and scope equivalent to the claims.
Claims
1. A semiconductor device comprising: A semiconductor element including a main surface having a first outer peripheral end; A bonding material disposed on the main surface; A heat sink bonded to the main surface through the bonding material; A sealing resin for sealing the semiconductor element, the bonding material, and the heat sink; And A wiring component bonded to the heat sink and electrically connected to the semiconductor element via the heat sink and the bonding material, and the wiring component is partially exposed from the sealing resin, The heat sink includes: A main body portion disposed on the side opposite to the semiconductor element with respect to the bonding material; And A protruding portion protruding from the main body portion toward the main surface inside the first outer peripheral end, The protruding portion includes a protruding surface and is bonded to the main surface through the bonding material, The semiconductor element includes a first electrode bonded to the protruding portion through the bonding material, The main surface has an exposed surface disposed between the first outer peripheral end and the bonding material, The first outer peripheral end and the exposed surface are exposed from the bonding material and sealed by the sealing resin, The first electrode includes the main surface having the exposed surface, The bonding material includes a first bonding portion and a second bonding portion that meet at a position extending the protruding surface, The first bonding portion extends from the main surface to the protruding surface in a height position inside the first outer peripheral end, The size of the first bonding portion increases from the protruding surface toward the main surface starting from the position extending the protruding surface, The second bonding portion extends from the protruding surface toward the main body portion in a height position inside the first outer peripheral end.
2. The semiconductor device according to claim 1, wherein The bonding material includes a second outer peripheral end disposed on the main surface, The distance between the first outer peripheral end and the second outer peripheral end sandwiching the exposed surface is 50 μm or more and 300 μm or less.
3. The semiconductor device according to claim 2, wherein The protruding portion includes a protruding surface having a third outer peripheral end and bonded to the bonding material, The distance between the first outer peripheral end and the third outer peripheral end along the protruding surface is 50 μm or more and 300 μm or less.
4. The semiconductor device according to any one of claims 1 to 3, wherein The heat sink further includes a peripheral portion protruding from the main body portion toward the main surface and disposed away from the bonding material, The peripheral portion surrounds the protruding portion with a gap from the protruding portion.
5. The semiconductor device according to any one of claims 1 to 3, wherein The material of the sealing resin is a transfer molding resin.
6. The semiconductor device according to any one of claims 1 to 3, wherein The semiconductor device further includes a housing including an internal space, In a state where the heat sink, the bonding material, and the semiconductor element are disposed in the internal space, the sealing resin is filled into the internal space of the housing.
7. A power conversion device comprising: The main conversion circuit, having the semiconductor device according to any one of claims 1 to 6, converts the input power and outputs it; and The control circuit outputs a control signal for controlling the main conversion circuit to the main conversion circuit.
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