A method for testing delay characteristics

Abstract

The present application provides a method for testing delay characteristics, including: synchronously measuring the time of an external trigger signal applied to a control system, measuring the event chain time from the sensor sending the trigger signal to the actuator in the control system, and continuously recording the occurrence time of each trigger signal and the event chain time; based on test time data, determining the running time of each subtask in each smaller time frame and the running time of each subtask in each larger time frame; constructing a graphical running time map of each subtask in each small frame and a running time map of each subtask in each large frame according to the running time, and analyzing delay and jitter; constructing a formal map that is jointly displayed in a graphical and data table according to the running time, and analyzing to obtain the maximum running time and minimum running time of each subtask, each small frame task and each large frame task; and comparing and analyzing the running time map generated according to the test time data with the simulation results.

Description

Technical Field

[0001] The present application relates to the technical field of delay testing, and in particular to a method for testing delay characteristics. Background Art

[0002] Latency refers to the time required for a message or packet to be sent from one end of a network to the other, and usually includes sending delay, transmission delay, and processing delay.

[0003] Traditional latency testing methods rely on manually recording the sender's transmission time and the receiver's reception time to reverse-calculate network latency. However, this method only calculates network latency and cannot perform functions such as latency jitter and closed-loop analysis. Furthermore, it requires recording a large number of relevant time parameters, severely impacting work efficiency. Summary of the Invention

[0004] The purpose of this application is to provide a delay characteristic testing method to solve or alleviate at least one problem in the background technology.

[0005] The technical solution of this application is: a delay characteristic testing method, comprising:

[0006] 1) Transmission delay test

[0007] Through the drive interface, the external trigger signal applied to the control system is synchronized with the time measurement, and the event chain time from the sensor sending the trigger signal to the actuator in the control system is measured. The occurrence time of each trigger signal and the event chain time are continuously recorded to complete the transmission delay test;

[0008] 2) Time domain characteristics analysis

[0009] Based on the test time data, determine the running time of each subtask in each smaller time frame and the running time of each subtask in each larger time frame;

[0010] Based on the determined running times of each subtask in each smaller time frame and each subtask in each larger time frame, a graphical running time map of each subtask in each smaller time frame and each subtask in each larger time frame is constructed, thereby intuitively displaying the delay and jitter of each subtask in each smaller time frame and the delay and jitter of each subtask in each larger time frame;

[0011] Based on the determined running time, a graph is constructed that is displayed in a graphical and tabular format, thereby analyzing and obtaining the maximum and minimum running time of each subtask, the maximum and minimum running time of each small frame task, and the maximum and minimum running time of each large frame task;

[0012] 3) Comparative analysis between actual measurement and simulation

[0013] The runtime graph generated based on the test time data is compared and analyzed with the simulation results.

[0014] Furthermore, the length of each larger time frame is an integer multiple of the length of the smaller time frame.

[0015] Furthermore, in constructing the graphical graph of the running time of each subtask in each smaller time frame and / or the graph of the running time of each subtask in each larger time frame, the running time of each subtask in each smaller frame is arranged vertically.

[0016] Furthermore, the maximum running time and the minimum running time of each small frame task are counted separately according to the sequential numbering of the multiple small frames.

[0017] Furthermore, the comparative analysis of the runtime graph generated based on the test time data and the simulation results includes:

[0018] Each type of analysis result has the ability to compare and analyze timing planning results and theoretical simulation results;

[0019] Analyze the timing interactions between software, peripherals, and buses to help understand the chain of events from sensors to actuators;

[0020] Analyze various timing matching combinations of bus and software, and automatically screen out abnormal situations;

[0021] The theoretical value of the timing plan can be displayed explicitly on the graphical interface.

[0022] Furthermore, the method further includes: generating a report document based on the test and analysis results, and providing a closed-loop time delay range.

[0023] The delay characteristic testing method provided in this application includes the processes of task operation data collection, real-time analysis and display of operation time, data analysis and return visit, and comparison between actual measurement and simulation. Compared with traditional delay testing methods, it realizes functions such as delay jitter and closed-loop delay analysis, and automatically completes data recording, execution time calculation and other processes, solves the dynamic analysis problem, and improves test efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] In order to more clearly illustrate the technical solutions provided by this application, the following is a brief introduction to the accompanying drawings. Obviously, the accompanying drawings described below are only some embodiments of this application.

[0025] Figure 1 Schematic diagram of the delay characteristic testing method of this application.

[0026] Figure 2 This is a graphical transmission delay test diagram constructed in one embodiment of the present application. DETAILED DESCRIPTION

[0027] In order to make the purpose, technical solutions and advantages of the implementation of this application clearer, the technical solutions in the embodiments of this application will be described in more detail below in conjunction with the drawings in the embodiments of this application.

[0028] In order to overcome the problems raised in the background technology, this application proposes a delay characteristic testing method and device, which is oriented to the control system and relies on test data and test cases to realize the control system's transmission delay jitter analysis, software execution and communication time analysis, bus and software timing matching analysis, and abnormal situation analysis, etc., and supports the generation of analysis reports, provides closed-loop delay analysis, and thus improves test efficiency.

[0029] like Figure 1 As shown, the present application proposes a delay characteristic testing method for a control system, which includes the following steps:

[0030] 1) Transmission delay test

[0031] Through the drive interface, the external trigger signal applied to the control system is synchronized with the time measurement, and the event chain time from the sensor sending the trigger signal to the actuator in the control system is measured. The occurrence time of each trigger signal and the event chain time are continuously recorded to complete the transmission delay test;

[0032] 2) Time domain characteristics analysis

[0033] Based on the test time data, determine the running time of each subtask in each smaller time frame and the running time of each subtask in each larger time frame, wherein the length of each larger time frame is an integer multiple of the length of the smaller time frame. For example, in some embodiments of the present application, the length of the larger time frame is 100 ms, and the length of the smaller time frame is 5 ms;

[0034] Based on the determined running times, a graphical running time map of each subtask in each smaller time frame and a graphical running time map of each subtask in each larger time frame are constructed, so as to intuitively display the delay and jitter of each subtask in each smaller time frame and the delay and jitter of each subtask in each larger time frame; wherein, in constructing the graphical running time map of each subtask in each smaller time frame and the graphical running time map of each subtask in each larger time frame, the running times of the subtasks in each smaller time frame can be arranged vertically;

[0035] Based on the determined running time, a graph is constructed that is displayed in a graphical and tabular format, so that the maximum and minimum running time of each subtask, the maximum and minimum running time of each small frame task (arranged and counted in order of 8 small frames), and the maximum and minimum running time of each large frame task can be analyzed;

[0036] like Figure 2 Shown is a graphical transmission delay test diagram constructed in this application.

[0037] 3) Comparative analysis between actual measurement and simulation

[0038] The runtime graph generated from the test time data is compared and analyzed with the simulation results. Each of these analysis types offers the ability to compare and analyze timing planning results with theoretical simulation results. The timing interactions between software, peripherals, and buses are analyzed to aid in understanding the chain of events from sensors to actuators. Various timing matching combinations between buses and software are analyzed to automatically identify anomalies. The theoretical values ​​of the timing plan are displayed explicitly on a graphical interface.

[0039] Finally, the method of the present application further includes: generating a report document based on the test and analysis results, providing a closed-loop time delay range.

[0040] The delay characteristic testing method provided in this application includes the processes of task operation data collection, real-time analysis and display of operation time, data analysis and return visit, and comparison between actual measurement and simulation. Compared with traditional delay testing methods, it realizes functions such as delay jitter and closed-loop delay analysis, and automatically completes data recording, execution time calculation and other processes, solves the dynamic analysis problem, and improves test efficiency.

[0041] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of the present application. Therefore, the scope of protection of the present application should be based on the scope of protection of the claims.

Claims

1. A method for testing delay characteristics, characterized in that: include: 1) Transmission delay test Through the drive interface, the external trigger signal applied to the control system is synchronized with the time measurement, and the event chain time from the sensor sending the trigger signal to the actuator in the control system is measured. The occurrence time of each trigger signal and the event chain time are continuously recorded to complete the transmission delay test; 2) Time domain characteristics analysis Based on the test time data, determine the running time of each subtask in each smaller time frame and the running time of each subtask in each larger time frame; Based on the determined running times of each subtask in each smaller time frame and each subtask in each larger time frame, a graphical running time map of each subtask in each smaller time frame and each subtask in each larger time frame is constructed, thereby intuitively displaying the delay and jitter of each subtask in each smaller time frame and the delay and jitter of each subtask in each larger time frame; Based on the determined running time, a graph is constructed in the form of a combined graphical and data table display, so as to analyze and obtain the maximum running time and minimum running time of each subtask, the maximum running time and minimum running time of each smaller time frame task, and the maximum running time and minimum running time of each larger time frame task; 3) Comparative analysis between actual measurement and simulation The runtime graph generated based on the test time data is compared and analyzed with the simulation results.

2. The delay characteristic testing method according to claim 1, wherein: The length of each larger time frame is an integer multiple of the length of the smaller time frame.

3. The delay characteristic testing method according to claim 1, wherein: In constructing the graphical runtime graph of each subtask in each smaller time frame and / or the runtime graph of each subtask in each larger time frame, the runtime of the subtasks in each smaller time frame is arranged vertically.

4. The delay characteristic testing method according to claim 1, wherein: The maximum running time and minimum running time of each smaller time frame task are counted separately according to the order of multiple small frames.

5. The delay characteristic testing method according to claim 1, wherein: The comparative analysis of the runtime graph generated based on the test time data and the simulation results includes: Each type of analysis result has the ability to compare and analyze timing planning results and theoretical simulation results; Analyze the timing interactions between software, peripherals, and buses to help understand the chain of events from sensors to actuators; Analyze various timing matching combinations of bus and software, and automatically screen out abnormal situations; The theoretical value of the timing plan can be displayed explicitly on the graphical interface.

6. The delay characteristic testing method according to claim 1, wherein: Also includes: Generate a report document based on the test and analysis results, giving the closed-loop time delay range.

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