A single-stage isolated topology circuit and control method

Abstract

This invention discloses a single-stage isolated topology circuit and its control method. The single-stage isolated topology circuit includes: a primary circuit connected to a three-phase power grid, a first secondary circuit and a second secondary circuit connected to an output capacitor, a first transformer electrically connected between the primary circuit and the first secondary circuit, and a second transformer electrically connected between the primary circuit and the second secondary circuit. All switches in the primary circuit are bidirectional switches, and the primary windings of the first transformer and the second transformer are connected in series to the output side of the primary circuit. Compared with the prior art, this invention can achieve both power factor correction and isolation without adding an energy storage inductor and a bus capacitor, thereby improving the power density of the charging module and offering advantages such as fewer components and lower cost.

Description

Technical Field

[0001] This invention relates to electric vehicles, and in particular to a single-stage isolated topology circuit and control method. Background Technology

[0002] With the development of new energy electric vehicles, the driving range has increased, the battery capacity has increased, and the charging speed requirements are getting faster and faster. The power requirements for charging piles are also getting higher and higher. Currently, increasing the power of charging piles is achieved by increasing the number of parallel charging modules. However, charging pile modules are implemented through a two-level topology, which is complex in design, has many components, high cost, and makes it difficult to improve power density.

[0003] Therefore, how to design a topology circuit that can overcome the shortcomings of existing technologies is a technical problem that the industry urgently needs to solve. Summary of the Invention

[0004] In view of the problems that existing charging piles use a two-stage topology, resulting in complex design, many components, high cost, and difficulty in improving power density, this invention proposes a single-stage isolated topology circuit and control method.

[0005] The technical solution of this invention is to propose a single-stage isolated topology circuit, including: a primary circuit connected to a three-phase power grid, a first secondary circuit and a second secondary circuit connected to an output capacitor, a first transformer electrically connected between the primary circuit and the first secondary circuit, and a second transformer electrically connected between the primary circuit and the second secondary circuit. All switching transistors in the primary circuit are bidirectional switches, and the primary windings of the first transformer and the second transformer are connected in series to the output side of the primary circuit.

[0006] Furthermore, the primary-side circuit adopts a three-phase full-bridge circuit, which has a first bridge arm, a second bridge arm, and a third bridge arm for connecting to a three-phase power grid, wherein the three phases of the three-phase power grid are respectively connected to the midpoints of the first bridge arm, the second bridge arm, and the third bridge arm.

[0007] The first secondary circuit adopts a bridge circuit, which has a fourth bridge arm and a fifth bridge arm composed of rectifier diodes, and the input side of the first secondary circuit is connected to the secondary winding of the first transformer, and the output side is connected to the output capacitor.

[0008] The second secondary circuit adopts a bridge circuit, which has a sixth bridge arm and a seventh bridge arm composed of power switching transistors. The input side of the second secondary circuit is connected to the secondary winding of the second transformer, and the output side is connected to the output capacitor.

[0009] Furthermore, it also includes a resonant circuit connected to the output side of the primary circuit. The resonant circuit has at least one resonant capacitor and one resonant inductor, and the resonant capacitor and the resonant inductor are connected in series between the output side of the primary circuit and the primary winding of the first transformer.

[0010] Furthermore, the turns ratio of the primary winding to the secondary winding of the first transformer is the same as that of the primary winding to the secondary winding of the second transformer, so that the output current of the first secondary circuit and the second secondary circuit are balanced.

[0011] Furthermore, it also includes a first filter circuit connected between the three-phase power grid and the primary circuit. The first filter circuit includes at least three input EMI capacitors, and each phase of the three-phase power grid is connected to an input EMI capacitor. One end of the input EMI capacitor is connected between the three-phase power grid and the primary circuit, and the other end is grounded.

[0012] Furthermore, it also includes a second filter circuit connected to the output terminal of the second secondary circuit. The second filter circuit has at least two output EMI capacitors, and each of the first and second output terminals of the second secondary circuit is connected to an output EMI capacitor, with the other end of the output EMI capacitor grounded.

[0013] Furthermore, the bidirectional switch is a switching unit formed by two IGBTs connected in reverse parallel or two MOSFETs connected in reverse series.

[0014] This invention also proposes a control method for a single-stage isolated topology circuit, comprising:

[0015] Control the operating state of each switch in the primary circuit to make the primary circuit output a square wave voltage;

[0016] The output voltage signal of the primary circuit and the input voltage signal of the second secondary circuit are detected, and the phase shift angle of the input voltage signal of the second secondary circuit relative to the output voltage signal of the primary circuit is determined.

[0017] The conduction state of the power switch in the second secondary circuit is controlled to adjust the phase shift angle, thereby adjusting the output power.

[0018] Furthermore, before adjusting the phase shift angle, it is necessary to perform dual-loop control on the output current and output voltage of the second secondary circuit to obtain the phase shift angle, which includes:

[0019] The output current of the second secondary circuit is calculated by difference with the current loop reference value, and loop compensation is performed on the difference. The obtained compensation value is then compared with the voltage loop preset value, and the smaller value is used as the voltage loop reference value. The output voltage is then calculated by difference with the voltage loop reference value, and loop compensation is performed on the difference. The phase shift angle is calculated by comparing the obtained compensation value with the output power.

[0020] Furthermore, all power switches in the second secondary circuit are turned on alternately, and the upper arm switch of the sixth bridge arm and the lower arm switch of the seventh bridge arm of the second secondary circuit switch at the same time, and the lower arm switch of the sixth bridge arm and the upper arm switch of the seventh bridge arm switch at the same time.

[0021] Compared with the prior art, the present invention has at least the following beneficial effects:

[0022] This invention enables power factor correction in a single-stage topology by controlling the conduction state of each switch in the primary circuit. Furthermore, by setting the turns ratio of the first and second transformers to be the same, this invention achieves output current balance between the first and second secondary circuits. In addition, this invention eliminates the original design of energy storage inductors and bus capacitors, resulting in fewer components and lower cost. Attached Figure Description

[0023] To more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0024] Figure 1 This is a block diagram of the single-stage isolated topology circuit of the present invention;

[0025] Figure 2 This is a schematic diagram of the circuit topology of the single-stage isolated topology circuit of the present invention;

[0026] Figure 3 This is a schematic diagram of the bidirectional switch of the present invention;

[0027] Figure 4 Here is a schematic diagram of the voltage waveform for Up;

[0028] Figure 5 This is the control timing diagram for the second secondary circuit;

[0029] Figure 6 The diagram shows the voltage waveforms of Us1 and Us2.

[0030] Figure 7This is a schematic diagram of the voltage waveforms for Us2 and Up;

[0031] Figure 8 The diagram shows the voltage waveforms of Van, Vbn, and Vcn.

[0032] Figure 9 This is a schematic diagram of the circuit topology of a single-stage isolated topology circuit according to an embodiment of the present invention;

[0033] Figure 10 This is the control timing diagram of the primary-side circuit of the present invention;

[0034] Figure 11 This is a control block diagram of the entire invention;

[0035] Figure 12 This is a schematic diagram showing the output current of the first secondary circuit, the output current of the second secondary circuit, and the total output current.

[0036] Figure 13 This is a simulation diagram of the current waveform in another embodiment;

[0037] Figures 14 to 16 These are schematic diagrams of circuit topologies under different embodiments of the present invention;

[0038] Figure 17 This is a schematic diagram of the existing two-level topology. Detailed Implementation

[0039] To make the technical problems to be solved, the technical solutions, and the beneficial effects of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present invention and are not intended to limit the present invention.

[0040] Therefore, a feature pointed out in this specification is used to describe one feature of one embodiment of the invention, and does not imply that every embodiment of the invention must have the described feature. Furthermore, it should be noted that this specification describes many features. Although certain features may be combined to illustrate possible system designs, these features may also be used in other combinations not explicitly stated. Therefore, unless otherwise stated, the described combinations are not intended to be limiting.

[0041] The principles and structure of the present invention will be described in detail below with reference to the accompanying drawings and embodiments.

[0042] Charging pile modules are typically implemented using a two-stage topology, which is complex in design, involves many components, and is costly, making it difficult to improve power density. The present invention proposes a single-stage isolated topology circuit. By improving the circuit topology and control method, it can achieve both power factor correction (PFC) and isolation without adding an energy storage inductor or bus capacitor, thereby improving the power density of the charging module.

[0043] Please see Figure 17 In existing technologies, charging pile modules generally consist of AC input, ACDC module, DCDC module, and DC output, which are implemented through a two-level topology, making the design complex.

[0044] Please see Figure 1 The single-stage isolated topology circuit proposed in this invention includes a primary circuit connected to a three-phase power grid, a first secondary circuit and a second secondary circuit connected to an output capacitor, a first transformer electrically connected between the primary circuit and the first secondary circuit, and a second transformer electrically connected between the primary circuit and the second secondary circuit. All switches in the primary circuit are bidirectional switches, and the primary windings of the first transformer and the second transformer are connected in series on the output side of the primary circuit. The first transformer refers to… Figure 1 Transformer T1 in the middle, the second transformer refers to Figure 1 Transformer T2 in the middle.

[0045] For details, please see Figure 2 The primary-side conversion circuit adopts a three-phase full-bridge circuit, which has a first bridge arm, a second bridge arm, and a third bridge arm connected to the three-phase power grid. Switches S1 and S4 form the first bridge arm, with S1 acting as the upper arm switch and S4 as the lower arm switch. Switches S2 and S5 form the second bridge arm, with S2 acting as the upper arm switch and S5 as the lower arm switch. Switches S3 and S6 form the third bridge arm, with S3 acting as the upper arm switch and S6 as the lower arm switch. Phase a of the three-phase power grid is connected to the midpoint of the first bridge arm, phase b to the midpoint of the second bridge arm, and phase c to the midpoint of the third bridge arm. Only when switches S1-S6 are controlled according to the corresponding timing sequence are the terminals d and e of the three-phase full-bridge circuit (e.g., Figure 2 The voltage is generated only when the voltage at points d and e is Up. That is, the orderly control of the voltage at points d and e can be achieved by controlling the control timing of the switching transistors S1-S6. In this invention, the capacitors at points d and e are eliminated. After following a certain control timing, power factor correction can be directly achieved.

[0046] The first secondary-side conversion circuit adopts a bridge circuit, which has a fourth bridge arm and a fifth bridge arm composed of rectifier diodes. Diodes D1 and D2 form the fourth bridge arm, and diodes D3 and D4 form the fifth bridge arm. The first output terminal and the second output terminal of the first transformer are respectively connected to the midpoint of the fourth bridge arm and the fifth bridge arm. The output terminal of the first secondary-side conversion circuit is connected to the two ends of the output capacitor C7. It can receive the current output by the first transformer, rectify it, and then transmit it to the output capacitor C7.

[0047] In other embodiments of the present invention, the switching transistors in the first secondary-side conversion circuit can also be other active devices, such as Si MOSFETs, SiC MOFETs, IGBTs, etc. When other active devices are used, the first secondary-side conversion circuit can also adjust the output current by adjusting the conduction state of the switching transistors on the fourth and fifth bridge arms; please refer to Figure 15 and Figure 16 These are connection diagrams for two different embodiments of the second secondary circuit in this invention.

[0048] The second secondary-side circuit adopts a bridge circuit, which has a sixth and a seventh bridge arm composed of power switching transistors. Switches Q1 and Q3 form the sixth bridge arm, with Q1 acting as the upper arm switch and Q3 as the lower arm switch. Switches Q2 and Q4 form the seventh bridge arm, with Q2 acting as the upper arm switch and Q4 as the lower arm switch. The first and second output terminals of the second transformer are connected to the midpoints of the sixth and seventh bridge arms, respectively. The output terminal of the second secondary-side conversion circuit is connected to both ends of the output capacitor C7. In this embodiment, since the first secondary-side conversion circuit uses rectifier diodes, it cannot perform power conversion. Therefore, this invention mainly adjusts the current and voltage output to the output capacitor by controlling the conduction state of each switch in the second secondary-side conversion circuit. By adjusting the conduction state of switches Q1-Q4, the output current and output voltage of the second secondary-side conversion circuit are thus adjusted. In other embodiments of the present invention, when the first secondary-side conversion circuit uses other active devices to form a bridge circuit, each switch in the first secondary-side conversion circuit can be added to the control, and together with the second secondary-side conversion circuit, the output voltage and output current can be controlled.

[0049] Among them, switching transistors Q1, Q2, Q3, and Q4 can be MOSFETs, SiC MOSFETs, IGBTs, and parallel diodes, etc. A capacitor C6 is also connected in series between the secondary winding N4 of the second transformer and the second secondary switching circuit. C6 acts as a DC blocking capacitor. Figure 14 In other embodiments of the present invention, capacitor C6 may be omitted.

[0050] The first transformer is transformer T1, whose primary winding N1 is electrically connected to the primary circuit, and its secondary winding N2 is electrically connected to the first secondary circuit. It is used for DC-DC conversion and provides input current to the first secondary circuit. The second transformer is transformer T2, whose primary winding N3 is electrically connected to the primary circuit, and its secondary winding N4 is electrically connected to the second secondary circuit. It is used for DC-DC conversion and provides input current to the second secondary circuit. In this invention, the primary winding N1 of the first transformer and the primary winding N3 of the second transformer are connected in series at the output terminal of the three-phase full-bridge circuit. The turns ratio of the primary winding to the secondary winding of the first transformer is the same as that of the primary winding to the secondary winding of the second transformer. Since the primary winding N1 of the first transformer and the primary winding N3 of the second transformer are in series, the current received on the primary winding N1 of the first transformer is the same as the current received on the primary winding N3 of the second transformer. Furthermore, since the turns ratio of the first transformer and the second transformer is the same, the current mapped from the first transformer to its secondary winding N2 is the same as the current mapped from the second transformer to its secondary winding N4. This achieves the purpose of current sharing.

[0051] Please see Figure 2 A resonant circuit is also connected in series on the output side of the primary circuit. This resonant circuit has at least one resonant circuit and one resonant inductor to form an LC resonant circuit. In other embodiments of the invention, an LLC resonant circuit can be used to replace the aforementioned LC resonant circuit, such as... Figure 2 The resonant inductor is Lr, and the resonant capacitor is Cr. The inductor Lr and the capacitor Cr are connected in series between the output side of the primary circuit and the primary winding of the first transformer. The inductor Lr can be a single inductor or the leakage inductance of the transformer.

[0052] In this invention, when controlling the primary circuit, due to the presence of inductor Lr and capacitor Cr in the resonant circuit, they form a network whose equivalent impedance changes with the switching cycle. The specific impedance change model is as follows:

[0053] Where fs is the switching period of the switching transistor in the primary circuit, and Z(fs) is the equivalent impedance of the resonant circuit. Z(fs) will change with fs. In practical applications, in order to improve efficiency and avoid excessive reactive power, fs will be controlled according to the power, and then Z(fs) will be changed to obtain the optimal matching impedance.

[0054] Please see Figure 2A first filter circuit is also connected between the three-phase circuit and the primary-side circuit. This first filter circuit includes at least three input EMI capacitors, ensuring that each phase of the three-phase power grid is connected to an input EMI capacitor. One end of each input EMI capacitor is connected between the three-phase power grid and the primary-side conversion circuit, and the other end is grounded. In this case, the input EMI capacitor can act as a common-mode capacitor to filter out common-mode interference. Please refer to [link to relevant documentation]. Figure 2 In this embodiment, four input EMI capacitors are provided: capacitor C1, capacitor C2, capacitor C3, and capacitor C4. One end of capacitor C1 is connected to phase a of the three-phase power grid, and the other end is connected to one end of capacitor C4. One end of capacitor C2 is connected to phase b of the three-phase power grid, and the other end is connected to one end of capacitor C4. One end of capacitor C3 is connected to phase c of the three-phase power grid, and the other end is connected to one end of capacitor C4. The other end of capacitor C4 is grounded. This connection method can achieve the purpose of filtering out common-mode interference and differential-mode interference at the same time.

[0055] Furthermore, to improve the overall EMI performance of the invention, a second filter circuit is provided at the output terminal of the second secondary circuit. This second filter circuit has at least two output EMI capacitors, such as... Figure 2 The capacitors C8 and C9 are connected as follows: one end of capacitor C8 is connected to the first output terminal of the second secondary circuit, and the other end is grounded; one end of capacitor C9 is connected to the second output terminal of the second secondary circuit, and the other end is grounded. In this invention, since the first and second secondary circuits are connected together, the second filter circuit can simultaneously filter the outputs of both circuits. Capacitor C7 serves as the output capacitor, and its two ends can be connected to an external load for power supply.

[0056] Please see Figure 3 This is an embodiment of the bidirectional switch structure of the present invention. In this application, the bidirectional switch is mainly used to switch the flow of bidirectional current, and can also make the current conduct or disconnect. The bidirectional switch can be formed by two IGBTs connected in reverse parallel, or two MOS transistors connected in reverse series, or other forms, which are not limited here.

[0057] exist Figure 2 In the topology shown, the voltage at the primary winding N1 of the first transformer is Us1′, and the corresponding voltage at the secondary winding N2 is Us1. Voltages Us1 and Us1′ satisfy the following condition:

[0058] The voltage at the primary winding N3 of the second transformer is Us2', and the corresponding voltage at the secondary winding N4 is Us2, where voltages Us2 and Us2' satisfy...

[0059] Please see Figure 6The voltage waveforms of Us1 and Us2 in this invention are such that the sum of the absolute values ​​of their peak values ​​is equal to the total output voltage Vo (ignoring the voltage drop of the output switch).

[0060] The main voltage regulation principle of this invention is to generate a square wave voltage by controlling Up (the voltage across terminals d and e), thereby creating a phase shift angle between Us2 and Up. By controlling the phase shift angle This enables control over the output voltage and output power. For example... Figure 7 As shown, taking the primary circuit as a reference, when the phase shift angle... When the secondary side Us2 leads the primary side Up, the gain and output power can be increased. This is achieved when the phase shift angle... When the secondary side Us2 lags behind the primary side Up, the gain can be reduced and the output power decreased. It should be noted that in this control process, the switching period fs of each switch in the primary circuit needs to be considered in order to obtain the optimal impedance matching characteristics of the resonant circuit.

[0061] Please see Figure 4 In this invention, by controlling the first, second, and third bridge arms in the primary circuit, the voltage Up at the input terminals d and e of the primary circuit is made to form a square wave signal. Please refer to [link to relevant documentation]. Figure 8 and Figure 9 The Up voltage control method of the present invention will be described below with reference to a specific embodiment. In this embodiment, the bidirectional switch in the primary side circuit is implemented by two MOSFETs connected in reverse series. The upper arm switch of the first bridge arm consists of MOSFETs AH1 and AH2 connected in reverse series, and the lower arm switch of the first bridge arm consists of MOSFETs AL1 and AL2 connected in reverse series. The upper arm switch of the second bridge arm consists of MOSFETs BH1 and BH2 connected in reverse series, and the lower arm switch of the second bridge arm consists of MOSFETs BL1 and BL2 connected in reverse series. Composed of BL2, the upper arm switch of the third bridge arm consists of MOSFETs CH1 and CH2 connected in reverse series, and the lower arm switch of the third bridge arm consists of MOSFETs CL1 and CL2 connected in reverse series. Van, Vbn, and Vcn are the voltages of phases A, B, and C of the three-phase power grid, respectively. A sinusoidal voltage wave is divided into 12 regions based on its zero-crossing points and the points of interaction. After this division, the voltage Up forms a pulsating square wave, with the corresponding peak voltage being the line voltage of the three-phase AC voltage. Specifically, its 12 regions are:

[0062] Va <vc>0 < Vb, the corresponding Up peak voltage in Region Ⅰ is Ucb

[0063] Va > Vc > 0 < Vb, the corresponding Up peak voltage in Region Ⅱ is Uab

[0064] Va > 0 < Vc < Vb, the corresponding Up peak voltage in Region Ⅲ is Uab

[0065] Va > 0 < Vb < Vc, the corresponding Up peak voltage in Region Ⅳ is Uac

[0066] Va > Vb > 0 < Vc, the corresponding Up peak voltage in Region Ⅴ is Uac

[0067] Va <vb>The peak voltage Up corresponding to the 0<VcⅥ region is Ubc

[0068] For the Vb>0<Va<VcⅦ region, the peak voltage Up is Ubc

[0069] For the Vb>0<Vc<VaⅧ region, the peak voltage Up is Uba

[0070] For the Vb>Vc>0<VaⅨ region, the peak voltage Up is Uba

[0071] For the Vc>Vb>0<Va Ⅹ region, the peak voltage Up is Uca

[0072] For the Vc>0<Vb<Va XI region, the peak voltage Up is Uca

[0073] For the Vc>0<Va<Vb XII region, the peak voltage Up is Ucb

[0074] In the above 12 regions, the operating sequences of the corresponding switching tubes in each region are different. Now, the driving of Region I is described as follows:

[0075] Such as Figure 10 , when BH2 = 1, CL2 = 1, Up = Vbc;

[0076] When BH2 = 1, AL2 = 1, Up = Vba;

[0077] When BL1 = 1, CH1 = 1, Up = -Vbc;<00​​​​​​​​​​​​​​​​​​The conduction state of the power switch in the second secondary circuit is controlled to adjust the phase shift angle, thereby adjusting the output power.

[0084] The specific steps for calculating the phase shift angle are as follows:

[0085] The output voltage and current of the output capacitor from the first and second secondary circuits are collected, and the output power is calculated.

[0086] The output current and output voltage are controlled by a dual-loop system consisting of an outer current loop and an inner voltage loop. The phase shift angle is calculated based on the compensation value obtained from the dual-loop control and the output power.

[0087] The power switching transistors in the second secondary circuit are controlled to follow the corresponding driving operation of each power switching transistor in the primary circuit with a phase shift angle.

[0088] Specifically, dual-loop control is implemented for the output current and output voltage, consisting of an outer current loop and an inner voltage loop. The phase shift angle is calculated by combining the compensation value obtained from the dual-loop control with the output power. This includes:

[0089] The output current is calculated by subtracting the current loop reference value and then performing loop compensation on the difference. The resulting compensation value is then compared with the voltage loop preset value, and the smaller value is used as the voltage loop reference value. The output voltage is then calculated by subtracting the voltage loop reference value and then performing loop compensation on the difference. The phase shift angle is then calculated using the resulting compensation value and the output power.

[0090] Please see Figure 5 In the simulation, the control logic of the second secondary circuit has a duty cycle of 50% for all power switches. Furthermore, the upper arm switch of the sixth bridge arm and the lower arm switch of the seventh bridge arm switch switch at the same time, and vice versa. It should be noted that in actual operation, due to dead time considerations, the duty cycle of the switches in the second secondary circuit is not 50%. In this case, the switches on the same bridge arm in the second secondary circuit will conduct alternately.

[0091] In one application example of this invention, the input of the three-phase power grid is 380AC, the output of the single-stage isolated topology circuit is 300V, and the output power is 21KW, that is, the total output current is 70A. The simulation parameters are as follows:

[0092]

[0093]

[0094] Please see Figure 12 The output current waveforms of the first secondary circuit, the second secondary circuit, and the total output current waveform are completely identical. The output currents of the first and second secondary circuits show almost no deviation. This invention achieves current sharing control, and the sum of the output currents of the first and second secondary circuits is approximately equal to the total output current, proving the feasibility of the control method described in this invention. Please refer to the table below for simulation results under these parameters:

[0095] project result The first secondary circuit output current (Io1) 35.019A The output current (Io2) of the second secondary circuit 35.025A Total output current (Io) 70.045A

[0096] Please see Figure 13 The simulation results are from another embodiment of the present invention. As can be seen from the simulation results, by using the hardware topology and control scheme of the present invention, good tracking of input current and input voltage can still be maintained even without an input inductor.

[0097] Compared with existing technologies, this invention adopts a single-stage isolated topology circuit and its corresponding control method, which can achieve power factor correction and isolation without adding energy storage inductors and bus capacitors, thereby improving the power density of the charging module. It has the advantages of fewer components and lower cost.

[0098] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the protection scope of the present invention.< / vb> < / vc>

Claims

1. A single-stage isolated topology circuit, characterized in that, include: The circuit consists of a primary circuit connected to a three-phase power grid, a first secondary circuit and a second secondary circuit connected to an output capacitor, a first transformer electrically connected between the primary circuit and the first secondary circuit, and a second transformer electrically connected between the primary circuit and the second secondary circuit. All switching transistors in the primary circuit are bidirectional switches, and the primary windings of the first transformer and the second transformer are connected in series to the output side of the primary circuit. The primary circuit adopts a three-phase full-bridge circuit, which has a first bridge arm, a second bridge arm, and a third bridge arm for connecting to a three-phase power grid. The three phases of the three-phase power grid are respectively connected to the midpoints of the first bridge arm, the second bridge arm, and the third bridge arm. The upper and lower arm switches of the first bridge arm, the upper and lower arm switches of the second bridge arm, and the upper and lower arm switches of the third bridge arm are all composed of MOSFETs connected in reverse series. Wherein, the sum of the driving duty cycle of the MOS transistor corresponding to the upper arm switch of the first bridge arm and the driving duty cycle of the MOS transistor corresponding to the upper arm switch of the third bridge arm is equal to the driving duty cycle of the MOS transistor corresponding to the lower arm switch of the second bridge arm, and the turn-on time of the MOS transistor corresponding to the upper arm switch of the first bridge arm is consistent with the turn-off time of the MOS transistor corresponding to the upper arm switch of the third bridge arm. The sum of the driving duty cycle of the MOSFET corresponding to the lower arm switch of the first bridge arm and the driving duty cycle of the MOSFET corresponding to the lower arm switch of the third bridge arm is equal to the driving duty cycle of the MOSFET corresponding to the upper arm switch of the second bridge arm, and the turn-on time of the MOSFET corresponding to the lower arm switch of the first bridge arm is the same as the turn-off time of the MOSFET corresponding to the lower arm switch of the third bridge arm. The primary-side circuit outputs a square wave voltage with at least two different levels.

2. The single-stage isolated topology circuit according to claim 1, characterized in that, The first secondary circuit adopts a bridge circuit, which has a fourth bridge arm and a fifth bridge arm composed of rectifier diodes, and the input side of the first secondary circuit is connected to the secondary winding of the first transformer, and the output side is connected to the output capacitor. The second secondary circuit adopts a bridge circuit, which has a sixth bridge arm and a seventh bridge arm composed of power switching transistors. The input side of the second secondary circuit is connected to the secondary winding of the second transformer, and the output side is connected to the output capacitor.

3. The single-stage isolated topology circuit according to claim 1, characterized in that, It also includes a resonant circuit connected to the output side of the primary circuit. The resonant circuit has at least one resonant capacitor and one resonant inductor, and the resonant capacitor and the resonant inductor are connected in series between the output side of the primary circuit and the primary winding of the first transformer.

4. The single-stage isolated topology circuit according to claim 1, characterized in that, The turns ratio of the primary winding to the secondary winding of the first transformer is the same as that of the primary winding to the secondary winding of the second transformer, so that the output current of the first secondary circuit and the second secondary circuit are balanced.

5. The single-stage isolated topology circuit according to claim 1, characterized in that, It also includes a first filter circuit connected between the three-phase power grid and the primary circuit. The first filter circuit includes four input EMI capacitors, wherein one end of three of the input EMI capacitors is connected between the three phases of the three-phase power grid and the primary circuit, and the other end is connected together to another input EMI capacitor and then grounded.

6. The single-stage isolated topology circuit according to claim 1, characterized in that, It also includes a second filter circuit connected to the output terminal of the second secondary circuit. The second filter circuit has at least two output EMI capacitors, and each of the first and second output terminals of the second secondary circuit is connected to an output EMI capacitor, with the other end of the output EMI capacitor grounded.

7. The single-stage isolated topology circuit according to claim 1, characterized in that, The bidirectional switch is a switching unit formed by two IGBTs connected in reverse parallel or two MOSFETs connected in reverse series.

8. A control method employing a single-stage isolated topology circuit as described in any one of claims 1 to 7, characterized in that, include: Control the operating state of each switch in the primary circuit to make the primary circuit output a square wave voltage; The output voltage signal of the primary circuit and the input voltage signal of the second secondary circuit are detected, and the phase shift angle of the input voltage signal of the second secondary circuit relative to the output voltage signal of the primary circuit is determined. The conduction state of the power switch in the second secondary circuit is controlled to adjust the phase shift angle, thereby adjusting the output power.

9. The control method according to claim 8, characterized in that, Before adjusting the phase shift angle, it is necessary to perform dual-loop control on the output current and output voltage of the second secondary circuit to obtain the phase shift angle, which includes: The output current of the second secondary circuit is calculated by difference with the current loop reference value, and loop compensation is performed on the difference. The obtained compensation value is then compared with the voltage loop preset value, and the smaller value is used as the voltage loop reference value. The output voltage is then calculated by difference with the voltage loop reference value, and loop compensation is performed on the difference. The phase shift angle is calculated by comparing the obtained compensation value with the output power.

10. The control method according to claim 8, characterized in that, In the second secondary circuit, all power switches are turned on alternately, and the upper arm switch of the sixth bridge arm and the lower arm switch of the seventh bridge arm of the second secondary circuit switch at the same time.

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