A power supply ripple detection circuit and its device

Abstract

The present invention discloses a power supply ripple detection circuit and a device thereof. The circuit includes a detection and shaping circuit, a signal counting circuit, a time base circuit, and a logic operation circuit. The detection and shaping circuit is used to obtain the ripple signal on the power supply, and perform amplification processing and shaping processing on the ripple signal to obtain a digital signal. The time base circuit is used to generate a periodic clock signal. The signal counting circuit is used to perform pulse counting on the digital signal of the detection and shaping circuit according to the periodic clock signal of the time base circuit, and obtain a counting signal according to the result of the pulse counting. The logic operation circuit is used to perform logic operation according to the periodic clock signal of the time base circuit and the counting signal of the signal counting circuit, and obtain a ripple detection result according to the result of the logic operation. The present invention completes the power supply ripple detection circuit through a simple hardware device, realizes the function of detecting the power supply ripple, has low cost, and does not require a DSP or other processors, and can be widely applied to the technical field of power supply ripple detection.

Description

Technical Field

[0001] The present invention relates to the technical field of power supply ripple detection, and in particular to a power supply ripple detection circuit and device thereof. Background Art

[0002] Ripple is a phenomenon caused by the voltage fluctuation of a DC stable power supply. Since a DC stable power supply is generally formed by an AC power supply through rectification and voltage regulation, etc., it is inevitable that there are some AC components in the DC stable quantity to some extent. This AC component superimposed on the DC stable quantity is called power supply ripple. For a power supply ripple signal similar to a sine wave in the audio range, although its amplitude is not too high, its energy causes a buzzing noise (noise) in the speaker or earphone. Therefore, there should be certain requirements for this form of power supply ripple. For some control occasions, since the power supply ripple reaches a certain height due to narrow pulses, it will interfere with digital or logic control components, reducing the reliability of the device operation. Therefore, there are certain limitations on the amplitude of this narrow pulse for the power supply ripple. If the power supply ripple is too large during mobile phone repair, the phone may not be able to boot normally. Special regulated power supplies are required for mobile phone repair. It can be seen the importance of power supply ripple to the circuit.

[0003] However, power supply ripple detection usually requires the use of an oscilloscope and special instruments for detection, with high detection costs and relatively cumbersome detection. Summary of the Invention

[0004] In view of this, the present invention provides a power supply ripple detection circuit and device thereof, which realizes a power supply ripple detection circuit through a simple hardware device, realizes the direct detection of power supply ripple, and improves the reliability of the application circuit.

[0005] In a first aspect, an embodiment of the present invention provides a power supply ripple detection circuit, including a detection and shaping circuit, a signal counting circuit, a time base circuit, and a logic operation circuit;

[0006] The detection and shaping circuit is used to obtain a ripple signal on the power supply, and perform amplification processing and shaping processing on the ripple signal to obtain a digital signal;

[0007] The time base circuit is used to generate a periodic clock signal; the periodic clock signal includes a clock signal 0 and a clock signal 1;

[0008] The signal counting circuit is used to perform pulse counting on the digital signal of the detection and shaping circuit according to the periodic clock signal of the time base circuit, and obtain a counting signal according to the result of the pulse counting; the counting signal includes a counting signal 0 and a counting signal 1;

[0009] The logic operation circuit is configured to perform a logic operation based on the periodic clock signal of the time base circuit and the count signal of the signal counting circuit, and obtain a ripple detection result according to the result of the logic operation.

[0010] Optionally, the detection and shaping circuit includes a capacitor C5, a negative inverting amplifier, and a zero-crossing comparator;

[0011] The capacitor C5 is used to acquire the ripple signal on the power supply;

[0012] The negative inverting amplifier is used to amplify the ripple signal;

[0013] The zero-crossing comparator is used to shape the amplified ripple signal to obtain a digital signal.

[0014] Optionally, the negative inverting amplifier includes a resistor R4, a resistor R2, and an operational amplifier U1A; one end of the resistor R4 is electrically connected to the capacitor C4, and the other end is electrically connected to the inverting input terminal of the operational amplifier U1A; one end of the resistor R2 is electrically connected to the inverting input terminal of the operational amplifier U1A, and the other end is electrically connected to the output terminal of the operational amplifier U1A; the non-inverting input terminal of the operational amplifier U1A is electrically connected to the GND terminal, and the output terminal of the operational amplifier U1A is electrically connected to the zero-crossing comparator.

[0015] Optionally, the zero-crossing comparator includes a resistor R3, an operational amplifier U1B, a resistor R10, and a bidirectional voltage regulator diode TVS1; one end of the resistor R3 is electrically connected to the negative inverting amplifier, and the other end is electrically connected to the inverting input terminal of the operational amplifier U1B; one end of the resistor R10 is electrically connected to the output terminal of the operational amplifier U1B, and the other end is electrically connected to one end of the bidirectional voltage regulator diode TVS1; the non-inverting input terminal of the operational amplifier U1B and the other end of the bidirectional voltage regulator diode TVS1 are both electrically connected to the GND terminal;

[0016] Wherein, when the amplified ripple signal is less than 0V, the operational amplifier U1B outputs a saturation voltage, and the saturation voltage becomes a digital signal 1 through the resistor R10 and the bidirectional voltage regulator diode TVS1;

[0017] When the amplified ripple signal is greater than 0V, the operational amplifier U1B outputs a negative voltage, and the negative voltage becomes a digital signal 0 through the resistor R10 and the bidirectional voltage regulator diode TVS1.

[0018] Optionally, the time base circuit includes a resistor R1, a resistor R5, a resistor R6, a capacitor C1, a capacitor C2, a capacitor C4, and a timing chip U2; one end of the resistor R1 is electrically connected to pin 7 of the timing chip U2, and the other end is electrically connected to pin 4 of the timing chip U2; one end of the resistor R5 is electrically connected to pin 7 of the timing chip U2, and the other end is electrically connected to pins 2 and 6 of the timing chip U2; one end of the resistor R6 is electrically connected to pin 3 of the timing chip U2, and the other end is electrically connected to the signal counting circuit; one end of the capacitor C1 is electrically connected to pin 4 of the timing chip U2, and the other end is electrically connected to the GND terminal; one end of the capacitor C2 is electrically connected to pins 2 and 6 of the timing chip U2, and the other end is electrically connected to the GND terminal; one end of the capacitor C4 is electrically connected to pin 5 of the timing chip U2, and the other end is electrically connected to the GND terminal; pin 1 of the timing chip U2 is electrically connected to the GND terminal, and pin 8 of the timing chip U2 is electrically connected to the power supply.

[0019] Optionally, the signal counting circuit includes a NAND gate U3B and a digital pulse counting chip U5;

[0020] The NAND gate U3B is used to generate a counting instruction signal according to the periodic clock signal;

[0021] The digital pulse counting chip U5 is used to perform counting processing or clearing processing according to the counting instruction signal;

[0022] The digital signal is pulse-counted through the counting processing. When the result of the pulse counting reaches a preset number, a counting signal 1 is output, otherwise a counting signal 0 is output;

[0023] Or, a counting signal 0 is output through the clearing processing.

[0024] Optionally, the digital pulse counting chip U5 includes a first counting module U5A and a second counting module U5B; the output end of the NAND gate is electrically connected to pin 2 of the first counting module U5A and pin 14 of the second counting module U5B; pins 3 and 4 of the first counting module U5A are electrically connected; a capacitor C3 is connected between pins 8 and 16 of the first counting module U5A; pin 7 of the first counting module U5A is electrically connected to pin 15 of the second counting module U5B; pins 12 and 13 of the second counting module U5B are electrically connected; pin 9 of the second counting module is electrically connected to the logic operation circuit.

[0025] Optionally, the logic operation circuit includes a NAND gate U3C, a triode Q2, an LED, and an optocoupler U4;

[0026] Among them, the NAND gate U3C outputs a logic signal 0 according to the clock signal 1 and the count signal 1, otherwise it outputs a logic signal 1.

[0027] The triode Q2 lights up the LED according to the logic signal 0.

[0028] The optocoupler U4 outputs a ripple detection result according to the logic signal; the logic signal includes a logic signal 0 and a logic signal 1.

[0029] Optionally, the first input terminal of the NAND gate U3C is electrically connected to the time base circuit; the second input terminal of the NAND gate U3C is electrically connected to the signal counting circuit; the output terminal of the NAND gate U3C is electrically connected to the base of the triode Q2, and a resistor R7 is connected between the output terminal of the NAND gate U3C and the base of the triode Q2; the collector and emitter of the triode Q2 and the first interface of the optocoupler U4 are sequentially electrically connected; one end of the LED is electrically connected to the first interface of the optocoupler U4, and the other end of the LED is electrically connected to the second interface of the optocoupler U4; the second interface of the optocoupler U4 is connected with a resistor R8 and is electrically connected to the GND terminal, the third interface of the optocoupler U4 is electrically connected to the GND terminal, and the fourth interface of the optocoupler U4 is used to output the ripple detection result.

[0030] In a second aspect, an embodiment of the present invention provides a device with a power supply ripple detection circuit, including the power supply ripple detection circuit described in the first aspect of the embodiment of the present invention.

[0031] The beneficial effects of the present invention are as follows: a ripple signal on the power supply is obtained through a detection shaping circuit, the ripple signal is amplified and shaped to obtain a digital signal; at the same time, a periodic clock signal is generated through a time base circuit; and the signal counting circuit performs pulse counting on the digital signal of the detection shaping circuit according to the periodic clock signal of the time base circuit, and a count signal is obtained according to the result of the pulse counting; finally, the logic operation circuit performs a logic operation according to the periodic clock signal of the time base circuit and the count signal of the signal counting circuit, and a ripple detection result is obtained according to the result of the logic operation. The present invention completes the power supply ripple detection circuit through a simple hardware device, realizes the function of detecting the power supply ripple, has a low cost, and does not require a DSP or other processors, and the circuit is simple and reliable. Description of the Drawings

[0032] Figure 1 It is a schematic diagram of the architecture principle of a power supply ripple detection circuit provided by an embodiment of the present invention.

[0033] Figure 2 Schematic diagram of the circuit principle of a power supply ripple detection circuit provided by an embodiment of the present invention;

[0034] Figure 3 Schematic diagram of the working principle of a zero-crossing comparator provided by an embodiment of the present invention;

[0035] Figure 4 Schematic diagram of the structure and over-cycle principle of a time-base circuit provided by an embodiment of the present invention;

[0036] Figure 5 Schematic diagram of the working principle of a logic operation circuit provided by an embodiment of the present invention;

[0037] Figure 6 Schematic diagrams of 4 logic states provided by an embodiment of the present invention;

[0038] Figure 7 Schematic diagram of the structure of a NAND gate chip 74HC00 provided by an embodiment of the present invention. Detailed implementation manners

[0039] The following will clearly and completely describe the concept, specific structure and technical effects generated by the present invention in conjunction with the embodiments and drawings, so as to fully understand the purpose, features and effects of the present invention.

[0040] Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all embodiments. Based on the embodiments of the present invention, other embodiments obtained by those skilled in the art without creative efforts shall fall within the protection scope of the present invention.

[0041] In addition, all the connection relationships mentioned in the text do not simply refer to the direct connection of components, but refer to the more optimal connection structure that can be formed by adding or reducing connection accessories according to the specific implementation situation. Each technical feature in the present invention can be combined interactively without conflicting with each other.

[0042] An embodiment of the present invention provides a power supply ripple detection circuit, including a detection and shaping circuit, a signal counting circuit, a time-base circuit and a logic operation circuit;

[0043] The detection and shaping circuit is used to obtain the ripple signal on the power supply, and perform amplification processing and shaping processing on the ripple signal to obtain a digital signal;

[0044] The time-base circuit is used to generate a periodic clock signal; the periodic clock signal includes a clock signal 0 and a clock signal 1;

[0045] The signal counting circuit is configured to perform pulse counting on the digital signal of the detection and shaping circuit according to the periodic clock signal of the time base circuit, and obtain a counting signal according to the result of the pulse counting; the counting signal includes a counting signal 0 and a counting signal 1;

[0046] The logic operation circuit is configured to perform a logic operation according to the periodic clock signal of the time base circuit and the counting signal of the signal counting circuit, and obtain a ripple detection result according to the result of the logic operation.

[0047] In some embodiments, the detection and shaping circuit includes a capacitor C5, a negative inverting amplifier, and a zero-crossing comparator;

[0048] The capacitor C5 is configured to acquire the ripple signal on the power supply;

[0049] The negative inverting amplifier is configured to perform amplification processing on the ripple signal;

[0050] The zero-crossing comparator is configured to perform shaping processing on the amplified ripple signal to obtain a digital signal.

[0051] It should be noted that, in some embodiments, the detection and shaping circuit further includes a NAND gate U3B, which is used to buffer the digital signal before and after.

[0052] In some embodiments, the negative inverting amplifier includes a resistor R4, a resistor R2, and an operational amplifier U1A; one end of the resistor R4 is electrically connected to the capacitor C4, and the other end is electrically connected to the inverting input terminal of the operational amplifier U1A; one end of the resistor R2 is electrically connected to the inverting input terminal of the operational amplifier U1A, and the other end is electrically connected to the output terminal of the operational amplifier U1A; the non-inverting input terminal of the operational amplifier U1A is electrically connected to the GND terminal, and the output terminal of the operational amplifier U1A is electrically connected to the zero-crossing comparator.

[0053] In some embodiments, the zero-crossing comparator includes a resistor R3, an operational amplifier U1B, a resistor R10, and a bidirectional voltage regulator diode TVS1; one end of the resistor R3 is electrically connected to the negative inverting amplifier, and the other end is electrically connected to the inverting input terminal of the operational amplifier U1B; one end of the resistor R10 is electrically connected to the output terminal of the operational amplifier U1B, and the other end is electrically connected to one end of the bidirectional voltage regulator diode TVS1; the non-inverting input terminal of the operational amplifier U1B and the other end of the bidirectional voltage regulator diode TVS1 are both electrically connected to the GND terminal;

[0054] Wherein, when the amplified ripple signal is less than 0V, the operational amplifier U1B outputs a saturation voltage, and the saturation voltage is converted into a digital signal 1 through the resistor R10 and the bidirectional voltage regulator diode TVS1;

[0055] When the amplified ripple signal is greater than 0V, the operational amplifier U1B outputs a negative voltage, and the negative voltage is converted into a digital signal 0 through the resistor R10 and the bidirectional voltage regulator diode TVS1.

[0056] In some embodiments, the time base circuit includes a resistor R1, a resistor R5, a resistor R6, a capacitor C1, a capacitor C2, a capacitor C4, and a timing chip U2; one end of the resistor R1 is electrically connected to the pin 7 of the timing chip U2, and the other end is electrically connected to the pin 4 of the timing chip U2; one end of the resistor R5 is electrically connected to the pin 7 of the timing chip U2, and the other end is electrically connected to the pins 2 and 6 of the timing chip U2; one end of the resistor R6 is electrically connected to the pin 3 of the timing chip U2, and the other end is electrically connected to the signal counting circuit; one end of the capacitor C1 is electrically connected to the pin 4 of the timing chip U2, and the other end is electrically connected to the GND terminal; one end of the capacitor C2 is electrically connected to the pins 2 and 6 of the timing chip U2, and the other end is electrically connected to the GND terminal; one end of the capacitor C4 is electrically connected to the pin 5 of the timing chip U2, and the other end is electrically connected to the GND terminal; the pin 1 of the timing chip U2 is electrically connected to the GND terminal, and the pin 8 of the timing chip U2 is electrically connected to the power supply.

[0057] In some embodiments, the signal counting circuit includes a NAND gate U3B and a digital pulse counting chip U5;

[0058] The NAND gate U3B is configured to generate a counting instruction signal according to the periodic clock signal;

[0059] The digital pulse counting chip U5 is configured to perform counting processing or clearing processing according to the counting instruction signal;

[0060] The digital signal is pulse-counted through the counting processing. When the result of the pulse counting reaches a preset number, a counting signal 1 is output, otherwise a counting signal 0 is output;

[0061] Alternatively, a counting signal 0 is output through the clearing processing.

[0062] In some embodiments, the digital pulse counting chip U5 includes a first counting module U5A and a second counting module U5B; the output terminal of the NAND gate is electrically connected to pin 2 of the first counting module U5A and pin 14 of the second counting module U5B; pin 3 of the first counting module U5A is electrically connected to pin 4; a capacitor C3 is connected between pin 8 and pin 16 of the first counting module U5A; pin 7 of the first counting module U5A is electrically connected to pin 15 of the second counting module U5B; pin 12 of the second counting module U5B is electrically connected to pin 13; pin 9 of the second counting module is electrically connected to the logic operation circuit.

[0063] In some embodiments, the logic operation circuit includes a NAND gate U3C, a triode Q2, an LED, and an optocoupler U4;

[0064] Wherein, the NAND gate U3C outputs a logic signal 0 according to the clock signal 1 and the counting signal 1, otherwise outputs a logic signal 1;

[0065] The triode Q2 lights up the LED according to the logic signal 0;

[0066] The optocoupler U4 outputs a ripple detection result according to the logic signal; the logic signal includes a logic signal 0 and a logic signal 1.

[0067] In some embodiments, the first input terminal of the NAND gate U3C is electrically connected to the time base circuit; the second input terminal of the NAND gate U3C is electrically connected to the signal counting circuit; the output terminal of the NAND gate U3C is electrically connected to the base of the triode Q2, and a resistor R7 is connected between the output terminal of the NAND gate U3C and the base of the triode Q2; the collector, emitter of the triode Q2 and the first interface of the optocoupler U4 are electrically connected in sequence; one end of the LED is electrically connected to the first interface of the optocoupler U4, and the other end of the LED is electrically connected to the second interface of the optocoupler U4; the second interface of the optocoupler U4 is connected with a resistor R8 and is electrically connected to the GND terminal, the third interface of the optocoupler U4 is electrically connected to the GND terminal, and the fourth interface of the optocoupler U4 is used to output the ripple detection result.

[0068] In a second aspect, an embodiment of the present invention provides a device with a power supply ripple detection circuit, including the power supply ripple detection circuit as described in the first aspect of the embodiment of the present invention.

[0069] In some embodiments, a device with a power supply ripple detection circuit includes a power supply, an electrical load circuit, a DSP processing system, and the power supply ripple detection circuit as described above; the power supply, the electrical load circuit, and the DSP processing system are electrically connected; the input end of the power supply ripple detection circuit is connected to the power supply, and the input end of the power supply ripple detection circuit is connected to the DSP processing system.

[0070] Taking a specific power supply ripple detection circuit as an example, the present invention will be further described in detail with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention:

[0071] Refer to Figure 1 , a power supply ripple detection circuit includes a detection and shaping circuit, a time base circuit, a signal counting circuit, and a logic operation circuit. The power supply ripple detection circuit is applied to a circuit in which a power supply, an electrical load circuit, and a DSP processing system are electrically connected, and is used to acquire a power supply ripple signal for detection and output the detection result to the DSP processing system.

[0072] Specifically, refer to Figure 2 , the implementation principle of the power supply ripple detection circuit is as follows:

[0073] 1. Detection and shaping circuit

[0074] As Figure 2 shown, the C5 capacitor is connected to the ripple signal on the power supply. This signal passes through the resistor R4, R2, and the U1A operational amplifier to form a negative inverting amplifier. After amplifying the ripple on the power supply, it enters the zero-crossing comparator circuit for shaping. Refer to Figure 3 , the working principle of the zero-crossing comparator is that when the input signal is less than 0V, the output U1B saturation voltage becomes a 5V digital signal 1 after passing through R10 and TVS1 (bidirectional voltage regulator diode). When the input signal is greater than 0V, the output U1B voltage is negative and becomes a 5V digital signal 0 after passing through R10 and TVS1 (bidirectional voltage regulator diode). Among them, the function of U3D is to buffer the digital signal before and after.

[0075] 2. Signal counting circuit

[0076] 74HC390 (U5) is a digital pulse counting chip. 74HC390 has eight master-slave flip-flops and additional gates to form two independent 4-bit counters, each of which consists of two parts: "divided by 2 counting part" and "divided by 5 counting part". Each counter has a clear input and a clock input. It can achieve a cycle length equal to any cumulative multiple of 2-division, 5-division or even 100-division, and can be connected into a decimal counter or a binary-quinary counter to achieve two numerical outputs respectively. Since each counting stage has a parallel output, the system timing signal can obtain any factor of the input counting frequency. There are two counting modules inside the 74HC390 chip, and pins 1 and 12 are the input counting terminals. The first module U5A constitutes a 10 count. The second module U5B also constitutes a 10 count, and the two modules constitute a 100 count circuit. From the following truth table, it can be seen that when the count reaches 100, the output of the QD pin is high, that is, a 1 signal. Among them, the function of U3B is that when the signal 1 of the base circuit passes through U3B (NAND gate logic operation), U3B outputs a low level. When the signal 0 of the base circuit passes through U3B (NAND gate logic operation), U3B outputs a high level. Since the output of U3B is connected to the pin 2 of (U5) 74HC390, and the function of pin 14 is: high level clears the counter. The counting true value of the 74HC390 (U5) digital pulse counting chip is valid as shown in Table 1:

[0077] Table 1

[0078]

[0079]

[0080] 3. Time base circuit

[0081] The time base circuit is composed of U2 (EN555 chip), which is a precise multivibrator circuit. Its functional principle is as follows Figure 4 As shown, the time base circuit can generate a stable clock signal, a precise clock source with a time of 100mS, a high level of 100mS, and a low level of 100mS. This clock is connected to pin 2 and pin 14 (the pin is used for counting / clearing) of (U5) 74HC390 through the NOT gate chip U3B. When the clock is at a high level, the 74HC390 starts counting. When the clock is at a low level, the 74HC390 counter is reset and cleared.

[0082] 4. Logic operation circuit

[0083] The logic operation circuit is composed of U3C of the 74HC00 NAND gate chip, and there are 4 logic operation units inside the chip. Its function is to perform logic operations on the signals of the time base circuit and the signal counting circuit, and output to control the Q2 triode to light up the LED and transmit through the optocoupler U4 (PC817) to the processor circuit. Refer to Figure 5 and Figure 6 , which includes 4 logic states, specifically:

[0084] State 1: When the signal of the time base circuit is 1 and the signal of the counting circuit is 1, a low level is output to control the Q2 triode (PNP type) to light up the LED, indicating that 100 pulse signals have been generated within 100 mS.

[0085] State 2: When the signal of the time base circuit is 0 and the signal of the counting circuit is 1, a high level is output to control the Q2 triode (PNP type) and the LED does not light. Since the 0 signal of the time base circuit clears the counter, this state cannot occur.

[0086] State 3: When the signal of the time base circuit is 1 and the signal of the counting circuit is 0, a high level is output to control the Q2 triode (PNP type) and the LED does not light, indicating that there are no 100 pulse signals within 100 mS.

[0087] State 4: When the signal of the time base circuit is 0 and the signal of the counting circuit is 0, a high level is output to control the Q2 triode (PNP type) and the LED does not light. The 0 signal of the time base circuit clears the counter, so the signal of the counting circuit is also 0.

[0088] Among them, the structure of the NAND gate chip 74HC00 is as Figure 7 shown, and the truth table of the NAND gate chip 74HC00 is shown in Table 2:

[0089] Table 2

[0090]

[0091]

[0092] The working principle of the power supply ripple detection circuit according to the embodiment of the present invention is as follows: The ripple (noise) signal on the power supply enters the U1A operational amplifier, and after being amplified, it is input to the U1B zero-crossing comparator for shaping into a digital signal. Then it enters the (U5) 74HC390 chip to form a signal counting circuit to calculate the number of pulses. If the count reaches 100, a high-level signal is output from pin 9 of the 74HC390 chip. The circuit composed of the U2 (EN555 chip) time-base circuit is a precise multivibrator circuit, which can generate a stable clock signal. When the clock is at a low level, this signal clears the count of the (U5) 74HC390 chip. When the clock is at a high level, the (U5) 74HC390 chip allows counting. In this way, the high-level time of the time-base signal can be used to detect the number of ripples on the power supply. When the number is greater than 100, it indicates high-frequency power supply ripple. When the number is less than 100, it indicates low-frequency power supply ripple.

[0093] In summary, the embodiment of the present invention discloses a power supply ripple detection circuit and its device. The power supply ripple detection circuit of the present invention adds the detection function of the power supply ripple to the system and improves the reliability of the circuit. And since the circuit relies on simple hardware to complete the detection function, the cost is low, and there is no need for a DSP or other processors, and the circuit is simple and reliable.

[0094] The above is a specific description of the preferred embodiment of the present invention, but the present invention is not limited to the described embodiment. Those skilled in the art can make various equivalent deformations or substitutions without departing from the spirit of the present invention, and these equivalent deformations or substitutions are all included within the scope defined by the claims of this application.

Claims

1. A power supply ripple detection circuit, characterized in that, it includes a detection and shaping circuit, a signal counting circuit, a time base circuit, and a logic operation circuit; The detection and shaping circuit is used to obtain the ripple signal on the power supply, and perform amplification processing and shaping processing on the ripple signal to obtain a digital signal; The time base circuit is used to generate a periodic clock signal; The periodic clock signal includes clock signal 0 and clock signal 1; The signal counting circuit is used to perform pulse counting on the digital signal of the detection and shaping circuit according to the periodic clock signal of the time base circuit, and obtain a counting signal according to the result of the pulse counting; the counting signal includes counting signal 0 and counting signal 1; The logic operation circuit is used to perform logic operations according to the periodic clock signal of the time base circuit and the counting signal of the signal counting circuit, and obtain a ripple detection result according to the result of the logic operation; wherein, the logic operation circuit includes a NAND gate U3C, a triode Q2, an LED, and an optocoupler U4; wherein, the NAND gate U3C outputs a logic signal 0 according to the clock signal 1 and the counting signal 1, otherwise outputs a logic signal 1; The triode Q2 lights the LED according to the logic signal 0; The optocoupler U4 outputs a ripple detection result according to the logic signal; the logic signal includes logic signal 0 and logic signal 1.

2. The power supply ripple detection circuit according to claim 1, characterized in that, The detection and shaping circuit includes a capacitor C5, a negative inverting amplifier, and a zero-crossing comparator; The capacitor C5 is used to obtain the ripple signal on the power supply; The negative inverting amplifier is used to perform amplification processing on the ripple signal; The zero-crossing comparator is used to perform shaping processing on the amplified ripple signal to obtain a digital signal.

3. The power supply ripple detection circuit according to claim 2, characterized in that, The negative inverting amplifier includes a resistor R4, a resistor R2, and an operational amplifier U1A; one end of the resistor R4 is electrically connected to the capacitor C4, and the other end is electrically connected to the inverting input terminal of the operational amplifier U1A; one end of the resistor R2 is electrically connected to the inverting input terminal of the operational amplifier U1A, and the other end is electrically connected to the output terminal of the operational amplifier U1A; the non-inverting input terminal of the operational amplifier U1A is electrically connected to the GND terminal, and the output terminal of the operational amplifier U1A is electrically connected to the zero-crossing comparator.

4. The power supply ripple detection circuit according to claim 2, characterized in that, The zero-crossing comparator includes a resistor R3, an operational amplifier U1 B, a resistor R10, and a bidirectional voltage-regulator diode TVS1. One end of the resistor R3 is electrically connected to the negative inverting amplifier, and the other end is electrically connected to the inverting input terminal of the operational amplifier U1 B. One end of the resistor R10 is electrically connected to the output terminal of the operational amplifier U1 B, and the other end is electrically connected to one end of the bidirectional voltage-regulator diode TVS1. The non-inverting input terminal of the operational amplifier U1 B and the other end of the bidirectional voltage-regulator diode TVS1 are both electrically connected to the GND terminal. Wherein, when the amplified ripple signal is less than 0V, the operational amplifier U1 B outputs a saturation voltage, and the saturation voltage is converted into a digital signal 1 through the resistor R10 and the bidirectional voltage-regulator diode TVS1. When the amplified ripple signal is greater than 0V, the operational amplifier U1 B outputs a negative voltage, and the negative voltage is converted into a digital signal 0 through the resistor R10 and the bidirectional voltage-regulator diode TVS1.

5. A power supply ripple detection circuit according to claim 1, characterized in that the time base circuit includes a resistor R1, a resistor R5, a resistor R6, a capacitor C1, a capacitor C2, a capacitor C4, and a timing chip U2. One end of the resistor R1 is electrically connected to the pin 7 of the timing chip U2, and the other end is electrically connected to the pin 4 of the timing chip U2. One end of the resistor R5 is electrically connected to the pin 7 of the timing chip U2, and the other end is electrically connected to the pins 2 and 6 of the timing chip U2. One end of the resistor R6 is electrically connected to the pin 3 of the timing chip U2, and the other end is electrically connected to the signal counting circuit. One end of the capacitor C1 is electrically connected to the pin 4 of the timing chip U2, and the other end is electrically connected to the GND terminal. One end of the capacitor C2 is electrically connected to the pins 2 and 6 of the timing chip U2, and the other end is electrically connected to the GND terminal. One end of the capacitor C4 is electrically connected to the pin 5 of the timing chip U2, and the other end is electrically connected to the GND terminal. The pin 1 of the timing chip U2 is electrically connected to the GND terminal, and the pin 8 of the timing chip U2 is electrically connected to the power supply.

6. A power supply ripple detection circuit according to claim 1, characterized in that the signal counting circuit includes a NAND gate U3B and a digital pulse counting chip U5; the NAND gate U3B is used to generate a counting instruction signal according to the periodic clock signal; the digital pulse counting chip U5 is used to perform counting processing or clearing processing according to the counting instruction signal; the digital signal is pulse-counted through the counting processing, and when the result of the pulse counting reaches a preset number, a counting signal 1 is output, otherwise a counting signal 0 is output; or, a counting signal 0 is output through the clearing processing.

7. A power supply ripple detection circuit according to claim 6, characterized in that The digital pulse counting chip U5 includes a first counting module U5A and a second counting module U5B; the output terminal of the NAND gate is electrically connected to pin 2 of the first counting module U5A and pin 14 of the second counting module U5B; pin 3 of the first counting module U5A is electrically connected to pin 4; a capacitor C3 is connected between pin 8 and pin 16 of the first counting module U5A; pin 7 of the first counting module U5A is electrically connected to pin 15 of the second counting module U5B; pin 12 of the second counting module U5B is electrically connected to pin 13; pin 9 of the second counting module is electrically connected to the logic operation circuit.

8. A power supply ripple detection circuit according to claim 1, characterized in that, the first input terminal of the NAND gate U3C is electrically connected to the time base circuit; the second input terminal of the NAND gate U3C is electrically connected to the signal counting circuit; the output terminal of the NAND gate U3C is electrically connected to the base of the triode Q2, and a resistor R7 is connected between the output terminal of the NAND gate U3C and the base of the triode Q2; the collector, emitter of the triode Q2 and the first interface of the optocoupler U4 are electrically connected in sequence; one end of the LED is electrically connected to the first interface of the optocoupler U4, and the other end of the LED is electrically connected to the second interface of the optocoupler U4; a resistor R8 is connected to the second interface of the optocoupler U4 and is electrically connected to the GND terminal, the third interface of the optocoupler U4 is electrically connected to the GND terminal, and the fourth interface of the optocoupler U4 is used to output the ripple detection result.

9. A device with a power supply ripple detection circuit, characterized in that, it includes the power supply ripple detection circuit according to any one of claims 1 to 8.

Images