A kind of HEMT and blue light LED monolithic integrated chip and its preparation method

Abstract

The application belongs to the technical field of semiconductor manufacturing, and discloses a kind of HEMT and blue light LED monolithic integrated chip and preparation method thereof.The integrated chip includes growing HEMT epitaxial layer and LED epitaxial layer on substrate;The structure is etched to obtain HEMT region and LED region;Source electrode, drain electrode and gate electrode are prepared in HEMT region;Transparent conductive layer, current blocking layer, mirror reflecting layer, N-type electrode and P-type electrode are prepared in LED region, and HEMT and LED are connected through metal bridge;The application drives LED by the control of HEMT, changes from current control to voltage control, and greatly reduces the manufacturing cost and size of lighting system through monolithic integration of sharing the same material platform, reduces parasitic effect, and lays a foundation for the research of integrated chip with excellent functionality and stability.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor manufacturing technology, and in particular to a HEMT and blue light LED monolithic integrated chip and a preparation method thereof. Background Art

[0002] GaN materials offer advantages such as a wide bandgap, high breakdown field strength, high thermal conductivity, and high electron saturation velocity. Electronic devices, particularly GaN / AlGaN heterojunction HEMTs, are predominant. Due to spontaneous polarization and piezoelectric polarization effects, nitride heterostructures can form a high-concentration two-dimensional electron gas at the interface. Their high electron mobility makes them well-suited for high-frequency power devices. They can be grown on either SiC substrates, which offer excellent heat dissipation, or on low-cost, mature Si substrates. In addition to high-frequency devices, nitrides also have prominent applications in optoelectronic devices. Their bandgap covers the entire spectrum, primarily in blue LEDs. This significantly improves lighting efficiency and extends operating time compared to traditional fluorescent and incandescent lamps. With the recent surge in smart lighting applications, there is an increasing demand for monolithic integration of light-emitting diodes (LEDs) and field-effect transistors (FETs), which typically involves external circuit design. Monolithic integration based on a common material platform can significantly reduce the manufacturing cost and size of lighting systems, providing robust functionality and stability for a wide range of applications.

[0003] Currently, there are two main methods for monolithic integration of GaN HEMTs and LEDs: 1. Non-metallic contact: The AlGaN / GaNHEMT structure is grown on a sapphire substrate via MOCVD. After LED growth and characterization, a SiO2 layer is deposited via plasma-enhanced chemical vapor deposition (PECVD). This is then patterned using photolithography and buffered oxide etching (BOE) for the selective growth of the HEMT structure. The HEMT's 2DEG is laterally connected to the LED's N-type GaN electrode through close contact with the epitaxial layer, eliminating the need for external metal interconnects. 2. Metallic contact: The LED is grown directly on the HEMT surface during epitaxial growth. Subsequently, etching is performed to expose the HEMT, and the HEMT drain electrode is connected to the LED's N-type electrode via a metal bridge. This method reduces the consumption and defect formation caused by secondary epitaxy.

[0004] However, the temperature during epitaxial growth of HEMTs is higher than that of LEDs. Defects generated during secondary epitaxy at high temperatures can reduce the luminous efficiency of the quantum wells. Furthermore, secondary epitaxy is performed based on etching of the LED epitaxial structure, and the resulting damage can significantly impact the quality of the HEMT interface growth, increasing on-resistance. Therefore, the development of integrated chips with simple fabrication processes and excellent electrical conductivity is urgently needed in this field. Summary of the Invention

[0005] In view of this, the present invention provides a HEMT and blue light LED monolithic integrated chip and a preparation method thereof, which solves the problems existing in the synthesis methods of monolithic integrated chips, such as defects caused by secondary epitaxy at high temperatures, which reduce the luminous efficiency of quantum wells, and damage caused by etching, which has a significant impact on the growth quality at the HEMT interface and causes an increase in on-resistance.

[0006] In order to achieve the above object, the present invention adopts the following technical solutions:

[0007] The present invention provides a monolithic integrated chip of a HEMT and a blue light emitting diode (LED). The integrated chip includes a HEMT region and an LED region. The HEMT region includes, from bottom to top, a DBR reflective layer, a substrate, an AlN buffer layer, a GaN channel layer, an AlGaN barrier layer, a GaN cap layer, a SiO2 passivation layer, and a HEMT electrode layer. The HEMT electrode layer includes a source electrode, a drain electrode, and a gate electrode. The LED region includes, from bottom to top, a DBR reflective layer, a substrate, an AlN buffer layer, a GaN channel layer, an AlGaN barrier layer, a GaN cap layer, an N-GaN layer, an InGaN / GaN multi-quantum well layer, a P-GaN layer, a current blocking layer, a transparent conductive layer, a passivation layer, an N-electrode, and a P-electrode. The drain electrode of the HEMT region is connected to the N-electrode of the LED region via a metal bridge to achieve electrical conduction between the HEMT region and the LED region.

[0008] Preferably, the substrate is independently a sapphire substrate; the AlN buffer layer is in contact with the substrate, and the thickness of the AlN buffer layer is independently 14-16 nm.

[0009] Preferably, the GaN channel layer is independently a non-intentionally doped GaN layer, and the thickness is independently 200-300 nm.

[0010] Preferably, the Al doping concentration of the AlGaN barrier layer is independently 0.2-0.3 wt %, the thickness of the AlGaN barrier layer is independently 20-30 nm, and the thickness of the GaN cap layer is independently 2 nm.

[0011] Preferably, the N-GaN layer is a Si-doped GaN layer with a thickness of 1.5 to 2.5 μm and a Si doping concentration of 2.2×10 19 wt%; the InGaN / GaN multi-quantum well layer is a periodically overlapping InGaN / GaN layer with a thickness of 130 to 140 nm.

[0012] Preferably, the P-GaN layer is a Mg-doped GaN layer with a thickness of 580-620 nm and a Mg doping concentration of 1.5×10 19 wt%.

[0013] Preferably, the source electrode, drain electrode, N electrode and P electrode are independently ohmic contacts, and are alloys composed of at least two metals selected from Cr, Al, Ti, Pt and Au.

[0014] Preferably, the metal bridge is an alloy composed of at least two metals selected from Cr, Al, Ti, Pt, and Au; the gate electrode is a Schottky contact, and the gate electrode is an alloy of Ni and Au.

[0015] Preferably, the area ratio of the HEMT region to the LED region is 1-3:1-2.

[0016] The present invention also provides a method for preparing the HEMT and blue LED monolithic integrated chip, comprising the following steps:

[0017] S1: Providing a sapphire substrate, growing a HEMT epitaxial layer and an LED epitaxial layer on the substrate to form a HEMT-LED structure; the HEMT structure is composed of a sapphire substrate, an AlN buffer layer, a GaN channel layer, an AlGaN barrier layer, and a GaN cap layer from bottom to top; the LED structure is composed of an AlN buffer layer, a GaN channel layer, an AlGaN barrier layer, a GaN cap layer, an N-GaN layer, an InGaN / GaN multi-quantum well layer, and a P-GaN layer from bottom to top;

[0018] S2: Cleaning, photolithography, and ICP etching the HEMT-LED epitaxial structure to obtain a HEMT region and an LED region;

[0019] S3: SiO2 is deposited on the LED area by PECVD to form a current blocking layer and a metal bridge step;

[0020] S4: performing ITO evaporation and annealing treatment on the LED area in sequence;

[0021] S5: Cleaning, photolithography, and ICP etching are performed on the HEMT area, and source electrodes, drain electrodes / N electrodes, and P electrodes are prepared in the HEMT area and LED area;

[0022] S6: preparing a gate electrode on the HEMT region, and then passivating it by depositing SiO2 by PECVD to form a passivation layer to obtain a HEMT-LED epitaxial wafer;

[0023] S7: Thinning the substrate of the HEMT-LED epitaxial wafer;

[0024] S8: Evaporating a DBR reflective layer on the back side to obtain a HEMT and blue light LED monolithic integrated chip.

[0025] It can be seen from the above technical solution that compared with the prior art, the present invention has the following beneficial effects:

[0026] This invention uses a single-step epitaxial deposition process to reduce waste and defects. A DBR reflective layer is deposited on the back of the thinned substrate, increasing the device's optical output power. This also increases the contact area of ​​the metal electrodes, enhancing heat dissipation and effectively improving luminous efficiency and reliability. The presence of the metal bridge allows the LED to be controlled by the HEMT, resulting in voltage-driven operation and miniaturization of the integrated system. Compared to a secondary metal deposition system, this system achieves a 5% increase in optical output power and a 3% decrease in output power, while maintaining the same test current. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are merely embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying any creative work.

[0028] Figure 1 This is a structural diagram of the HEMT and blue light LED monolithic integrated chip obtained in Example 1 of the present invention, wherein 0 is sapphire substrate; 1 is DBR reflective layer; 2 is AlN buffer layer; 3 is GaN channel layer; 4 is AlGaN barrier layer; 5 is GaN cap layer; 6 is N-GaN layer; 7 is InGaN / GaN multi-quantum well layer; 8 is P-GaN layer; 9 is transparent conductive layer; 10 is current blocking layer; 11 is P electrode; 12 is drain electrode / N electrode (metal bridge); 13 is electrode bridge; 14 is gate electrode;

[0029] Figure 2 This is a top view of the HEMT and blue LED monolithic integrated chip obtained in Example 1 of the present invention;

[0030] Figure 3 This is a structural diagram of the epitaxial HEMT and blue LED monolithic integrated chip obtained in Example 1 of the present invention;

[0031] Figure 4 This is a structural diagram of the source electrode, drain electrode, gate electrode, N electrode, P electrode, and metal bridge on the epitaxial structure of the HEMT and blue light LED monolithic integrated chip obtained in Example 1 of the present invention. DETAILED DESCRIPTION

[0032] The present invention provides a monolithic integrated chip of a HEMT and a blue light emitting diode (LED). The integrated chip includes a HEMT region and an LED region. The HEMT region includes, from bottom to top, a DBR reflective layer, a substrate, an AlN buffer layer, a GaN channel layer, an AlGaN barrier layer, a GaN cap layer, a SiO2 passivation layer, and a HEMT electrode layer. The HEMT electrode layer includes a source electrode, a drain electrode, and a gate electrode. The LED region includes, from bottom to top, a DBR reflective layer, a substrate, an AlN buffer layer, a GaN channel layer, an AlGaN barrier layer, a GaN cap layer, an N-GaN layer, an InGaN / GaN multi-quantum well layer, a P-GaN layer, a current blocking layer, a transparent conductive layer, a passivation layer, an N-electrode, and a P-electrode. The drain electrode of the HEMT region is connected to the N-electrode of the LED region via a metal bridge to achieve electrical conduction between the HEMT region and the LED region.

[0033] In the present invention, the substrate is independently a sapphire substrate; the AlN buffer layer is in contact with the substrate, and the thickness of the AlN buffer layer is independently preferably 14 to 16 nm, more preferably 15 nm.

[0034] In the present invention, the GaN channel layer is independently an unintentionally doped GaN layer, and its thickness is independently preferably 200 to 300 nm, more preferably 230 to 280 nm.

[0035] In the present invention, the Al doping concentration of the AlGaN barrier layer is independently preferably 0.2-0.3 wt%, more preferably 0.22-0.28 wt%; the thickness of the AlGaN barrier layer is independently preferably 20-30 nm, more preferably 25 nm; the thickness of the GaN cap layer is independently 2 nm.

[0036] In the present invention, the N-GaN layer is a Si-doped GaN layer, and the thickness is preferably 1.5 to 2.5 μm, more preferably 1.8 to 2 μm; the Si doping concentration is 2.2×10 19 wt%; the InGaN / GaN multi-quantum well layer is a periodically overlapping InGaN / GaN layer, and the thickness is preferably 130 to 140 nm, and more preferably 132 to 138 nm.

[0037] In the present invention, the P-GaN layer is a Mg-doped GaN layer with a thickness of preferably 580 to 620 nm, more preferably 600 to 610 nm; the Mg doping concentration is 1.5×10 19 wt%.

[0038] In the present invention, the source electrode, drain electrode, N electrode and P electrode are independently ohmic contacts, and the source electrode, drain electrode, N electrode and P electrode are preferably an alloy composed of at least two metals among Cr, Al, Ti, Pt and Au, and more preferably an alloy composed of at least two metals among Cr, Ti and Au.

[0039] In the present invention, the metal bridge is preferably an alloy composed of at least two metals among Cr, Al, Ti, Pt, and Au, and more preferably an alloy composed of at least two metals among Cr, Ti, and Pt; the gate electrode is a Schottky contact, and the gate electrode is an alloy of Ni and Au.

[0040] In the present invention, the area ratio of the HEMT region to the LED region is preferably 1 to 3:1 to 2, and more preferably 1 to 2:1.5.

[0041] The present invention also provides a method for preparing the HEMT and blue LED monolithic integrated chip, comprising the following steps:

[0042] S1: Providing a sapphire substrate, growing a HEMT epitaxial layer and an LED epitaxial layer on the substrate to form a HEMT-LED structure; the HEMT structure is composed of a sapphire substrate, an AlN buffer layer, a GaN channel layer, an AlGaN barrier layer, and a GaN cap layer from bottom to top; the LED structure is composed of an AlN buffer layer, a GaN channel layer, an AlGaN barrier layer, a GaN cap layer, an N-GaN layer, an InGaN / GaN multi-quantum well layer, and a P-GaN layer from bottom to top;

[0043] S2: Cleaning, photolithography, and ICP etching the HEMT-LED epitaxial structure to obtain a HEMT region and an LED region;

[0044] S3: SiO2 is deposited on the LED area by PECVD to form a current blocking layer and a metal bridge step;

[0045] S4: performing ITO evaporation and annealing treatment on the LED area in sequence;

[0046] S5: Cleaning, photolithography, and ICP etching are performed on the HEMT area, and source electrodes, drain electrodes / N electrodes, and P electrodes are prepared in the HEMT area and LED area;

[0047] S6: preparing a gate electrode on the HEMT region, and then passivating it by depositing SiO2 by PECVD to form a passivation layer to obtain a HEMT-LED epitaxial wafer;

[0048] S7: Thinning the substrate of the HEMT-LED epitaxial wafer;

[0049] S8: Evaporating a DBR reflective layer on the back side to obtain a HEMT and blue light LED monolithic integrated chip.

[0050] In the present invention, in step S2, ICP etching is performed to remove the 2230 nm thick P-GaN layer, quantum well layer, and N-GaN layer until the GaN cap layer is exposed, thereby separating the integrated device into the HEMT region and the LED region. The HEMT region and the LED region are then cleaned using a cleaning solution.

[0051] The cleaning solution is prepared by mixing concentrated sulfuric acid, water and hydrogen peroxide in a ratio of 5:1:1.

[0052] In the present invention, before depositing SiO2 on the LED area by PECVD, the P-GaN layer and quantum well layer of the LED area with a thickness of 1000 nm are etched away by photolithography and ICP etching until the N-GaN layer is exposed; and the area between the HEMT area and the LED area is further etched to a depth of 340 nm and a width of 10 μm.

[0053] In the present invention, in step S3, a viscosity enhancer is used on the LED area, and a SiO2 current blocking layer is deposited on the P-GaN left in step S2 using PECVD technology to increase the recombination efficiency of holes and electrons. The thickness of the current blocking layer is 200 nm.

[0054] In the present invention, in step S3, the current blocking layer is wet-etched with an etching solution through photolithography and development, and the etching solution is a mixture of HF and NH 4F in a mass ratio of 1:6-10.

[0055] In the present invention, in step S4, the specific steps of ITO evaporation are: performing ITO (1100A) evaporation by electron beam evaporation technology, coating In2O3 and other oxides on the surface to form a current diffusion layer, then performing photolithography and development, and removing excess In2O3 and other oxides with a mixed solution of HCl and FeCl3 with a mass ratio of 1.6:1; the specific steps of annealing treatment are: introducing a flow rate ratio of 9×10 4 : 2.5 N2 and O2, at high temperature, further oxidize the low-valent oxides, thereby improving the conductivity and transmittance of the ITO film.

[0056] In the present invention, in step S5, the HEMT region is cleaned, photolithographically processed, and ICP-etched, and the specific steps of preparing the source electrode, drain electrode / N electrode, and P electrode in the HEMT region and the LED region are as follows: the GaN cap layer and AlGaN barrier layer in the HEMT region are etched away by photolithography and ICP etching to expose the GaN channel layer, with an etching depth of 27 nm; SiO2 is deposited in the etched region between the HEMT and the LED using PECVD technology using a viscosity enhancer to form a step for the metal bridge connection; one or more of Cr, Al, Ti, Pt, Ti, Pt, Ti, Pt, and Au are deposited by photolithography and development using electron beam evaporation technology to form electrodes, and annealed at 265° C. for 5 minutes to form the source electrode, drain / N (metal bridge) electrode, and P electrode of the chip, followed by blue film gold stripping; Ni and Au are deposited by photolithography and development using electron beam evaporation technology to form a gate electrode, followed by blue film gold stripping.

[0057] In the present invention, in step S6, the passivation layer is wet-etched using an etching solution to expose five electrodes, thereby obtaining a HEMT-LED epitaxial wafer; the etching solution is independently composed of a mixture of HF and NH4F in a ratio of 1:6 to 1:10.

[0058] In the present invention, in step S7, the substrate of the HEMT-LED epitaxial wafer is thinned by grinding, and the thickness of the substrate of the HEMT-LED epitaxial wafer after thinning is 150 μm.

[0059] In the present invention, in step S8, the specific steps of evaporation are: SiO2 and TiO2 are alternately arranged to form a periodic structure to increase light reflection, and the number of evaporated layers is 49 layers.

[0060] The technical solutions provided by the present invention are described in detail below with reference to the embodiments, but they should not be construed as limiting the scope of protection of the present invention.

[0061] Example 1

[0062] This embodiment provides a monolithic integrated chip of a HEMT and a blue light emitting diode (LED). The monolithic integrated chip of the HEMT and the blue light emitting diode (LED) includes a HEMT region and an LED region. The HEMT region includes, from bottom to top, a DBR reflective layer, a substrate, an AlN buffer layer, a GaN channel layer, an AlGaN barrier layer, a GaN cap layer, a passivation layer, and a HEMT electrode layer. The HEMT electrode layer includes a source electrode, a drain electrode, and a gate electrode. The LED region includes, from bottom to top, a DBR reflective layer, a substrate, an AlN buffer layer, a GaN channel layer, an AlGaN barrier layer, a GaN cap layer, an N-GaN layer, an InGaN / GaN multi-quantum well layer, a P-GaN layer, a current blocking layer, a transparent conductive layer, a passivation layer, an N-electrode, and a P-electrode. The drain electrode of the HEMT region is connected to the P-electrode of the LED via a metal bridge to achieve electrical conduction between the HEMT region and the LED region.

[0063] The preparation of the HEMT and blue LED monolithic integrated chip includes the following steps:

[0064] (1) Using MOCVD technology, a full structure is epitaxially grown on a sapphire substrate, wherein the full structure includes a 15 nm AlN buffer layer, a 300 nm GaN channel layer, a 25 nm AlGaN barrier layer; the AlGaN barrier layer has an Al component concentration of 0.2; a 2 nm GaN cap layer, a 1.5 μm N-GaN layer, a 130 nm quantum well layer, and a 600 nm P-GaN layer;

[0065] (2) etching the epitaxial structure of step (1) by photolithography, development, and ICP etching to remove the P-GaN layer, quantum well layer, and N-GaN layer with a total thickness of 2230 nm until the GaN cap layer is exposed, thereby dividing the integrated device into a HEMT region and an LED region; the HEMT region includes an AlN buffer layer, a GaN channel layer, an AlGaN barrier layer, and a GaN cap layer;

[0066] (3) using a cleaning solution (concentrated sulfuric acid, water, and hydrogen peroxide in a ratio of 5:1:1) to clean the epitaxial wafer of step (2);

[0067] (4) Using photolithography and ICP etching, the P-GaN layer, quantum well layer, and N-GaN layer in the LED area are etched away to expose the N-GaN layer, totaling 1000 nm; and the area between the HEMT and LED is further etched to a depth of 340 nm;

[0068] (5) Using a viscosity enhancer on the epitaxial layer, a SiO2 current blocking layer is deposited on the P-GaN left in step (4) using PECVD technology to increase the recombination efficiency of holes and electrons. The thickness of the current blocking layer is 100 nm.

[0069] (6) wet etching the current blocking layer with BOE through photolithography and development, the composition of which is a mixture of HF and NH4F in a ratio of 1:10;

[0070] (7) ITO (1100A) was deposited by electron beam evaporation technology to deposit oxides such as In2O3 on the surface to form a current diffusion layer, followed by photolithography and development, and the use of a mixed solution of HCl and FeCl3 to remove excess InO, InO and other oxides; the current diffusion layer was further subjected to RTA annealing treatment, with a flow rate ratio of 9×10 4 : 2.5 N2 and O2, at a high temperature of 510 ° C, further oxidize the low-valent oxides, thereby improving the conductivity and transmittance of the ITO film;

[0071] (8) The GaN cap layer and AlGaN barrier layer in the HEMT region are etched away by photolithography and ICP etching to expose the GaN channel layer. The etching depth is 27 nm.

[0072] (9) using an adhesion promoter, depositing SiO2 in the etched area between the HEMT and the LED using PECVD technology in step (8) to form a step for the metal bridge connection;

[0073] (10) Through photolithography and development, electron beam evaporation technology is used to deposit Cr (using a current of 25A), Al (using a current of 1kA), Ti (using a current of 1kA), Pt (using a current of 650A), Ti (using a current of 1kA), Pt (using a current of 650A), Ti (using a current of 1kA), Pt (using a current of 1kA) and Au (using a current of 20kA), and annealing treatment is carried out at a temperature of 265°C for 5 minutes to form the source electrode, drain / N (metal bridge) electrode, and P electrode of the chip, and then the blue film is peeled off;

[0074] (11) Ni (using a current of 1 kA) and Au (using a current of 2 kA) were deposited using electron beam evaporation technology through photolithography and development to form a gate electrode, followed by blue film gold tearing;

[0075] (12) A SiO2 passivation layer (100 nm) was formed on the surface by PECVD technology, and the passivation layer was wet-etched by photolithography and development using an etching solution containing a mixture of HF and NH4F in a mass ratio of 1:6.

[0076] (13) Wet-etching the SiO2 in step (11) with an etching solution through photolithography and development to expose five electrodes, wherein the etching solution is a mixture of HF and NH4F with a mass ratio of 1:8;

[0077] (14) Grinding the substrate to reduce the thickness to 150 μm;

[0078] (15) DBR evaporation is performed on the back side to alternately arrange SiO2 and TiO2 to form a periodic structure to increase light reflection. The number of layers is 49, and a HEMT and blue light LED monolithic integrated chip is obtained;

[0079] Example 2

[0080] This embodiment provides a monolithic integrated chip for a HEMT and a blue LED. The HEMT and blue LED monolithic integrated chip includes a HEMT region and an LED region. The HEMT region comprises, from bottom to top, a substrate, an AlN buffer layer, a GaN channel layer, an AlGaN barrier layer, a GaN cap layer, a passivation layer, and a HEMT electrode layer, wherein the HEMT electrode layer comprises a source electrode, a drain electrode, and a gate electrode. The LED region comprises, from bottom to top, a substrate, an AlN buffer layer, a GaN channel layer, an AlGaN barrier layer, a GaN cap layer, an N-GaN layer, an InGaN / GaN multi-quantum well layer, a P-GaN layer, a current blocking layer, a transparent conductive layer, a passivation layer, an N-electrode, and a P-electrode. The drain electrode of the HEMT region is connected to the P-electrode of the LED via a metal bridge to achieve electrical conduction between the HEMT region and the LED region.

[0081] The preparation of the HEMT and blue LED monolithic integrated chip includes the following steps:

[0082] (1) Using MOCVD technology, a full structure is epitaxially grown on a sapphire substrate, wherein the full structure includes a 15nm AlN buffer layer, a 300nm GaN channel layer, a 25nm AlGaN barrier layer; the AlGaN barrier layer has an Al component concentration of 0.25wt%; a 2nm GaN cap layer, a 2μm N-GaN layer, a 140nm quantum well layer, and a 600nm P-GaN layer.

[0083] (2) etching the epitaxial structure of step (1) by photolithography, development, and ICP etching to remove the P-GaN layer, quantum well layer, and N-GaN layer with a total thickness of 2740 nm until the GaN cap layer is exposed, thereby dividing the integrated device into a HEMT region and an LED region; the HEMT region includes an AlN buffer layer, a GaN channel layer, an AlGaN barrier layer, and a GaN cap layer;

[0084] (3) using a cleaning solution (the cleaning solution is prepared by mixing concentrated sulfuric acid, water, and hydrogen peroxide in a mass ratio of 5:1:1) to clean the epitaxial wafer in step 1;

[0085] (4) Using photolithography and ICP etching, the P-GaN layer, quantum well layer, and N-GaN layer in the LED area are etched away to expose the N-GaN layer, totaling 1100 nm; and the area between the HEMT and the LED is further etched to a depth of 340 nm;

[0086] (5) Using a viscosity enhancer on the epitaxial layer, a SiO2 current blocking layer is deposited on the P-GaN left in step (4) using PECVD technology to increase the recombination efficiency of holes and electrons. The thickness of the current blocking layer is 200 nm.

[0087] (6) wet etching the current blocking layer with an etching solution through photolithography and development, wherein the etching solution is a mixture of HF and NH4F with a mass ratio of 1:6;

[0088] (7) ITO (1100A) was evaporated by electron beam evaporation technology to deposit oxides such as In2O3 on the surface to form a current diffusion layer, followed by photolithography and development, and the excess oxides such as In2O3 were removed with a mixed solution of HCl and FeCl3; the current diffusion layer was further subjected to RTA annealing treatment, with a flow rate ratio of 9×10 4 : 2.5 N2 and O2, at high temperature, further oxidize the low-valent oxides, thereby improving the conductivity and transmittance of the ITO film;

[0089] (8) The GaN cap layer and AlGaN barrier layer in the HEMT region are etched away by photolithography and ICP etching to expose the GaN channel layer. The etching depth is 27 nm.

[0090] (9) using an adhesion promoter, depositing SiO2 in the etched area between the HEMT and the LED using PECVD technology in step (8) to form a step for the metal bridge connection;

[0091] (10) Through photolithography and development, electron beam evaporation technology is used to deposit Cr (using a current of 25A), Al (using a current of 1kA), Ti (using a current of 1kA), Pt (using a current of 650A), Ti (using a current of 1kA), Pt (using a current of 650A), Ti (using a current of 1kA), Pt (using a current of 1kA) and Au (using a current of 20kA), and annealing is performed at a temperature of 265°C for 5min to form the source electrode, drain / N (metal bridge) electrode, and P electrode of the chip, and then the blue film is peeled off;

[0092] (11) Ni (using a current of 1 kA) and Au (using a current of 2 kA) electrodes were deposited using electron beam evaporation technology through photolithography and development to form a gate electrode, followed by blue film tearing;

[0093] (12) A SiO2 passivation layer is formed on the surface by PECVD technology. The passivation layer is wet-etched by photolithography and development using an etching solution containing a mixture of HF and NH4F in a mass ratio of 1:6.

[0094] (13) Wet-etching the SiO2 in step (11) with an etching solution through photolithography and development to expose five electrodes, wherein the etching solution is a mixture of HF and NH4F with a mass ratio of 1:6;

[0095] (14) Grinding the substrate to reduce the thickness to 150 μm;

[0096] (15) DBR evaporation was performed on the back side, and SiO2 and TiO2 were arranged alternately to form a periodic structure to increase light reflection. The number of layers was 49, and a monolithic integrated chip of HEMT and blue light LED was obtained.

[0097] Example 3

[0098] This embodiment provides a monolithic integrated chip for a HEMT and a blue LED. The HEMT and blue LED monolithic integrated chip includes a HEMT region and an LED region. The HEMT region comprises, from bottom to top, a substrate, an AlN buffer layer, a GaN channel layer, an AlGaN barrier layer, a GaN cap layer, a passivation layer, and a HEMT electrode layer, wherein the HEMT electrode layer comprises a source electrode, a drain electrode, and a gate electrode. The LED region comprises, from bottom to top, a substrate, an AlN buffer layer, a GaN channel layer, an AlGaN barrier layer, a GaN cap layer, an N-GaN layer, an InGaN / GaN multi-quantum well layer, a P-GaN layer, a current blocking layer, a transparent conductive layer, a passivation layer, an N-electrode, and a P-electrode. The drain electrode of the HEMT region is connected to the P-electrode of the LED via a metal bridge to achieve electrical conduction between the HEMT region and the LED region.

[0099] The preparation of the HEMT and blue LED monolithic integrated chip includes the following steps:

[0100] (1) Using MOCVD technology, a full structure is epitaxially grown on a sapphire substrate. The full structure includes a 15nm AlN buffer layer, a 300nm GaN channel layer, a 25nm AlGaN barrier layer; the AlGaN barrier layer has an Al component concentration of 0.3; a 2nm GaN cap layer, a 2.5um N-GaN layer, a 140nm quantum well layer, and a 600nm P-GaN layer.

[0101] (2) etching the epitaxial structure of step (1) by photolithography, development, and ICP etching to remove the P-GaN layer, quantum well layer, and N-GaN layer with a total thickness of 3240 nm until the GaN cap layer is exposed, so that the integrated device is divided into a HEMT region and an LED region; the HEMT region includes an AlN buffer layer, a GaN channel layer, an AlGaN barrier layer, and a GaN cap layer;

[0102] (3) using a cleaning solution (the cleaning solution is prepared by mixing concentrated sulfuric acid, water, and hydrogen peroxide in a mass ratio of 5:1:1) to clean the epitaxial wafer of step (2);

[0103] (4) Using photolithography and ICP etching, the P-GaN layer, quantum well layer, and N-GaN layer in the LED area are etched away to expose the N-GaN layer, totaling 1200 nm; and the area between the HEMT and LED is further etched to a depth of 340 nm;

[0104] (5) Using a viscosity enhancer on the epitaxial layer, a SiO2 current blocking layer is deposited on the P-GaN left in step (4) using PECVD technology to increase the recombination efficiency of holes and electrons. The thickness of the current blocking layer is 200 nm.

[0105] (6) wet etching the current blocking layer with an etching solution through photolithography and development, wherein the etching solution is a mixture of HF and NH4F with a mass ratio of 1:9;

[0106] (7) ITO (1300A) was deposited by electron beam evaporation technology to deposit oxides such as In2O3 on the surface to form a current diffusion layer, followed by photolithography and development, and the excess oxides such as In2O3 were removed with a mixed solution of HCl and FeCl3; the current diffusion layer was further subjected to RTA annealing treatment, with a flow rate ratio of 9×10 4 : 2.5 N2 and O2, at a high temperature of 510 ° C, further oxidize the low-valent oxides, thereby improving the conductivity and transmittance of the ITO film;

[0107] (8) The GaN cap layer and AlGaN barrier layer in the HEMT region are etched away by photolithography and ICP etching to expose the GaN channel layer. The etching depth is 27 nm.

[0108] (9) using an adhesion promoter, depositing SiO2 in the etched area between the HEMT and the LED using PECVD technology in step (8) to form a step for the metal bridge connection;

[0109] (10) Through photolithography and development, electron beam evaporation technology is used to deposit Cr (using a current of 25A), Al (using a current of 1kA), Ti (using a current of 1kA), Pt (using a current of 650A), Ti (using a current of 1kA), Pt (using a current of 650A), Ti (using a current of 1kA), Pt (using a current of 1kA) and Au (using a current of 20kA), and annealing is performed at a temperature of 265°C for 5min to form the source electrode, drain / N (metal bridge) electrode, and P electrode of the chip, and then the blue film is peeled off;

[0110] (11) Ni (using a current of 1 kA) and Au (using a current of 2 kA) were deposited using electron beam evaporation technology through photolithography and development to form a gate electrode, followed by blue film gold tearing;

[0111] (12) A SiO2 (100 nm) passivation layer was formed on the surface by PECVD technology, and the passivation layer was wet-etched by photolithography and development using an etching solution containing a mixture of HF and NH4F in a mass ratio of 1:7.

[0112] (13) wet-etching the SiO2 in step (11) with an etching solution through photolithography and development to expose five electrodes, wherein the etching solution is a mixture of HF and NH4F with a mass ratio of 1:9;

[0113] (14) Grinding the substrate to reduce the thickness of the substrate (150 μm);

[0114] (15) DBR evaporation was performed on the back side, and SiO2 and TiO2 were arranged alternately to form a periodic structure to increase light reflection. The number of layers was 49, and a HEMT and blue light LED monolithic integrated chip was obtained.

[0115] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A method for preparing a HEMT and blue light LED monolithic integrated chip, characterized in that: The steps include: S1: Providing a sapphire substrate, growing a HEMT epitaxial layer and an LED epitaxial layer on the substrate to form a HEMT-LED structure; the HEMT structure is composed of a sapphire substrate, an AlN buffer layer, a GaN channel layer, an AlGaN barrier layer, and a GaN cap layer from bottom to top; the LED structure is composed of an AlN buffer layer, a GaN channel layer, an AlGaN barrier layer, a GaN cap layer, an N-GaN layer, an InGaN / GaN multi-quantum well layer, and a P-GaN layer from bottom to top; S2: Cleaning, photolithography, and ICP etching the HEMT-LED epitaxial structure to obtain a HEMT region and an LED region; S3: SiO2 is deposited on the LED area by PECVD to form a current blocking layer and a metal bridge step; S4: performing ITO evaporation and annealing treatment on the LED area in sequence; S5: Cleaning, photolithography, and ICP etching are performed on the HEMT area, and source electrodes, drain electrodes / N electrodes, and P electrodes are prepared in the HEMT area and LED area; S6: preparing a gate electrode on the HEMT region, and then passivating it by depositing SiO2 by PECVD to form a passivation layer to obtain a HEMT-LED epitaxial wafer; S7: Thinning the substrate of the HEMT-LED epitaxial wafer; S8: evaporating a DBR reflective layer on the back to obtain a monolithic integrated chip of HEMT and blue light LED; The integrated chip includes a HEMT region and an LED region. The HEMT region includes, from bottom to top, a DBR reflective layer, a substrate, an AlN buffer layer, a GaN channel layer, an AlGaN barrier layer, a GaN cap layer, a SiO2 passivation layer, and a HEMT electrode layer. The HEMT electrode layer includes a source electrode, a drain electrode, and a gate electrode. The LED region includes, from bottom to top, a DBR reflective layer, a substrate, an AlN buffer layer, a GaN channel layer, an AlGaN barrier layer, a GaN cap layer, an N-GaN layer, an InGaN / GaN multi-quantum well layer, a P-GaN layer, a current blocking layer, a transparent conductive layer, a passivation layer, an N-electrode, and a P-electrode. The drain electrode of the HEMT region is connected to the N-electrode of the LED region via a metal bridge to achieve electrical conduction between the HEMT region and the LED region.

2. The preparation method according to claim 1, characterized in that The substrate is independently a sapphire substrate; the AlN buffer layer is in contact with the substrate, and the thickness of the AlN buffer layer is independently 14-16 nm.

3. The preparation method according to claim 2, characterized in that The GaN channel layer is independently an unintentionally doped GaN layer, and the thickness is independently 200 to 300 nm.

4. The preparation method according to claim 3, characterized in that The Al doping concentration of the AlGaN barrier layer is independently 0.2-0.3 wt %, the thickness of the AlGaN barrier layer is independently 20-30 nm, and the thickness of the GaN cap layer is independently 2 nm.

5. The preparation method according to any one of claims 1 to 3, characterized in that The N-GaN layer is a Si-doped GaN layer with a thickness of 1.5 to 2.5 μm and a Si doping concentration of 2.2×10 19 wt%; the InGaN / GaN multi-quantum well layer is a periodically overlapping InGaN / GaN layer with a thickness of 130 to 140 nm.

6. The preparation method according to claim 5, characterized in that The P-GaN layer is a Mg-doped GaN layer with a thickness of 580-620 nm and a Mg doping concentration of 1.5×10 19 wt%.

7. The preparation method according to claim 6, characterized in that The source electrode, drain electrode, N electrode and P electrode are independently ohmic contacts, and are alloys composed of at least two metals selected from Cr, Al, Ti, Pt and Au.

8. The preparation method according to claim 7, characterized in that The metal bridge is an alloy composed of at least two metals among Cr, Al, Ti, Pt, and Au; the gate electrode is a Schottky contact, and the gate electrode is an alloy of Ni and Au.

9. The preparation method according to claim 7 or 8, characterized in that The area ratio of the HEMT region to the LED region is 1-3:1-2.

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