Diode based on p-type nickel oxide-silicon nitride insulating layer-n-type gallium oxide structure and preparation method thereof

Abstract

The application discloses a diode based on a p-type nickel oxide-silicon nitride insulating layer-n-type gallium oxide structure and a preparation method, and mainly solves the problem of poor application effect of a Schottky diode under a large power in terms of a forward current density and a reverse breakdown voltage. The diode comprises, from bottom to top, a cathode ohmic metal layer, a heavily doped gallium oxide substrate, a lightly doped epitaxial layer gallium oxide and an anode metal, wherein a silicon nitride insulating thin layer and a p-type nickel oxide layer are additionally arranged between the lightly doped epitaxial layer gallium oxide and the anode metal. The silicon nitride insulating thin layer and the p-type nickel oxide layer change the energy band structure between the n-type gallium oxide and the p-type nickel oxide, so that a larger tunneling current is generated between the n-type gallium oxide and the p-type nickel oxide, and the forward current density and the reverse breakdown voltage of the device are increased. The actual measurement shows that the forward current density of the device is increased by 616%, and the reverse breakdown voltage is increased by 102%, and the device can be used in a large power working environment with a large current density and a high breakdown voltage.

Description

TECHNICAL FIELD

[0001] The present application belongs to the technical field of semiconductor devices, and particularly relates to a diode which can be used in a large-power working environment with large current density and high breakdown voltage. BACKGROUND

[0002] With the continuous progress of science and technology, in the fields of communication, power electronics, signal processing, aerospace, etc., the performance of traditional third-generation semiconductor gallium nitride and silicon carbide power devices cannot meet the higher working performance requirements. Gallium oxide is a new type of semiconductor material, which has a large band gap of 4.6eV-4.9eV and a high critical breakdown field strength of 8MV / cm, and can be used to prepare large-power devices. The gallium oxide large-power device has the advantages of large breakdown voltage, high working environment temperature and strong anti-radiation capability. Compared with gallium nitride and silicon carbide under the same withstand voltage, the gallium oxide large-power device has lower on-resistance, smaller power consumption and higher Baliga figure of merit.

[0003] The gallium oxide power device mainly includes diodes and triode MOSFETs, wherein the existing diodes mainly include heterojunction pn diodes and Schottky diodes.

[0004] The heterojunction pn diode works by using minority carriers, and the concentration of minority carriers in the device is low, so the forward current density of the heterojunction pn diode is low. Since p-type doping of gallium oxide is difficult to achieve, other p-type semiconductor materials such as nickel oxide, copper oxide and tin oxide are combined with n-type gallium oxide to form a heterojunction pn diode.

[0005] The Schottky diode, as shown in FIG. 1, sequentially includes a cathode ohmic metal layer, a heavily doped gallium oxide substrate, a lightly doped epitaxial layer gallium oxide and an anode Schottky metal from bottom to top. Figure 1 The forward current density of the Schottky diode is higher than that of the heterojunction pn diode, but still cannot meet the requirements of large-power applications. In addition, the breakdown voltage of the traditional Schottky diode is not ideal for applications under large power due to the limitation of its structure. SUMMARY

[0006] The present application aims at the deficiencies of the prior art, and provides a diode based on a p-type nickel oxide-silicon nitride insulating layer-n-type gallium oxide structure and a preparation method, so as to improve the current density and breakdown voltage of the device and meet the requirements of large-power device applications.

[0007] To achieve the above-mentioned purpose, the technical scheme of the present application comprises the following:

[0008] 1. A diode based on a p-type nickel oxide-silicon nitride insulating layer-n-type gallium oxide structure, comprising, from bottom to top, a cathode ohmic metal layer, a heavily doped gallium oxide substrate, a lightly doped epitaxial gallium oxide layer, and an anode metal. The diode is characterized by an additional thin silicon nitride insulating layer and a p-type nickel oxide layer between the lightly doped epitaxial gallium oxide layer and the anode metal to increase forward current density and reverse breakdown voltage.

[0009] Furthermore, the thickness of the gallium oxide substrate is 300-650 μm, and the effective doping carrier concentration is 10 18 -10 20 cm -3 , the doping ion types are Si ions or Sn ions.

[0010] Furthermore, the cathode ohmic metal is Ti / Au, and the thickness of the first layer of Ti close to the gallium oxide substrate layer is 20-50 nm, and the thickness of the second layer of Au metal is 100-400 nm.

[0011] Furthermore, the gallium oxide epitaxial layer has a thickness of 3-15 μm and a doping carrier concentration of 10 16 -10 18 cm -3 .

[0012] Furthermore, the nickel oxide layer has a thickness of 50-300 nm and a doping concentration of 1×10 16 -8×10 20 cm -3 .

[0013] Furthermore, the anode metal is Ni / Au, and the thickness of the first layer of metal Ni is 45-60 nm, and the thickness of the second layer of metal Au is 200-400 nm.

[0014] 2. A method for preparing a diode based on a p-type nickel oxide-silicon nitride insulating layer-n-type gallium oxide structure, characterized by comprising the following steps:

[0015] 1) Cleaning the gallium oxide substrate with acetone, isopropyl alcohol, and deionized water in sequence;

[0016] 2) Using hydride vapor phase epitaxy (HVPE) technology to grow epitaxially on the front side of the gallium oxide substrate with a thickness of 3-15 μm and a doping carrier concentration of 10 16 -10 18 cm -3 A lightly doped gallium oxide layer;

[0017] 3) depositing a Ti / Au cathode ohmic metal with a thickness of 120-450 nm on the back of the gallium oxide substrate by magnetron sputtering;

[0018] 4) performing ohmic annealing on the cathode ohmic metal in a nitrogen environment;

[0019] 5) Using hydride vapor phase epitaxy (PECVD) technology to deposit on the surface of the epitaxial gallium oxide layer to form a 2-8 nm thin silicon nitride layer;

[0020] 6) A nickel oxide layer pattern was prepared on the silicon nitride thin layer using photolithography technology, and a nickel oxide layer with a thickness of 50-300 nm and a doping concentration of 1×10 16 cm -3 -8×10 20 cm -3 nickel oxide layer;

[0021] 7) Using photolithography technology, an anode pattern is prepared on the nickel oxide layer, and Ni / Au anode metal with a thickness of 245-460 nm is deposited by electron beam evaporation to complete the device fabrication.

[0022] Compared with the prior art, the present invention has the following advantages:

[0023] First, since the present invention adds an ultra-thin insulating layer of silicon nitride and a layer of p-type semiconductor nickel oxide material on the gallium oxide epitaxial layer, a large tunneling current can be generated between n-type gallium oxide and p-type nickel oxide, greatly improving the output current density of the device.

[0024] Second, the present invention adds an ultra-thin insulating layer of silicon nitride and a layer of p-type semiconductor nickel oxide material on the gallium oxide epitaxial layer. The tunneling current can be adjusted by changing the thickness of the insulating thin layer of silicon nitride, thereby controlling the output current density of the device.

[0025] Third, the present invention adds an ultra-thin insulating layer of silicon nitride and a layer of p-type semiconductor nickel oxide material on the gallium oxide epitaxial layer. Under this structure, the band structure between n-type gallium oxide and p-type nickel oxide changes, the reverse characteristics are improved, and the breakdown voltage of the device can be greatly increased. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 It is a structural diagram of an existing Schottky diode;

[0027] Figure 2 This is a schematic structural diagram of a p-type nickel oxide-silicon nitride insulating layer-n-type gallium oxide diode with high current density and high breakdown voltage according to the present invention;

[0028] Figure 3 Made for this invention Figure 2 Flowchart for realizing a p-type nickel oxide-silicon nitride insulating layer-n-type gallium oxide diode;

[0029] Figure 4The figure of comparison of the forward characteristic curve of the p-type nickel oxide-silicon nitride insulating layer-n-type gallium oxide diode of the present application and the traditional Schottky diode;

[0030] Figure 5 The figure of comparison of the reverse characteristic curve of the p-type nickel oxide-silicon nitride insulating layer-n-type gallium oxide diode of the present application and the traditional Schottky diode. DETAILED DESCRIPTION

[0031] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the present application is further described below in combination with the embodiments and the drawings required to be used in the technical description of the present application. However, the present application is not limited to these embodiments, and those skilled in the art should understand that the present application can also be implemented in other embodiments without these specific details.

[0032] Referring to Figure 2 , the p-type nickel oxide-silicon nitride insulating layer-n-type gallium oxide diode of the present application comprises: cathode ohmic metal 1, gallium oxide substrate 2, gallium oxide lightly doped epitaxial layer 3, silicon nitride insulating thin layer 4, p-type nickel oxide layer 5 and diode anode metal 6. Among them:

[0033] The cathode ohmic metal 1 adopts Ti / Au, the thickness of Ti is 20 nm, and the thickness of Au is 400 nm;

[0034] The gallium oxide substrate 2 is located above the cathode ohmic metal 1, the thickness is 650 μm, and the doping concentration is 2×10 19 m -3 ;

[0035] The gallium oxide lightly doped epitaxial layer 3 is located above the gallium oxide substrate 2, the thickness is 10 μm, and the doping concentration is 3×10 16 m -3 ;

[0036] The silicon nitride insulating thin layer 4 is located above the gallium oxide lightly doped epitaxial layer 3, the thickness is 2-8 nm;

[0037] The p-type nickel oxide layer 5 is located above the silicon nitride insulating thin layer 4, the thickness is 50-300 nm, and the doping concentration is 1×10 16 cm -3 -8×10 20 cm -3 ;

[0038] The anode metal 6 is located above the p-type nickel oxide layer 5, and the metal adopts Ni / Au, the thickness of Ni is 45 nm, and the thickness of Au is 400 nm.

[0039] Referring to Figure 3 , the p-type nickel oxide-silicon nitride insulating layer-n-type gallium oxide diode of the present application is manufactured Figure 2 The device structure method provides the following three embodiments:

[0040] Example 1: The thickness of the gallium oxide substrate is 650 μm and the effective doping carrier concentration is 10 18 cm -3 The thickness of the lightly doped gallium oxide epitaxial layer is 10 μm, and the doping carrier concentration is 10 16 cm -3 The thickness of the p-type nickel oxide layer is 200 nm, and the doping carrier concentration is 6×10 16 cm -3 , a p-type nickel oxide-silicon nitride insulating layer-n-type gallium oxide diode with a silicon nitride thin layer thickness of 8nm.

[0041] Step 1: Cleaning the gallium oxide substrate.

[0042] The thickness of the gallium oxide substrate 2 is selected to be 650 μm, and the effective doping carrier concentration is 10 18 cm -3 , the doping ion type is Sn ion;

[0043] The samples were sonicated in acetone, isopropyl alcohol, and deionized water for 5 minutes each, and then blown dry with nitrogen gas.

[0044] Step 2: Using hydride vapor phase epitaxy (HVPE) technology, a gallium oxide epitaxial layer is grown on the front side of the gallium oxide substrate.

[0045] First, HCl reacts with high-purity metallic Ga at 850°C to produce GaCl and GaCl3;

[0046] Then, GaCl and GaCl3 react with oxygen at 650°C to form a 10 μm thick doped layer on the front of the gallium oxide substrate 2 with a carrier concentration of 10 16 cm -3 Gallium oxide epitaxial layer 3.

[0047] Step 3: Prepare cathode ohmic metal.

[0048] A magnetron sputtering method is used to deposit metal Ti / Au on the back of the gallium oxide substrate, with the thickness of the first Ti layer close to the gallium oxide substrate layer being 20 nm, and the thickness of the second Au metal layer being 400 nm, to form a cathode ohmic metal 1.

[0049] Step 4: Annealing.

[0050] The cathode ohmic metal was annealed in a nitrogen atmosphere using an annealing furnace at a temperature of 470° C. for 1 minute.

[0051] Step 5: Deposit a thin layer of silicon nitride using PECVD technology.

[0052] The RF power was set to 20 W, and NH3 and diluted 2% SiH4 / N2 were introduced into the reaction chamber at 350° C. to generate plasma radicals, which were recombined to form a silicon nitride thin layer 4 with a thickness of 8 nm on the gallium oxide epitaxial layer.

[0053] Step 6: Grow a nickel oxide layer using magnetron sputtering.

[0054] First, a nickel oxide layer pattern is prepared on a thin silicon nitride layer using photolithography technology;

[0055] Then, the hole concentration in nickel oxide was adjusted by changing the Ar / O2 flow ratio using magnetron sputtering to form a 200 nm thick nickel oxide with a doping concentration of 6×10 16 cm -3 The nickel oxide layer 5.

[0056] Step 7: Prepare anode metal.

[0057] First, an anode pattern is prepared on the nickel oxide layer using photolithography technology;

[0058] Then, metal Ni / Au was deposited on the anode pattern by electron beam evaporation, with the thickness of the first metal Ni layer being 45 nm and the thickness of the second metal Au layer being 400 nm.

[0059] Finally, the photoresist is washed off with N-methylpyrrolidone solution to complete the device fabrication.

[0060] Example 2: The thickness of the gallium oxide substrate is 300 μm and the effective doping carrier concentration is 10 20 cm -3 The thickness of the lightly doped gallium oxide epitaxial layer is 3 μm, and the doping carrier concentration is 10 17 cm -3 The thickness of the p-type nickel oxide layer is 150 nm, and the doping carrier concentration is 1×10 17 cm -3 , a p-type nickel oxide-silicon nitride insulating layer-n-type gallium oxide diode with a silicon nitride thin layer thickness of 5nm.

[0061] Step 1: Cleaning of gallium oxide substrate.

[0062] The thickness is selected as 300μm and the effective doping carrier concentration is 10 20 cm -3 A gallium oxide substrate 2 in which the ion species is doped with Sn ions is ultrasonicated in acetone-isopropyl alcohol-deionized water for 5 minutes respectively, and then blown dry with nitrogen gas.

[0063] Step 2: Using hydride vapor phase epitaxy (HVPE) technology, a gallium oxide epitaxial layer is grown on the front side of the gallium oxide substrate.

[0064] First, HCl reacts with high-purity metal Ga at 850°C to generate GaCl and GaCl3; then GaCl and GaCl3 react with oxygen at 600°C to generate a 3μm thick doped carrier concentration of 10 on the front of the gallium oxide substrate. 17 cm -3 Gallium oxide epitaxial layer 3.

[0065] Step 3: Prepare cathode ohmic metal.

[0066] The specific implementation of this step is the same as step three in Example 1.

[0067] Step 4: Set the annealing furnace temperature to 470° C. and anneal the cathode ohmic metal in a nitrogen atmosphere for 1 minute.

[0068] Step 5: Deposit a thin layer of silicon nitride using PECVD technology.

[0069] The RF power was set to 20 W, and NH3 and diluted 2% SiH4 / N2 were introduced into the reaction chamber at 300° C. to generate plasma radicals, which were recombined to form a silicon nitride thin layer 4 with a thickness of 5 nm on the gallium oxide epitaxial layer.

[0070] Step 6: Grow a nickel oxide layer using magnetron sputtering.

[0071] The nickel oxide layer pattern was first prepared on the silicon nitride thin layer using photolithography technology. Then, the hole concentration in the nickel oxide was adjusted by changing the Ar / O2 flow ratio using magnetron sputtering to form a nickel oxide with a thickness of 150 nm and a doping concentration of 1×10 17 cm -3 The nickel oxide layer 5.

[0072] Step 7: Prepare anode metal and complete device fabrication.

[0073] The specific implementation of this step is the same as step seven of Example 1.

[0074] Example 3: The thickness of the gallium oxide substrate is 600 μm and the effective doping carrier concentration is 10 18 cm -3 The doping ion type is Sn ion, the thickness of the lightly doped gallium oxide epitaxial layer is 15μm, and the doping carrier concentration is 10 16 cm -3 The thickness of the p-type nickel oxide layer is 100 nm, and the doping carrier concentration is 8×10 19 cm -3, a p-type nickel oxide-silicon nitride insulating layer-n-type gallium oxide diode with a silicon nitride thin layer thickness of 3nm.

[0075] Step A: Gallium oxide substrate cleaning.

[0076] A1) The thickness of the gallium oxide substrate is 600 μm, and the effective doping carrier concentration is 10 18 cm -3 , the doping ion type is Sn ion;

[0077] A2) The samples were sonicated in acetone, isopropanol, and deionized water for 5 minutes, and then dried with nitrogen gas.

[0078] Step B: growing a gallium oxide epitaxial layer on the front side of the gallium oxide substrate using hydride vapor phase epitaxy (HVPE) technology.

[0079] B1) reacting HCl with high-purity metallic Ga at 850°C to produce GaCl and GaCl3;

[0080] B2) GaCl and GaCl3 react with oxygen at 500℃ to generate a 15μm thick doped carrier concentration of 10 16 cm -3 Gallium oxide epitaxial layer 3.

[0081] Step C: Preparation of cathode ohmic metal.

[0082] The specific implementation of this step is the same as step three in Example 1.

[0083] Step D: annealing the cathode ohmic metal in a nitrogen atmosphere using an annealing furnace at a temperature of 470° C. for 1 minute.

[0084] Step E: Depositing a thin layer of silicon nitride using PECVD technology.

[0085] The RF power was set to 20 W, and NH 3 and diluted 2% SiH 4 / N 2 were introduced into the reaction chamber at 200° C. to generate plasma radicals, which were recombined to form a silicon nitride thin layer 4 with a thickness of 3 nm on the gallium oxide epitaxial layer.

[0086] Step F: growing a nickel oxide layer by magnetron sputtering.

[0087] F1) using photolithography to form a nickel oxide layer pattern on the silicon nitride thin layer;

[0088] F2) Magnetron sputtering was used to adjust the hole concentration in nickel oxide by changing the Ar / O2 flow ratio to form a 100 nm thick nickel oxide with a doping concentration of 8×10 19 cm -3 The nickel oxide layer 5.

[0089] Step G: Prepare anode metal on the nickel oxide layer using the same process as step 7 of Example 1 to complete device fabrication.

[0090] The effects of the present invention can be further illustrated by the following test results:

[0091] Test 1: The forward IV characteristics of the conventional Schottky diode and the p-type nickel oxide-silicon nitride insulating layer-n-type gallium oxide diode prepared in the first embodiment of the present invention were tested using a Keysight B1500A tester. The test voltage range was 0V-2V. The results are as follows: Figure 4 shown.

[0092] Depend on Figure 4 It can be seen that when the forward bias is 2V, the forward current density of the traditional Schottky diode is 165A / cm 2 The forward current density of the device prepared by the present invention is 1182A / cm 2 Compared with the traditional Schottky diode, the forward current density is increased by 616%, indicating that the preparation method of the present invention can effectively improve the forward current density of the gallium oxide diode.

[0093] Test 2: The reverse IV characteristics of the conventional Schottky diode and the p-type nickel oxide-silicon nitride insulating layer-n-type gallium oxide diode prepared in the first embodiment of the present invention were tested using a Keysight B1500A tester. The test voltage range was 0V-500V. The results are as follows: Figure 5 shown.

[0094] Depend on Figure 5 It can be seen that the reverse breakdown voltage of the traditional Schottky diode is 225V, while the reverse breakdown voltage of the device prepared by the present invention is 455V. Compared with the traditional Schottky diode, the reverse breakdown voltage is increased by 102%, indicating that the preparation method of the present invention can effectively improve the reverse breakdown voltage of the gallium oxide diode.

[0095] The above descriptions are only three specific examples of the present invention and do not constitute any limitation to the present invention. Obviously, for professionals in this field, after understanding the content and principles of the present invention, it is possible to make various modifications and changes in form and details without departing from the principles and structure of the present invention. For example, the method for preparing anode metal is not limited to electron beam evaporation, and any one of the methods such as magnetron sputtering or thermal evaporation can be used; the method for preparing cathode ohmic metal is not limited to magnetron sputtering, and any one of the methods such as electron beam evaporation or thermal evaporation can be used. However, these modifications and changes based on the ideas of the present invention are still within the scope of protection of the claims of the present invention.

Claims

1. A diode based on a p-type nickel oxide-silicon nitride insulating layer-n-type gallium oxide structure, comprising, from bottom to top, a cathode ohmic metal layer (1), a heavily doped gallium oxide substrate (2), a lightly doped epitaxial gallium oxide layer (3), and an anode metal (6), characterized in that: A silicon nitride insulating thin layer (4) and a p-type nickel oxide layer (5) are added between the lightly doped epitaxial gallium oxide layer (3) and the anode metal (6), and the silicon nitride insulating thin layer (4) is located between the lightly doped epitaxial gallium oxide layer (3) and the p-type nickel oxide layer (5) to increase the forward current density and the reverse breakdown voltage.

2. The diode according to claim 1, characterized in that The thickness of the gallium oxide substrate (2) is 300-650 μm, and the effective doping carrier concentration is 10 18 -10 20 cm -3 , the doping ion types are Si ions or Sn ions.

3. The diode according to claim 1, characterized in that The cathode ohmic metal (1) is Ti / Au, and the thickness of the first layer of Ti close to the gallium oxide substrate layer is 20-50 nm, and the thickness of the second layer of Au metal is 100-400 nm.

4. The diode according to claim 1, characterized in that The lightly doped epitaxial layer of gallium oxide (3) has a thickness of 3-15 μm and a doping carrier concentration of 10 16 -10 18 cm -3 .

5. The diode according to claim 1, characterized in that The nickel oxide layer (5) has a thickness of 50-300 nm and a doping concentration of 1×10 16 -8×10 20 cm -3 .

6. The diode according to claim 1, characterized in that The anode metal (6) is Ni / Au, and the thickness of the first layer of metal Ni is 45-60 nm, and the thickness of the second layer of metal Au is 200-400 nm.

7. A method for preparing a diode based on a p-type nickel oxide-silicon nitride insulating layer-n-type gallium oxide structure, characterized in that: The steps include: 1) cleaning the gallium oxide substrate (2) in sequence with acetone, isopropanol, and deionized water; 2) Using hydride vapor phase epitaxy (HVPE) technology to grow epitaxially on the front side of the gallium oxide substrate with a thickness of 3-15 μm and a doping carrier concentration of 10 16 -10 18 cm -3 a lightly doped gallium oxide layer (3); 3) depositing a Ti / Au cathode ohmic metal (1) with a thickness of 120-450 nm on the back side of the gallium oxide substrate by magnetron sputtering; 4) performing ohmic annealing on the cathode ohmic metal (1) in a nitrogen environment; 5) using hydride vapor phase epitaxy (HVPE) to deposit a 2-8 nm silicon nitride thin layer (4) on the surface of the epitaxial gallium oxide layer (3); 6) A nickel oxide layer pattern is prepared on the silicon nitride thin layer (4) using photolithography technology, and a nickel oxide layer with a thickness of 50-300 nm and a doping concentration of 1×10 16 -8×10 20 cm -3 A nickel oxide layer (5); 7) Using photolithography technology to prepare an anode pattern on the nickel oxide layer (5), and depositing Ni / Au anode metal (6) with a thickness of 245-460 nm by electron beam evaporation to complete the device fabrication.

8. The method according to claim 7, characterized in that In step 2), a lightly doped gallium oxide layer is epitaxially grown on the front side of the gallium oxide substrate using hydride vapor phase epitaxy (HVPE), which is achieved as follows: 2a) reacting HCl with high-purity metallic Ga at 850°C to produce GaCl and GaCl3; 2b) reacting GaCl, GaCl3 and oxygen at a temperature of 500-650° C. to generate gallium oxide, which is deposited on a gallium oxide substrate to obtain a lightly doped gallium oxide layer.

9. The method according to claim 7, characterized in that The cathode ohmic metal in step 4) is annealed in a nitrogen atmosphere at a temperature of 400-500° C. for 1-3 minutes.

10. The method according to claim 7, characterized in that In step 5), a thin layer of silicon nitride is deposited on the surface of the epitaxial gallium oxide layer using hydride vapor phase epitaxy (HVPE) technology. The process conditions are as follows: RF power is 19W-21W, The chemical reaction sources are NH3 and diluted 2% SiH4 / N2, The reaction chamber temperature is 200-350°C.

Images