Method for improving the accuracy of stress effect model representation of lod

By combining Gaussian and exponential functions to optimize the LOD stress model, the complexity of the oxide layer distance stress effect under the new process was solved, and higher model accuracy was achieved.

CN115081380BActive Publication Date: 2025-11-04SHANGHAI HUALI INTEGRATED CIRCUIT CORP
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Patent Information

Application Number
CN202210597604.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-05-30
Publication Date
2025-11-04
Estimated Expiration
2042-05-30

AI Technical Summary

Technical Problem

Traditional compact models cannot effectively fit the distance stress effect of complex oxide layers introduced by new processes, resulting in insufficient accuracy in model characterization.

Method used

By combining two sets of Gaussian distribution functions with one set of exponential functions, and by integrating physical dimension offset and model parameter optimization, a more accurate LOD stress model is established.

Benefits of technology

This improves the accuracy of the LOD stress model, enabling it to truly reflect the changing trends of actual data and overcome the problem of insufficient fitting in traditional models.

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Abstract

The application provides a method for improving the characterization accuracy of an LOD stress effect model, obtaining first and second dimensions of edges of a transistor gate to edges of an STI isolation region in a layout, establishing a linear first LOD stress model according to a plurality of sets of point data, the abscissa of the point data being the size of the first dimension, the ordinate being the threshold voltage of a transistor corresponding to different first dimensions, the first LOD stress model being formed by superposition of a plurality of sets of functions; the first LOD stress model is corrected using an amplitude adjustment parameter corresponding to each set of functions and a size position correction parameter, to obtain a second LOD stress model, so that the matching degree of the second LOD stress model to the point data is higher than that of the first LOD stress model. The application uses a combination function of two sets of Gaussian distribution functions and one set of exponential functions in combination with the physical size offset of different regions and model parameter optimization to realize accurate characterization of the LOD stress effect model, so that the LOD stress model can truly reflect the change trend of actual data.
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Description

TECHNICAL FIELD

[0001] The present application relates to the field of semiconductor technology, in particular to a method for improving the characterization accuracy of LOD (Oxide Layer Distance) stress effect model. BACKGROUND

[0002] In the development and manufacturing process of ultra large scale integrated circuits, with the process technology node entering ultra deep submicron, the introduction of various advanced manufacturing processes inevitably brings many effects that have not been encountered before while constantly improving the possible technology implementation.

[0003] A high-efficiency and accurate SPICE model is the key to the implementation of circuit design from function to implementation. The SPICE (Simulation Program with Integrated Circuit Emphasis) model based on the BSIM4 series can accurately describe various characteristics of MOSFET (Metal Oxide Semiconductor Transistor), including STI / LOD stress effects (Shallow Trench Isolation and Oxide Layer Distance Stress Effects). The traditional Compact model can achieve simulation and data matching by adjusting the existing BSIM model parameters (see Figures 4 to 6 ), but the introduction of new process methods has made the originally relatively monotonous oxide layer distance stress effect complex, and the traditional method cannot meet the model fitting requirements. SUMMARY

[0004] In view of the above-mentioned shortcomings of the prior art, the purpose of the present application is to provide a method for improving the characterization accuracy of LOD stress effect model, which solves the problem that the introduction of new process methods has made the originally relatively monotonous oxide layer distance stress effect complex, and the traditional method cannot meet the model fitting requirements.

[0005] To achieve the above-mentioned purposes and other related purposes, the present application provides a method for improving the characterization accuracy of LOD stress effect model, comprising:

[0006] Step one, obtaining the first and second sizes of the edges of the transistor gate on both sides to the edges of the STI isolation region in the layout, establishing a linear first LOD stress model according to a plurality of point data, the abscissa of the point data is the size of the first size, and the ordinate is the threshold voltage of the transistor corresponding to different first sizes, and the first LOD stress model is formed by superimposing a plurality of functions;

[0007] Step two, correcting the first LOD stress model by using the amplitude adjustment parameter corresponding to each group of functions and the position correction parameter of the size to obtain a second LOD stress model, so that the matching degree of the second LOD stress model with the point data is higher than that of the first LOD stress model.

[0008] Preferably, the transistor in step one is a metal oxide transistor.

[0009] Preferably, the function in step one comprises a first and a second Gaussian function and a set of exponential functions.

[0010] Preferably, the first and the second Gaussian function and the exponential function in step two have first to third amplitude adjustment parameters, respectively.

[0011] Preferably, the first and the second Gaussian function and the exponential function in step two have first to third position correction parameters, respectively.

[0012] Preferably, the first and the second Gaussian function in step two have fourth and fifth position correction parameters, respectively, for modifying the first and the second Gaussian function again after the first and the second Gaussian function are modified by the first and the second position correction parameters, respectively.

[0013] Preferably, the amplitude adjustment parameters and the position correction parameters in step two are obtained by an automatic adjustment through a fitting algorithm.

[0014] Preferably, the amplitude adjustment parameters and the position correction parameters in step two are obtained by a manual adjustment.

[0015] Preferably, the first Gaussian function is the first adjustment parameter*exp[(-0.5*log(the first size+the second size+the first position correction parameter) / the fourth position correction parameter)].

[0016] Preferably, the second Gaussian function is the second adjustment parameter*exp[(-0.5*log(the first size+the second size+the second position correction parameter) / the fifth position correction parameter)].

[0017] Preferably, the exponential function is the third adjustment function*exp[(-0.5*log(the first size+the second size+the third position correction parameter)].

[0018] As described above, the method for improving the stress effect model characterization accuracy of LOD according to the present application has the following beneficial effects:

[0019] The present application adopts a combination function of two sets of Gaussian distribution functions and a set of exponential functions, combines the physical size offset of different regions and the optimization of model parameters to realize the accurate characterization of the LOD stress effect model, so that the LOD stress model can truly reflect the change trend of the actual data. BRIEF DESCRIPTION OF DRAWINGS

[0020] Figure 1NMOS transistor tensile stress schematic diagram along 110 crystal direction when current is ideal in prior art;

[0021] Figure 2 PMOS transistor tensile stress schematic diagram along 110 crystal direction when current is ideal in prior art;

[0022] Figure 3 Layout size effect on MOS transistor electrical characteristics schematic diagram showing STI / LOD stress effect in prior art;

[0023] Figure 4 LOD stress model schematic diagram showing prior art using Compact model;

[0024] Figure 5 LOD stress model schematic diagram showing prior art using Compact model (based on Vtlin, threshold voltage trend for SA length change), wherein solid line is original model; dotted line is adjusted model (biased for large size accuracy of SA, SA is MOS transistor gate edge to STI isolation region edge);

[0025] Figure 6 LOD stress model schematic diagram showing prior art using Compact model (based on Vtlin, threshold voltage trend for SA length change), wherein solid line is original model; dotted line is adjusted model (biased for small size accuracy of SA);

[0026] Figure 7 LOD stress model schematic diagram showing the present application using macro model (based on Vtlin, threshold voltage trend for SA length change);

[0027] Figure 8 LOD stress model schematic diagram showing the present application after correction;

[0028] Figure 9 Method schematic diagram showing the present application. DETAILED DESCRIPTION

[0029] The present application is herein described, by way of example only, with reference to certain embodiments thereof. It is construed that persons skilled in the art on the basis of the contents disclosed in the present specification can easily understand other advantages and effects of the present application. The present application can also be implemented or applied by other different embodiments, and each detail in the present specification can be modified or changed based on different viewpoints and applications without departing from the spirit of the present application.

[0030] Referring to Figure 9 The present application provides a method for improving LOD stress effect model representation accuracy, comprising:

[0031] Step one, please refer to Figure 3 , get the first and second dimensions (SA, SB) of the edges of the transistor gate on both sides to the edges of the STI isolation region in the layout, and establish a linear first LOD stress model according to a plurality of sets of point data, the abscissa of the point data is the size of the first dimension, and the ordinate is the threshold voltage of the transistor corresponding to different first dimensions, the first LOD stress model is obtained by superimposing a plurality of functions, and the stress model is as shown in Figure 7 ;

[0032] In an optional embodiment, the transistor in step one is a metal oxide transistor.

[0033] In an optional embodiment, the function in step one includes a first and a second Gaussian function and a set of exponential functions.

[0034] Step two, please refer to Figure 8 , the first LOD stress model is modified by using the amplitude adjustment parameter corresponding to each function and the size position correction parameter, to obtain a second LOD stress model, so that the matching degree of the second LOD stress model with the point data is higher than that of the first LOD stress model.

[0035] In an optional embodiment, the first and second Gaussian functions and the exponential functions in step two have first to third amplitude adjustment parameters, respectively.

[0036] In an optional embodiment, the first and second Gaussian functions and the exponential functions in step two have first to third position correction parameters, respectively.

[0037] In an optional embodiment, the first and second Gaussian functions in step two have fourth and fifth position correction parameters, respectively, for modifying the first and second Gaussian functions again after the first and second Gaussian functions are modified by using the first and second position correction parameters, respectively.

[0038] In an optional embodiment, the amplitude adjustment parameters and the position correction parameters in step two are automatically adjusted and obtained by a fitting algorithm.

[0039] In an optional embodiment, the amplitude adjustment parameters and the position correction parameters in step two are obtained by manual adjustment.

[0040] In an optional embodiment, the first Gaussian function is a first adjustment parameter * exp[(-0.5*log(first dimension+second dimension+first position correction parameter) / fourth position correction parameter)].

[0041] In an alternative embodiment, the second Gaussian function is a second adjustment parameter *exp[(-0.5*log(first size+second size+second position correction parameter) / fifth position correction parameter)].

[0042] In an alternative embodiment, the exponential function is a third adjustment function *exp[(-0.5*log(first size+second size+third position correction parameter)].

[0043] Exemplarily, the LOD stress macro model in this embodiment is superimposed by two sets of Gaussian functions and one set of exponential functions, kvthll lod, kvth12 lod and kvth13 lod respectively correspond to the respective amplitude adjustment parameters of the three sets of functions; kvth31 lod, kvth32 lod and kvth33 lod respectively correspond to the position correction parameters of the SA (i.e. MOS transistor gate edge to STI isolation region edge) size of the three sets of functions; and kvth21 lod and kvth22 lod respectively correspond to the re-correction based on the position correction parameters of the two sets of Gaussian functions. By adjusting these parameters, the model and the measured data can be matched better, and the parameters can be manually adjusted or automatically adjusted by different fitting algorithms.

[0044] The specific adjustment parameters are as follows:

[0045] +kvthll lod = +1.4817e-010

[0046] +kvth21 lod = 1.8080e+00

[0047] +kvth31 lod = -2.3345e-007

[0048] +kvth12 lod = -5.0342e-014

[0049] +kvth22 lod = 5.6600e-01

[0050] +kvth32 lod = 1.0513e-008

[0051] +kvth13 lod = +7.1508e-012

[0052] +kvth33 lod = -3.0178e-008

[0053] +kvth agussl = 'kvthll lod*exp(-0.5*log(sa+sb+kvth31 lod) / kvth21 lod)'

[0054] + kvth_exp = 'kvth13 lod * exp(-0.5 * log(sa + sb + kvth33 lod))'

[0055] + kvth_exp = 'kvth13 lod * exp(-0.5 * log(sa + sb + kvth33 lod))'

[0056] + kvth_lod = 'kvth_aguss1 + kvth_aguss2 + kvth_exp'

[0057] + kvth0 = 'kvth_lod'

[0058] It is to be understood that the figures provided in the embodiments are merely schematic to illustrate the basic concept of the present application, and only the components related to the present application are shown in the figures, not drawn according to the number, shape and size of the components in actual implementation, and the type, number and proportion of each component in actual implementation can be arbitrarily changed, and the component layout type can also be more complex.

[0059] In summary, the present application uses a combination function of two groups of Gaussian distribution functions and one group of exponential functions to combine the physical size offset of different regions and model parameter optimization to realize the accurate characterization of the LOD stress effect model, so that the LOD stress model can truly reflect the change trend of the actual data. Therefore, the present application effectively overcomes the various shortcomings in the prior art and has a high industrial utilization value.

[0060] The above embodiments only illustrate the principles and effects of the present application, and are not used to limit the present application. Any person skilled in the art can modify or change the above embodiments without departing from the spirit and scope of the present application. Therefore, all equivalent modifications or changes completed by those skilled in the art without departing from the spirit and technical idea disclosed by the present application should be covered by the claims of the present application.

Claims

1. A method of improving the accuracy of characterization of a LOD stress effect model, characterized in that, At least comprising: Step one, obtaining a first size and a second size of a transistor gate edge to STI isolation edge in a layout, and establishing a linear first LOD stress model according to a plurality of point data, wherein the abscissa of the point data is the size of the first size, and the ordinate is the threshold voltage of the transistor corresponding to different first sizes, and the first LOD stress model is superimposed by a plurality of functions including a first Gaussian function, a second Gaussian function and an exponential function; Step two, adjusting the first LOD stress model by using an amplitude adjustment parameter and a position correction parameter corresponding to each group of functions, wherein the position correction parameter includes a first position correction parameter for adjusting the position of the function and a second position correction parameter for adjusting the shape of the first Gaussian function and the second Gaussian function, the second position correction parameter is calculated based on the logarithmic function of the first size and the second size to obtain a second LOD stress model, so that the matching degree of the second LOD stress model with the point data is higher than that of the first LOD stress model.

2. The method of claim 1, wherein: The transistor in step one is a metal oxide transistor.

3. The method of claim 1, wherein: The first Gaussian function and the second Gaussian function and the exponential function in step two have a first amplitude adjustment parameter, a second amplitude adjustment parameter and a third amplitude adjustment parameter respectively.

4. The method of claim 1, wherein: The first Gaussian function and the second Gaussian function and the exponential function in step two have the first position correction parameter, the second position correction parameter and the third position correction parameter respectively.

5. The method of claim 4, wherein: The first Gaussian function and the second Gaussian function in step two further have a fourth position correction parameter and a fifth position correction parameter respectively, which are used to modify the first Gaussian function and the second Gaussian function again after the first Gaussian function and the second Gaussian function are modified by using the first position correction parameter and the second position correction parameter.

6. The method of claim 1, wherein: The amplitude adjustment parameter and the position correction parameter in step two are obtained by fitting algorithm.

7. The method of improving the accuracy of a stress- effect-of-LOD model representation of claim 1, wherein: The amplitude adjustment parameter and the position correction parameter in step two are obtained by manual adjustment.

8. The method of claim 5, wherein: The first Gaussian function is a first adjustment parameter*exp[(-0.5*log(the first size+the second size+the first position correction parameter) / the fourth position correction parameter)].

9. The method of claim 5, wherein: The second Gaussian function is a second adjustment parameter*exp[(-0.5*log(the first size+the second size+the second position correction parameter) / the fifth position correction parameter)].

10. The method of improving the accuracy of a stress- effect model representation of a LOD according to claim 4, wherein: The exponential function is a third adjustment function*exp[(-0.5*log(the first size+the second size+the third position correction parameter)].

Citation Information

Patent Citations

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