semiconductor devices
By filling the fluidic heat transfer material in the resin package and using spacers to keep the radiator parallel to the cooling plate, the problem of difficult parallelism between the semiconductor chip and the radiator is solved, and the cooling efficiency is improved and the heat transfer material is prevented from leaking.
Patent Information
- Application Number
- CN202210235592.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2021-03-15
- Filing Date
- 2022-03-11
- Publication Date
- 2025-08-26
- Estimated Expiration
- 2042-03-11
AI Technical Summary
In the prior art, it is difficult for semiconductor chips and radiators to remain parallel, separation of sealing members and semiconductor chips to cause leakage of heat transfer material, and it is difficult to keep the radiator and cooling plate parallel.
The semiconductor chip is accommodated in a resin package, and the fluid heat transfer material is filled between the radiator and the cooling plate. The radiator and the cooling plate are kept parallel with the dispersed spacers, and the heat transfer material is prevented from leaking from being used with grooves and ridge structures.
It is realized that the holding radiator is accurately parallel to the cooling plate in a simple structure, improves uniform heat diffusion and cooling efficiency, and prevents leakage of heat transfer materials.
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Figure CN115084052B_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to a semiconductor device. Background Art
[0002] WO 2020 / 162417 A1 discloses a semiconductor device with a heat transfer material between a semiconductor chip and a heat sink. A sealing member is provided to surround the semiconductor chip within the semiconductor device to prevent leakage of the heat transfer material. The semiconductor chip is disposed between the heat sink and a substrate, and the sealing member contacts the heat sink and the substrate within the semiconductor substrate. Summary of the Invention
[0003] Because the above-mentioned heat transfer material has fluidity, it may be difficult to keep the semiconductor conductor chip and the heat sink parallel to each other. In the semiconductor described in WO 2020 / 162417 A1, the sealing member can keep the semiconductor chip and the heat sink parallel to each other. However, the sealing member is separated from the semiconductor chip. Therefore, it may be difficult for the sealing member to accurately keep the semiconductor chip and the heat sink parallel to each other.
[0004] On the other hand, a semiconductor device may include a resin package, a heat sink, and a cooling plate. The resin package houses a semiconductor chip. The heat sink is provided on the surface of the resin package. The cooling plate faces the heat sink. Therefore, an object of the present disclosure is to provide a semiconductor device that houses a semiconductor chip inside a resin package and fills a fluid heat transfer material between the heat sink on the surface of the resin package and the cooling plate. Furthermore, an object of the present disclosure is to provide a semiconductor device having a simple structure that accurately maintains the heat sink and the cooling plate parallel to each other.
[0005] According to one aspect of the present disclosure, a semiconductor device includes a semiconductor chip, a heat sink, a resin package, a heat transfer material, and a plurality of spacers. The heat sink absorbs heat from the semiconductor chip. The resin package accommodates the semiconductor chip, and the resin package has a surface on which the heat sink is disposed. The heat transfer material has fluidity, and the heat transfer material is filled between the heat sink and the cooling plate. The spacers are dispersed in the heat transfer material, and the spacers are in contact with the heat sink and the cooling plate. Therefore, in a simple structure with dispersed spacers, the heat sink and the cooling plate can be kept parallel in an accurate manner. BRIEF DESCRIPTION OF THE DRAWINGS
[0006] Other objects, features and advantages of the present disclosure will become more apparent from the following detailed description made with reference to the accompanying drawings. In the accompanying drawings:
[0007] Figure 1 is a perspective view of a semiconductor device according to a first embodiment;
[0008] Figure 2 is a plan view of a semiconductor device;
[0009] Figure 3 It is along Figure 2 A cross-sectional view of the semiconductor device taken along line III-III is shown;
[0010] Figure 4 is a cross-sectional view of a semiconductor device according to a second embodiment; and
[0011] Figure 5 is a cross-sectional view of a semiconductor device according to a third embodiment. DETAILED DESCRIPTION
[0012] (First embodiment)
[0013] Refer to the following Figures 1 to 3 A semiconductor device 2 according to a first embodiment is described. Figure 1 is a perspective view showing the semiconductor device 2 . Figure 1 FIG. 1 shows one of the cooling plates 30a being removed from the resin package 10. The cooling plate 30a is attached to the wide surface of the resin package 10. Figure 1 , the orientation of the coordinate system differs between the left and right sides of line ML.
[0014] The semiconductor device 2 is a power module in which two semiconductor chips 11a and 11b are housed in a resin package 10. The two semiconductor chips 11a and 11b are power transistors. The two semiconductor chips 11a and 11b are connected in series in the resin package 10. The semiconductor device 2 is used, for example, in an inverter including three sets of power transistors connected in series.
[0015] The resin package 10 is flat and has a first narrow surface area as one narrow surface area having three power terminals 13a, 13b, and 13c, and a second narrow surface area as another narrow surface area having control terminals 14a and 14b in the narrow surface area. The second narrow surface area located on one side is opposite to the first surface area. The three power terminals 13a, 13b, and 13c are respectively connected to the positive electrode, negative electrode, and midpoint of the series circuit of the two semiconductor chips 11a and 11b. The control terminal 14a is connected to the control electrode of the semiconductor chip 11a, and the control terminal 14b is connected to the control electrode of the semiconductor chip 11b. The control electrode is electrically conductive with, for example, the gate of the semiconductor chip (power transistor), a temperature sensor included in the semiconductor chip, a current sensor, etc.
[0016] The resin package 10 has a flat shape, and the heat sink 12a is provided at one of the wide surface areas of the resin package 10. Figure 1Although not visible in the figure, the heat sink 12b is provided at another wide surface area among the wide surface areas of the resin package 10. The heat sinks 12a, 12b are thermally connected to the semiconductor chips 11a, 11b, respectively, and absorb the heat of the semiconductor chips 11a, 11b, respectively. The cooling plate 30a faces the heat sink 12a, and the cooling plate 30b faces the heat sink 12b. Although Figure 1 Although not shown, heat transfer material and spacers are interposed between heat sink 12a and cooling plate 30a. In this disclosure, spacers may also be referred to as spacer blocks. Heat absorbed from semiconductor chips 11a and 11b by heat sink 12a is absorbed by cooling plate 30a via the heat transfer material. In other words, semiconductor chips 11a and 11b are cooled by cooling plate 30a. Similarly, heat transfer material and spacers are interposed between heat sink 12b and cooling plate 30b. Semiconductor chips 11a and 11b are also cooled by cooling plate 30b.
[0017] The resin package 10 has a groove 15 surrounding the heat sink 12a. The cooling plate 30a facing the heat sink 12a has a ridge 31. When the cooling plate 30a is attached to the resin package 10, the ridge 31 fits into the groove 15, and the ridge 31 and the groove 15 surround the heat sink 12a. The heat transfer material filled between the heat sink 12a and the cooling plate 30a has fluidity. The groove 15 and the ridge 31 prevent the heat transfer material from leaking out. The cooling plate 30b located on the opposite side of the resin package 10 also has the same structure.
[0018] Figure 2 1 shows a plan view of the semiconductor device 2. Figure 2 , the cooling plate 30a is depicted by a virtual line. The semiconductor chips 11a, 11b housed in the resin package 10 are depicted by a dotted line.
[0019] Figure 3 It is along Figure 2 A cross-sectional view of the semiconductor device taken along line III-III is shown. Figure 3 1 shows a cross-sectional view of the semiconductor device 2 taken along a plane crossing the power supply terminal 13a, the semiconductor chip 11a, and the control terminal 14a. Figure 3 Hatching that should be given to the cross section of the resin package 10 is omitted in order to facilitate understanding. The semiconductor chip 11a has a flat shape, and a wide surface area of the semiconductor chip 11a can be referred to as a main surface.
[0020] The internal structure of the resin package 10 is described below. One of the main surfaces of the semiconductor chip 11a is bonded to the rear surface of the heat sink 12a through the solder layer 22. The collector is provided at one of the main surfaces of the semiconductor chip 11a, and the heat sink 12a and the collector are electrically conductive through the solder layer 22. Figure 3As shown, the power supply terminal 13a is connected to the heat sink 12a. The heat sink 12a and the power supply terminal 13a are each made of a single metal plate. The collector of the semiconductor chip 11a is electrically connected to the power supply terminal 13a through the solder layer 22 and the heat sink 12a.
[0021] The emitter electrode and the control electrode are provided at the other of the main surfaces of the semiconductor chip 11a. The emitter electrode is bonded to the copper block 21 through the solder layer 23, and the copper block 21 is bonded to the heat sink 12b through the solder layer 24. Figure 2 Although not shown, the collector of semiconductor chip 11b is electrically conductive to heat sink 12b. That is, the two semiconductor chips 11a and 11b are connected in series via heat sink 12b. A control electrode is also provided on the other of the main surfaces of semiconductor chip 11a, and the control electrode is connected to control terminal 14a via bonding wire 25.
[0022] As described above, the groove 15 is provided at the surface of the resin package 10 where the heat sink 12a is provided, and the ridge 31 is provided at the cooling plate 30a. When the cooling plate 30a is attached to the resin package 10, the ridge 31 fits into the groove 15 and surrounds the heat sink 12a. As described below, a heat transfer material 40 having fluidity is filled between the heat sink 12a and the cooling plate 30a. The groove 15 and the ridge 31 prevent the heat transfer material 40 from leaking from the position between the heat sink 12a and the cooling plate 30a. The heat sink 12b has the same structure as the heat sink 12a, and the cooling plate 30b also has the same structure as the cooling plate 30a.
[0023] The heat transfer material 40 is filled between the radiator 12a and the cooling plate 30a. The heat transfer material 40 has fluidity within the operating temperature range of the semiconductor chips 11a and 11b. For the heat transfer material 40, for example, gallium Ga (melting point: 29.8 degrees Celsius), which has fluidity at room temperature, is used as the main raw material. In addition, the heat transfer material 40 may contain indium In (melting point: 156.4 degrees Celsius) or tin Sn (melting point: 232.0 degrees Celsius). In and Sn are solid at room temperature, but can be liquefied within the operating temperature range of the semiconductor chips 11a and 11b. These metals have high thermal conductivity and are sometimes used as heat transfer materials. Grease can be used as the heat transfer material with fluidity.
[0024] A plurality of spacers 41 are dispersedly arranged at the heat transfer material 40. The spacers 41 are metal balls having the same diameter and can move freely in the heat transfer material 40 when the heat transfer material 40 has fluidity. The spacers 41 are in contact with the heat sink 12a and the cooling plate 30a. The spacers 41 dispersedly arranged in the heat transfer material 40 keep the heat sink 12a and the cooling plate 30a parallel to each other. Since the metal balls having the same diameter (i.e., the spacers 41) are dispersedly arranged in the space between the heat sink 12a and the cooling plate 30a, the heat sink 12a and the cooling plate 30a can be kept parallel to each other in an accurate manner. When the heat sink 12a is parallel to the heat sink plate 30a, heat is evenly diffused from the heat sink 12a to the cooling plate 30a. In other words, the cooling efficiency of the semiconductor chips 11a and 11b is improved. A material having a higher melting point than the heat transfer material 40 is used for the spacers 41.
[0025] Semiconductor device 2 includes heat sinks 12a and 12b, respectively, located on the two wide surface areas of a flat resin package 10, and includes cooling plates 30a and 30b, respectively, facing heat sinks 12a and 12b. A heat transfer material 40 is interposed between heat sink 12b and cooling plates 30b, and spacers 41 are dispersedly provided on heat transfer material 40. Semiconductor chips 11a and 11b are cooled by cooling plates 30a and 30b, respectively, located on the two wide surface areas of resin package 10.
[0026] (Second embodiment)
[0027] Figure 4 The semiconductor device 102 according to the second embodiment includes a heat sink 112 only at one of the wide surface areas of the flat resin package 110. The semiconductor device 102 also includes a cooling plate 130 facing the heat sink 112. Figure 4 Hatching, which would otherwise be applied to the cross-section of resin package 110, is omitted. Semiconductor chip 11 is housed in resin package 110 and bonded to heat sink 112 via solder layer 22. Semiconductor chip 11 and heat sink 112 are thermally and electrically connected via solder layer 22. Heat sink 112 absorbs heat from semiconductor chip 11. Cooling plate 130 faces heat sink 112, and fluid heat transfer material 40 is filled between heat sink 112 and cooling plate 130. Heat from heat sink 112 is absorbed by cooling plate 130 via heat transfer material 40.
[0028] A plurality of spacers 141 are dispersedly disposed in the heat transfer material 40. The spacers 141 are a set of protrusions disposed on the surface of the cooling plate 130, and the respective heights of the spacers 141 are equal. The spacers 141 are fixed to the surface of the cooling plate 130. The spacers 141 having the same height disposed on the cooling plate 130 also keep the heat sink 112 and the cooling plate 130 parallel to each other.
[0029] (Third embodiment)
[0030] Figure 5 A cross-sectional view of a semiconductor device 202 according to a third embodiment is illustrated. Figure 5 The hatching that would have been used to depict the cross-section of the resin package 210 is omitted. The semiconductor chip 11a is housed in the resin package 210. A heat sink 212 is provided on one of the wide surfaces of the resin package 210, and the semiconductor chip 11 and the heat sink 212 are electrically and thermally connected via vias 222, the inner surfaces of which are plated with copper. The heat sink 212 absorbs heat from the semiconductor chip 11 through the copper plated on the inner surfaces of the vias 222.
[0031] In the semiconductor device 202 according to the third embodiment, a flat resin package 210 also serves as a circuit board. Several electronic devices 203 are mounted on the upper surface of the resin package 210. The electronic devices 203 and the semiconductor chip 11 are electrically connected through a wiring pattern (not shown).
[0032] The cooling plate 230 faces the heat sink 212, and a fluid heat transfer material 40 is filled between the heat sink 212 and the cooling plate 230. A plurality of spacers 241 are dispersedly disposed in the heat transfer material 40. The spacers 241 are a set of protrusions disposed on the surface of the heat sink 212 that faces the cooling plate 230. The respective heights of the spacers 241 are the same. The spacers 241 are fixed to the surface of the heat sink 212. The spacers 241 of the same height disposed on the heat sink 212 also keep the heat sink 212 and the cooling plate 230 parallel to each other.
[0033] The following describes key points regarding the techniques of the above-described embodiments. Each of the semiconductor devices of the above-described embodiments maintains a parallel relationship between the heat sink and the cooling plate through a simple structure consisting of multiple spacers dispersed within the heat transfer material. In other words, in each of the above-described embodiments, the thickness of the heat transfer material 40 interposed between the heat sink and the cooling plate is maintained uniform. Maintaining a uniform thickness of the heat transfer material 40 improves the efficiency of heat transfer from the heat sink to the cooling plate in each of the above-described embodiments.
[0034] The following describes features related to the above embodiments. It should be noted that the technical elements described below are independent technical elements and can be used alone or in various combinations to achieve technical utility, and are not limited to the combinations described in this specification at the time of application.
[0035] In each of the second and third embodiments, the spacer is fixed to one of the heat sink and the cooling plate. The spacer in each of the second and third embodiments can be, for example, a solder bump. In each of the second and third embodiments, the spacer is fixed to one of the heat sink and the cooling plate so that the spacer cannot move. In addition, in each of the second and third embodiments, the work of assembling the cooling plate to the resin package is simplified.
[0036] In each of the above embodiments, the resin package includes a groove 15 surrounding the heat sink, and the cooling plate includes a ridge 31 for surrounding the heat sink and fitting into the groove 15. The groove 15 and the ridge 31 prevent the heat transfer material 40 from leaking outward. One of the techniques described in the present disclosure is to prevent the heat transfer material having fluidity from leaking outward.
[0037] Although specific examples of the present disclosure have been described in detail above, these are merely examples and do not limit the scope of this description. The technology described in this specification includes various modifications and modifications to the specific examples described above. In addition, the technical elements described in this specification or the drawings are technically practical alone or in various combinations, and are not limited to the combinations described in the claims at the time of application. In addition, the technology shown in this specification or the drawings can achieve multiple purposes simultaneously, and achieving one of the purposes itself has technical practicality.
Claims
1. A semiconductor device comprising: semiconductor chips; a heat sink configured to absorb heat from the semiconductor chip; a resin package configured to accommodate the semiconductor chip, the resin package having two surfaces to which the heat sink is disposed, the two surfaces being oriented to face in opposite directions to each other; a heat transfer material having fluidity, the heat transfer material being configured to be filled between the cooling plate and each of the heat sinks; as well as A plurality of spacers are configured to be dispersedly disposed in the heat transfer material, each of the spacers being in contact with a corresponding one of the heat sinks and the cooling plate.
2. The semiconductor device according to claim 1, further comprising: A copper block is located between the semiconductor chip and one of the heat sinks.
Citation Information
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