Micro-LED epitaxial wafers and their fabrication methods

Abstract

This invention discloses a method for fabricating a Micro-LED epitaxial wafer, comprising the following steps: S1, growing an n-type nitride layer on a substrate; S2, growing a nitride insertion layer on the n-type nitride layer, the nitride insertion layer comprising a first n-type nitride insertion layer, a first p-type nitride insertion layer, a second n-type nitride insertion layer, a second p-type nitride insertion layer, and a third n-type nitride insertion layer grown sequentially; the doping concentration of the second n-type nitride insertion layer is greater than the doping concentrations of the first n-type nitride insertion layer, the first p-type nitride insertion layer, the second p-type nitride insertion layer, and the third n-type nitride insertion layer; S3, growing a nitride quantum well light-emitting layer on the nitride insertion layer; S4, growing a p-type nitride layer on the nitride quantum well light-emitting layer. This invention can significantly improve the ESD performance of epitaxial wafers under high current density, increase luminous efficiency, and exhibit better leakage characteristics.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a Micro-LED epitaxial wafer and its fabrication method. Background Technology

[0002] Micro-LED displays boast numerous advantages, including self-illumination, high efficiency, low power consumption, high integration, and high stability. They are also small in size, highly flexible, and easy to disassemble and integrate, making them applicable to any existing display application, from small to large sizes. Modern society has entered an information-driven era and is developing towards intelligence. Displays are a key link in realizing information exchange and intelligence. Among the many display technologies available, Micro-LED display technology is considered a disruptive next-generation display technology.

[0003] Existing research shows that the quantum efficiency of Micro-LED devices decreases significantly with decreasing size, and the peak efficiency shifts towards higher current densities. Currently, GaN-based LEDs typically grow epitaxial layers on sapphire substrates, including an n-type doped layer, an InGaN / GaN multi-quantum-well light-emitting layer, a p-type AlGaN electron-blocking layer, and a p-type layer. This method has two main drawbacks:

[0004] On the one hand, because electrons migrate faster than holes and the concentration of free electrons is higher than that of holes, the distribution of electrons and holes in multiple quantum wells (MQWs) is easily uneven. Holes are concentrated in the MQWs closer to the p-type layer and gradually decay towards the n-type layer, which is not conducive to the recombination of electrons and holes. On the other hand, due to the high concentration and fast migration of electrons, electrons are prone to overflow into the p-type layer and recombine with ionized holes in the p-type layer, reducing the ionization efficiency of holes and generating non-radiative recombination. In addition, as the chip size decreases, especially at high current densities, the chip's anti-static discharge (ESD) performance becomes weaker and weaker. Therefore, improving the hole concentration and migration in the quantum well light-emitting layer and improving ESD performance are crucial to the efficiency of Micro-LED devices. Summary of the Invention

[0005] The technical problem to be solved by the present invention is to provide a method for preparing Micro-LED epitaxial wafers that greatly improves the anti-electrostatic discharge (ESD) performance of epitaxial wafers under high current density and improves luminous efficiency.

[0006] To address the above problems, this invention provides a method for fabricating a Micro-LED epitaxial wafer, the method comprising the following steps:

[0007] S1. Grow an n-type nitride layer on the substrate;

[0008] S2. A nitride insertion layer is grown on the n-type nitride layer, the nitride insertion layer comprising a first n-type nitride insertion layer, a first p-type nitride insertion layer, a second n-type nitride insertion layer, a second p-type nitride insertion layer, and a third n-type nitride insertion layer grown sequentially; the doping concentration of the second n-type nitride insertion layer is greater than the doping concentrations of the first n-type nitride insertion layer, the first p-type nitride insertion layer, the second p-type nitride insertion layer, and the third n-type nitride insertion layer;

[0009] S3. A nitride quantum well light-emitting layer is grown on the nitride insertion layer;

[0010] S4. Grow a p-type nitride layer on the nitride quantum well light-emitting layer.

[0011] As a further improvement of the present invention, the first n-type nitride insertion layer, the second n-type nitride insertion layer and the third n-type nitride insertion layer are doped with Si, and the first p-type nitride insertion layer and the second p-type nitride insertion layer are doped with Mg.

[0012] As a further improvement of the present invention, the doping concentration of the first n-type nitride insertion layer is 0-5×10⁻⁵. 17 cm -3 The doping concentration of the first p-type nitride insertion layer is 5 × 10⁻⁶. 16 -5×10 17 cm -3 The doping concentration of the second n-type nitride insertion layer is 1×10⁻⁶. 18 -5×10 18 cm -3 The doping concentration of the second p-type nitride insertion layer is 2 × 10⁻⁶. 16 -2×10 17 cm -3 The doping concentration of the third n-type nitride insertion layer is 0-5 × 10⁻⁵. 17 cm -3 .

[0013] As a further improvement of the present invention, the thickness of the first n-type nitride insertion layer is 40-120 nm, the thickness of the first p-type nitride insertion layer is 1-5 nm, the thickness of the second n-type nitride insertion layer is 10-50 nm, the thickness of the second p-type nitride insertion layer is 1-5 nm, and the thickness of the third n-type nitride insertion layer is 40-120 nm.

[0014] As a further improvement of the present invention, the n-type nitride layer is doped with Si, has a thickness of 1-4 μm, and a doping concentration of 1×10⁻⁶. 18 -8×10 18 cm -3 .

[0015] As a further improvement of the present invention, the nitride quantum well light-emitting layer includes a front nitride quantum well light-emitting layer and a rear nitride quantum well light-emitting layer grown sequentially. The front nitride quantum well light-emitting layer includes a front nitride quantum well layer, a front nitride capping layer and a front n-type nitride quantum barrier layer grown sequentially. The rear nitride quantum well light-emitting layer includes a rear nitride quantum well layer, a rear nitride capping layer, a first rear nitride quantum barrier layer, a second rear nitride quantum barrier layer and a third rear nitride quantum barrier layer grown sequentially. The second rear nitride quantum barrier layer is doped with Si.

[0016] As a further improvement of the present invention, the pre-nitride capping layer is an Al-containing nitride capping layer, and the Al component increases linearly, with an Al content of 0-0.15%.

[0017] As a further improvement of the present invention, both the second and third post-nitride quantum barrier layers contain Al, and the Al content in the third post-nitride quantum barrier layer decreases linearly, with an Al content of 0-0.15%.

[0018] As a further improvement of the present invention, the Si doping concentration in the second post-nitride quantum barrier layer is 5 × 10⁻⁶. 16 -8×10 16 cm -3 .

[0019] The present invention also provides a Micro-LED epitaxial wafer, which is prepared by any of the above-described methods for preparing Micro-LED epitaxial wafers.

[0020] The beneficial effects of this invention are:

[0021] The method for fabricating Micro-LED epitaxial wafers of the present invention grows a nitride insertion layer between an n-type nitride layer and a nitride quantum well light-emitting layer. The second n-type nitride insertion layer is highly doped. When a reverse bias voltage is applied to the epitaxial wafer, a capacitor buffer effect is formed between the highly doped second n-type nitride insertion layer and the first n-type nitride insertion layer, which can greatly improve the anti-static discharge (ESD) performance of the epitaxial wafer under high current density.

[0022] In this process, the first p-type nitride intercalation layer, under reverse bias, provides carriers opposite to those of the highly doped second n-type nitride intercalation layer, extending the capacitance depth between the highly doped second n-type nitride intercalation layer and the first n-type nitride intercalation layer. This significantly improves the capacitance buffering effect between the second n-type nitride intercalation layer and the first n-type nitride intercalation layer. Under forward bias, the second p-type nitride intercalation layer acts as a buffer against electron injection from the highly doped second n-type nitride intercalation layer, delaying the high-density injection of highly doped electrons into the nitride quantum well light-emitting layer, improving the carrier injection uniformity of the nitride quantum well light-emitting layer, and increasing the epitaxial luminescence efficiency.

[0023] Meanwhile, the third n-type nitride insertion layer is close to the nitride quantum well light-emitting layer, which ensures that electrons are injected uniformly into the nitride quantum well light-emitting layer without forming a leakage channel.

[0024] Furthermore, in general, AlGaN material is placed in the quantum barrier of the emitting layer of a nitride quantum well. The high potential barrier of AlGaN material can prevent electrons from crossing the emitting layer. However, the introduction of AlGaN material will reduce the crystal quality of the nitride quantum well emitting layer. Moreover, due to the large difference in lattice constant between AlGaN material and InGaN quantum well, lattice mismatch will occur, causing band tilt. As the chip size decreases, the reduction in efficiency and ESD performance will become more significant. The n-type nitride insertion layer in this invention can compensate for the luminous efficiency decay and ESD performance reduction caused by the introduction of AlGaN in the nitride quantum well emitting layer. Therefore, the n-type nitride insertion layer process of this invention improves the process matching of introducing AlGaN material into the nitride quantum well emitting layer of Micro-LED epitaxial wafers, and can obtain excellent optoelectronic performance.

[0025] The above description is merely an overview of the technical solution of the present invention. In order to better understand the technical means of the present invention and to implement it in accordance with the contents of the specification, and to make the above and other objects, features and advantages of the present invention more apparent and understandable, preferred embodiments are described in detail below with reference to the accompanying drawings. Attached Figure Description

[0026] Figure 1 This is a structural diagram of the Micro-LED epitaxial wafer in an embodiment of the present invention;

[0027] Figure 2 This is a structural diagram of the nitride insertion layer in an embodiment of the present invention;

[0028] Figure 3 This is a structural diagram of the nitride quantum well light-emitting layer in an embodiment of the present invention. Detailed Implementation

[0029] The present invention will be further described below with reference to the accompanying drawings and specific embodiments, so that those skilled in the art can better understand and implement the present invention. However, the embodiments described are not intended to limit the present invention.

[0030] Example 1

[0031] Reference Figure 1-2 As shown, this embodiment discloses a method for fabricating a Micro-LED epitaxial wafer, which includes the following steps:

[0032] S1. An n-type nitride layer is grown on the substrate; specifically, an n-type GaN layer 12 with a thickness of 2 μm is grown on the sapphire substrate 11, and the Si doping concentration is 2 × 10⁻⁶. 18 cm -3 The Ga source required for growth is TMG, the Si source is SiH4, the growth atmosphere is H2, the growth temperature is 1210℃, and the growth pressure is 150mbar.

[0033] S2. A nitride insertion layer is grown on the n-type nitride layer, the nitride insertion layer comprising a first n-type nitride insertion layer, a first p-type nitride insertion layer, a second n-type nitride insertion layer, a second p-type nitride insertion layer, and a third n-type nitride insertion layer grown sequentially; the doping concentration of the second n-type nitride insertion layer is greater than the doping concentration of the first n-type nitride insertion layer, the first p-type nitride insertion layer, the second p-type nitride insertion layer, and the third n-type nitride insertion layer; specifically, a GaN insertion layer 13 is grown on the n-type GaN layer 12 at a growth temperature of 920℃ and a growth pressure of 200 mbar, the growth requirements are... The Ga source is TMG, the Si source is SiH4, the Mg source is Cp2Mg, and the growth atmosphere is H2. The GaN insertion layer 13 comprises a first n-type GaN insertion layer 121, a first p-type GaN insertion layer 122, a second n-type GaN insertion layer 123, a second p-type GaN insertion layer 124, and a third n-type GaN insertion layer 125 grown sequentially. The doping concentration of the second n-type GaN insertion layer 123 is greater than the doping concentrations of the first n-type GaN insertion layer 121, the first p-type GaN insertion layer 122, the second p-type GaN insertion layer 124, and the third n-type GaN insertion layer 125. The specific steps include:

[0034] S21. A first n-type GaN insertion layer 121 with a thickness of 60 nm is grown on the n-type GaN layer 12, with a doping concentration of 1.2 × 10⁻⁶. 17 cm -3 ;

[0035] S22. A first p-type GaN insertion layer 122 with a doping concentration of 1.0 × 10⁻⁶ nm is grown on the first n-type GaN insertion layer 121. 17 cm -3;

[0036] S23. A second n-type GaN insertion layer 123, 15 nm in diameter, is grown on the first p-type GaN insertion layer 122, with a doping concentration of 3 × 10⁻⁶. 18 cm -3 ;

[0037] S24. A second p-type GaN insertion layer 124 with a doping concentration of 8 × 10⁻⁶ nm is grown on the second n-type GaN insertion layer 123. 16 cm -3 ;

[0038] S25. A 100 nm third n-type GaN insertion layer 125 is grown on the second p-type GaN insertion layer 124, with a doping concentration of 2 × 10⁻⁶. 17 cm -3 ;

[0039] S3. A nitride quantum well light-emitting layer is grown on the nitride insertion layer; specifically, a nitride quantum well light-emitting layer 14 is grown on the GaN insertion layer 13, comprising an InGaN quantum well layer and a GaN quantum barrier layer grown in a periodic alternating cycle twice, with a growth pressure of 300 mbar; including the following steps:

[0040] S31. An InGaN quantum well layer with a thickness of 2.5 nm is grown at a growth temperature of 780℃. The Ga source required for growth is TEG, and the growth atmosphere is N2.

[0041] S32. Based on the InGaN quantum well, the temperature is increased while the Al source is kept linearly constant. When the temperature reaches 860℃, a 1.5nm AlGaN capping layer is grown with an Al composition of 0.05. The Ga source required for growth is TMG, the Al source is TMAl, and the growth atmosphere is N2.

[0042] S33. An n-type GaN quantum barrier layer with a thickness of 8 nm is grown at a growth temperature of 860℃, with a doping concentration of 3×10⁻⁶. 17 cm -3 The Ga source required for growth is TEG, the Si source is SiH4, and the growth atmosphere is H2.

[0043] S34. An InGaN quantum well layer with a thickness of 3.5 nm is grown at a growth temperature of 780℃. The Ga source required for growth is TEG, and the growth atmosphere is N2.

[0044] S35. On the basis of InGaN quantum well, the temperature is increased while the Al source is kept constant during the heating process. When the temperature reaches 860℃, a 1.5nm AlGaN capping layer is grown with an Al composition of 0.05. The Ga source required for growth is TMG, the Al source is TMAl, and the growth atmosphere is N2.

[0045] S36. An n-type GaN quantum barrier layer with a thickness of 13 nm was grown at a growth temperature of 860℃. The Ga source required for growth was TEG and the growth atmosphere was H2.

[0046] S4. A p-type nitride layer is grown on the nitride quantum well light-emitting layer; specifically, a 200 nm p-type GaN layer 15 is grown on the nitride quantum well light-emitting layer with a doping concentration of 2 × 10⁻⁶. 19 cm -3 The Ga source required for growth is TMG, the Mg source is Cp2Mg, the growth atmosphere is H2, the growth temperature is 1070℃, and the growth pressure is 400mbar.

[0047] In other embodiments, the doping concentration of the first n-type nitride insertion layer is 0-5 × 10⁻⁵. 17 cm -3 The doping concentration of the first p-type nitride insertion layer is 5 × 10⁻⁶. 16 -5×10 17 cm -3 The doping concentration of the second n-type nitride insertion layer is 1-5 × 10⁻⁵. 18 cm -3 The doping concentration of the second p-type nitride insertion layer is 2 × 10⁻⁶. 16 -2×10 17 cm -3 The doping concentration of the third n-type nitride insertion layer is 0-5 × 10⁻⁵. 17 cm -3 .

[0048] In other embodiments, the thickness of the first n-type nitride insertion layer is 40-120 nm, the thickness of the first p-type nitride insertion layer is 1-5 nm, the thickness of the second n-type nitride insertion layer is 10-50 nm, the thickness of the second p-type nitride insertion layer is 1-5 nm, and the thickness of the third n-type nitride insertion layer is 40-120 nm.

[0049] In other embodiments, the n-type nitride layer is doped with Si, with a thickness of 1-4 μm and a doping concentration of 1-8 × 10⁻⁶. 18 cm -3 .

[0050] Comparative Example 1

[0051] The difference between this comparative example and Example 1 is that no nitride insertion layer 13 is provided between the n-type GaN layer and the nitride quantum well light-emitting layer; otherwise, it is the same as Example 1.

[0052] Comparative Example 2

[0053] The difference between this comparative example and Example 1 is that the concentrations of the second n-type GaN insertion layer 123 and the first n-type GaN nitride insertion layer 121 are the same, both being 1.2 × 10⁻⁶. 17 cm -3 .

[0054] Comparative Example 3

[0055] The difference between this comparative example and Example 1 is that the concentration of the second n-type GaN insertion layer 123 is 8 × 10⁻⁶ lower than the concentration of the first n-type GaN nitride insertion layer 121. 16 cm -3 .

[0056] Comparative Example 4

[0057] The difference between this comparative example and Example 1 is that the first p-type GaN insertion layer 122 is not provided.

[0058] Comparative Example 5

[0059] The difference between this comparative example and Example 1 is that the second p-type GaN insertion layer 124 is not provided.

[0060] Comparative Example 6

[0061] The difference between this comparative example and Example 1 is that the first p-type GaN insertion layer 122 and the second p-type GaN insertion layer 124 are not provided.

[0062] The epitaxial wafers obtained by the preparation methods of Example 1 and Comparative Examples 1-6 were used to fabricate chips of the same specifications (80μ*100μm). The performance parameters obtained are shown in Table 1. It can be seen that the epitaxial wafers obtained by the preparation method in Example 1 have excellent brightness and voltage performance. At the same time, due to the setting of the nitride insertion layer, the epitaxial wafers exhibit better ESD and leakage characteristics.

[0063] Brightness (mW) Voltage (V) ESD (%) Leakage current (%) Example 1 12.8 2.85 99 99 Comparative Example 1 8.8 2.84 87 82 Comparative Example 2 12.8 2.88 95 94 Comparative Example 3 12.5 3.01 92 92 Comparative Example 4 12,6 2.85 94 92 Comparative Example 5 11.8 2.85 88 84 Comparative Example 6 11.3 2.85 85 83

[0064] Table 1

[0065] The method for fabricating Micro-LED epitaxial wafers of the present invention grows a nitride insertion layer between an n-type nitride layer and a nitride quantum well light-emitting layer. The second n-type nitride insertion layer is highly doped. When a reverse bias voltage is applied to the epitaxial wafer, a capacitor buffer effect is formed between the highly doped second n-type nitride insertion layer and the first n-type nitride insertion layer, which can greatly improve the anti-static discharge (ESD) performance of the epitaxial wafer under high current density.

[0066] In this process, the first p-type nitride intercalation layer, under reverse bias, provides carriers opposite to those of the highly doped second n-type nitride intercalation layer, extending the capacitance depth between the highly doped second n-type nitride intercalation layer and the first n-type nitride intercalation layer. This significantly improves the capacitance buffering effect between the second n-type nitride intercalation layer and the first n-type nitride intercalation layer. Under forward bias, the second p-type nitride intercalation layer acts as a buffer against electron injection from the highly doped second n-type nitride intercalation layer, delaying the high-density injection of highly doped electrons into the nitride quantum well light-emitting layer, improving the carrier injection uniformity of the nitride quantum well light-emitting layer, and increasing the epitaxial luminescence efficiency.

[0067] Meanwhile, the third n-type nitride insertion layer is close to the nitride quantum well light-emitting layer, which ensures that electrons are injected uniformly into the nitride quantum well light-emitting layer without forming a leakage channel.

[0068] Furthermore, in general, AlGaN material is placed in the quantum barrier of the emitting layer of a nitride quantum well. The high potential barrier of AlGaN material can prevent electrons from crossing the emitting layer. However, the introduction of AlGaN material will reduce the crystal quality of the nitride quantum well emitting layer. Moreover, due to the large difference in lattice constant between AlGaN material and InGaN quantum well, lattice mismatch will occur, resulting in band tilt. As the chip size decreases, the reduction in efficiency and electrostatic discharge (ESD) performance will become more significant. The n-type nitride insertion layer can compensate for the luminous efficiency decay and ESD performance reduction caused by the introduction of AlGaN in the nitride quantum well emitting layer. Therefore, the n-type nitride insertion layer process of this invention improves the process matching of introducing AlGaN material into the nitride quantum well emitting layer of Micro-LED epitaxial wafers, and can obtain excellent optoelectronic performance.

[0069] Example 2

[0070] like Figure 1-3 As shown, this embodiment discloses a method for fabricating a Micro-LED epitaxial wafer, which includes the following steps:

[0071] S1. An n-type nitride layer is grown on the substrate; specifically, an n-type GaN layer 12 with a thickness of 2 μm is grown on the sapphire substrate 11, and the Si doping concentration is 2 × 10⁻⁶. 18 cm -3 The Ga source required for growth is TMG, the Si source is SiH4, the growth atmosphere is H2, the growth temperature is 1210℃, and the growth pressure is 150mbar.

[0072] S2. A nitride insertion layer is grown on the n-type nitride layer, the nitride insertion layer comprising a first n-type nitride insertion layer, a first p-type nitride insertion layer, a second n-type nitride insertion layer, a second p-type nitride insertion layer, and a third n-type nitride insertion layer grown sequentially; the doping concentration of the second n-type nitride insertion layer is greater than the doping concentrations of the first n-type nitride insertion layer, the first p-type nitride insertion layer, the second p-type nitride insertion layer, and the third n-type nitride insertion layer; specifically, a GaN insertion layer 13 is grown on the n-type GaN layer 12 at a growth temperature of 920°C and a growth pressure of 200 mbar. The required Ga source is TMG, the Si source is SiH4, the Mg source is Cp2Mg, and the growth atmosphere is H2. The GaN insertion layer 13 comprises a first n-type GaN insertion layer 121, a first p-type GaN insertion layer 122, a second n-type GaN insertion layer 123, a second p-type GaN insertion layer 124, and a third n-type GaN insertion layer 125 grown sequentially. The doping concentration of the second n-type GaN insertion layer 123 is greater than that of the first n-type GaN insertion layer 121, the first p-type GaN insertion layer 122, the second p-type GaN insertion layer 124, and the third n-type GaN insertion layer 125. The specific steps include:

[0073] S21. A first n-type GaN insertion layer 121 with a thickness of 60 nm is grown on the n-type GaN layer 12, with a doping concentration of 1.2 × 10⁻⁶. 17 cm -3 ;

[0074] S22. A first p-type GaN insertion layer 122 with a doping concentration of 1.0 × 10⁻⁶ nm is grown on the first n-type GaN insertion layer 121. 17 cm -3 ;

[0075] S23. A second n-type GaN insertion layer 123, 15 nm in diameter, is grown on the first p-type GaN insertion layer 122, with a doping concentration of 3 × 10⁻⁶. 18 cm -3 ;

[0076] S24. A second p-type GaN insertion layer 124 with a doping concentration of 8 × 10⁻⁶ nm is grown on the second n-type GaN insertion layer 123. 16 cm -3 ;

[0077] S25. A 100 nm third n-type GaN insertion layer 125 is grown on the second p-type GaN insertion layer 124, with a doping concentration of 2 × 10⁻⁶. 17 cm -3 ;

[0078] S3. A nitride quantum well light-emitting layer is grown on the nitride insertion layer; specifically, a nitride quantum well light-emitting layer 14 is grown on the GaN insertion layer 13, including a front nitride quantum well light-emitting layer and a rear nitride quantum well light-emitting layer that are grown in a periodic alternating cycle twice, with a growth pressure of 300 mbar.

[0079] The growth of the pre-nitride quantum well light-emitting layer includes the following steps:

[0080] S31. Under the growth temperature of 780℃, a front InGaN quantum well layer 131 with a thickness of 2.5nm is grown. The Ga source required for growth is TEG, and the growth atmosphere is N2.

[0081] S32. Based on the InGaN quantum well 131, the temperature is increased while the Al source is kept linearly constant. When the temperature reaches 860℃, a 1.5nm in front AlGaN capping layer 132 is grown with an Al composition of 0 to 0.1. The Ga source required for growth is TMG, the Al source is TMAl, and the growth atmosphere is N2.

[0082] S33. A front-n type GaN quantum barrier layer 133 with a thickness of 8 nm is grown at a growth temperature of 860℃ and a doping concentration of 3×10⁻⁶. 17 cm -3 The Ga source required for growth is TEG, the Si source is SiH4, and the growth atmosphere is H2.

[0083] The growth of the post-nitride quantum well light-emitting layer includes the following steps:

[0084] S34. A 3.5 nm thick InGaN quantum well layer 134 is grown at a growth temperature of 780℃. The Ga source required for growth is TEG, and the growth atmosphere is N2.

[0085] S35. Based on the post-InGaN quantum well 134, the temperature is increased while the Al source is kept constant during the heating process. When the temperature reaches 860℃, a 1.5nm post-AlGaN capping layer 135 is grown with an Al composition of 0 to 0.15. The Ga source required for growth is TMG, the Al source is TMAl, and the growth atmosphere is N2.

[0086] S36. A first post-GaN quantum barrier layer 136 with a thickness of 4 nm was grown at a growth temperature of 860℃. The Ga source required for growth was TEG and the growth atmosphere was H2.

[0087] S37. A second n-type AlGaN quantum barrier layer 137 with a thickness of 5 nm was grown at a growth temperature of 880℃, with a doping concentration of 7×10⁻⁶. 16 cm -3The Ga source required for growth is TEG, the Si source is SiH4, and the growth atmosphere is H2.

[0088] S38. A third AlGaN quantum barrier layer 138 with a thickness of 4 nm was grown at a growth temperature of 880℃. The Ga source required for growth was TEG, the growth atmosphere was H2, and the Al composition was 0.15 to 0.

[0089] S4. A p-type nitride layer is grown on the nitride quantum well light-emitting layer; specifically, a 200 nm p-type GaN layer 15 is grown on the nitride quantum well light-emitting layer with a doping concentration of 2 × 10⁻⁶. 19 cm -3 The Ga source required for growth is TMG, the Mg source is Cp2Mg, the growth atmosphere is H2, the growth temperature is 1070℃, and the growth pressure is 400mbar.

[0090] In other embodiments, the Si doping concentration in the second n-type post-nitride quantum barrier layer is 5-8 × 10⁻⁶. 16 cm -3 .

[0091] Comparative Example 7

[0092] The difference between this comparative example and Example 2 is that the front AlGaN capping layer 132 and the rear AlGaN capping layer 135 do not contain Al.

[0093] Comparative Example 8

[0094] The difference between this comparative example and Example 2 is that the Al content in the front AlGaN capping layer 132 and the rear AlGaN capping layer 135 does not gradually change.

[0095] Comparative Example 9

[0096] The difference between this comparative example and Example 2 is that the Al content in the front AlGaN capping layer 132 and the rear AlGaN capping layer 135 decreases linearly.

[0097] Comparative Example 10

[0098] The difference between this comparative example and Example 2 is that the second n-type AlGaN post-quantum barrier layer 137 and the third AlGaN post-quantum barrier layer 138 do not contain Al.

[0099] The epitaxial wafers obtained by the preparation methods of Example 2 and Comparative Examples 7-10 were used to fabricate chips of the same specifications (80μ*100μm). The performance parameters obtained are shown in Table 2. It can be seen that the epitaxial wafers obtained by the preparation method in Example 2 have excellent brightness and also exhibit better ESD and leakage characteristics.

[0100] Brightness (mW) Voltage (V) ESD (%) Leakage current (%) Example 2 13.2 2.84 100 99 Comparative Example 7 10.2 2.84 97 97 Comparative Example 8 12.9 2.86 97 96 Comparative Example 9 11.4 2.85 96 96 Comparative Example 10 12.8 2.84 99 98

[0101] Table 2

[0102] This invention employs Al-containing nitride capping layers for both the front and rear nitride capping layers, with the Al content in the capping layers increasing linearly. On one hand, this linear increase in Al content in the capping layers, compared to the Al-introducing process for nitride quantum barrier layers, can reduce the excitation effect caused by excessive lattice mismatch between the nitride quantum well layer and the nitride quantum barrier, resulting in an excellent nitride quantum well layer interface. Simultaneously, a high potential barrier can be formed at the interface between the nitride capping layer and the nitride quantum barrier layer, preventing electrons from overflowing from the nitride emitting layer to the p-type nitride layer. On the other hand, the tensile stress introduced by the lattice difference in the Al-containing nitride capping layer compensates for the compressive stress in the nitride quantum well layer, improving the growth quality of the nitride quantum well layer, reducing dislocation density, improving non-radiative recombination, and increasing the luminescence efficiency of the epitaxial wafer.

[0103] The second and third post-n-type nitride quantum barrier layers are Al-containing nitride layers. The Al composition of the third post-n-type nitride quantum barrier layer decreases linearly. The high Al barrier of the second n-type post-n-type nitride quantum barrier layer further prevents electrons from overflowing into the p-type nitride layer. The second n-type post-n-type nitride quantum barrier layer employs low n-type doping. This improves hole injection into the p-type nitride layer under forward operating voltage while preventing electrons from overflowing into the p-type nitride layer and causing non-radiative coincidence with holes in the p-type nitride layer. The linearly decreasing Al composition of the third post-n-type nitride quantum barrier layer lowers the hole barrier in the p-type nitride layer using a linear gradient change, increasing the probability of holes from the p-type nitride layer being injected into the nitride quantum well light-emitting layer, thus improving the hole distribution in the nitride quantum well light-emitting layer and enhancing the luminous efficiency of the epitaxial wafer.

[0104] Furthermore, because the epitaxial wafer of this invention has better carrier transport performance and carrier distribution uniformity, p-type nitride doping does not require higher doping levels (>5×10⁻⁶). 19 cm -3 High doping of the p-type nitride layer can reduce the growth quality of the p-type nitride material and absorb the light emitted by the nitride quantum well light-emitting layer, thus reducing the ESD performance and light emission efficiency of the epitaxial wafer. At the same time, due to the high growth quality of the p-type nitride, the increase in p-type nitride thickness will not cause the epitaxial wafer defect amplification and excessive leakage channels, thereby increasing the process window of p-type nitride thickness and improving the ESD and light emission efficiency of the epitaxial wafer.

[0105] The above embodiments are merely preferred embodiments provided to fully illustrate the present invention, and the scope of protection of the present invention is not limited thereto. Equivalent substitutions or modifications made by those skilled in the art based on the present invention are all within the scope of protection of the present invention. The scope of protection of the present invention is defined by the claims.

Claims

1. A method for preparing a micro-LED epitaxial wafer, characterized in that, The method comprises the following steps: S1, growing an n-type nitride layer on a substrate; S2, growing a nitride interlayer on the n-type nitride layer, the nitride interlayer comprising a first n-type nitride interlayer, a first p-type nitride interlayer, a second n-type nitride interlayer, a second p-type nitride interlayer and a third n-type nitride interlayer grown in sequence; the second n-type nitride interlayer has a doping concentration greater than that of the first n-type nitride interlayer, the first p-type nitride interlayer, the second p-type nitride interlayer and the third n-type nitride interlayer; the second p-type nitride interlayer buffers against injection of electrons from the second n-type nitride interlayer under a forward voltage; S3, growing a nitride quantum well light-emitting layer on the nitride interlayer; S4, growing a p-type nitride layer on the nitride quantum well light-emitting layer.

2. The preparation method of the Micro-LED epitaxial wafer according to claim 1, characterized in that, The first n-type nitride interlayer, the second n-type nitride interlayer and the third n-type nitride interlayer are doped with Si, and the first p-type nitride interlayer and the second p-type nitride interlayer are doped with Mg.

3. The preparation method of the Micro-LED epitaxial wafer according to claim 2, characterized in that, The first n-type nitride interlayer has a thickness of 40-120 nm, the first p-type nitride interlayer has a thickness of 1-5 nm, the second n-type nitride interlayer has a thickness of 10-50 nm, the second p-type nitride interlayer has a thickness of 1-5 nm, and the third n-type nitride interlayer has a thickness of 40-120 nm.

4. The preparation method of the Micro-LED epitaxial wafer according to claim 1, wherein, The n-type nitride layer is doped with Si, has a thickness of 1-4 μm, and a doping concentration of 1 x 1018-8 x 1019cm-3. 18 -8 x 1019cm-3. 18 cm-3. -3 .

5. The preparation method of the Micro-LED epitaxial wafer according to claim 1, wherein, The nitride quantum well light-emitting layer comprises a front nitride quantum well light-emitting layer and a rear nitride quantum well light-emitting layer grown in sequence, the front nitride quantum well light-emitting layer comprises a front nitride quantum well layer, a front nitride cover layer and a front n-type nitride quantum barrier layer grown in sequence, and the rear nitride quantum well light-emitting layer comprises a rear nitride quantum well layer, a rear nitride cover layer, a first rear nitride quantum barrier layer, a second rear nitride quantum barrier layer and a third rear nitride quantum barrier layer grown in sequence, the second rear nitride quantum barrier layer being doped with Si.

6. The preparation method of the Micro-LED epitaxial wafer according to claim 5, wherein, The front nitride cover layer is an Al-containing nitride cover layer, and the Al component linearly increases, with an Al content of 0-0.

15.

7. The preparation method of the Micro-LED epitaxial wafer according to claim 5, wherein, The second rear nitride quantum barrier layer and the third rear nitride quantum barrier layer both contain Al, and the Al component linearly decreases in the third rear nitride quantum barrier layer, with an Al content of 0-0.

15. 8.The method of claim 5, wherein the first and second masks are formed of a material having a transmittance of 10%or less to a wavelength of 365 nm. The doping concentration of Si in the second back nitride quantum barrier layer is 5x10 16 -8x10 16 cm -3 .

9. A micro-LED epitaxial wafer, characterized in that, The method is prepared by using the preparation method of the Micro-LED epitaxial wafer according to any one of claims 1-8.

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