Printed circuit board

Abstract

A printed circuit board according to an embodiment includes: a first insulating layer; a second insulating layer disposed on the first insulating layer; a first via portion disposed in the first insulating layer; a second via portion disposed in the second insulating layer; wherein the first via portion includes: a first via disposed to pass through the first insulating layer; a 1-1 pad disposed on an upper surface of the first insulating layer and connected to an upper surface of the first via; a pad 1-2 disposed on a lower surface of the first insulating layer and connected to a lower surface of the first via, wherein the second via portion includes: a second via disposed to pass through the second insulating layer and having a lower surface connected to an upper surface of the 1-1 pad; a second pad disposed on an upper surface of the second insulating layer and connected to an upper surface of the second via, wherein a width of the 1-1 pad is less than or equal to a width of the upper surface of the first via, and a width of the second pad is less than or equal to a width of the upper surface of the second via.

Description

Technical Field

[0001] The embodiments relate to a printed circuit board and a method for manufacturing the same. Background Technology

[0002] With the accelerated miniaturization, weight reduction, and integration of electronic components, the linewidth of circuits has been reduced. In particular, due to the nanometer-scale integration of semiconductor chip design rules, the linewidth of the packaging substrate or printed circuit board on which semiconductor chips are mounted has been miniaturized to less than a few micrometers.

[0003] To improve the circuit integration of printed circuit boards, i.e., to reduce circuit linewidth, various methods have been proposed. To prevent the loss of circuit linewidth during the etching step of pattern formation after copper plating, the semi-additive process (SAP) method and the improved semi-additive process (MSAP) have been proposed.

[0004] Then, the Embedded Trace Substrate (ETS) method has been used in industry to embed copper foil in an insulating layer to achieve fine circuit patterns. In the ETS method, instead of forming copper foil circuits on the surface of the insulating layer, copper foil circuits are manufactured in an embedded form within the insulating layer, thus avoiding circuit loss caused by etching and facilitating miniaturization of circuit spacing.

[0005] Meanwhile, efforts have recently been made to develop improved 5G (5th generation) communication systems or pre-5G communication systems to meet the demand for wireless data services. Here, 5G communication systems use ultra-high frequency (mmWave) bands (sub 6GHz, 28GHz, 38GHz or higher frequencies) to achieve high data transmission rates.

[0006] Furthermore, to reduce path loss and increase transmission distance in the ultra-high frequency band, integrated technologies such as beamforming, massive MIMO, and array antennas have been developed for 5G communication systems. Considering that it may consist of hundreds of active antennas across wavelengths within the frequency band, the antenna system becomes quite large.

[0007] Since these antennas and AP modules are patterned or mounted on printed circuit boards, low loss on the printed circuit board is crucial. This means that the multiple substrates that make up the active antenna system—the antenna substrate, antenna feed substrate, transceiver substrate, and baseband substrate—should be integrated into a compact unit.

[0008] Moreover, as mentioned above, the printed circuit boards used in 5G communication systems are manufactured according to the trend of thinness and compactness, so the circuit patterns are becoming increasingly refined.

[0009] However, existing printed circuit boards have significantly reduced design freedom due to the pads connected to through-holes, which leads to a decrease in RF performance in the 5G NR era.

[0010] Therefore, the 5G era requires a new technology for miniaturization and thinning of semiconductor packaging technology. Summary of the Invention

[0011] Technical issues

[0012] The embodiments provide a printed circuit board with a novel structure and a method for manufacturing the same.

[0013] Additionally, the embodiment provides a printed circuit board including a through-hole portion and a method for manufacturing the same thereto, wherein the through-hole and the pad directly connected to the through-hole have the same width.

[0014] In addition, the embodiment provides a printed circuit board including a through-hole portion and a method for manufacturing the same, wherein the width of the through-hole portion is greater than the width of the pad directly connected to the through-hole.

[0015] In addition, an embodiment provides a printed circuit board and a method for manufacturing the same, the printed circuit board having a structure in which a plurality of through-hole portions directly connected to each other in a multilayer stacked structure are aligned on a vertical line.

[0016] In addition, the embodiment provides a printed circuit board with a sawtooth structure and a method for manufacturing the same, in which multiple through-hole portions directly connected to each other in a multi-layer stacked structure are not aligned on a vertical line and are offset.

[0017] The technical problems to be solved by the proposed embodiments are not limited to those described above, and those skilled in the art to which the proposed embodiments pertain will clearly understand other technical problems not mentioned through the following description.

[0018] Technical solution

[0019] A printed circuit board according to an embodiment includes: a first insulating layer; a second insulating layer disposed on the first insulating layer; a first through-hole portion disposed in the first insulating layer; and a second through-hole portion disposed in the second insulating layer; wherein the first through-hole portion includes: a first through-hole portion passing through the first insulating layer; a first-1 pad disposed on an upper surface of the first insulating layer and connected to the upper surface of the first through-hole portion; and a first-2 pad disposed on a lower surface of the first insulating layer and connected to the lower surface of the first through-hole portion; wherein the second through-hole portion includes: a second through-hole portion passing through the second insulating layer and having a lower surface connected to the upper surface of the first-1 pad; and a second pad disposed on an upper surface of the second insulating layer and connected to the upper surface of the second through-hole portion, wherein the width of the first-1 pad is less than or equal to the width of the upper surface of the first through-hole portion, and wherein the width of the second pad is less than or equal to the width of the upper surface of the second through-hole portion.

[0020] In addition, each of the first through-hole portion and the second through-hole portion includes an upper surface having a first width and a lower surface having a second width that is smaller than the first width.

[0021] In addition, each of the first and second pads has a third width that is smaller than the first or second width.

[0022] Additionally, the upper surface of the first through-hole portion includes: a first region that contacts the lower surface of the second insulating layer; and a second region that contacts the lower surface of the second pad.

[0023] In addition, the upper surface of the first through hole includes a third region that contacts the upper surface of the second through hole.

[0024] In addition, the printed circuit board of the technical solution also includes: a third insulating layer disposed below the first insulating layer; and a third through-hole portion disposed in the third insulating layer; wherein the third through-hole portion includes: a third pad disposed on the lower surface of the third insulating layer; and a third through-hole section disposed in the third insulating layer and having a lower surface connected to the upper surface of the third pad and an upper surface connected to the first-second pad.

[0025] Additionally, pads 1-2 have a second width or a third width that is smaller than the second width.

[0026] Additionally, the lower surface of the first through-hole portion includes: a first region that contacts the upper surface of the third insulating layer; a second region that contacts the upper surface of the third pad; and a third region that contacts the upper surface of the third through-hole portion.

[0027] In addition, the second and third insulating layers include a photocurable resin (PID: photoimaging dielectric).

[0028] In addition, the first insulating layer is a thermosetting resin.

[0029] In addition, the centers of each of the 1-1 pad, 1-2 pad, first through-hole portion, second through-hole portion, second pad, third through-hole portion, and third pad are aligned on the same vertical line.

[0030] On the other hand, a method for manufacturing a printed circuit board according to an embodiment includes: preparing a first insulating layer; forming a first through-hole in the first insulating layer; forming a first through-hole portion filling the first through-hole in the first insulating layer; forming a second insulating layer on the upper surface of the first insulating layer, and forming a third insulating layer below the lower surface of the first insulating layer; forming a second through-hole in the second insulating layer and a third through-hole in the third insulating layer; and forming a second through-hole portion filling the second through-hole in the second insulating layer and a third through-hole portion filling the third through-hole in the third insulating layer, wherein the first through-hole portion includes: a first through-hole portion passing through the first insulating layer; a first-1 pad disposed on the upper surface of the first insulating layer and connected to the upper surface of the first through-hole portion; and a first-2 pad disposed on the lower surface of the first insulating layer. The second through-hole portion includes: a second through-hole portion passing through a second insulating layer and having a lower surface connected to the upper surface of the first-1 pad; a second pad disposed on the upper surface of the second insulating layer and connected to the upper surface of the second through-hole portion; and a third through-hole portion disposed in the third insulating layer and having a lower surface connected to the upper surface of the third pad and an upper surface connected to the first-2 pad, wherein the width of the first-1 pad is less than or equal to the width of the upper surface of the first through-hole portion, and wherein the width of the second pad is less than or equal to the width of the upper surface of the second through-hole portion, and wherein the width of the third pad is less than or equal to the width of the lower surface of the third through-hole portion.

[0031] In addition, each of the first through-hole portion and the second through-hole portion includes an upper surface having a first width and a lower surface having a second width less than the first width, and wherein the third through-hole portion includes an upper surface having a second width and a lower surface having a first width.

[0032] Additionally, each of the first-1 pad and the second pad has a third width that is less than the first width or the second width, and wherein the first-2 pad has a second width or a third width that is less than the second width.

[0033] Additionally, the upper surface of the first through-hole portion includes: a first region that contacts the lower surface of the second insulating layer; a second region that contacts the lower surface of the second pad; and a third region that contacts the upper surface of the second through-hole portion.

[0034] Additionally, the lower surface of the first through-hole portion includes: a first region that contacts the upper surface of the third insulating layer; a second region that contacts the upper surface of the third pad; and a third region that contacts the upper surface of the third through-hole portion.

[0035] In addition, the second and third insulating layers comprise photocurable resin (PID: photoimaging dielectric), and the first insulating layer is a thermosetting resin.

[0036] In addition, the centers of each of the 1-1 pad, 1-2 pad, first through-hole portion, second through-hole portion, second pad, third through-hole portion, and third pad are aligned on the same vertical line.

[0037] A printed circuit board according to an embodiment includes: a first insulating layer; a second insulating layer disposed on the first insulating layer; a first through-hole portion disposed in the first insulating layer; a second through-hole portion disposed in the second insulating layer; and wherein the first through-hole portion includes: a first through-hole portion passing through the first insulating layer; a first-1 pad disposed on the upper surface of the first insulating layer, connected to the upper surface of the first through-hole portion, and having a width equal to or less than the width of the upper surface of the first through-hole portion; and a first-2 pad, wherein... The first and second pads are disposed on the lower surface of the first insulating layer and connected to the lower surface of the first through-hole portion. The second through-hole portion includes: a second through-hole portion, which is configured to pass through the second insulating layer and has a lower surface connected to the upper surface of the first-1 pad; and a second pad, which is disposed on the upper surface of the second insulating layer, connected to the upper surface of the second through-hole portion, and has a width equal to or less than the width of the upper surface of the second through-hole portion. A first dummy vertical line passing through the center of the first through-hole portion and a second dummy vertical line passing through the center of the second through-hole portion are horizontally spaced apart.

[0038] Additionally, dummy vertical lines passing through the centers of each of the 1-1 pad, the 1-2 pad, and the first via are aligned on the first vertical line, and dummy vertical lines passing through the centers of the second pad and the second via are aligned on the second vertical line.

[0039] Additionally, the first vertical line includes: a first-1 vertical line that passes through the center of the first-1 pad or the first-1 pad; and a first-2 vertical line that passes through the center of the first via and is spaced apart from the first-1 vertical line in the horizontal direction.

[0040] Additionally, the second vertical line includes: a 2-1 vertical line that passes through the center of the second pad; and a 2-2 vertical line that passes through the center of the second via and is spaced apart from the 2-1 vertical line in the horizontal direction.

[0041] In addition, each of the first through-hole portion and the second through-hole portion includes an upper surface having a first width and a lower surface having a second width less than the first width, and each of the first-1 pad and the second pad has a third width less than the first width or the second width.

[0042] Additionally, the upper surface of the first through-hole portion includes: a first region that contacts the lower surface of the second insulating layer; a second region that contacts the lower surface of the second pad; and a third region that contacts the upper surface of the second through-hole portion.

[0043] Additionally, the printed circuit board further includes: a third insulating layer disposed below the first insulating layer; and a third through-hole portion disposed within the third insulating layer; wherein the third through-hole portion may include: a third pad disposed on the lower surface of the third insulating layer; and a third through-hole section disposed within the third insulating layer and having a lower surface connected to the upper surface of the third pad and an upper surface connected to the first-second pad, wherein a third dummy vertical line passing through the center of the third through-hole section is horizontally spaced from at least one of the first vertical line and the second vertical line.

[0044] Additionally, pads 1-2 have a second width or a third width that is smaller than the second width.

[0045] Additionally, the lower surface of the first through-hole portion includes: a first region that contacts the upper surface of the third insulating layer; a second region that contacts the upper surface of the third pad; and a third region that contacts the upper surface of the third through-hole portion.

[0046] In addition, the second and third insulating layers comprise photocurable resin (PID: photoimaging dielectric), and the first insulating layer is a thermosetting resin.

[0047] Beneficial effects

[0048] According to an embodiment, in a printed circuit board with a multilayer structure, each interconnected via portion includes a via portion passing through an insulating layer and a pad disposed on one surface of the via portion. In this case, in the printed circuit board according to the embodiment, the width of the pad is not greater than the width of one surface of the via portion. In other words, the width of the pad of each via portion included in the printed circuit board can be equal to or less than the width of one surface of the via portion.

[0049] Accordingly, the printed circuit board of the embodiment can increase the spacing between multiple vias, thus making it easier to realize fine circuit patterns and thereby increasing circuit density.

[0050] In addition, this embodiment can improve the design freedom of the entire printed circuit board by changing the design of the through-hole portion, thus ensuring the realization of fine patterns and the reliability of the substrate.

[0051] In one embodiment, the centers of via portions directly connected to each other in the vertical direction can be arranged aligned on the same vertical line, or alternatively, they can be arranged in a zigzag pattern offset from each other. Here, the aligned portion or the zigzag portion can be the via portion of each via portion, or alternatively, it can be the pad of each via portion, or alternatively, it can be both the via portion and the pad of each via portion. Accordingly, the shape or position of the via portions can be freely varied according to the design of the desired circuit pattern in the printed circuit board including the via portions, thus increasing design freedom. Attached Figure Description

[0052] Figure 1 This is a diagram showing a printed circuit board according to a comparative example.

[0053] Figure 2 This is a diagram showing a printed circuit board according to the first embodiment.

[0054] Figure 3 This is a diagram comparing the spacing between multiple through-hole portions in the printed circuit board of the comparative example and the first embodiment.

[0055] Figures 4 to 10 It is shown in the order of the processes. Figure 2 The figure shown illustrates a method for manufacturing a printed circuit board according to the first embodiment.

[0056] Figure 11 This is a diagram showing a printed circuit board according to a second embodiment.

[0057] Figure 12 This is a diagram showing a printed circuit board according to a third embodiment.

[0058] Figure 13 This is a diagram showing a printed circuit board according to the fourth embodiment.

[0059] Figure 14 This is a diagram showing a printed circuit board according to the fifth embodiment.

[0060] Figure 15 This is a diagram showing a printed circuit board according to the sixth embodiment.

[0061] Figure 16 This is a diagram showing a printed circuit board according to the seventh embodiment. Detailed Implementation

[0062] In the following description, embodiments disclosed herein will be described in detail with reference to the accompanying drawings. However, regardless of the reference numerals, the same reference numerals will be used to denote the same or similar components, and repeated descriptions thereof will be omitted. The component suffixes “module” and “part” used in the following description are given or combined only for ease of writing the specification, and they have no distinguishing meaning or function in themselves. Furthermore, in describing embodiments disclosed herein, detailed descriptions of relevant known art will be omitted where it is determined that such detailed descriptions unnecessarily obscure the spirit of the embodiments disclosed herein. Further, the drawings are only for the purpose of facilitating understanding of the embodiments disclosed herein, and the scope of the technology disclosed herein is not limited by the drawings and should be understood to include all modifications, equivalents, and substitutions falling within the spirit and scope of the invention.

[0063] It should be understood that although the terms "first," "second," etc., may be used in this document to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another.

[0064] It should be understood that when an element is described as "connected" or "combined" to another element, it can be directly connected or combined to the other element, or there may be an intermediate element. Conversely, when an element is described as "directly connected" or "directly combined" to another element, there is no intermediate element. Other terms used to describe the relationship between elements should be interpreted in a similar manner (i.e., "between" and "directly between", "adjacent" and "directly adjacent", etc.).

[0065] As used herein, unless the context clearly indicates otherwise, the singular forms “a” and “one” and “the” are intended to include the plural forms as well.

[0066] It should be further understood that the terms “comprising,” “including,” “containing,” and / or “having,” when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0067] In the following, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

[0068] Figure 1 This is a diagram showing a printed circuit board according to a comparative example. Figure 1 (a) is a diagram showing a printed circuit board including an embedded circuit pattern manufactured by the ETS method. Figure 1 (b) is a diagram showing a printed circuit board including a general outlined circuit pattern.

[0069] Reference Figure 1 (a) The printed circuit board according to the comparative example includes a circuit pattern manufactured by the ETS method.

[0070] Specifically, the printed circuit board manufactured by the ETS method includes an insulating layer 11, a circuit pattern 12, and via portions 16. Although the circuit pattern 12 is shown in the figures as being disposed only below the insulating layer 11, the circuit pattern actually has additional protruding structures on the upper surface of the insulating layer 11.

[0071] The circuit pattern 12 is embedded in the insulating layer 11.

[0072] Preferably, the circuit pattern 12 is embedded in the lower region of the insulating layer 11. Therefore, the lower surface of the circuit pattern 12 is disposed on the same plane as the lower surface of the insulating layer 11.

[0073] An upper circuit pattern (not shown) is additionally provided on the upper surface of the insulating layer 11, and the upper circuit pattern has a structure that protrudes above the upper surface of the insulating layer 11.

[0074] The through-hole portion 16 is disposed in the insulating layer 11.

[0075] At this time, the through-hole portion 16 includes: a through-hole portion 15 disposed in and passing through the insulating layer 11; a first pad 13 embedded in the lower region of the insulating layer 11; and a second pad 14 disposed on the upper surface of the insulating layer 11.

[0076] In this configuration, the first pad 14 has a first width w1, and the second pad 15 has a second width w2. The first width w1 may be the same as the second width w2, but in other cases, the first width w1 may be smaller than the second width w2.

[0077] Furthermore, the lower surface of the through-hole portion 15 contacts the upper surface of the first pad 13 and has a third width w3. Additionally, the upper surface of the through-hole portion 15 contacts the lower surface of the second pad 14 and has a fourth width w4. In this case, the third width w3 is smaller than the fourth width w4; therefore, the through-hole portion 15 has a shape where the width gradually decreases from top to bottom.

[0078] Meanwhile, the third width w3 of the lower surface of the through-hole portion 15 is smaller than the first width w1 of the first pad 13. Additionally, the fourth width w4 of the upper surface of the through-hole portion 15 is smaller than the second width w2 of the second pad 14. That is, the first pad 13 and the second pad 14 have a structure that extends horizontally from each of the upper and lower portions of the through-hole portion 15.

[0079] Meanwhile, circuit patterns have become increasingly refined in recent years. Furthermore, in the case of fine circuit patterns with widths / spacings of 15μm or less, the outermost layer must be achieved using the ETS method. In other words, in the case of a fine circuit pattern with an outermost layer width of 15μm and spacings of less than 15μm between each circuit pattern, a stable fine circuit pattern can only be formed by using the ETS method.

[0080] However, in the comparative example printed circuit board described above, the first width w1 of the first pad 13 is greater than the third width w3 of the lower surface of the via portion 15, and the second width w2 of the second pad 14 is greater than the fourth width w4 of the upper surface of the via portion 15. Therefore, the spacing between adjacent via portions is reduced. In other words, in the comparative example printed circuit board, the spacing w5 between adjacent first pads 13 can be reduced.

[0081] In other words, in the comparative example printed circuit board, the spacing between the first pads 13 is smaller than the spacing between the lower regions of adjacent vias.

[0082] Reference Figure 1 (b) According to the comparative example, the printed circuit board includes a circuit pattern with a protruding structure.

[0083] Specifically, the printed circuit board includes an insulating layer 21, a circuit pattern 22, and via portions 26. Although the accompanying drawings show the circuit pattern 22 disposed only below the insulating layer 21, the circuit pattern is actually additionally disposed on the upper surface of the insulating layer 21, which has a protruding structure.

[0084] The circuit pattern 22 has a structure that protrudes below the lower surface of the insulating layer 21. Therefore, the upper surface of the circuit pattern 22 is disposed on the same plane as the lower surface of the insulating layer 21.

[0085] The through-hole portion 26 is disposed in the insulating layer 21.

[0086] In this case, the through-hole portion 26 includes: a through-hole portion 25 disposed in and passing through the insulating layer 21; a first pad 23 protruding below the lower surface of the insulating layer 21; and a second pad 24 disposed on the upper surface of the insulating layer 21.

[0087] In this configuration, the first pad 24 has a first width w1', and the second pad 25 has a second width w2'. The first width w1' may be the same as the second width w2', but there is no other case where the first width w1' is smaller than the second width w2'.

[0088] Furthermore, the lower surface of the through-hole portion 25 contacts the upper surface of the first pad 23 and has a third width w3'. Additionally, the upper surface of the through-hole portion 25 contacts the lower surface of the second pad 24 and has a fourth width w4'. In this case, the third width w3' is smaller than the fourth width w4', therefore, the through-hole portion 25 has a shape where the width gradually decreases from top to bottom.

[0089] Meanwhile, the third width w3' of the lower surface of the through-hole portion 25 is smaller than the first width w1' of the first pad 23. Additionally, the fourth width w4' of the upper surface of the through-hole portion 25 is smaller than the second width w2' of the second pad 24. That is, the first pad 23 and the second pad 24 have a structure that extends horizontally from each of the upper and lower portions of the through-hole portion 25.

[0090] In the comparative example printed circuit board described above, the first width w1' of the first pad 23 is greater than the third width w3' of the lower surface of the through-hole portion 25, and the second width w2' of the second pad 24 is greater than the fourth width w4' of the upper surface of the through-hole portion 25. Therefore, the spacing between adjacent through-hole portions is reduced. In other words, in the comparative example printed circuit board, the spacing w5' between adjacent first pads 23 can be reduced.

[0091] Furthermore, with the development of 5G technology, interest in printed circuit boards (PCBs) that can reflect this is growing. At this point, for 5G technology to be applied, PCBs must have a high multilayer structure; therefore, circuit patterns should be miniaturized. However, in the comparative example, although, as mentioned above, fine patterns can be formed due to the structure of the via portions, there is a problem of reduced circuit density in the spaces between the via portions.

[0092] Figure 2 This is a diagram showing a printed circuit board according to the first embodiment. Figure 3 This is a diagram comparing the spacing between multiple through-hole portions in the printed circuit boards of the comparative example and the first embodiment.

[0093] Reference Figure 2 and Figure 3 The printed circuit board 100 includes an insulating layer 110, through-hole portions 120, 130, 140, 150, 160, and a circuit pattern 135.

[0094] At this time, the printed circuit board 100 can form a wiring layout for connecting electrical wiring to circuit components based on the circuit design, and electrical conductors can be provided on the insulating material. In addition, electronic components can be mounted on the printed circuit board 100, which can form wiring configured to connect electronic components to form a circuit, and can mechanically fix the components in addition to serving to electrically connect them.

[0095] The insulating layer 110 may have multiple stacked structures. Preferably, the insulating layer 110 may include a first insulating layer 111, a second insulating layer 112, a third insulating layer 113, a fourth insulating layer 114, and a fifth insulating layer 115.

[0096] The first insulating layer 111 may be a central insulating layer located at the center of the insulating layers 110 having a plurality of stacked structures. The first insulating layer 111 may be a core insulating layer. However, this is only an embodiment, and the printed circuit board 100 may be a coreless substrate, so the first insulating layer 111 may be a conventional insulating layer.

[0097] The first insulating layer 111 can be rigid or flexible. For example, the first insulating layer 111 can include glass or plastic. Specifically, the first insulating layer 111 can include chemically tempered / semi-tempered glass (e.g., soda-lime glass, aluminosilicate glass, etc.), tempered or flexible plastic (e.g., polyimide (PI), polyethylene terephthalate (PET), propylene glycol (PPG), polycarbonate (PC), etc.), or sapphire.

[0098] Furthermore, the first insulating layer 111 may include an optically isotropic film. As an example, the first insulating layer 111 may include cyclic olefin copolymer (COC), cyclic olefin polymer (COP), optically isotropic PC, optically isotropic polymethyl methacrylate (PMMA), etc.

[0099] Furthermore, the first insulating layer 111 can be partially bent while having a curved surface. That is, the first insulating layer 111 can be partially planar and can be partially bent while having a curved surface. Specifically, the ends of the first insulating layer 111 can be bent while having a curved surface, or bent or rolled while including a surface with random curvature.

[0100] Furthermore, the first insulating layer 111 can be a flexible substrate. Additionally, the first insulating layer 111 can be a bent or folded substrate. In this case, the first insulating layer 111 can form a wiring layout for connecting circuit components based on a circuit design, and electrical conductors can be provided on the insulating material. Furthermore, electronic components can be mounted on the first insulating layer 111, and the first insulating layer 111 can form wiring configured to connect electronic components to form a circuit, and can mechanically fix the components in addition to electrically connecting them.

[0101] The second insulating layer 112 may be disposed on the upper surface of the first insulating layer 111.

[0102] The third insulating layer 113 may be disposed below the lower surface of the first insulating layer 111.

[0103] The fourth insulating layer 114 may be disposed on the upper surface of the second insulating layer 112.

[0104] The fifth insulating layer 115 may be disposed below the lower surface of the third insulating layer 113.

[0105] The second insulating layer 112, the third insulating layer 113, the fourth insulating layer 114, and the fifth insulating layer 115 may comprise a photocurable resin or a photosensitive resin. That is, the second insulating layer 112, the third insulating layer 113, and the fourth insulating layer may be formed of a PID (Photoimageable Dielectrics) material.

[0106] Therefore, the second insulating layer 112, the third insulating layer 113, the fourth insulating layer 114, and the fifth insulating layer 115 include epoxy resin, photoinitiator, silicone filler, and curing agent, etc. For example, the second insulating layer 112, the third insulating layer 113, the fourth insulating layer 114, and the fifth insulating layer 115 can be formed by laminating a photocurable resin film or coating a photocurable resin paste or liquid. In this case, in one example, the photocurable resin material may include any one or more selected from photocurable polyhydroxystyrene (PHS), photocurable polybenzoxazole (PBO), photocurable polyimide (PI), photocurable benzocyclobutene (BCB), photocurable polysiloxane, photocurable epoxy resin, and phenolic varnish resin.

[0107] In this embodiment, the second insulating layer 112, the third insulating layer 113, the fourth insulating layer 114, and the fifth insulating layer 115 are formed of photocurable resin, thereby allowing the formation of fine circuit patterns with small dimensions and fine through-holes using exposure and development.

[0108] Simultaneously, circuit patterns (not shown) are formed on the surfaces of the first insulating layer 111, the second insulating layer 112, the third insulating layer 113, the fourth insulating layer 114, and the fifth insulating layer 115. These can be arranged in this manner. In the accompanying drawings, only the circuit pattern 135 provided on the upper surface of the second insulating layer 112 is given reference numerals.

[0109] Circuit patterns can be fabricated using the embedded circuit substrate (ETS) method to have structures embedded in the first insulating layer 111, the second insulating layer 112, the third insulating layer 113, the fourth insulating layer 114, and the fifth insulating layer 115. However, this embodiment is not limited to this. Circuit patterns can also be formed using additive processes, subtractive processes, modified semi-additive processes (MSAP), and semi-additive processes (SAP) that are typical fabrication processes for circuit boards, resulting in structures that protrude above the surfaces of each insulating layer, and detailed descriptions of these processes will be omitted herein.

[0110] Meanwhile, the circuit pattern can be wiring for transmitting electrical signals and can be formed from a metallic material with high electrical conductivity. For this purpose, the circuit pattern can be formed from at least one metallic material selected from gold (Au), silver (Ag), platinum (Pt), titanium (Ti), tin (Sn), copper (Cu), and zinc (Zn). Alternatively, the circuit pattern can be formed from a paste or solder paste comprising at least one metallic material selected from gold (Au), silver (Ag), platinum (Pt), titanium (Ti), tin (Sn), copper (Cu), and zinc (Zn) which have excellent bonding strength. Preferably, the circuit pattern can be formed from copper (Cu), which has high electrical conductivity and low cost.

[0111] Meanwhile, through-holes can be set in each insulating layer.

[0112] The first through-hole portion 120 is disposed in the first insulating layer 111. The first through-hole portion 120 includes a first through-hole portion 121 passing through the first insulating layer 111 and first pads 122 and 123 disposed on each of the upper and lower surfaces of the first insulating layer 111 and connected to the first through-hole portion 121.

[0113] The through-hole portion 121 can be formed by filling the interior of the first through-hole VH1 that passes through the first insulating layer 111 with a conductive material.

[0114] The first through-hole TH1 can be formed by any of the following processing methods: machining, laser processing, and chemical processing. When forming a through-hole by machining, methods such as milling, drilling, and routing can be used. When forming a through-hole by laser processing, UV or CO2 laser methods can be used. When forming a through-hole by chemical processing, chemicals including aminosilanes, ketones, etc. can be used. Therefore, the first insulating layer 111 can be opened.

[0115] On the other hand, laser processing is a cutting method that focuses light energy on a surface to melt and evaporate a portion of the material to present a desired shape. It can easily process complex shapes through computer programs and can process composite materials that are difficult to cut by other methods.

[0116] In addition, laser processing can achieve a cutting diameter of at least 0.005 mm and has significant advantages in terms of possible thickness range.

[0117] For laser processing drill bits, yttrium aluminum garnet (YAG) lasers, CO2 lasers, or ultraviolet (UV) lasers are preferred. YAG lasers can process both copper foil layers and insulating layers, while CO2 lasers can process only insulating layers.

[0118] When the first through-hole TH1 is formed, the first through-hole portion 121 can be formed by filling the interior of the through-hole with a conductive material. The metal material forming the through holes V1, V2, V3, V4, V5, V6 and V7 can be any material selected from copper (Cu), silver (Ag), tin (Sn), gold (Au), nickel (Ni) and palladium (Pd), and the conductive material can be filled by any of the following methods: chemical plating, electrolytic plating, screen printing, sputtering, evaporation, inkjet printing and dispensing.

[0119] In this case, the first through-hole VH1 formed in the first insulating layer 111 in the embodiment can be formed using a different method than the through-holes VH2, VH3, VH4, and VH5 formed in the other insulating layers 112, 113, 114, and 115. That is, the other insulating layers 112, 113, 114, and 115, excluding the first insulating layer 111, are formed of a photosensitive material, and therefore, the through-holes VH2, VH3, VH4, and VH5 can be formed by processes such as exposure and development. On the other hand, the first insulating layer 111 can be formed of a material different from the materials of the second insulating layer 112, the third insulating layer 113, the fourth insulating layer 114, and the fifth insulating layer 115. Therefore, the first through-hole VH1 can be formed by any of the machining, laser machining, and chemical machining methods different from the machining methods used for the second through-hole VH2, the third through-hole VH3, the fourth through-hole VH4, and the fifth through-hole VH5. However, the embodiments are not limited thereto, and the first through hole VH1 can be formed in the same way as the second through hole VH2, the third through hole VH3, the fourth through hole VH4 and the fifth through hole VH5.

[0120] The first pads 122 and 123 can be disposed on the upper and lower surfaces of the first insulating layer 111.

[0121] Preferably, the first-1 pad 122 connected to the upper surface of the first through-hole portion 121 can be disposed on the upper surface of the first insulating layer 111. The first-1 pad 122 can be one of a plurality of circuit patterns disposed on the upper surface of the first insulating layer 111.

[0122] Furthermore, the first-second pad 123, which is connected to the lower surface of the first through-hole portion 121, may be provided on the lower surface of the first insulating layer 111. The first-second pad 123 may be one of a plurality of circuit patterns provided on the lower surface of the first insulating layer 111.

[0123] The widths of the upper and lower surfaces of the first through-hole portion 121 can be different from each other. Preferably, the upper surface of the first through-hole portion 121 can have a first width W1. Furthermore, the lower surface of the first through-hole portion 121 can have a second width W2 that is smaller than the first width W1. That is, the first through-hole portion 121 can have a cylindrical shape in which the width gradually decreases from the upper surface to the lower surface. Therefore, the first width W1 and the second width W2 can respectively represent the diameter of the upper surface and the diameter of the lower surface of the first through-hole portion 121.

[0124] The first pad 122 can be a capture pad of the first via portion 120. The upper and lower surfaces of the first pad 122 can have the same width. Preferably, the first pad 122 can have a first width W1 corresponding to the upper surface of the first via portion 121.

[0125] The first and second pads 123 can be the land pads of the first through-hole portion 120. The upper and lower surfaces of the first and second pads 123 can have the same width. Preferably, the first and second pads 123 can have a first width W1 corresponding to the upper surface of the first through-hole portion 121.

[0126] That is, the first-1 pad 122 and the first-2 pad 123 may have a first width W1 corresponding to the upper surface of the first through hole portion 121.

[0127] As described above, in this embodiment, the width of the first-1 pad 122 is the same as the width of the upper surface of the first through-hole portion 121. Therefore, in this embodiment, with Figure 1 Compared to the comparative example shown, the spacing W3 between the plurality of first via portions 120 disposed in the first insulating layer 111 can be increased. That is, in this embodiment, the spacing between the upper surfaces of the plurality of first via portions and the spacing between the plurality of first pads can be the same. Therefore, in this embodiment, the spacing between the plurality of first via portions can be increased, thereby improving other circuit density and design freedom.

[0128] Meanwhile, a second through-hole portion 130 is disposed in the second insulating layer 112. The second through-hole portion 130 includes a second through-hole portion 131 passing through the second insulating layer 112 and a second pad 132 disposed on the upper surface of the second insulating layer 112 and connected to the upper surface of the second through-hole portion 131.

[0129] In this case, the lower surface of the second through hole portion 131 can be configured to directly contact the upper surface of the first through hole portion 120's first-1 pad 122.

[0130] The upper and lower surfaces of the second through hole 131 may have different widths. Preferably, the upper surface of the second through hole 131 may have a first width W1, and the lower surface of the second through hole 131 may have a second width W2 that is smaller than the first width W1.

[0131] The second pad 132 disposed on the upper surface of the second through-hole portion 131 may have a first width Wl corresponding to the upper surface of the second through-hole portion 131. The lower surface of the second pad 132 may directly contact the upper surface of the second through-hole portion 131. Specifically, the lower surface of the second pad 132 may only contact the upper surface of the second through-hole portion 131, and not contact the upper surface of the second insulating layer 112.

[0132] In this comparative example, the insulating layer 11 is formed of a thermosetting resin. Therefore, a through hole for forming the through-hole portion can be formed by a laser process. In this case, as in the embodiment, when the width of the first-1 pad 122 is the same as the width of the upper surface of the first through-hole portion 121, even if the formation position of the second through-hole VH2 constituting the second through-hole portion 130 is slightly offset, the second through-hole VH2 can still pass through the first insulating layer 111, and thus defects may occur. That is, in the comparative example, the first-1 pad is used as a stopper for laser processing, and therefore, there is a limitation in reducing the width of the first-1 pad.

[0133] Conversely, in this embodiment, the second insulating layer 112 is formed from the photocurable resin described above. Therefore, in this embodiment, the second through-hole VH2 used to form the second through-hole portion 131 is formed through an exposure and development process. Thus, the through-hole can be formed only in the desired insulating layer, regardless of the width of the first-1 pad 1122. Therefore, in this embodiment, as described above, the width of the first-1 pad 122 can be reduced, thereby increasing the spacing between the plurality of first through-hole portions 120.

[0134] Meanwhile, a third through-hole portion 140 is disposed in the third insulating layer 113. The third through-hole portion 140 includes: a third through-hole portion 141 configured to pass through the third insulating layer 113; and a third pad 142 disposed on the lower surface of the third insulating layer 113 and connected to the lower surface of the third through-hole portion 141.

[0135] In this case, the upper surface of the third through hole portion 141 can be configured to directly contact the lower surface of the first-second pad 123 of the first through hole portion 120.

[0136] The upper and lower surfaces of the third through hole 141 may have different widths. Preferably, the upper surface of the third through hole 141 may have a second width W2, and the lower surface of the third through hole 141 may have a first width W1 that is greater than the second width W2.

[0137] The third pad 142, disposed on the lower surface of the third through-hole portion 141, may have a first width Wl corresponding to the lower surface of the third through-hole portion 141. The upper surface of the third pad 142 may directly contact the lower surface of the third through-hole portion 141. Specifically, the upper surface of the third pad 142 may only contact the lower surface of the third through-hole portion 141, and not contact the lower surface of the third insulating layer 113.

[0138] Meanwhile, a fourth through-hole portion 150 is disposed in the fourth insulating layer 114. The fourth through-hole portion 150 includes: a fourth through-hole portion 151 passing through the fourth insulating layer 114; and a fourth pad 152 disposed on the upper surface of the fourth insulating layer 114 and connected to the upper surface of the fourth through-hole portion 151.

[0139] In this case, the lower surface of the fourth through hole portion 151 can be configured to directly contact the upper surface of the second pad 132 of the second through hole portion 130.

[0140] The upper and lower surfaces of the fourth through hole 151 may have different widths. Preferably, the upper surface of the fourth through hole 151 may have a first width W1, and the lower surface of the fourth through hole 151 may have a second width W2 that is smaller than the first width W1.

[0141] The fourth pad 152, disposed on the upper surface of the fourth through-hole portion 151, may have a first width Wl corresponding to the upper surface of the fourth through-hole portion 151. The lower surface of the fourth pad 152 may directly contact the upper surface of the fourth through-hole portion 151. Specifically, the lower surface of the fourth pad 152 may only contact the upper surface of the fourth through-hole portion 151, and not contact the upper surface of the fourth insulating layer 114.

[0142] Furthermore, similar to the second through-hole portion 130, the fourth through-hole VH4 constituting the fourth through-hole portion 151 can be stably formed, and since it is independent of the width of the second pad 132 of the second through-hole portion 130, the width of the second pad 132 can be the same as the width of the upper surface of the second through-hole portion 131.

[0143] Meanwhile, a fifth through-hole portion 160 is disposed in the fifth insulating layer 115. The fifth through-hole portion 160 includes: a fifth through-hole portion 161 passing through the fifth insulating layer 115; and a fifth pad 162 disposed on the lower surface of the fifth insulating layer 115 and connected to the lower surface of the fifth through-hole portion 161.

[0144] In this case, the upper surface of the fifth through hole portion 161 can be configured to directly contact the lower surface of the third pad 142 of the third through hole portion 140.

[0145] The upper and lower surfaces of the fifth through hole 161 may have different widths. Preferably, the upper surface of the fifth through hole 161 may have a second width W2, and the lower surface of the fifth through hole 161 may have a first width W1 that is greater than the second width W2.

[0146] The fifth pad 162, disposed on the lower surface of the fifth through-hole portion 161, may have a first width Wl corresponding to the lower surface of the fifth through-hole portion 161. The upper surface of the fifth pad 162 may be in direct contact with the lower surface of the fifth through-hole portion 161. Specifically, the upper surface of the fifth pad 162 may only contact the lower surface of the fifth through-hole portion 161, and not contact the lower surface of the fifth insulating layer 115.

[0147] Furthermore, similar to the second through-hole portion 130 and the fourth through-hole portion 150, the fifth through-hole VH5 constituting the fifth through-hole portion 161 can be stably formed, regardless of the width of the third pad 142 of the third through-hole portion 130. Therefore, the width of the third pad 142 can be the same as the width of the upper surface of the third through-hole portion 141.

[0148] Meanwhile, in the first embodiment, the first through hole portion 120, the second through hole portion 130, the third through hole portion 140, the fourth through hole portion 150, and the fifth through hole portion 160 can be arranged on the same vertical line CL.

[0149] Preferably, the centers of the first through-hole portion 121 and the first pads 122 and 123 constituting the first through-hole portion 120 can be aligned on a vertical line CL.

[0150] In addition, the center of each of the second through-hole portion 131 and the second pad 132 constituting the second through-hole portion 130 can be aligned with the center of the first through-hole portion 121 and the first pads 122 and 123 constituting the first through-hole portion 120 on a vertical line CL.

[0151] In addition, the center of each of the third through-hole portion 141 and the third pad 142 constituting the third through-hole portion 140 can be aligned with the center of the first through-hole portion 121, the first pads 122 and 123, the second through-hole portion 131 and the second pad 132 on a vertical line CL.

[0152] In addition, the center of each of the fourth through-hole portion 151 and the fourth pad 152 constituting the fourth through-hole portion can be aligned with the center of the first through-hole portion 121, the first pads 122 and 123, the second through-hole portion 131, the second pad 132, the third through-hole portion 141, and the third pad 142 on a vertical line CL.

[0153] In addition, the center of each of the fifth through-hole portion 161 and the fifth pad 162 constituting the fifth through-hole portion 150 can be aligned with the center of the first through-hole portion 121, the first pads 122 and 123, the second through-hole portion 131, the second pad 132, the third through-hole portion 141, the third pad 142, the fourth through-hole portion 151, and the fourth pad 152 on a vertical line CL.

[0154] According to an embodiment, each through-hole portion interconnected in a printed circuit board with a multilayer structure includes a through-hole portion passing through an insulating layer and a pad disposed on one surface of the through-hole portion. In this case, in the printed circuit board according to the embodiment, the width of the pad is not greater than the width of one surface of the through-hole portion. In other words, the width of the pad of each through-hole portion included in the printed circuit board can be equal to or less than the width of one surface of the through-hole portion.

[0155] Accordingly, the printed circuit board of the embodiment can increase the spacing between multiple through holes, thus making it easier to realize fine circuit patterns and thereby increase circuit density.

[0156] Furthermore, the embodiments can increase the design freedom of the entire printed circuit board by changing the design of the through-hole portion, thus ensuring the realization of fine patterns and the reliability of the substrate.

[0157] In one embodiment, the centers of via portions directly connected to each other in the vertical direction can be arranged aligned on the same vertical line, or alternatively, they can be arranged in a zigzag pattern offset from each other. Here, the aligned portion or the zigzag portion can be the via portion of each via portion, or alternatively, it can be the pad of each via portion, or alternatively, it can be both the via portion and the pad of each via portion. Accordingly, the shape or position of the via portions can be freely changed according to the design of the circuit pattern required in the printed circuit board including the via portions, thus increasing design freedom.

[0158] Figures 4 to 10 It is shown in the order of the processes. Figure 2 The figure shown illustrates a method for manufacturing a printed circuit board according to the first embodiment.

[0159] First, refer to Figure 4 (a) is the first insulating layer 111, which is prepared to be used as the base of the printed circuit board.

[0160] Next, refer to Figure 5 At least one first through-hole VH1 may be formed in the first insulating layer 111. The first through-hole VH1 may be formed to pass through the upper and lower surfaces of the first insulating layer 111.

[0161] Next, refer to Figure 6 The first through-hole VH1 formed in the first insulating layer 111 is filled with a metallic material to form a first through-hole portion 120. In this case, the first through-hole portion includes a first through-hole portion 121 passing through the first insulating layer 111 and first pads 122 and 123 disposed on the upper and lower surfaces of the first insulating layer 111 and connected to the first through-hole portion 121.

[0162] The first through-hole portion 121 can be formed by filling the first through-hole VH1 that passes through the first insulating layer 111 with a conductive material.

[0163] Additionally, the first via portion 120 may include first pads 122 and 123 disposed on the upper and lower surfaces of the first insulating layer 111. Since the characteristics of the first pads 122 and 123 have already been described above, their detailed description will be omitted.

[0164] Next, as Figure 7 As shown, the second insulating layer 112 is disposed on the upper surface of the first insulating layer 111, and the third insulating layer 113 is disposed below the lower surface of the first insulating layer 111. In this case, the second insulating layer 112 and the third insulating layer 113 may comprise a photocurable resin or a photosensitive resin.

[0165] Alternatively, a second through-hole VH2 can be formed in the second insulating layer 112, passing through the upper and lower surfaces of the second insulating layer 112. In this case, the second through-hole VH2 can be formed to expose the first-1 pad 122 constituting the first through-hole portion 120.

[0166] Furthermore, a third via VH3 can be formed in the third insulating layer 113, penetrating the upper and lower surfaces of the third insulating layer 113. In this case, the third via VH3 can be formed to expose the first and second pads 123 constituting the first via portion 120.

[0167] In this configuration, the second insulating layer 112 and the third insulating layer 113 are formed from a photocurable resin. Therefore, as the second through-hole VH2 and the third through-hole VH3 are formed through the exposure and development processes, their depths can be easily adjusted. Consequently, the widths of the first-1 pad 122 and the first-2 pad 123, which were previously used as stop elements, can be freely formed.

[0168] Next, as Figure 8 As shown, a second through-hole portion 130 is formed in the second through-hole VH2 of the second insulating layer 112, and a third through-hole portion 130 is formed in the through-hole VH3 of the third insulating layer 113.

[0169] In this case, the second through-hole portion 130 includes: a second through-hole portion 131 passing through the second insulating layer 112; and a second pad 132 disposed on the upper surface of the second insulating layer 112 and connected to the upper surface of the second through-hole portion 131.

[0170] Additionally, the third through-hole portion 140 includes: a third through-hole portion 141 passing through the third insulating layer 113; and a third pad 142 disposed on the lower surface of the third insulating layer 113 and connected to the lower surface of the third through-hole portion 141.

[0171] Since the characteristics of the second through-hole portion 130 and the third through-hole portion 140 have already been described above, their detailed descriptions will be omitted.

[0172] Next, as Figure 9 As shown, the fourth insulating layer 114 is disposed on the upper surface of the second insulating layer 112, and the fifth insulating layer 115 is disposed below the lower surface of the third insulating layer 113. In this case, the fourth insulating layer 114 and the fifth insulating layer 115 may comprise a photocurable resin or a photosensitive resin.

[0173] Alternatively, a fourth via VH4 can be formed in the fourth insulating layer 114, passing through the upper and lower surfaces of the fourth insulating layer 114. In this case, the fourth via VH4 can be formed to expose the second pad 132 constituting the second via portion 130.

[0174] Alternatively, a fifth through-hole VH5 can be formed in the fifth insulating layer 115, passing through the upper and lower surfaces of the fifth insulating layer 115. In this case, the fifth through-hole VH5 can be formed to expose the third pad 142 that constitutes the third through-hole portion 140.

[0175] At this time, the fourth insulating layer 114 and the fifth insulating layer 115 are formed of photocurable resin. Therefore, as the fourth through-hole VH4 and the fifth through-hole VH5 are formed through exposure and development processes, the depths of the fourth through-hole VH4 and the fifth through-hole VH5 can be easily adjusted. Therefore, the widths of the second pad 132 and the third pad 142, which were previously used as stop members, can be freely formed.

[0176] Next, as Figure 10 As shown, a fourth through-hole portion 150 is formed in the fourth through-hole VH4 of the fourth insulating layer 114, and a fifth through-hole portion 150 is formed in the fifth through-hole VH5 of the fifth insulating layer 115.

[0177] The fourth through-hole portion 150 includes: a fourth through-hole portion 151 passing through the fourth insulating layer 114; and a fourth pad 152 disposed on the upper surface of the fourth insulating layer 114 and connected to the upper surface of the fourth through-hole portion 151.

[0178] The fifth through-hole portion 160 includes: a fifth through-hole portion 161 passing through the fifth insulating layer 115; and a fifth pad 162 disposed on the lower surface of the fifth insulating layer 115 and connected to the lower surface of the fifth through-hole portion 161.

[0179] In the following text, references will be made. Figure 2 Various modified embodiments are described based on the structure of the printed circuit board according to the first embodiment.

[0180] In the following description of the printed circuit board, the same reference numerals are assigned to portions substantially the same as those in the foregoing embodiments.

[0181] Figure 11 This is a diagram showing a printed circuit board according to a second embodiment.

[0182] Reference Figure 11 The printed circuit board 100A includes an insulating layer 110, through-hole portions 120a, 130, 140, 150, 160 and circuit pattern 135.

[0183] The insulating layer 110 includes a first insulating layer 111, a second insulating layer 112, a third insulating layer 113, a fourth insulating layer 114, and a fifth insulating layer 115.

[0184] The through-hole portions 120a, 130, 140, 150, and 160 include: a first through-hole portion 120a disposed in a first insulating layer 111; a second through-hole portion 130 disposed in a second insulating layer 112; a third through-hole portion 140 disposed in a third insulating layer 113; a fourth through-hole portion 150 disposed in a fourth insulating layer 114; and a fifth through-hole portion 160 disposed in a fifth insulating layer 115.

[0185] Here, in the printed circuit board 100A of the second embodiment, the configuration other than the first through-hole portion 120a is the same as... Figure 2 The printed circuit board 100 according to the first embodiment is the same, therefore, only the first through-hole portion 120a will be described below.

[0186] The first through-hole portion 120a includes a first through-hole portion 121 disposed in the first insulating layer 111 and first pads 122 and 123a disposed on the upper and lower surfaces of the first insulating layer 111.

[0187] The first pads 122 and 123a include a first-1 pad 122 disposed on the upper surface of the first insulating layer 111 and in contact with the upper surface of the first through-hole portion 121. The width of the first-1 pad 122 may be the same as the width of the upper surface of the first through-hole portion 121.

[0188] Additionally, the first pads 122 and 123a include first-second pads 123a disposed on the lower surface of the first insulating layer 111 and in contact with the lower surface of the first through-hole portion 121. The width of the first-second pads 123a may be the same as the width of the lower surface of the first through-hole portion 121.

[0189] Right now, Figure 2 The width of the first-2 pad 123 is the same as the width of the upper surface of the first through hole portion 121 and the width of the first-1 pad 122.

[0190] Alternatively, Figure 11 In the second embodiment, the width of the first-2 pads 123 can be the same as the width W2 of the lower surface of the first through-hole portion 121 and the width W2 of the upper surface of the third through-hole portion 141 of the third through-hole portion 140. That is, as the third through-hole VH3 is formed through the exposure and development processes, the width of the first-2 pads 123a used as the stop in the comparative example can be freely adjusted. For example, it can have the same width as the lower surface of the first through-hole portion 121.

[0191] Figure 12 This is a diagram showing a printed circuit board according to a third embodiment.

[0192] Reference Figure 12 The printed circuit board 100B includes an insulating layer 110, through-hole portions 120b, 130b, 140b, 150, 160 and circuit pattern 135.

[0193] The insulating layer 110 includes a first insulating layer 111, a second insulating layer 112, a third insulating layer 113, a fourth insulating layer 114, and a fifth insulating layer 115.

[0194] The through-hole portions 120b, 130b, 140b, 150, and 160 include: a first through-hole portion 120b disposed in a first insulating layer 111; a second through-hole portion 130b disposed in a second insulating layer 112; a third through-hole portion 140b disposed in a third insulating layer 113; a fourth through-hole portion 150 disposed in a fourth insulating layer 114; and a fifth through-hole portion 160 disposed in a fifth insulating layer 115.

[0195] Here, in the printed circuit board 100B of the third embodiment, the configuration other than the first through-hole portion 120b, the second through-hole portion 130b, and the third through-hole portion 140b is the same as... Figure 2 Since the printed circuit board 100 according to the first embodiment is the same, only the second through-hole portion 130b and the third through-hole portion 140b will be described below.

[0196] The first through-hole portion 120b includes a first through-hole portion 121 disposed in the first insulating layer 111 and first pads 122b and 123b disposed on the upper and lower surfaces of the first insulating layer 111.

[0197] The first pads 122b and 123b include a first-1 pad 122b disposed on the upper surface of the first insulating layer 111 and in contact with the upper surface of the first through-hole portion 121. The width of the first-1 pad 122b may be smaller than the width of the upper surface of the first through-hole portion 121.

[0198] Preferably, the width of the first-1 pad 122b can be the same as the width of the lower surface of the second through-hole portion 131 of the second through-hole portion 130b. In other words, the width of the first-1 pad 122b can have a second width W2 that is the same as the width of the lower surface of the first through-hole portion 121 and the width of the first-2 pad 123b.

[0199] Therefore, in the first or second embodiment, the upper surface of the first through-hole portion 121 only contacts the lower surface of the first-1 pad 122. However, in the third embodiment, the upper surface of the first through-hole portion 121 may include a first region that contacts the lower surface of the second insulating layer 112 and a second region that contacts the first-1 pad 122b.

[0200] Additionally, the first pads 122b and 123b include first-second pads 123b disposed on the lower surface of the first insulating layer 111 and in contact with the lower surface of the first through-hole portion 121. The width of the first-second pads 123b may be the same as the width of the lower surface of the first through-hole portion 121.

[0201] Additionally, the second through-hole portion 130b may include a second through-hole portion 131 and a second pad 132b disposed on the upper surface of the second through-hole portion 131. In this case, the second pad 132b does not have the same width as the upper surface of the second through-hole portion 131, and may have the same width as the lower surface of the fourth through-hole portion 151 of the fourth through-hole portion 150 or the lower surface of the second through-hole portion 131.

[0202] Furthermore, the third through-hole portion 140b may include a third through-hole portion 141 and a third pad 142b disposed below the lower surface of the third through-hole portion 141. In this case, the third pad 142b does not have the same width as the lower surface of the third through-hole portion 141, but may have the same width as the upper surface of the fifth through-hole portion 161 of the fifth through-hole portion 160 or the upper surface of the third through-hole portion 141.

[0203] As described above, the widths of the first pads 122b and 123b, the second pad 132b, and the third pad 142b according to the third embodiment can be adjusted to a second width W2 instead of a first width W1.

[0204] Figure 13 This is a diagram showing a printed circuit board according to the fourth embodiment.

[0205] Reference Figure 13 The printed circuit board 100C includes an insulating layer 110, through-hole portions 120c, 130c, 140c, 150c, 160c and circuit pattern 135.

[0206] The insulating layer 110 includes a first insulating layer 111, a second insulating layer 112, a third insulating layer 113, a fourth insulating layer 114, and a fifth insulating layer 115.

[0207] The through-hole portions 120c, 130c, 140c, 150c and 160c include: a first through-hole portion 120c disposed in the first insulating layer 111; a second through-hole portion 130c disposed in the second insulating layer 112; a third through-hole portion 140c disposed in the third insulating layer 113; a fourth through-hole portion 150c disposed in the fourth insulating layer 114; and a fifth through-hole portion 160c disposed in the fifth insulating layer 115.

[0208] Here, in the printed circuit board 100C of the fourth embodiment, the configuration other than the through-hole portions 120c, 130c, 140c, 150c, and 160c is the same as... Figure 2 The printed circuit board 100 according to the first embodiment is the same, therefore, only the through-hole portions 120c, 130c, 140c, 150c and 160c will be described below.

[0209] The first through-hole portion 120c includes a first through-hole portion 121 disposed in the first insulating layer 111 and first pads 122c and 123c disposed on the upper and lower surfaces of the first insulating layer 111.

[0210] The first pads 122c and 123c include a first-1 pad 122c disposed on the upper surface of the first insulating layer 111 and in contact with the upper surface of the first through-hole portion 121. The width of the first-1 pad 122c may be smaller than the width of the upper surface of the first through-hole portion 121.

[0211] Preferably, the width of the first-1 pad 122c can be smaller than the width of the lower surface of the second through-hole portion 131c of the second through-hole portion 130c. That is, the width of the first-1 pad 122c can have a fourth width W4 that is smaller than the first width W1 and the second width W2.

[0212] Therefore, in the first or second embodiment, the upper surface of the first through-hole portion 121 only contacts the lower surface of the first-1 pad 122. However, in the fourth embodiment, the upper surface of the first through-hole portion 121 includes a first region that contacts the lower surface of the second insulating layer 112, a second region that contacts the lower surface of the first-1 pad 122c, and a third region that contacts the lower surface of the second through-hole portion 131c.

[0213] Additionally, the first pads 122c and 123c include a first-second pad 123c disposed on the lower surface of the first insulating layer 111 and in contact with the lower surface of the first through-hole portion 121. The width of the first-second pad 123c may be smaller than the width of the lower surface of the first through-hole portion 121. That is, the first-second pad 123c may have a fourth width W4.

[0214] Furthermore, the second through-hole portion 130c may include a second through-hole portion 131c and a second pad 132c disposed on the upper surface of the second through-hole portion 131c. In this case, the second pad 132c may have a fourth width W4 smaller than the upper and lower surfaces of the second through-hole portion 131c and the lower surface of the fourth through-hole portion 151c. Therefore, the upper surface of the second through-hole portion 131c includes a first region contacting the lower surface of the fourth insulating layer 114, a second region contacting the lower surface of the second pad 132c, and a third region contacting the lower surface of the fourth through-hole portion 151c.

[0215] Furthermore, the third through-hole portion 140c may include a third through-hole portion 141c and a third pad 142c disposed below the lower surface of the third through-hole portion 141c. In this case, the third pad 142c may have a fourth width W4, which is smaller than the same width as the lower and upper surfaces of the third through-hole portion 141c. Therefore, the lower surface of the third through-hole portion 141c includes a first region contacting the fifth insulating layer 115, a second region contacting the third pad 142c, and a third region contacting the fifth through-hole portion 161c.

[0216] In addition, the fourth through-hole portion 150c may include a fourth through-hole portion 151c and a second pad 152 disposed on the upper surface of the fourth through-hole portion 151c.

[0217] The fifth through-hole portion 160d may include a fifth through-hole portion 161c and a fifth pad 162 disposed below the lower surface of the fifth through-hole portion 161c.

[0218] As described above, the widths of the first pads 122c and 123c, the second pad 132c and the third pad 142c can be adjusted to a fourth width W4 that is smaller than the first width W1 and the second width W2. Therefore, it can have a structure surrounded by through-holes provided on its upper or lower side.

[0219] Figure 14 This is a diagram showing a printed circuit board according to the fifth embodiment.

[0220] Reference Figure 14 The printed circuit board 100D includes an insulating layer 110, through-hole portions 120c, 130c, 140c, 150d and 160d, and a circuit pattern 135.

[0221] The insulating layer 110 includes a first insulating layer 111, a second insulating layer 112, a third insulating layer 113, a fourth insulating layer 114, and a fifth insulating layer 115.

[0222] The through-hole portions 120c, 130c, 140c, 150d and 160d include a first through-hole portion 120c disposed in the first insulating layer 111, a second through-hole portion 130c disposed in the second insulating layer 112, a third through-hole portion 140c disposed in the third insulating layer 113, a fourth through-hole portion 150d disposed in the fourth insulating layer 114 and a fifth through-hole portion 160d disposed in the fifth insulating layer 115.

[0223] Here, in the printed circuit board 100D of the fifth embodiment, the configuration other than the through-hole portions 120c, 130c, 140c, 150c, and 160c is the same as... Figure 13 The printed circuit board 100 according to the fourth embodiment is the same, therefore, only the fourth through-hole portion 150d and the fifth through-hole portion 160d will be described below.

[0224] The fourth through-hole portion 150d may include a fourth through-hole portion 151c and a fourth pad 152d disposed on the upper surface of the fourth through-hole portion 151c.

[0225] The fifth through-hole portion 160d may include a fifth through-hole portion 161c and a fifth pad 162d disposed below the lower surface of the fifth through-hole portion 161c.

[0226] In this case, the fourth pad 152 and the fifth pad 162 in the fourth embodiment have a first width W1. Alternatively, the fourth pad 152d and the fifth pad 162d according to the fifth embodiment may have a fourth width W4 that is smaller than the first width W1 and the second width W2.

[0227] Figure 15 This is a diagram showing a printed circuit board according to the sixth embodiment.

[0228] Reference Figure 15 The printed circuit board 100E includes an insulating layer 110, through-hole portions 120e, 130e, 140e, 150c, 160c and circuit pattern 135.

[0229] The insulating layer 110 includes a first insulating layer 111, a second insulating layer 112, a third insulating layer 113, a fourth insulating layer 114, and a fifth insulating layer 115.

[0230] The through-hole portions 120e, 130e, 140e, 150e, and 160c include a first through-hole portion 120e disposed in the first insulating layer 111, a second through-hole portion 130e disposed in the second insulating layer 112, a third through-hole portion 140e disposed in the third insulating layer 113, a fourth through-hole portion 150c disposed in the fourth insulating layer 114, and a fifth through-hole portion 160c disposed in the fifth insulating layer 115.

[0231] Here, in the printed circuit board 100E of the sixth embodiment, the configuration other than the through-hole portions 120e, 130e, and 140e is the same as... Figure 13 The printed circuit board 100 according to the fourth embodiment has the same configuration, therefore, only the through holes 120e, 130e and 140e will be described below.

[0232] The first through-hole portion 120e includes a first through-hole portion 121 disposed in the first insulating layer 111 and first pads 122e and 123e disposed on the upper and lower surfaces of the first insulating layer 111.

[0233] In this case, the centers of the first through-hole and the first pad in the previous embodiment are aligned on the same vertical line.

[0234] Alternatively, the dummy vertical line passing through the center of the first via 121 can be parallel to the dummy vertical lines passing through the centers of the first pads 122e and 123e. For example, the dummy vertical line passing through the center of the first via 121 can be horizontally spaced from the dummy vertical lines passing through the centers of the first pads 122e and 123e. For example, the dummy vertical line passing through the center of the first via 121 and the dummy vertical lines passing through the centers of the first pads 122e and 123e can be offset from each other.

[0235] Furthermore, the second through-hole portion 130e may include a second through-hole portion 131c and a second pad 132e disposed on the upper surface of the second through-hole portion 131c. In this case, similar to the first through-hole portion 120e, the centers of the second pad 132e and the second through-hole portion 131c may be offset from each other.

[0236] Furthermore, the third through-hole portion 140e may include a third through-hole portion 141c and a third pad 142e disposed below the lower surface of the third through-hole portion 141c. In this case, similar to the first through-hole portion 120e and the second through-hole portion 130e, the centers of the third pad 142e and the third through-hole portion 141c may be offset from each other.

[0237] In this configuration, the centers of the through-hole portions 121, 131c, and 141c of each of the first through-hole portion 120e, the second through-hole portion 130e, and the third through-hole portion 140e can be aligned on the same vertical line. Furthermore, the centers of the pads 122e, 123e, 132e, and 142e of each of the first through-hole portion 120e, the second through-hole portion 130e, and the third through-hole portion 140e can be aligned on the same vertical line. However, the center of each of the through-hole portions 121, 131c, and 141c can be offset from the center of each of the pads 122e, 123e, 132e, and 142e.

[0238] Meanwhile, the lower surface of the second through-hole portion 131c overlaps with the upper surface of the first-1 pad 122e by at least 20% in the vertical direction. In this case, when the overlap area between the lower surface of the second through-hole portion 131c and the upper surface of the first-1 pad 122e is less than 20%, the connection reliability between the first through-hole portion and the second through-hole portion may be reduced.

[0239] Figure 16 This is a diagram showing a printed circuit board according to the seventh embodiment.

[0240] Reference Figure 16 The printed circuit board 100F includes an insulating layer 110, through-hole portions 120f, 130f, 140f, 150f and 160f, and a circuit pattern 135.

[0241] As described above, the through-hole portions 120f, 130f, 140f, 150f and 160f each include a through-hole portion and a pad.

[0242] In this case, the center of the through-hole portion and the pad that make up each through-hole portion can be aligned on the same vertical line.

[0243] However, the centers of adjacent through holes may be offset.

[0244] For example, the centers of the first through-hole portion 121 and the first pads 122 and 123 constituting the first through-hole portion 120f can be aligned on the same first vertical line CL1.

[0245] Furthermore, the centers of the second through-hole portion 131 and the second pad 132 constituting the second through-hole portion 130f can be aligned on the same second vertical line CL2.

[0246] However, the first vertical line CL1 and the second vertical line CL2 can be separated from each other by a predetermined interval in the horizontal direction.

[0247] According to an embodiment, each through-hole portion interconnected in a printed circuit board with a multilayer structure includes a through-hole portion passing through an insulating layer and a pad disposed on one surface of the through-hole portion. In this case, in the printed circuit board according to the embodiment, the width of the pad is not greater than the width of one surface of the through-hole portion. In other words, the width of the pad of each through-hole portion included in the printed circuit board can be equal to or less than the width of one surface of the through-hole portion.

[0248] Accordingly, the printed circuit board of the embodiment can increase the spacing between multiple via portions, thus making it easy to realize fine circuit patterns and thereby increasing circuit density.

[0249] In addition, this embodiment can improve the design freedom of the entire printed circuit board by changing the design of the through-hole portion, thus ensuring the realization of fine patterns and the reliability of the substrate.

[0250] In one embodiment, the centers of via portions directly connected to each other in the vertical direction can be arranged aligned on the same vertical line, or alternatively, they can be arranged in a zigzag pattern offset from each other. Here, the aligned portion or the zigzag portion can be the via portion of each via portion, or alternatively, it can be the pad of each via portion, or alternatively, it can be both the via portion and the pad of each via portion. Accordingly, the shape or position of the via portions can be freely changed according to the design of the desired circuit pattern in the printed circuit board including the via portions, thus increasing design freedom.

[0251] The features, structures, effects, etc., described in the above embodiments are included in at least one embodiment, and are not necessarily limited to one embodiment. Furthermore, those skilled in the art can combine or modify the features, structures, and effects shown in the embodiments with other embodiments. Therefore, anything relating to such combinations and variations should be interpreted as being included within the scope of this invention.

[0252] The foregoing has primarily described the present invention, but this is merely illustrative and does not limit the invention. Those skilled in the art will understand that various modifications and applications, not shown above, can be made without departing from the essential characteristics of the invention. For example, the various components specifically shown in the embodiments can be implemented through modifications. Furthermore, differences related to these modifications and applications should be interpreted as being included within the scope of the embodiments set forth in the appended claims.

Claims

1. A printed circuit board, comprising: First insulating layer; A second insulating layer is disposed on the first insulating layer; The first through-hole portion is disposed in the first insulating layer; A second through-hole portion, the second through-hole portion being disposed in the second insulating layer; and The pads are disposed between the first through-hole portion and the second through-hole portion, and The first through-hole portion has a sloping surface whose width in the horizontal direction narrows from the upper surface of the first through-hole portion toward the lower surface of the first through-hole portion, and The pad is formed by a first portion that overlaps with the lower surface of the first through-hole in the vertical direction and a second portion that overlaps with the inclined surface of the first through-hole in the vertical direction. Wherein, the side surface and top surface of the first portion of the pad are covered by the second through-hole portion, and The side and top surfaces of the second portion of the pad are covered by the second insulating layer.

2. The printed circuit board according to claim 1, wherein, The pads partially overlap the lower surface of the first through-hole portion in the vertical direction and completely overlap the upper surface of the first through-hole portion in the vertical direction.

3. The printed circuit board according to claim 1, wherein, The second through-hole portion has a sloping surface whose width in the horizontal direction narrows from the upper surface of the second through-hole portion toward the lower surface of the second through-hole portion, and The pads partially overlap the lower surface of the second through-hole portion in the vertical direction and completely overlap the upper surface of the second through-hole portion in the vertical direction.

4. The printed circuit board according to claim 2, wherein, The side surface of the second part does not overlap with the lower surface of the first through hole in the vertical direction.

5. The printed circuit board according to claim 4, wherein, The side surface of the first portion does not overlap with the inclined surface of the first through hole in the vertical direction.

6. The printed circuit board according to claim 4, wherein, The side surface of the second portion overlaps with the inclined surface of the second through-hole portion in the vertical direction.

7. The printed circuit board according to claim 1, wherein, The upper surface of the first through hole includes a first upper surface that contacts the second insulating layer, a second upper surface that contacts the second through hole, and a third upper surface that contacts the pad.

8. The printed circuit board according to claim 7, wherein, The lower surface of the pad is in contact with the first through hole portion, and The upper surface of the pad is in partial contact with the second through hole.

9. The printed circuit board according to claim 1, wherein, The width of the pad is smaller than the width of the upper surface of the first through hole, the width of the lower surface of the first through hole, the width of the upper surface of the second through hole, and the width of the lower surface of the second through hole, respectively.

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