A packaged device and a packaging method

By setting up an electromagnetic shielding structure with metal pillars and metal layers around the chip, and grounding it with a redistribution layer and a metal ball, the problem of poor electromagnetic shielding effect of packaged devices is solved, achieving better electromagnetic shielding and heat dissipation performance, while simplifying the process flow.

CN115101511BActive Publication Date: 2026-05-29NINGBO CHIPEX SEMICON

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
NINGBO CHIPEX SEMICON
Filing Date
2022-05-30
Publication Date
2026-05-29

AI Technical Summary

Technical Problem

Existing packaged devices have poor electromagnetic shielding performance, the metal shielding layer is complex to manufacture and easily damaged, and the small grounding area can easily lead to shielding failure.

Method used

Multiple metal pillars are used to surround the chip, and the metal layers are connected to the metal pillars to form an electromagnetic shielding structure. The chip is grounded through a redistribution layer and a metal ball, which simplifies the process flow, avoids grinding on the first side of the chip, and increases the grounding area.

Benefits of technology

It improves electromagnetic shielding and heat dissipation performance, avoids shielding failure due to poor grounding, simplifies the process flow, and facilitates wafer-level packaging.

✦ Generated by Eureka AI based on patent content.

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    Figure CN115101511B_ABST
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Abstract

The application provides a packaging device and a packaging method. The packaging device comprises a redistribution layer, a chip, a metal column and a metal layer. The first side of the chip is provided with an electrical connection end, and the electrical connection end is arranged on the redistribution layer. The first side of the metal column is arranged on the redistribution layer, and a plurality of metal columns are arranged outside the chip. The first side of the metal column is flush with the electrical connection end of the chip, and the second side of the metal column is flush with the second side of the chip. The metal layer is connected with the second side of the metal column and the second side of the chip. The metal ball is connected with the redistribution layer. In the application, the metal column is arranged outside the chip, and the metal layer and the metal column can form an electromagnetic shielding structure of the packaging device. The side shielding can be realized by the plurality of copper columns, which not only has the electromagnetic shielding function, but also can achieve good heat dissipation. The redistribution layer can be connected to the metal ball to be grounded, so that the grounding area is large, and the problem of shielding layer failure caused by poor grounding is improved.
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Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and more specifically to a packaging device and packaging method. Background Technology

[0002] With the development of technology, chips are becoming increasingly integrated and have more and more functions. Electromagnetic interference between chips can affect the user experience. Therefore, electromagnetic shielding has become a basic requirement for products.

[0003] Existing metal shielding layers are manufactured using sputtering processes, which are complex and difficult to produce. The surface shielding layer is easily damaged, leading to discontinuous conductivity and failure of the shielding function. The grounding area is small, which can easily result in poor contact and failure of the shielding function. Summary of the Invention

[0004] This application proposes a packaging device and packaging method, which can at least solve the technical problem of poor electromagnetic shielding effect of packaging devices in the prior art.

[0005] According to one aspect of this application, a packaging device is provided, comprising:

[0006] Rerouting layer;

[0007] A chip, wherein an electrical connection terminal is provided on a first side of the chip, and the electrical connection terminal is disposed on the redistribution layer;

[0008] Multiple metal pillars, with a first side of each metal pillar disposed on the redistribution layer, the multiple metal pillars surrounding the chip, the first side of each metal pillar being flush with the electrical connection terminal of the chip, and the second side of each metal pillar being flush with the second side of the chip;

[0009] A metal layer, wherein the metal layer is connected to the second side of the metal pillar and the second side of the chip, respectively;

[0010] A metal ball, which is connected to the redistribution layer.

[0011] In one possible implementation, a dielectric layer and a metallization layer are further included. The dielectric layer is disposed on the side of the redistribution layer away from the chip, and the metallization layer is disposed on the dielectric layer. The metallization layer is connected to the metal ball and the redistribution layer, respectively.

[0012] In one possible implementation, the dielectric layer has an opening, and the metallization layer fills the opening.

[0013] In one possible implementation, a molding compound is further included, which is disposed between the metal layer and the redistribution layer. The chip and the metal pillar are both disposed within the molding compound. The electrical connection terminal of the chip and the first side of the metal pillar are flush with the first side of the molding compound, and the second side of the chip and the second side of the metal pillar are flush with the second side of the molding compound.

[0014] In one possible implementation, a backsheet layer is also included, which is disposed in the metal layer on the side away from the chip.

[0015] According to another aspect of this application, a packaging method is provided for fabricating a packaged device as shown above, the method comprising:

[0016] Obtain the carrier board and chip;

[0017] Multiple metal pillars are provided on the first side of the carrier plate;

[0018] The electrical connection terminal on the first side of the chip is disposed on the first side of the carrier board, so that the plurality of metal pillars surround the chip, and the electrical connection terminal of the chip is flush with the first side of the metal pillars;

[0019] The metal pillar is ground so that the second side of the chip is flush with the second side of the ground metal pillar;

[0020] Remove the carrier plate;

[0021] A redistribution layer is provided, the redistribution layer connecting the first side of the metal pillar and the electrical connection terminal of the chip;

[0022] A metal ball is provided, and the metal ball is connected to the redistribution layer;

[0023] A metal layer is provided, which is connected to the second side of the metal pillar and the second side of the chip.

[0024] In one possible implementation, prior to setting the metal sphere, the method further includes:

[0025] A dielectric layer is disposed on the side of the redistribution layer away from the chip;

[0026] A metallization layer is disposed in the dielectric layer, and the metallization layer is connected to the redistribution layer;

[0027] The setting of the metal ball includes: connecting the metal ball to the metallization layer.

[0028] In one possible implementation, the dielectric layer has an opening, and the metallization layer fills the opening.

[0029] In one possible implementation, prior to grinding the metal column, the method further includes:

[0030] A molding compound is disposed on the carrier board, such that the chip and the metal pillar are disposed within the molding compound, and the electrical connection terminal of the chip and the first side of the metal pillar are flush with the first side of the molding compound;

[0031] The grinding process of the metal pillar includes grinding the molding compound and the metal pillar, wherein the second side of the chip and the second side of the ground metal pillar are flush with the second side of the ground molding compound.

[0032] In one possible implementation, the method further includes: providing a backsheet layer on the side of the metal layer away from the chip.

[0033] In this application, metal pillars surround the chip, and the metal layer and metal pillars can form an electromagnetic shielding structure for the packaged device. Side shielding can be achieved using multiple copper pillars, providing not only electromagnetic shielding but also excellent heat dissipation. Both the electromagnetic shielding structure and the chip's electrical connection terminals can be grounded via a redistribution layer connected to the metal spheres, resulting in a large grounding area. This prevents poor contact from affecting the shielding function and effectively improves the problem of shielding layer failure due to poor grounding. The electrical connection terminal on the first side of the chip is flush with the first side of the metal pillars, eliminating the need for grinding the first side of the chip during fabrication. This avoids damage to the electrical connection terminal on the first side and facilitates subsequent wafer-level packaging. Attached Figure Description

[0034] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0035] Figure 1 This is a schematic diagram of the structure after metal pillars are provided on a carrier plate in an encapsulation method according to an exemplary embodiment;

[0036] Figure 2 This is a top view schematic diagram illustrating a packaging method according to an exemplary embodiment, after metal pillars are provided on a carrier plate;

[0037] Figure 3 This is a schematic diagram illustrating the structure after a chip is mounted on a carrier board in a packaging method according to an exemplary embodiment;

[0038] Figure 4 This is a schematic diagram illustrating the structure of a packaging method according to an exemplary embodiment after a molding compound is disposed on a carrier plate;

[0039] Figure 5 This is a schematic diagram of the structure of the encapsulator and the metal pillar after grinding in an encapsulation method according to an exemplary embodiment;

[0040] Figure 6 This is a schematic diagram of the structure after a back film layer is provided in an encapsulation method according to an exemplary embodiment;

[0041] Figure 7 This is a schematic diagram illustrating the structure of a packaging device according to an exemplary embodiment;

[0042] Figure 8 This is a top view schematic diagram illustrating a chip, metal pillar, redistribution layer, and metal ball in a packaged device according to an exemplary embodiment;

[0043] Figure 9 This is a flowchart illustrating an encapsulation method according to an exemplary embodiment. Detailed Implementation

[0044] Various exemplary embodiments, features, and aspects of this application will now be described in detail with reference to the accompanying drawings. The same reference numerals in the drawings denote elements that have the same or similar functions. Although various aspects of the embodiments are shown in the drawings, they are not necessarily drawn to scale unless specifically indicated otherwise.

[0045] The term “exemplary” as used herein means “serving as an example, embodiment, or illustration.” Any embodiment illustrated herein as “exemplary” is not necessarily to be construed as superior to or better than other embodiments.

[0046] Furthermore, to better illustrate this application, numerous specific details are provided in the following detailed embodiments. Those skilled in the art should understand that this application can be implemented without certain specific details. In some instances, methods, means, components, and circuits well-known to those skilled in the art have not been described in detail in order to highlight the main points of this application.

[0047] This application proposes a packaging device and packaging method, which can at least solve the technical problem of poor electromagnetic shielding effect of packaging devices in the prior art. This application is specifically implemented with the following technical solution.

[0048] Combination Figures 6 to 8 As shown in the embodiments of this specification, a packaging device may include:

[0049] Rerouting layer 5;

[0050] Chip 3, the first side of chip 3 is provided with an electrical connection terminal 31, the electrical connection terminal 31 is provided on the redistribution layer 5;

[0051] Multiple metal pillars 2, with the first side of the metal pillars 2 disposed on the redistribution layer 5, the multiple metal pillars 2 surrounding the chip 3, the first side of the metal pillars 2 being flush with the electrical connection terminal 31 of the chip 3, and the second side of the metal pillars 2 being flush with the second side of the chip 3.

[0052] Metal layer 9 is connected to the second side of metal pillar 2 and the second side of chip 3, respectively;

[0053] Metal ball 8 is connected to redistribution layer 5.

[0054] In this embodiment, the metal layer 9 can be located above the chip 3, and the metal pillars 2 can be located to the side of the chip 3. The metal pillars 2 can be columnar in shape and surround the chip 3. The metal layer 9 and the metal pillars 2 can form an electromagnetic shielding structure for the packaged device. In one example, the metal pillars 2 can be copper pillars, and multiple metal pillars 2 can be evenly distributed around the periphery of the chip 3. In this embodiment, side shielding can be achieved using multiple copper pillars, which not only provide electromagnetic shielding but also achieve good heat dissipation.

[0055] In this embodiment, the re-distributed layer 5 (RDL) is connected to the first side of the metal pillar 2 and the electrical connection terminal 31 of the chip 3, respectively. The re-distributed layer 5 can also be connected to the metal ball 8. Therefore, both the electromagnetic shielding structure and the electrical connection terminal 31 of the chip 3 can be grounded by connecting to the metal ball 8 through the re-distributed layer 5, resulting in a large grounding area. This prevents poor contact from affecting the shielding function and effectively improves the problem of shielding layer failure due to poor grounding. In one example, the chip 3 has a passivation layer 32. The electrical connection terminal 31 of the chip 3 can be connected to the passivation layer 32, and the re-distributed layer 5 can be connected to the passivation layer 32. The re-distributed layer 5 can be connected to the electrical connection terminal 31 through the passivation layer 32.

[0056] In this embodiment of the specification, the first side of the chip 3 may be provided with an electrical connection terminal 31 and components. The electrical connection terminal 31 on the first side of the chip 3 is flush with the first side of the metal pillar 2. During the manufacturing process, it is not necessary to grind the first side of the chip 3, which can avoid damage to the electrical connection terminal 31 and components on the first side of the chip 3, and facilitate subsequent wafer-level packaging.

[0057] In the embodiments of this specification, the second side of the metal pillar 2 can be obtained by grinding. The second side of the ground metal pillar 2 can be flush with the second side of the chip 3. The grinding process is simple, and the second side of the metal pillar 2 can be made flush with the second side of the chip 3 by grinding in sequence.

[0058] In the embodiments of this specification, the metal pillar 2 can be formed by electroplating. The process is simple and does not require grooving during the manufacturing process, which facilitates full-surface encapsulation.

[0059] In one possible implementation, a dielectric layer 6 and a metallization layer 7 are also included. The dielectric layer 6 is disposed on the side of the redistribution layer 5 away from the chip 3, and the metallization layer 7 is disposed on the dielectric layer 6. The metallization layer 7 is connected to the metal ball 8 and the redistribution layer 5, respectively.

[0060] In the embodiments of this specification, the dielectric layer 6 can play a buffering and protective role, with protective and stress buffering functions, which can greatly improve the reliability of the product structure, protect the surface of the chip 3 from stress damage, and make the surface of the chip 3 flatter, which is conducive to improving the uniformity and adhesion of subsequent electroplating processes.

[0061] In this embodiment, the metal ball 8 is located on the side of the dielectric layer 6 away from the chip 3. The metal ball 8 can be a solder ball. The metallization layer 7, also known as the under-bump metallization (UBM) layer, is connected to both the metal ball 8 and the redistribution layer 5. The metallization layer 7 improves the bonding strength of the metal ball 8, increasing reliability. The redistribution layer 5 can be electrically connected to the metal ball 8 through the metallization layer 7, thus establishing an electrical connection path between the metal layer 9, the metal pillar 2, the redistribution layer 5, the metallization layer 7, and the metal ball 8, ensuring electromagnetic shielding and grounding effects.

[0062] In one possible implementation, the dielectric layer 6 has an opening 61, and the metallization layer 7 fills the opening 61.

[0063] In the embodiments described in this specification, the dielectric layer 6 can be fabricated using photolithography, and an opening 61 can be pre-reserved on the dielectric layer 6. A metallization layer 7 is then filled into the opening 61, followed by a ball-planting process to obtain metal balls 8. The metal balls 8 can connect to the metallization layer 7 in the opening 61, improving connection reliability. The metallization layer 7 is connected to the redistribution layer 5. Therefore, the metal balls 8, the metallization layer 7, and the redistribution layer 5 are electrically connected.

[0064] In one possible implementation, a molding compound 4 is also included, which is disposed between the metal layer 9 and the redistribution layer 5. The chip 3 and the metal pillar 2 are both disposed within the molding compound 4. The electrical connection terminal 31 of the chip 3 and the first side of the metal pillar 2 are flush with the first side of the molding compound 4, and the second side of the chip 3 and the second side of the metal pillar 2 are flush with the second side of the molding compound 4.

[0065] In the embodiments described in this specification, the molding compound 4 serves to protect the chip 3 and the metal pillar 2, and also prevents the chip 3 and the metal pillar 2 from shifting, thereby improving the reliability of the packaged device. During the fabrication of the molding compound 4, the electrical connection terminal 31 of the chip 3 and the first side of the metal pillar 2 are flush with the first side of the molding compound 4. The second side of the molding compound 4 can be ground, and the second side of the metal pillar 2 can also be ground simultaneously. After grinding, the second side of the molding compound 4 and the second side of the metal pillar 2 can be flush with the second side of the chip 3. During the grinding process of the molding compound 4, it can be ground to be flush with the second side of the chip 3 in a single pass, simplifying the process.

[0066] The manufacturing process of the packaged device in the embodiments of this specification is simple. Grinding the plastic encapsulation 4 and metal pillar 2 on the second side of the chip 3 can reduce damage to the electrical connection terminal 31 and components on the first side of the chip 3. The desired position can be achieved in one grinding. It has good reliability. The second side of the chip 3 is protected by a back film, and the side of the chip 3 is protected by the plastic encapsulation 4, so that the chip 3 is protected on all sides.

[0067] In one possible implementation, a back film layer 91 is also included, which is disposed in the metal layer 9 on the side away from the chip 3.

[0068] In the embodiments of this specification, after obtaining the molding compound 4, a metal layer 9 can be formed on the second side of the molding compound 4. The metal layer 9 can be obtained based on sputtering, spraying, electroplating, or printing processes. A back film layer 91 can be attached to the side of the metal layer 9 away from the chip 3. The thickness of the back film layer 91 can be 10µm to 40µm, and the back film layer 91 can protect the second side of the chip 3. In one example, identification information can be set on the back film layer 91 based on laser printing. The identification information can be text, patterns, or symbols, etc. Using laser printing on the back film layer 91 can avoid the generation of black marks and improve the identification effect.

[0069] Furthermore, in conjunction with Figure 9, this specification also provides a packaging method for fabricating the packaged device shown above. The method may include:

[0070] Step S1: Obtain carrier board 1 and chip 3.

[0071] In the embodiments described in this specification, the carrier board 1 and the chip 3 can be pre-prepared.

[0072] Step S2: Set multiple metal pillars 2 on the first side of the carrier plate 1.

[0073] Combination Figure 1 and Figure 2As shown in the embodiments of this specification, metal pillars 2 can be grown on a substrate using an electroplating process. The metal pillars 2 can be copper pillars. In one example, multiple metal pillars 2 can be evenly distributed around the periphery of the chip 3. In this embodiment, side shielding can be achieved using multiple copper pillars, providing not only electromagnetic shielding but also excellent heat dissipation. In this embodiment, the metal pillars 2 can be formed using an electroplating process, which is simple and eliminates the need for slotting during fabrication, facilitating full-surface encapsulation.

[0074] Step S3: Place the electrical connection terminal 31 of the first side of the chip 3 on the first side of the carrier board 1, so that multiple metal pillars 2 surround the chip 3, and the electrical connection terminal 31 of the chip 3 is flush with the first side of the metal pillars 2.

[0075] Combination Figure 3 As shown in the embodiment of this specification, chip 3 is mounted on a carrier board. The first side of chip 3 can be mounted downwards, so that the electrical connection terminal 31 of chip 3 is flush with the first side of metal pillar 2. Subsequently, wafer-level packaging can be directly performed without grinding the first side of chip 3, thus avoiding damage to the electrical connection terminal 31 on the first side of chip 3.

[0076] Combination Figure 4 As shown, in one possible implementation, after step S3 and before step S4, the method further includes: setting a molding compound 4 on the carrier board 1, so that the chip 3 and the metal pillar 2 are disposed in the molding compound 4, and the electrical connection terminal 31 of the chip 3 and the first side of the metal pillar 2 are flush with the first side of the molding compound 4.

[0077] In this embodiment, the side of the carrier board 1 closest to the chip 3 is encapsulated using a molding process to form a molding compound 4. The chip 3 and the metal pillars 2 are both housed within the molding compound 4. The electrical connection terminal 31 of the chip 3 and the first side of the metal pillars 2 are flush with the first side of the molding compound 4. In this embodiment, the molding compound 4 protects the chip 3 and the metal pillars 2 and prevents them from shifting, thereby improving the reliability of the packaged device.

[0078] Step S4: Grind the metal pillar 2 so that the second side of the chip 3 is flush with the second side of the ground metal pillar 2.

[0079] Combination Figure 5 As shown in the embodiments of this specification, step S4 may include: grinding the molding compound 4 and the metal pillar 2, so that the second side of the chip 3, the second side of the ground metal pillar 2, and the second side of the ground molding compound 4 are flush.

[0080] In the embodiments described in this specification, the height of the molded package 4 formed by the molding process can be greater than the height of the metal pillar 2. That is, before the polishing process, the height of the molded package 4 can be greater than the height of the metal pillar 2, and the height of the metal pillar 2 can be greater than the height of the chip 3. During the polishing process, the molded package 4 and the metal pillar 2 can be polished to expose the second side of the chip 3, making the second side of the chip 3, the polished second side of the metal pillar 2, and the polished second side of the molded package 4 flush. The polishing thickness can be adjusted according to the characteristics of the product, typically ranging from 100 to 400 μm, and the desired thickness can be achieved in a single polishing operation.

[0081] Step S5: Remove carrier plate 1.

[0082] In the embodiments described in this specification, the relative position between the chip 3 and the metal pillar 2 is fixed by the encapsulation 4, so the relative position between the chip 3 and the metal pillar 2 will not change after the carrier board 1 is removed.

[0083] Step S6: Set up redistribution layer 5, which connects the first side of metal pillar 2 and the electrical connection terminal 31 of chip 3.

[0084] Combination Figures 6 to 8 As shown in the embodiments of this specification, a rewiring layer 5 can be formed on the first side of the chip 3 by a rewiring process. The rewiring layer 5 can conduct the electrical connection terminal 31 between the metal pillar 2 and the chip 3.

[0085] In one possible implementation, after step S6 and before step S7, the method further includes:

[0086] A dielectric layer 6 is disposed on the side of the redistribution layer 5 away from the chip 3;

[0087] A metallization layer 7 is disposed in the dielectric layer 6, and the metallization layer 7 is connected to the redistribution layer 5.

[0088] In the embodiments of this specification, a dielectric layer 6 can be formed on the redistribution layer 5 using a photolithography process. The dielectric layer 6 serves as a buffer and protector, providing both protection and stress buffering functions. This significantly improves the reliability of the product structure, protects the surface of the chip 3 from stress damage, and makes the surface of the chip 3 flatter, which is beneficial for improving the uniformity and adhesion of subsequent electroplating processes. In one example, the dielectric layer 6 can also have a dicing space, forming a dicing opening 62 in the dielectric layer 6, to facilitate subsequent dicing.

[0089] In the embodiments of this specification, the metallization layer 7 is also called the under-bump metallization layer 7. The metallization layer 7 is connected to the metal ball 8 and the redistribution layer 5 respectively. The metallization layer 7 can improve the bonding force of the metal ball 8 and increase reliability.

[0090] Step S7: Set metal ball 8, and connect metal ball 8 to redistribution layer 5.

[0091] Step S7 includes: attaching the metal ball 8 to the metallization layer 7.

[0092] In this embodiment, the redistribution layer 5 can connect the metal pillar 2 and the electrical connection terminal 31 of the chip 3, and the redistribution layer 5 can also connect with the metal ball 8, thereby achieving a grounding function. At least one metal pillar 2 and the redistribution layer 5 are fully connected, resulting in a large grounding area, which can effectively improve the problem of shielding layer failure caused by poor grounding. In this embodiment, the redistribution layer 5 is connected to the first side of the metal pillar 2 and the electrical connection terminal 31 of the chip 3, respectively. The redistribution layer 5 can also connect with the metal ball 8. Therefore, both the electromagnetic shielding structure and the electrical connection terminal 31 of the chip 3 can be grounded through the redistribution layer 5 connected to the metal ball 8, resulting in a large grounding area. This prevents poor contact from affecting the shielding function and effectively improves the problem of shielding layer failure caused by poor grounding.

[0093] In one possible implementation, the dielectric layer 6 is provided with an opening 61.

[0094] In the embodiments described in this specification, the dielectric layer 6 can be fabricated using photolithography, and an opening 61 can be pre-reserved on the dielectric layer 6. A metallization layer 7 is then filled into the opening 61, and the metallization layer 7 is connected to the redistribution layer 5. A ball-planting process is then performed to obtain metal balls 8, which are disposed in the opening 61. The metal balls 8 can be connected to the metallization layer 7 in the opening 61, improving connection reliability. The redistribution layer 5 can be electrically connected to the metal balls 8 through the metallization layer 7. Therefore, the metal balls 8, the metallization layer 7, and the redistribution layer 5 are electrically connected.

[0095] Step S8: Set metal layer 9, which is connected to the second side of metal pillar 2 and the second side of chip 3.

[0096] In the embodiments described in this specification, the metal layer 9 can be located above the chip 3, and the metal pillar 2 can be located to the side of the chip 3. The metal pillar 2 surrounds the chip 3, and the metal layer 9 and the metal pillar 2 can form an electromagnetic shielding structure for the packaged device. This establishes an electrical connection path between the metal layer 9, the metal pillar 2, the redistribution layer 5, the metallization layer 7, and the metal ball 8, ensuring electromagnetic shielding and grounding effects.

[0097] In one possible implementation, the method further includes: providing a back film layer 91 on the side of the metal layer 9 away from the chip 3.

[0098] In the embodiments of this specification, after obtaining the molding compound 4, a metal layer 9 can be formed on the second side of the molding compound 4. The metal layer 9 can be obtained based on sputtering, spraying, electroplating, or printing processes. A back film layer 91 can be attached to the side of the metal layer 9 away from the chip 3. The thickness of the back film layer 91 can be 10µm to 40µm, and the back film layer 91 can protect the second side of the chip 3. In one example, identification information can be set on the back film layer 91 based on laser printing. The identification information can be text, patterns, or symbols, etc. Using laser printing on the back film layer 91 can avoid the generation of black marks and improve the identification effect.

[0099] In one possible implementation, the method further includes cutting along the notch 62 of the dielectric layer 6 to obtain a single packaged device.

[0100] The various embodiments of this application have been described above. These descriptions are exemplary and not exhaustive, nor are they limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The terminology used herein is chosen to best explain the principles, practical applications, or technological improvements to the embodiments in the market, or to enable others skilled in the art to understand the embodiments disclosed herein.

Claims

1. A packaged device, characterized in that, include: Rerouting layer (5); Chip (3), the first side of the chip (3) is provided with an electrical connection terminal (31), the electrical connection terminal (31) is provided on the redistribution layer (5); Multiple metal pillars (2), the first side of the metal pillars (2) is disposed on the redistribution layer (5), the multiple metal pillars (2) surround the chip (3), the first side of the metal pillars (2) is flush with the electrical connection terminal (31) of the chip (3), and the second side of the metal pillars (2) is flush with the second side of the chip (3); A metal layer (9) is connected to the second side of the metal pillar (2) and the second side of the chip (3), respectively; A metal ball (8) is connected to the redistribution layer (5) and the metal ball (8) is used to ground the metal pillar (2) and the metal layer (9) through the redistribution layer (5).

2. The packaged device according to claim 1, characterized in that, It also includes a dielectric layer (6) and a metallization layer (7). The dielectric layer (6) is disposed in the redistribution layer (5) on the side away from the chip (3). The metallization layer (7) is disposed in the dielectric layer (6). The metallization layer (7) is connected to the metal ball (8) and the redistribution layer (5) respectively.

3. The packaging device according to claim 2, characterized in that, The dielectric layer (6) has an opening (61), and the metallization layer (7) fills the opening (61).

4. The packaged device according to claim 1, characterized in that, It also includes a molding compound (4), which is disposed between the metal layer (9) and the redistribution layer (5). The chip (3) and the metal pillar (2) are both disposed inside the molding compound (4). The electrical connection terminal (31) of the chip (3) and the first side of the metal pillar (2) are flush with the first side of the molding compound (4). The second side of the chip (3) and the second side of the metal pillar (2) are flush with the second side of the molding compound (4).

5. The packaged device according to claim 1, characterized in that, It also includes a back film layer (91), which is disposed in the metal layer (9) on the side away from the chip (3).

6. A packaging method, characterized in that, The method for manufacturing a packaged device as described in any one of claims 1 to 5 includes: Obtain the carrier board (1) and the chip (3); A plurality of metal pillars (2) are provided on the first side of the carrier plate (1); The electrical connection terminal (31) of the first side of the chip (3) is disposed on the first side of the carrier plate (1), so that the plurality of metal pillars (2) surround the chip (3), and the electrical connection terminal (31) of the chip (3) is flush with the first side of the metal pillars (2); The metal pillar (2) is ground so that the second side of the chip (3) is flush with the second side of the ground metal pillar (2); Remove the carrier plate (1); A redistribution layer (5) is provided, the redistribution layer (5) connecting the first side of the metal pillar (2) and the electrical connection terminal (31) of the chip (3); A metal ball (8) is provided, and the metal ball (8) is connected to the redistribution layer (5); A metal layer (9) is provided, which is connected to the second side of the metal pillar (2) and the second side of the chip (3); the metal ball (8) is used to ground the metal pillar (2) and the metal layer (9) through the redistribution layer (5).

7. The packaging method according to claim 6, characterized in that, Before setting the metal ball (8), the method further includes: A dielectric layer (6) is disposed on the side of the redistribution layer (5) away from the chip (3); A metallization layer (7) is provided in the dielectric layer (6) and the metallization layer (7) is connected to the redistribution layer (5); The setting of the metal ball (8) includes: connecting the metal ball (8) to the metallization layer (7).

8. The packaging method according to claim 7, characterized in that, The dielectric layer (6) has an opening (61), and the metallization layer (7) fills the opening (61).

9. The packaging method according to claim 6, characterized in that, Before grinding the metal column (2), the method further includes: A molding compound (4) is provided on the carrier board (1) so that the chip (3) and the metal pillar (2) are disposed inside the molding compound (4), and the electrical connection terminal (31) of the chip (3) and the first side of the metal pillar (2) are flush with the first side of the molding compound (4); The grinding process of the metal pillar (2) includes grinding the encapsulation body (4) and the metal pillar (2), wherein the second side of the chip (3), the second side of the ground metal pillar (2), and the second side of the ground encapsulation body (4) are flush.

10. The packaging method according to claim 6, characterized in that, The method further includes: providing a back film layer (91) on the side of the metal layer (9) away from the chip (3).