Display substrate and manufacturing method thereof, and display device

Abstract

The present application provides a display substrate, a display device, and a method for manufacturing a display substrate. The display substrate includes a display area and a non-display area located around the display area, and the display area includes a fan-out area; the display substrate includes a data line arranged in the display area and a fan-out line arranged in the fan-out area; the fan-out line is electrically connected to the data line, and the fan-out line and the data line are located in different layers. The display device shown includes the display substrate. The preparation method shown includes forming a data line in the display area; forming a fan-out line in a layer different from the data line, and the fan-out line is located in the fan-out area; and electrically connecting the fan-out line to the data line.

Description

Technical Field

[0001] The present application relates to but is not limited to the field of display technology, and in particular to a display substrate and a preparation method thereof, and a display device. Background Art

[0002] Organic Light-Emitting Diode (OLED), also known as organic electroluminescence display or organic light-emitting semiconductor (OLED), refers to a device that emits light through carrier injection and recombination of organic semiconductor materials and luminescent materials under the drive of an electric field.

[0003] With the rapid development of the OLED display industry, a large number of new display devices have gradually entered the market. In order to obtain a higher screen-to-body ratio and provide consumers with a good visual experience, how to further narrow the border is a trend in display devices. Summary of the invention

[0004] In view of this, the purpose of the present application is to provide a display substrate and a preparation method thereof, and a display device, which can reduce the size of the lower frame of the display substrate to a certain extent.

[0005] In a first aspect of the present application, a display substrate is provided, comprising:

[0006] A display area and a non-display area located around the display area, the display area includes a fan-out area; the display substrate includes a data line arranged in the display area and a fan-out line arranged in the fan-out area; the fan-out line is electrically connected to the data line, and the fan-out line and the data line are located in different layers.

[0007] In a second aspect of the present application, a display device is provided, comprising the display substrate as described in the first aspect.

[0008] In a third aspect of the present application, a method for preparing a display substrate is provided, wherein the display substrate comprises a display area and a non-display area located around the display area, the display area comprises a fan-out area, and the preparation method comprises:

[0009] forming a data wiring in the display area;

[0010] Forming a fan-out wiring on a layer different from the data wiring, and the fan-out wiring is located in the fan-out area;

[0011] The fan-out wiring is electrically connected to the data wiring.

[0012] It can be seen from the above that a display substrate and a preparation method thereof, and a display device provided by the present application can reduce the width of the non-display area by setting the fan-out area in the display area, thereby achieving a narrow frame effect. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] In order to more clearly illustrate the technical solutions in the present application or related technologies, the drawings required for use in the embodiments or related technical descriptions are briefly introduced below. Obviously, the drawings described below are only embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0014] Figure 1A A schematic diagram of an exemplary display substrate 100 is shown.

[0015] Figure 1B Shows Figure 1A Schematic diagram of the cross-sectional laminate structure of the middle bending region 1022.

[0016] Figure 1C Shows Figure 1A A schematic diagram of a partial cross-sectional laminate structure of the display module after the middle bending area 1022 is bent.

[0017] Figure 2A A schematic diagram of an exemplary display substrate 200 provided in the present application is shown.

[0018] Figure 2B A schematic diagram of a cross-sectional stacked structure of an exemplary display substrate 200 provided in the present application is shown.

[0019] Figure 2C Shows Figure 2A A schematic diagram of a partial cross-sectional laminate structure of the display module after the middle bending area 200C is bent.

[0020] Figure 2D Shows Figure 2A A schematic diagram of a partial cross-sectional laminate structure of the display module after the middle bending area 200C is bent.

[0021] Figure 3A A schematic diagram of a pattern design that can be realized for the metal trace 218 located in the bending region 200C is shown.

[0022] Figure 3B A schematic diagram of a pattern design that can be realized for the metal trace 218 located in the bending region 200C is shown.

[0023] Figure 3C A schematic diagram of a pattern design that can be realized for the metal trace 218 located in the bending region 200C is shown.

[0024] Figure 3D A schematic diagram of a pattern design that can be realized for the metal trace 218 located in the bending region 200C is shown.

[0025] Figure 4 A schematic diagram of a bending morphology simulation of a bending zone 200C provided in an embodiment of the present application.

[0026] Figure 5 A schematic diagram of a display device provided in an embodiment of the present application.

[0027] Figure 6 A schematic diagram of a method for preparing a display substrate provided in an embodiment of the present application. DETAILED DESCRIPTION

[0028] In order to make the objectives, technical solutions and advantages of the present application more clearly understood, the present application is further described in detail below in combination with specific embodiments and with reference to the accompanying drawings.

[0029] It should be noted that, unless otherwise defined, the technical terms or scientific terms used in the embodiments of the present application should be the usual meanings understood by people with ordinary skills in the field to which the present application belongs. The "first", "second" and similar words used in the embodiments of the present application do not represent any order, quantity or importance, but are only used to distinguish different components. "Including" or "comprising" and similar words mean that the elements or objects appearing in front of the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Connect" or "connected" and similar words are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0030] Figure 1A A schematic diagram of an exemplary display substrate 100 is shown.

[0031] like Figure 1AAs shown, the display substrate 100 may be an OLED display substrate, and may include a display area 101 and a non-display area 102 located around the display area 101. Before the bending area 1022 is bent, the non-display area 102 may further include a fan-out area (Fanout) 1021, a bending area (Bending Area) 1022, an anti-static area (ESD) 1023, a detection area (CT) 1024, and a binding area (COF PAD) 1025. The display area 101 may also be provided with a plurality of data wirings 1011 for providing data signals for pixels, and the non-display area 102 may also be provided with a first signal line VDD, a second signal line VSS, a reset signal line Vinit1 / Vinit2, and a gate drive circuit N_Gate GOA / Gate P&EM GOA.

[0032] like Figure 1A As shown, in the related art, the fan-out area 1021 of the display substrate 100 is located in the non-display area 102, and the signal can be transmitted to the bending area 1022 through the metal wiring. However, as the resolution of the display substrate increases, the number of metal wirings gradually increases, resulting in the required width of the fan-out area will also continue to increase, which will become the biggest bottleneck for reducing the size of the lower frame of the display substrate.

[0033] Figure 1B Shows Figure 1A Schematic diagram of the cross-sectional laminate structure of the middle bending region 1022.

[0034] like Figure 1B As shown, the bending region 1022 may include a substrate 10221, a polyimide (PI) layer 10222 disposed on the substrate 10221, a buffer layer (Buffer) 10223 disposed on the polyimide layer 10222, first and second gate insulating layers (GI) 10224 disposed on the buffer layer 10223, a first interlayer insulating layer (ILD) 10225 disposed on the first and second gate insulating layers 10224, a planarization layer (PLN) 10226 disposed on the first interlayer insulating layer 10225, a pixel definition layer (PDL) 10227 disposed on the planarization layer 10226, and a micro coating layer (Micro Coating Layer, MCL for short) coating layer 10228 disposed on the pixel definition layer 10227. The planarization layer 10226 is provided with metal traces 10229 of the fan-out region. Figure 1B It can be seen that the metal trace 10229 is formed above the polyimide layer 10222 which acts as a substrate.

[0035] Figure 1C Shows Figure 1A A schematic diagram of a partial cross-sectional laminate structure of the display module after the middle bending area 1022 is bent.

[0036] like Figure 1C As shown, the display module may include a display substrate 100, and the display substrate 100 may further include a display area (AA area) 101, a light-emitting layer (EL) 103, and an encapsulation layer (TFE) 104. Other hierarchical structures may be further arranged on the display substrate 100, for example, a touch structure (FMLOC) 105, a polarizer (POL) 106, a curable optical adhesive (T-OCA) 107, and a cover glass (CG) 108 arranged on one side of the light-emitting direction, a back protection film (BF) 109, a heat dissipation film (SCF) 110, and a bending spacer (Bending Spacer) 111 arranged on one side of the backlight direction. An MCL coating layer 112 may also be applied to the portion corresponding to the bending area.

[0037] Combination Figure 1B and Figure 1C It can be seen that in the related art, there are almost no other inorganic film layers in the bending area 1022, and only the metal trace 10229 is located above the polyimide film layer 10222. The thickness and material properties determine that the metal trace 10229 cannot be located in the neutral layer position of the film layer in the bending area 1022, resulting in great difficulty in further reducing the bending. Therefore, it is necessary to coat a certain thickness (for example, 90μm) of MCL glue 112 above the pixel definition layer 10227 to adjust the neutral layer of the film layer so that the metal trace 10229 is located in the neutral layer position as much as possible. The morphology of the bending area 1022 after bending is as follows Figure 1C As shown, a semicircular shape is formed. However, the addition of MCL glue 112 makes the film layer in the bending area thicker, making it difficult to achieve bending with a smaller bending radius and bending with different shapes. A possible minimum bending radius is only 0.2 mm.

[0038] In view of this, the embodiment of the present application proposes a display substrate, which reduces the frame by setting the fan-out area in the display area. In some embodiments, by setting the metal traces in the bending area between the two substrate layers, so that they are basically in the neutral layer position of the film layer, the MCL coating layer is no longer applied, and the bending radius of the bending area can be reduced, thereby further reducing the frame.

[0039] Figure 2A A schematic diagram of an exemplary display substrate 200 provided in the present application is shown.

[0040] like Figure 2AAs shown, the display substrate 200 can be divided into a display area 200A and a non-display area 200B located around the display area 200A. The display area 200A can be provided with a plurality of data leads 217 for providing data signals to the pixels, and the non-display area 200B can be provided with signal lines VDD, VSS, Vinit1 / Vinit2, and a gate drive circuit N_GateGOA / Gate P&EM GOA. Figure 2A As described above, the non-display area 200B may further include a bending area 200C. In addition, in some embodiments, the display substrate 200 may further include an anti-static area 200D, a detection area 200E, and a binding area 200F.

[0041] In order to reduce the bottom border, in some embodiments, such as Figure 2A As shown, the fan-out area 200G can be set in the display area 200A, so that the fan-out area 200G no longer occupies the layout space of the non-display area 200B, thereby achieving the effect of a narrow frame. Among them, the fan-out area 200G can include a fan-out line, which can be electrically connected to the data line 217 in a one-to-one correspondence, so that the fan-out area can be used to lead the data line 217 to the external circuit through the fan-out line.

[0042] In order to arrange the fan-out area 200G in the display area 200A and ensure that the fan-out wiring does not affect the wiring of other wirings in the display area 200A, the fan-out wiring and the data wiring 217 may be arranged in different layers.

[0043] Figure 2B A schematic diagram of a cross-sectional stacked structure of an exemplary display substrate 200 provided in the present application is shown.

[0044] like Figure 2B As shown, the display substrate 200 can be divided into a display area 200A, a non-display area 200B located around the display area 200A, and a bending area 200C disposed in the non-display area 200B.

[0045] like Figure 2BAs shown, the display substrate 200 may be a multi-layer structure, and may further include a base 201 (e.g., glass), a first substrate 202 (e.g., polyimide PI), a first insulating layer (Barrier) 203, a second substrate 204 (e.g., polyimide PI), a second insulating layer 205, a buffer layer 206, a first gate insulating layer 207, a second gate insulating layer 208, an interlayer insulating layer 209, an inorganic insulating layer (PVX) 210, a first planarization layer 211, a second planarization layer 212, a pixel definition layer 213, and a spacer (PS) 214 disposed on the pixel definition layer 213. In addition, the pixel definition layer 213 where the user divides the pixels may further include an anode layer (Anode) 215.

[0046] As an optional embodiment, Figure 2B As shown, the fan-out wiring 216 can be arranged on the second insulating layer 205, and the fan-out wiring 216 is separated from the upper device structure by the insulating layer structure such as the buffer layer 206, the first gate insulating layer 207, the second gate insulating layer 208, the interlayer insulating layer 209 and the inorganic insulating layer 210, so as to achieve electrical insulation, so that the fan-out wiring 216 does not affect the layout of other device structures and wiring. Optionally, as Figure 2B As shown, the data wiring 217 may be disposed on an interlayer insulating layer 209 that is located at a different layer from the fan-out wiring, and the fan-out wiring 216 may be electrically connected to the data wiring 217 through a via.

[0047] In this way, by setting the fan-out line 216 on the side close to the substrate and electrically connecting it to the data line 217 through a via, the fan-out line 216 can be formed in the display area 200A, so that the fan-out area is set in the display area 200A, achieving a narrow frame effect.

[0048] like Figure 2B As shown, in some embodiments, the display substrate 200 may further include a metal trace 218 disposed in the bending region 200C, and the metal trace 218 is electrically connected to the fan-out trace 216 in the non-display region 200B. Figure 2B As shown, the metal wiring 218 and the fan-out wiring 216 are electrically connected through vias in the non-display area 200B, thereby avoiding the problem of opening a hole in the display area 200A causing water vapor to corrode the light-emitting material layer along the metal in the hole, resulting in display failure.

[0049] In some embodiments, Figure 2BAs shown, the interlayer insulating layer 209, the second gate insulating layer 208, the first gate insulating layer 207, and the buffer layer 206 can be opened in the display area 200A to achieve the overlap of the data line 217 and the fan-out line 216, and then the data voltage (Vdata) signal is transmitted from the data line 217 to the fan-out line 216. The fan-out line 216 is wound in the fan-out area, and after the winding is completed, a polyimide layer hole (PI Hole) is opened in the non-display area 200B, and the wiring process of the metal line 218 is performed between the double-layer substrate of the non-display area 200B and the bending area 200C. The fan-out line 216 is overlapped with the metal line 218 through the PI Hole to achieve signal transmission. The signal lines VDD, VSS, and Vinit can also achieve signal transmission from the data line 217 to the fan-out line 216 to the metal line 218 through the PI Hole in the non-display area 200B. Therefore, this embodiment realizes the design that the fan-out area is located in the display area 200A. Figure 2B The PI Hole is opened in the non-display area 200B to avoid the problem that water vapor corrodes along the metal in the hole to the light-emitting material layer at the PI Hole of the display area 200A, causing display failure.

[0050] In some embodiments, Figure 2B As shown, the metal trace 218 of the bending area 200C can be arranged between the first substrate 202 and the second substrate 204. Under this structure, the film layer structure of the bending area 200C only includes two layers of substrate and the metal trace 218. The thickness of the substrate above and below the metal trace 218 is basically equal, for example, both are 5 to 8 μm. In this way, the metal trace 218 located in the bending area 200C can be in the neutral layer position, and has a smaller strain stress when bending, which can effectively protect the metal of the metal trace 218 and prevent it from breaking due to bending. The above-mentioned film layer structure does not need to apply MCL glue to adjust the neutral layer, which saves this process step and equipment, and is conducive to reducing product costs.

[0051] Figure 2C Shows Figure 2A A schematic diagram of a partial cross-sectional laminate structure of the display module after the middle bending area 200C is bent.

[0052] like Figure 2C As shown, the display module may include a display substrate 200, and the display substrate 200 may further include a display area 200A, a light-emitting layer 219, and an encapsulation layer 220. Other hierarchical structures may be further arranged on the display substrate 200, for example, a touch structure 221, a polarizer 222, a curable optical adhesive 223, and a cover glass 224 arranged on the light-emitting direction side, and a back protection film 225, a heat dissipation film 226, and a bending area spacer 227 arranged on the backlight direction side.

[0053] Since the metal trace 218 is disposed between the two substrate layers, it can be located at the neutral layer of the film layer, and thus can withstand greater stress. Therefore, in some embodiments, the two substrate layers and the metal trace 218 can be bent with a very small bending radius, or even vertically. Figure 2C and Figure 2D As shown, the two layers of the bent substrate and the metal trace 218 are partially enlarged. In some embodiments, the first substrate 202 may further include a barrier layer to prevent water vapor from corroding the light-emitting material layer in the display substrate, causing display failure.

[0054] Combination Figure 2C and Figure 2D It can be seen that the film structure including only two layers of substrate and metal trace 218 is relatively thin. For example, the thickness of the two layers of substrate is 5-8 μm, and the thickness of the metal trace 218 is about Therefore, under the condition that the material properties of the metal trace 218, such as metal ductility and tensile strength, allow, a smaller bending radius or bending of different shapes can be performed. Figure 2C and Figure 2D The morphology and structure of Figure 1C Compared with the conventional display, the frame size can be reduced by 0.2 to 0.3 mm.

[0055] FIG. 3A to FIG. 3D Schematic diagrams of achievable pattern designs of the metal trace 218 located in the bending region 200C are respectively shown.

[0056] In order to achieve bending according to a predetermined track shape, the metal trace 218 located in the bending area 200C may be patterned. Figure 2C As shown, the two layers of substrate and metal trace 218 after bending may include a vertical folding area and a non-vertical folding area. The vertical folding area may further include a first portion a, a third portion c, a first end d and a second end f, and the non-vertical folding area may include a second portion b and a middle portion e. To achieve vertical folding, a shaped area with a width of 100 μm may be designed in the vertical folding area.

[0057] In some embodiments, in order to ensure the ability of the bending area to withstand stress, the elastic modulus of the first part a and the third part c can be set to be smaller than the elastic modulus of the second part b, thereby further reducing the bending radius.

[0058] In some embodiments, Figure 3A As shown, in order to make the elastic modulus of the first part a and the third part c smaller than the elastic modulus of the second part b, the first part a and the third part c can be designed to be narrowed so that the width of the first part a and the third part c is smaller than the width of the second part b.

[0059] As an optional embodiment, Figure 3B As shown, the width of the middle portion e can be designed to be smaller than the widths of the first end portion d and the second end portion f.

[0060] As an optional embodiment, Figure 3C and 3D As shown, in order to make the elastic modulus of the first part a and the third part c smaller than the elastic modulus of the second part b, the first part a and the third part c can be designed as a hollow structure, for example, Figure 3C Grid routing design and Figure 3D Hole-shaped wiring design.

[0061] like Figure 3C As shown, as an optional embodiment, the hollow structure of the mesh design can be an opening in the first part a and the third part c, and a cross grid is formed in the opening, and the angle between the grid lines can be, for example, 90°.

[0062] like Figure 3D As shown, as an optional embodiment, the hole-shaped hollow structure can be a plurality of side-by-side openings. Figure 3D As shown, the opening may be in the shape of an elongated strip with a semicircular end, so that the edge area of ​​the metal trace is formed smoother to prevent static electricity and discharge. Figure 3D As shown, openings can also be provided on both side edges of the metal trace, thereby further reducing the elastic modulus. The shape of the opening, for example, can be partially identical to the shape of the opening, thereby the opening and the opening can be formed using the same opening mold, saving manufacturing costs.

[0063] The pattern design in the above embodiment can significantly reduce the elastic modulus of the metal trace 218, so when bending, the metal trace 218 in this area is bent first, and then better bends along the predetermined trajectory. In the non-vertical folding area, the metal trace 218 adopts a non-pattern design, which is different from the elastic modulus of the trace in the vertical folding area.

[0064] Figure 4 A schematic diagram of a bending morphology simulation of a bending zone 200C provided in an embodiment of the present application.

[0065] like Figure 4 As shown, the film structure of the metal trace 218 between the double-layer substrates in the bending area 200C has a maximum strain at the bending start point when the bending radius is 0.05 mm. The strain of the metal trace 218 is 9.7%, the strain of the first substrate 202 is 15.9%, and the strain of the second substrate 204 is 17.2%. The strain threshold of the metal trace is 12%, and the strain threshold of the polyimide is 21%. Therefore, the film structure and the bending morphology structure of the bending area 200C are within the safety threshold.

[0066] The embodiment of the present application also provides a display device. Figure 5 A schematic diagram of a display device provided in an embodiment of the present application.

[0067] like Figure 5 As shown, this embodiment provides a display device 901, including a display substrate 9011. The display substrate 9011 is any embodiment of the display substrate or an arrangement or combination of the embodiments. The display device is a product with an image display function, such as a display, a television, a billboard, a digital photo frame, a laser printer with a display function, a telephone, a mobile phone, a personal digital assistant (PDA), a digital camera, a portable camcorder, a viewfinder, a navigator, a vehicle, a large-area wall, a home appliance, an information query device (such as business query equipment and monitors of departments such as e-government, banks, hospitals, and electricity, etc.).

[0068] The embodiment of the present application also provides a method for preparing a display substrate. Figure 6 A schematic diagram of a method for preparing a display substrate provided in an embodiment of the present application.

[0069] This embodiment provides a method for preparing a display substrate, wherein the display substrate includes a display area and a non-display area located around the display area, wherein the display area includes a fan-out area. Figure 6 As shown, the method for preparing the display substrate includes:

[0070] S602: forming data wiring in the display area;

[0071] S604: forming a fan-out line on a layer different from the data line, and the fan-out line is located in a fan-out area;

[0072] S606: electrically connecting the fan-out wiring to the data wiring.

[0073] In some embodiments, the display substrate further includes a bending area arranged in the non-display area, and the preparation method further includes: forming a metal routing in the bending area; wherein the metal routing and the fan-out routing are electrically connected via holes in the non-display area.

[0074] In some embodiments, the display substrate further includes a first substrate and a second substrate which are stacked, and the preparation method further includes: forming a metal trace between the first substrate and the second substrate.

[0075] In some embodiments, along the extension direction of the bending zone, the metal routing includes a first portion, a second portion, and a third portion, and the preparation method further includes: forming a hollow structure in the first portion and the third portion.

[0076] In some embodiments, the metal trace includes a first end and a second end and a middle portion arranged between the first end and the second end. The preparation method also includes: forming the metal trace using a composition process so that the width of the middle portion is smaller than the width of the first end and the second end.

[0077] The method of the above embodiment is used to prepare the corresponding display substrate in any of the above embodiments, and has the beneficial effects of the corresponding display substrate embodiment, which will not be described in detail here.

[0078] Those skilled in the art should understand that the discussion of any of the above embodiments is merely illustrative and is not intended to imply that the scope of the present application (including the claims) is limited to these examples. In line with the concept of the present application, the technical features in the above embodiments or different embodiments may be combined, the steps may be implemented in any order, and there are many other variations of the different aspects of the embodiments of the present application as described above, which are not provided in detail for the sake of simplicity.

[0079] In addition, to simplify the description and discussion, and in order not to make the embodiments of the present application difficult to understand, the known power supply / ground connection with the integrated circuit (IC) chip and other components may or may not be shown in the provided drawings. In addition, the device can be shown in the form of a block diagram to avoid making the embodiments of the present application difficult to understand, and this also takes into account the fact that the details of the implementation of these block diagram devices are highly dependent on the platform to be implemented in the embodiments of the present application (that is, these details should be fully within the scope of understanding of those skilled in the art). In the case of elaborating specific details (e.g., circuits) to describe exemplary embodiments of the present application, it is obvious to those skilled in the art that the embodiments of the present application can be implemented without these specific details or when these specific details are changed. Therefore, these descriptions should be considered to be illustrative rather than restrictive.

[0080] Although the present application has been described in conjunction with specific embodiments of the present application, many replacements, modifications and variations of these embodiments will be apparent to those skilled in the art from the foregoing description. For example, other memory architectures (e.g., dynamic RAM (DRAM)) may use the embodiments discussed.

[0081] The embodiments of the present application are intended to cover all such substitutions, modifications and variations that fall within the broad scope of the appended claims. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the embodiments of the present application should be included in the scope of protection of the present application.

Claims

1. A display substrate, comprising a display area and a non-display area located around the display area, wherein the display area includes a fan-out area; the display substrate comprises a data line arranged in the display area and a fan-out line arranged in the fan-out area; the fan-out line is electrically connected to the data line, and the fan-out line and the data line are located in different layers; The display substrate further includes a bending area arranged in the non-display area; the display substrate further includes a metal wiring arranged in the bending area; the metal wiring is electrically connected to the fan-out wiring in the non-display area.

2. The display substrate according to claim 1, wherein: The metal wiring is electrically connected to the fan-out wiring in the non-display area through a via.

3. The display substrate according to claim 1, wherein: The display substrate further includes a first substrate and a second substrate which are stacked; the metal wiring is arranged between the first substrate and the second substrate.

4. The display substrate according to claim 3, wherein: Along the extension direction of the bending area, the metal wiring includes a first part, a second part and a third part; the elastic modulus of the first part and the third part is smaller than the elastic modulus of the second part.

5. The display substrate according to claim 4, wherein: The width of the first part and the third part is smaller than the width of the second part; or, the first part and the third part are provided with a hollow structure.

6. The display substrate according to claim 5, wherein: The hollow structure is in a mesh or hole shape.

7. The display substrate according to claim 3, wherein: The metal trace includes a first end, a second end, and a middle portion disposed between the first end and the second end; a width of the middle portion is smaller than a width of the first end and the second end.

8. A display device, comprising the display substrate according to any one of claims 1 to 7.

9. A method for preparing a display substrate, wherein: The display substrate comprises a display area and a non-display area located around the display area, the display area comprises a fan-out area, and the preparation method comprises: forming a data wiring in the display area; Forming a fan-out wiring on a layer different from the data wiring, and the fan-out wiring is located in the fan-out area; Electrically connecting the fan-out wiring to the data wiring; The display substrate further includes a bending area arranged in the non-display area, and the preparation method further includes: forming a metal trace in the bending region; The metal wiring and the fan-out wiring are electrically connected via holes in the non-display area.

10. The preparation method according to claim 9, wherein The display substrate further includes a first substrate and a second substrate which are stacked, and the preparation method further includes: The metal trace is formed between the first substrate and the second substrate.

11. The preparation method according to claim 10, wherein: Along the extension direction of the bending area, the metal wiring includes a first part, a second part and a third part, and the preparation method further includes: A hollow structure is formed in the first part and the third part; the hollow structure is in a mesh or hole shape.

12. The preparation method according to claim 10, wherein: The metal trace includes a first end portion, a second end portion, and an intermediate portion disposed between the first end portion and the second end portion, and the preparation method further includes: The metal trace is formed by a patterning process so that the width of the middle portion is smaller than the widths of the first end portion and the second end portion.

Images