An automatic control system for audio output amplitude and method thereof

By combining DSP chips, FPGA chips, voice compression circuits, and audio power amplifier circuits, automatic control of audio output amplitude is achieved, solving the problem of uncontrollable audio output in extreme environments and improving the audio quality of shortwave communication.

CN115103269BActive Publication Date: 2025-11-28SHAANXI FENGHUO ELECTRONICS
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Patent Information

Application Number
CN202210561632.X
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-05-23
Publication Date
2025-11-28
Estimated Expiration
2042-05-23

AI Technical Summary

Technical Problem

The audio output amplitude of the current shortwave communication system is uncontrollable in extreme environments, resulting in voice distortion and a decline in communication quality.

Method used

It employs a combination of DSP chip, FPGA chip, voice compression circuit and audio power amplifier circuit, and achieves automatic control by demodulating, digital audio amplifying, detecting, calibrating phase and controlling audio output amplitude through PID algorithm.

Benefits of technology

Maintaining stable audio output amplitude in extreme environments reduces voice distortion and improves shortwave communication quality.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present application relates to the technical field of short wave frequency band communication equipment, in particular to an automatic control system of audio output amplitude and a method thereof. The present application is convenient to build and easy to realize; by audio sampling, the present audio output amplitude and the change trend are actively identified, and the amplifier inside the DSP chip is controlled to dynamically compensate the audio digital signal sent to the speech compression circuit, so that the audio output amplitude meets the index requirement, the small short wave audio output amplitude change is ensured in the extreme environment, the speech distortion degree is reduced, the speech quality of the short wave communication is improved, and the communication requirement in the extreme environment is met.
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Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of short wave frequency band (1.6MHz~30MHz) communication equipment, in particular to an automatic control system of audio output amplitude and a method thereof. BACKGROUND

[0002] With the continuous progress of science and technology, the rapid development of economy and trade, the space that human beings can access is more and more extensive, from the tropics to the frigid zone, from the plain to the plateau, from the ocean to the space, etc. This makes the environment encountered by short wave products in storage, transportation and use more and more severe, so the requirements for the indicators, functions and performance of short wave products in the environment are also continuously improved.

[0003] The audio receiving indicators of the active short wave communication system are discrete and uncontrollable in extreme environment. The audio output amplitude can be reduced to 11dBm (standard is 17~18dBm) at high temperature (70℃), and the audio output amplitude can be increased to 20dBm at low temperature (-55℃). Such a dramatic change in output amplitude will cause distortion of voice, and will also affect the indicators such as intermodulation and frequency response. The decrease of these indicators will greatly reduce the voice quality of short wave communication, which cannot meet the communication requirements. SUMMARY

[0004] In view of the problems in the prior art, the purpose of the present application is to provide an automatic control system of audio output amplitude and a method thereof.

[0005] In order to achieve the above purpose, the following technical scheme is adopted.

[0006] An automatic control system of audio output amplitude comprises a DSP chip, an FPGA chip, a voice compression circuit and an audio power amplifier circuit.

[0007] The DSP chip comprises a demodulation module, a digital audio amplification module, a detection module, a calibration adjustment module and a PID algorithm module.

[0008] The DSP chip, the FPGA chip, the voice compression circuit and the audio power amplifier circuit are connected in sequence.

[0009] The demodulation module of the DSP chip is used for demodulating the input original audio signal to obtain an audio digital signal; the digital audio amplification module of the DSP chip is used for amplifying the amplitude of the audio digital signal; the FPGA chip is used for routing the amplified audio digital signal to the voice compression circuit; the voice compression circuit is used for converting the audio digital signal to an audio analog signal; and the audio power amplifier circuit is used for converting the audio analog signal to audio and outputting.

[0010] The audio power amplifier circuit is further configured to sample the audio to obtain a sampled analog signal; the voice compression circuit is further configured to perform analog-digital conversion on the sampled analog signal to obtain a sampled digital signal; the FPGA chip is further configured to route the sampled digital signal to the DSP chip; the detection module of the DSP chip is configured to detect the sampled digital signal; the calibration and adjustment module of the DSP chip is configured to perform phase calibration and synchronous adjustment on the sampled digital signal and an audio digital signal corresponding to the sampled digital signal; and the PID algorithm module of the DSP chip is configured to compare the amplitudes of the sampled digital signal and the audio digital signal through a PID algorithm, and control the gain of the digital audio amplification module according to the PID algorithm result.

[0011] A control method of an automatic control system of an audio output amplitude, comprising the following steps:

[0012] Step 1: a demodulation module of a DSP chip demodulates an original audio signal to obtain an audio digital signal, and a digital audio amplification module of the DSP chip amplifies the amplitude of the audio digital signal; the DSP chip sends the amplified audio digital signal to an FPGA chip, the FPGA chip routes the amplified audio digital signal to a voice compression circuit, the voice compression circuit converts the audio digital signal into an audio analog signal, and an audio power amplifier circuit converts the audio analog signal into audio and outputs the audio;

[0013] Step 2: the audio power amplifier circuit samples the output audio to obtain a sampled analog signal, the voice compression circuit converts the sampled analog signal into a sampled digital signal and sends the sampled digital signal to the FPGA chip, and the FPGA chip routes the sampled digital signal to the DSP chip;

[0014] Step 3: a detection module of the DSP chip performs threshold detection on the sampled digital signal to determine whether the sampled digital signal is a valid signal; when the amplitude parameter of the sampled digital signal is greater than 10% of a set threshold, the sampled digital signal is a valid signal, otherwise it is noise; if it is not a valid signal, the next step is not performed; if it is a valid signal, step 4 is entered;

[0015] Step 4: the detection module of the DSP chip performs adaptive detection on the sampled digital signal to determine whether the audio output amplitude of the sampled digital signal is greater than a set amplitude; if it is greater than the set amplitude, the next step is not performed; if it is less than or equal to the set amplitude, step 5 is entered;

[0016] Step 5: a calibration and adjustment module of the DSP chip performs phase calibration and synchronous adjustment on the sampled digital signal and an audio digital signal corresponding to the sampled digital signal;

[0017] Step 6, the PID algorithm module of the DSP chip compares the amplitude difference of the sample digital signal and the audio digital signal after phase calibration and synchronization adjustment, and controls the gain of the original audio signal according to the PID algorithm result.

[0018] Compared with the prior art, the audio output amplitude automatic control system has the advantages that it is convenient to build and easy to implement; the amplitude of the current audio output and the change trend are actively identified through audio sampling, and the amplifier inside the DSP chip is controlled to dynamically compensate the audio digital signal sent to the voice compression circuit, so that the audio output amplitude meets the index requirement, the small short-wave audio output amplitude change is ensured in the extreme environment, the voice distortion degree is reduced, the voice quality of the short-wave communication is improved, and the communication requirement in the extreme environment is met. BRIEF DESCRIPTION OF DRAWINGS

[0019] The application will be described in further detail below with reference to the drawings and specific embodiments.

[0020] Figure 1 Fig. 1 is a structural schematic diagram of an audio output amplitude automatic control system according to the present application.

[0021] Figure 2 Fig. 2 is a principle block diagram of a control method of the audio output amplitude automatic control system according to the present application. DETAILED DESCRIPTION

[0022] The embodiments of the present application will be described in detail below with reference to the examples, but those skilled in the art will understand that the following examples are only used to illustrate the present application and should not be regarded as limiting the scope of the present application.

[0023] REFERENCE Figure 1 The audio output amplitude automatic control system comprises a DSP chip, an FPGA chip, a voice compression circuit and an audio power amplifier circuit.

[0024] The DSP chip comprises a demodulation module, a digital audio amplification module, a detection module, a calibration adjustment module and a PID algorithm module.

[0025] The DSP chip, the FPGA chip, the voice compression circuit and the audio power amplifier circuit are sequentially connected.

[0026] The FPGA chip and the DSP chip are connected through an EMIFA interface and an Mcbsp interface; the working clock of the DSP chip and the FPGA chip is 73.728MHz.

[0027] The demodulation module of the DSP chip is configured to demodulate the input original audio signal to obtain an audio digital signal; the digital audio amplification module of the DSP chip is configured to amplify the amplitude of the audio digital signal; the FPGA chip is configured to route the amplified audio digital signal to a voice compression circuit; the voice compression circuit is configured to convert the audio digital signal to an audio analog signal; and the audio power amplifier circuit is configured to convert the audio analog signal to audio and output the audio.

[0028] The audio power amplifier circuit is further configured to sample the audio to obtain a sampled analog signal; the voice compression circuit is further configured to convert the sampled analog signal to a sampled digital signal; the FPGA chip is further configured to route the sampled digital signal to the DSP chip; the detection module of the DSP chip is configured to detect the sampled digital signal; the calibration and adjustment module of the DSP chip is configured to calibrate the phase and adjust the synchronization of the sampled digital signal and the audio digital signal corresponding to the sampled digital signal; and the PID algorithm module of the DSP chip is configured to compare the amplitudes of the sampled digital signal and the audio digital signal by a PID algorithm, and control the gain of the digital audio amplification module according to the PID algorithm result.

[0029] Reference Figure 2 A control method of an automatic control system of an audio output amplitude, comprising the following steps:

[0030] Step 1: the demodulation module of the DSP chip demodulates the original audio signal to obtain an audio digital signal, and the digital audio amplification module of the DSP chip amplifies the amplitude of the audio digital signal; the DSP chip sends the amplified audio digital signal to the FPGA chip, the FPGA chip routes the amplified audio digital signal to the voice compression circuit, the voice compression circuit converts the audio digital signal to an audio analog signal, and the audio power amplifier circuit converts the audio analog signal to audio and outputs the audio.

[0031] Step 2: the audio power amplifier circuit samples the output audio to obtain a sampled analog signal, the voice compression circuit converts the sampled analog signal to a sampled digital signal and sends the sampled digital signal to the FPGA chip, and the FPGA chip routes the sampled digital signal to the DSP chip.

[0032] Step 3: the detection module of the DSP chip performs threshold detection on the sampled digital signal to determine whether the sampled digital signal is a valid signal, so as to avoid amplifying useless noise; when the amplitude parameter of the sampled digital signal is greater than 10% of the set threshold, the sampled digital signal is a valid signal, otherwise it is noise; if it is not a valid signal, the next step is not performed; if it is a valid signal, step 4 is entered.

[0033] Step 4, the detection module of the DSP chip performs adaptive detection on the sampled digital signal, judges whether the audio output amplitude of the sampled digital signal is greater than the set amplitude, and performs performance evaluation on the audio output amplitude at this time; if greater than the set amplitude, the next step is not performed; if less than or equal to the set amplitude, step 5 is entered;

[0034] Step 5, the calibration and adjustment module of the DSP chip performs phase calibration and synchronous adjustment on the sampled digital signal and the audio digital signal corresponding to the sampled digital signal, so as to avoid that the PID algorithm is too fast or too slow to cause abnormal change of the audio output amplitude;

[0035] Step 6, the PID algorithm module of the DSP chip compares the amplitudes of the sampled digital signal and the audio digital signal after the phase calibration and synchronous adjustment, and controls the gain of the digital audio amplification module on the original audio signal according to the PID algorithm result, so as to maintain the stability of the audio output amplitude.

[0036] Through actual test, after the audio loop automatic control method is adopted, the audio output amplitude is 18.7dBm at high temperature (70℃) and is 17.5dBm at low temperature (-55℃), the standard is 17-18dBm, the short wave audio output amplitude is controlled within 3dB range in extreme environment, and the distortion degree is less than 3%, which is greatly improved compared with the previous short wave communication radio station.

[0037] Although the present application has been described in detail in the specification and specific embodiments, some modifications or improvements can be made on the basis of the present application, which is obvious to those skilled in the art. Therefore, these modifications or improvements made on the basis of not deviating from the spirit of the present application are within the scope of the present application.

Claims

1. An automatic control system for the amplitude of an audio output, characterized in that, The audio amplifier circuit comprises a DSP chip, an FPGA chip, a voice compression circuit and an audio power amplifier circuit. The DSP chip comprises a demodulation module, a digital audio amplification module, a detection module, a calibration adjustment module and a PID algorithm module. The DSP chip, the FPGA chip, the voice compression circuit and the audio power amplifier circuit are sequentially connected. The demodulation module of the DSP chip is configured to demodulate an input original audio signal to obtain an audio digital signal; the digital audio amplification module of the DSP chip is configured to amplify the amplitude of the audio digital signal; the FPGA chip is configured to route the amplified audio digital signal to the voice compression circuit; the voice compression circuit is configured to convert the audio digital signal into an audio analog signal; and the audio power amplifier circuit is configured to convert the audio analog signal into audio and output the audio. The audio power amplifier circuit is further configured to sample the audio to obtain a sampled analog signal; the voice compression circuit is further configured to convert the sampled analog signal into a sampled digital signal; the FPGA chip is further configured to route the sampled digital signal to the DSP chip; the detection module of the DSP chip is configured to detect the sampled digital signal; the calibration adjustment module of the DSP chip is configured to calibrate the phase and adjust the synchronization of the sampled digital signal and the audio digital signal corresponding to the sampled digital signal; and the PID algorithm module of the DSP chip is configured to compare the amplitude difference of the sampled digital signal and the audio digital signal by a PID algorithm, and control the gain of the digital audio amplification module according to the PID algorithm result.

2. A control method of an automatic control system of an audio output amplitude based on the automatic control system of the audio output amplitude according to claim 1, characterized by, The method comprises the following steps: Step 1: The demodulation module of the DSP chip demodulates an original audio signal to obtain an audio digital signal, and the digital audio amplification module of the DSP chip amplifies the amplitude of the audio digital signal; the DSP chip sends the amplified audio digital signal to the FPGA chip, the FPGA chip routes the amplified audio digital signal to the voice compression circuit, the voice compression circuit converts the audio digital signal into an audio analog signal, and the audio power amplifier circuit converts the audio analog signal into audio and outputs the audio; Step 2: The audio power amplifier circuit samples the output audio to obtain a sampled analog signal, the voice compression circuit converts the sampled analog signal into a sampled digital signal and sends the sampled digital signal to the FPGA chip, and the FPGA chip routes the sampled digital signal to the DSP chip; Step 3: The detection module of the DSP chip performs threshold detection on the sampled digital signal to determine whether the sampled digital signal is a valid signal; when the amplitude parameter of the sampled digital signal is greater than 10% of the set threshold, the sampled digital signal is a valid signal; if it is not a valid signal, the next step is not performed; if it is a valid signal, step 4 is entered; Step 4: The detection module of the DSP chip performs adaptive detection on the sampled digital signal to determine whether the audio output amplitude of the sampled digital signal is greater than a set amplitude; if it is greater than the set amplitude, the next step is not performed; if it is less than or equal to the set amplitude, step 5 is entered; Step 5: The calibration adjustment module of the DSP chip calibrates the phase and adjusts the synchronization of the sampled digital signal and the audio digital signal corresponding to the sampled digital signal; and Step 6: The PID algorithm module of the DSP chip compares the amplitude difference of the sampled digital signal and the audio digital signal by a PID algorithm, and controls the gain of the digital audio amplification module according to the PID algorithm result. Step 6, the PID algorithm module of the DSP chip compares the amplitude difference of the sampling digital signal and the audio digital signal after phase calibration and synchronization adjustment, and controls the gain of the original audio signal according to the PID algorithm result.

Citation Information

Patent Citations

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