Semiconductor device and method for manufacturing the same

Abstract

Embodiments of the present invention relate to a semiconductor device and a method for manufacturing the same. According to one embodiment, the semiconductor device includes a first conductive portion, a semiconductor element, a first terminal, and a metal layer. The semiconductor element is disposed on the first conductive portion. The first terminal is away from the first conductive portion in a second direction perpendicular to a first direction from the first conductive portion toward the semiconductor element. The first terminal includes a first portion and a second portion disposed between the first portion and the first conductive portion. The lower surface of the second portion is located below the lower surface of the first portion and is located below the lower surface of the first insulating portion disposed between the first conductive portion and the second portion. The metal layer is disposed on the lower surface of the first portion and the lower surface of the second portion.

Description

[0001] This application claims the priority of Japanese Patent Application No. 2021-44298 (filing date: March 18, 2021) as a basic application. The present application incorporates all the contents of the basic application by reference. Technical Field

[0002] Embodiments of the present invention generally relate to semiconductor devices and methods of manufacturing the same. Background Art

[0003] There is a semiconductor device including a semiconductor element and a terminal. For this semiconductor device, it is required to improve reliability related to mounting. Summary of the invention

[0004] Embodiments of the present invention provide a semiconductor device capable of improving mounting reliability and a method for manufacturing the same.

[0005] According to one embodiment, a semiconductor device includes a first conductive portion, a semiconductor element, a first terminal, and a metal layer. The semiconductor element is disposed on the first conductive portion. The first terminal is away from the first conductive portion in a second direction, and the second direction is perpendicular to a first direction from the first conductive portion toward the semiconductor element. The first terminal includes a first portion, and a second portion disposed between the first portion and the first conductive portion. The lower surface of the second portion is located below the lower surface of the first portion, and is located below the lower surface of the first insulating portion disposed between the first conductive portion and the second portion. The metal layer is disposed on the lower surface of the first portion and the lower surface of the second portion. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] Figure 1 It is a plan view showing a semiconductor device according to an embodiment.

[0007] Figure 2 (a) and (b) are perspective views of a semiconductor device according to an embodiment.

[0008] Figure 3 (a) and (b) are cross-sectional views of a semiconductor device according to an embodiment.

[0009] Figure 4 (a) and (b) are cross-sectional views of a semiconductor device according to an embodiment.

[0010] Figure 5 It is a schematic diagram showing a method for manufacturing a semiconductor device according to an embodiment.

[0011] Figure 6 It is a schematic diagram showing a method for manufacturing a semiconductor device according to an embodiment.

[0012] Figure 7 It is a schematic diagram showing a method for manufacturing a semiconductor device according to an embodiment.

[0013] Figure 8 It is a schematic diagram showing a method for manufacturing a semiconductor device according to an embodiment.

[0014] Fig. 9 It is a schematic diagram showing a method for manufacturing a semiconductor device according to an embodiment.

[0015] Fig.10 It is a schematic diagram showing a method for manufacturing a semiconductor device according to an embodiment.

[0016] Fig.11 (a) and (b) are cross-sectional views showing a portion of the semiconductor device according to the reference example and the embodiment.

[0017] Fig.12 (a) and (b) are perspective views of semiconductor devices showing variations of the embodiments. DETAILED DESCRIPTION

[0018] Hereinafter, embodiments of the present invention will be described with reference to the drawings.

[0019] The accompanying drawings are schematic or conceptual drawings, and the relationship between the thickness and width of each part, the size ratio between the parts, etc. are not necessarily the same as in reality. Even when representing the same part, there are cases where the sizes and ratios of each other are represented differently depending on the drawings.

[0020] In this specification and each drawing, the same reference numerals are given to the same elements as those already described, and detailed description thereof will be appropriately omitted.

[0021] Figure 1 It is a plan view showing a semiconductor device according to an embodiment. Figure 2 (a) and Figure 2 (b) is a perspective view showing a semiconductor device according to an embodiment.

[0022] like Figure 1 , Figure 2 (a) and Figure 2 As shown in (b) of FIG. 1 , the semiconductor device 100 of the embodiment includes a semiconductor element 1, a first conductive portion 11, a connecting portion 11a, a second conductive portion 12, a terminal 20, and an insulating portion 30. Figure 1 In the drawings, the insulating portion 30 is indicated by a dotted line and is shown transparently. In addition, in each drawing, the connecting portion 11a is indicated by a two-dot chain line.

[0023] In the description of the embodiment, an XYZ orthogonal coordinate system is used. The direction from the first conductive portion 11 toward the semiconductor element 1 is set as the Z direction (first direction). Two directions perpendicular to the Z direction and orthogonal to each other are set as the X direction (second direction) and the Y direction (third direction). In addition, for the convenience of description, the direction from the first conductive portion 11 toward the semiconductor element 1 is called "up", and the opposite direction is called "down". These directions are based on the relative positional relationship between the first conductive portion 11 and the semiconductor element 1, and are not related to the direction of gravity.

[0024] The semiconductor element 1 is provided on the first conductive portion 11. Figure 1 In the example, the semiconductor element 1 is a Metal Oxide Semiconductor Field Effect Transistor (MOSFET). The semiconductor element 1 may also be an Insulated Gate Bipolar Transistor (IGBT) or a diode. The second conductive portion 12 is away from the first conductive portion 11 in the Y direction.

[0025] A plurality of terminals 20 are provided in the X direction and the Y direction. The plurality of terminals 20 are separated from each other. In addition, the plurality of terminals 20 are away from the first conductive portion 11 and the second conductive portion 12 in the X direction. The plurality of terminals 20 include a first terminal 20a, a second terminal 20b, and a third terminal 20c. In each of the drawings, the first terminal 20a, the second terminal 20b, and the third terminal 20c are indicated by double dotted lines.

[0026] The first conductive portion 11 is provided between the first terminals 20a in the X direction. A connecting portion 11a is provided between the first conductive portion 11 and the first terminal 20a. The first terminal 20a is electrically connected to the first conductive portion 11 via the connecting portion 11a.

[0027] The second conductive portion 12 is provided between the second terminal 20b and the third terminal 20c in the X direction. A connecting portion 12a is provided between the second conductive portion 12 and the second terminal 20b. The second terminal 20b is electrically connected to the second conductive portion 12 via the connecting portion 12a.

[0028] Figure 3 (a) Figure 3 (b) Figure 4 (a) and Figure 4 (b) is a cross-sectional view showing a semiconductor device according to an embodiment.

[0029] Specifically, Figure 3 (a) is Figure 1 III-III cross-sectional view. Figure 3 (b) is Figure 3 An enlarged view of a portion of (a). Figure 4 (a) is Figure 1 IV-IV cross-sectional view of . Figure 4 (b) is Figure 4 An enlarged view of a portion of (a).

[0030] like Figure 1 as well as Figure 3 As shown in (a), the semiconductor element 1 includes a drain electrode 1a, a source electrode 1b, a gate pad 1c, and a semiconductor layer 1d. The drain electrode 1a is provided on the lower surface of the semiconductor element 1. The source electrode 1b and the gate pad 1c are provided on the upper surface of the semiconductor element 1. The semiconductor layer 1d is provided between the drain electrode 1a and the source electrode 1b and between the drain electrode 1a and the gate pad 1c.

[0031] like Figure 3 As shown in (a), the drain electrode 1a is electrically connected to the first conductive portion 11 via the bonding layer 41. Figure 1 As shown, the source electrode 1b is electrically connected to the second conductive portion 12 via a bonding wire 42b. The gate pad 1c is electrically connected to the third terminal 20c via a bonding wire 42c.

[0032] The insulating portion 30 is provided around the semiconductor element 1 to seal the semiconductor element 1. The insulating portion 30 includes a plurality of first insulating portions 31. The plurality of first insulating portions 31 are provided between the first conductive portion 11 and the terminal 20 and between the second conductive portion 12 and other terminals 20 in the X direction.

[0033] Specifically, if Figure 3 As shown in (a), the thickness (length in the Z direction) of the connecting portion 11a is smaller than the thickness of each of the first conductive portion 11 and the first terminal 20a. The first insulating portion 31 is provided below the connecting portion 11a and between the first conductive portion 11 and the first terminal 20a.

[0034] like Figure 4 As shown in (a), the thickness of the connecting portion 12a is smaller than the thickness of each of the second conductive portion 12 and the second terminal 20b. Another first insulating portion 31 is provided below the connecting portion 12a and is located between the second conductive portion 12 and the second terminal 20b. Another first insulating portion 31 is located between the second conductive portion 12 and the third terminal 20c.

[0035] like Figure 3 (b) and Figure 4 As shown in (b) of FIG. 1 , the terminal 20 includes a first portion 21 and a second portion 22. In each of the drawings, the first portion 21 and the second portion 22 are indicated by two-dot chain lines.

[0036] The second portion 22 is provided at a position closer to the center side of the semiconductor device 100 than the first portion 21. When the semiconductor device 100 is viewed from the Y direction, the second portion 22 is located between the first conductive portion 11 and the first portion 21. More specifically, in the first terminal 20a, the second portion 22 is located between the first conductive portion 11 and the first portion 21 in the X direction. In the second terminal 20b and the third terminal 20c, the second portion 22 is provided between the second conductive portion 12 and the first portion 21 in the X direction.

[0037] The first portion 21 has a lower surface BS1. The second portion 22 has a lower surface BS2. The lower surface BS1 and the lower surface BS2 are connected in the X direction, and the lower surface BS2 is located closer to the semiconductor element 1 side (the center side of the semiconductor device 100 in the X direction) than the lower surface BS1. The first insulating portion 31 has a lower surface BS3. The lower surface BS1 extends along the Y direction. The lower surface BS2 and the lower surface BS3 are parallel to the XY plane.

[0038] The lower surface BS2 is located below the lower surface BS1 and the lower surface BS3. The lower surface BS3 is located below the lower surface BS1. The thickness of the second portion 22 is greater than the thickness of the first portion 21. The lower surface BS1 is curved in a convex manner toward the upper side. Therefore, the thickness of the first portion 21 decreases as it is further away from the first conductive portion 11. In addition, the thickness changes as it is further away from the first conductive portion 11.

[0039] The second portion 22 has a side surface SS1 (first side surface) and a side surface SS2 (second side surface). The side surface SS1 is located below the lower surface BS3 and intersects the X direction. The side surface SS1 is exposed from the insulating portion 30. The side surface SS2 is located above the side surface SS1 and contacts the first insulating portion 31. That is, the side surface SS1 and the side surface SS2 are connected in the Z direction, and the side surface SS2 is located closer to the semiconductor element 1 side (the center side of the semiconductor device 100 in the Z direction) than the side surface SS1.

[0040] The metal layer 25 is provided on the surface of the terminal 20. Specifically, the metal layer 25 is provided on the lower surface BS1, the lower surface BS2 and the side surface SS1. The metal layer 26 is provided on the surface of the first conductive part 11 and the surface of the second conductive part 12. Figure 2 (a) and Figure 2 In (b), the metal layers 25 and 26 are omitted.

[0041] like Figure 2As shown, the insulating portion 30 also includes a second insulating portion 32, which is provided between the terminals 20 adjacent to each other in the Y direction. The second insulating portion 32 has a lower surface BS4 adjacent to the lower surface BS1 in the Y direction. Like the lower surface BS1, the lower surface BS4 is curved in a convex manner toward the upper side. Therefore, the thickness of the second insulating portion 32 is smaller as it is farther away from the first conductive portion 11. In addition, the change in thickness is smaller as it is farther away from the first conductive portion 11.

[0042] An example of the material of each component of the semiconductor device 100 is described.

[0043] The drain electrode 1a, the source electrode 1b, and the gate pad 1c include metals such as aluminum. The semiconductor layer 1d includes silicon, silicon carbide, gallium nitride, or gallium arsenide as a semiconductor material. The first conductive portion 11, the second conductive portion 12, and the terminal 20 include metals such as copper or aluminum. The metal layers 25 and 26 include metals such as copper or silver. The insulating portion 30 includes an insulating resin such as polyimide. The bonding layer 41 includes metals such as copper, silver, or tin. The bonding wires 42b and 42c include metals such as aluminum.

[0044] A method for manufacturing the semiconductor device 100 according to the embodiment will be described.

[0045] Figures 5 to 10 It is a schematic diagram showing a method for manufacturing a semiconductor device according to an embodiment.

[0046] Prepare Figure 5 The lead frame 200 shown in FIG. 2 includes a first conductive portion 11, a connecting portion 11a, a second conductive portion 12, a connecting portion 12a, and a terminal portion 20t. A plurality of terminal portions 20t are provided in the X direction and the Y direction. The plurality of terminal portions 20t are respectively separated from the first conductive portion 11 and the second conductive portion 12 in the X direction. The terminal portion 20t is formed into a terminal 20 by processing.

[0047] like Figure 6 As shown, the semiconductor element 1 is bonded onto the first conductive portion 11 to electrically connect the drain electrode 1a of the semiconductor element 1 to the first conductive portion 11. The source electrode 1b and the gate pad 1c of the semiconductor element 1 are electrically connected to the plurality of terminal portions 20t by wire bonding.

[0048] Figure 7 (a) Figure 7 (b) and Figure 8 This is a perspective view of a portion of the lead frame 200 as viewed from below.

[0049] like Figure 7As shown in (a), the semiconductor element 1 is sealed by the insulating portion 30. Thus, a structure including the first conductive portion 11, the second conductive portion 12, the terminal portion 20t and the insulating portion 30 is obtained. The lower surfaces of the first conductive portion 11, the second conductive portion 12 and the terminal portion 20t are exposed from the insulating portion 30. The insulating portion 30 includes a first insulating portion 31 provided between the first conductive portion 11 and the second conductive portion 12, and a second insulating portion 32 provided between the terminal portions 20t adjacent to each other in the Y direction.

[0050] like Figure 7 As shown in (b) of FIG. 1 , the surface of the insulating portion 30 is retreated by wet etching. As a result, the lower surface of the lead frame 200 is located below the lower surface of the insulating portion 30 . A portion of the side surface of the lead frame 200 is exposed from the insulating portion 30 .

[0051] like Figure 8 As shown in FIG. 1 , a portion of the terminal portion 20t and a portion of the second insulating portion 32 are removed by cutting. By cutting, the thickness of a portion of the terminal portion 20t and the thickness of the second insulating portion 32 are reduced. Figure 3 As shown in (b), a terminal portion 20t including a first portion 21 and a second portion 22 is formed.

[0052] The cutting generates burrs B on the lower surface of the terminal portion 20 t. The cut lead frame 200 is immersed in an electrolyte. When the lead frame 200 is made of copper, the electrolyte contains sodium carbonate. The lead frame 200 is electrolytically etched.

[0053] Fig. 9 (a) is a perspective view of a portion of the lead frame 200 after electrolytic etching as viewed from below. Fig. 9 (b) is an XZ cross-sectional view passing through the first conductive portion 11 and the terminal portion 20t. Fig. 9 In (b), the dotted line indicates the position of the surface of the lead frame 200 before electrolytic etching.

[0054] like Fig. 9 (a) and Fig. 9 As shown in (b), the lead frame 200 is selectively etched relative to the insulating portion 30 by electrolytic etching. The burr B is removed by electrolytic etching. At this time, the surface of the lead frame 200 is retreated. As a result, the lower surface of the first portion 21 is located above the lower surface of the second insulating portion 32. However, the lower surface of the second portion 22 is still located below the lower surface of the first insulating portion 31.

[0055] By electroplating, a metal layer 25 is formed on the lower surface of each terminal portion 20t, and a metal layer 26 is formed on the lower surface of the first conductive portion 11 and the second conductive portion 12. Fig.10The lead frame 200 is cut at the position of the dotted line shown to obtain a plurality of semiconductor devices 100. As described above, the semiconductor device 100 of the embodiment is manufactured.

[0056] Advantages of the embodiment will be described.

[0057] Fig.11 (a) is a cross-sectional view showing a portion of a semiconductor device according to a reference example. Fig.11 (b) is a cross-sectional view showing a portion of the semiconductor device according to the embodiment.

[0058] When the semiconductor device 100 is mounted on another device, each terminal 20 is joined to the other device. A metal layer 25 is provided on the surface of each terminal 20. The wettability of the solder to the metal layer 25 is better than the wettability of the solder to the terminal 20. In addition, in the semiconductor device 100, the lower surface BS1 is located above the lower surface BS2. When the terminal 20 is soldered, the solder rises along the lower surface BS1. By the fact that the solder rises upward, it is possible to perform a visual inspection to determine whether the terminal 20 is properly joined.

[0059] In order to make the lower surface BS1 located above the lower surface BS2, as shown in FIG. Figure 8 As shown, a portion of the terminal portion 20t is removed by cutting. At this time, burrs B are generated. Burrs B cause poor bonding of the terminal 20, so they are preferably removed. For example, burrs B can be removed by wet etching. However, in order to remove burrs B or make burrs B sufficiently small, it is necessary to wet etch the lead frame 200 for a long time. When wet etching is performed for a long time, the surface of the lead frame 200 is excessively removed. As a result, as shown in FIG. Fig.11 As shown in (a), the lower surface BS2 is located above the lower surface BS3.

[0060] In the semiconductor device 100 of the embodiment, as Fig.11 As shown in (b), the lower surface BS2 is located below the lower surface BS3. In this case, the side surface SS1 of the second portion 22 is exposed from the insulating portion 30. Fig.11 Compared with the case where the lower surface BS2 is located above the lower surface BS3 as shown in (a), the surface area of ​​the second portion 22 becomes larger. That is, the contact area between the terminal 20 and the solder becomes larger. As a result, the possibility of poor electrical connection between the semiconductor device 100 and other devices during or after the installation of the semiconductor device 100 can be reduced. According to the embodiment, the reliability of the installation of the semiconductor device 100 can be improved.

[0061] As described above, in the embodiment, electrolytic etching is used when etching the burr B. In electrolytic etching, the electric field is concentrated on sharp parts such as the burr B, and selective etching is performed thereon. The etching amount of the lower surface of the first portion 21, the lower surface of the second portion 22, etc. can be reduced. As a result, the lower surface BS2 can be located below the lower surface BS3.

[0062] In addition to the lower surface BS1 and the lower surface BS2, the metal layer 25 is preferably provided on the side surface SS1. This increases the surface area of ​​the metal layer 25 and the contact area between the metal layer 25 and the solder, thereby further improving the reliability of mounting the semiconductor device 100.

[0063] like Figure 2 As shown, the second insulating portion 32 may also have a curved lower surface BS4. The lower surface BS1 is preferably not located too far above the lower surface BS4. When the lower surface BS1 is located too far above the lower surface BS4, the appearance inspection of the solder rising along the lower surface BS1 may be hindered. Therefore, the curvature of the lower surface BS4 is preferably greater than 1 times and less than 1.1 times the curvature of the lower surface BS1.

[0064] (Variation Example)

[0065] Fig.12 (a) and Fig.12 (b) is a perspective view of a semiconductor device showing a modified example of the embodiment. Fig.12 (a) and Fig.12 In (b), the metal layers 25 and 26 are omitted.

[0066] exist Fig.12 In the semiconductor device 110 shown, a part of the upper surface of the terminal 20 is exposed from the insulating portion 30. The second insulating portion 32 is not provided between the first portions 21. The second insulating portion 32 can be omitted in the semiconductor device of the embodiment.

[0067] In semiconductor device 110, similarly to semiconductor device 100, lower surface BS2 of second portion 22 is located below lower surface BS1 of first portion 21 and lower surface BS3 of first insulating portion 31. Thus, the surface area of ​​second portion 22 can be increased, and the mounting reliability of semiconductor device 110 can be improved.

[0068] Several embodiments of the present invention have been described above, but these embodiments are presented as examples and are not intended to limit the scope of the invention. These new embodiments can be implemented in various other ways, and various omissions, substitutions, and changes can be made without departing from the scope of the invention. These embodiments and their variations are included in the scope and purpose of the invention, and are included in the invention described in the scope of the patent claim and the scope equivalent thereto.

Claims

1. A semiconductor device, comprising: a first conductive portion; a semiconductor element disposed on the first conductive portion; a first terminal away from the first conductive portion in a second direction, the second direction being perpendicular to a first direction from the first conductive portion toward the semiconductor element, the first terminal comprising a first portion and a second portion disposed between the first portion and the first conductive portion, the lower surface of the second portion being located below the lower surface of the first portion and below the lower surface of a first insulating portion disposed between the first conductive portion and the second portion; and a metal layer, arranged on the above-mentioned lower surface of the above-mentioned first part and the above-mentioned lower surface of the above-mentioned second part, a plurality of the above-mentioned first terminals are arranged in a third direction perpendicular to the above-mentioned first direction and the above-mentioned second direction, the above-mentioned lower surface of each of the above-mentioned first parts is located above the lower surface of the second insulating part arranged between the above-mentioned first parts, the above-mentioned lower surface of the above-mentioned first part and the above-mentioned lower surface of the above-mentioned second insulating part are convexly curved upward, and the curvature of the above-mentioned lower surface of the above-mentioned second insulating part is greater than 1 times and less than 1.1 times the curvature of the above-mentioned lower surface of the above-mentioned first part.

2. The semiconductor device according to claim 1, wherein The second portion has a first side surface intersecting the second direction and located below the lower surface of the first insulating portion, and the metal layer is further provided on the first side surface.

3. The semiconductor device according to claim 2, wherein: The second portion has a second side surface that is located above the first side surface and is in contact with the first insulating portion.

4. A semiconductor device, comprising: a first conductive portion; a semiconductor element disposed on the first conductive portion; a second conductive portion separated from the first conductive portion in a third direction, the third direction being perpendicular to a first direction from the first conductive portion toward the semiconductor element; a plurality of terminals, including a first terminal and a second terminal, the first terminal and the second terminal being separated from the first conductive portion and the second conductive portion respectively via a plurality of first insulating portions in a second direction perpendicular to the first direction and the third direction, the plurality of terminals respectively including a first portion and a second portion disposed at a position closer to the center than the first portion a second part, the lower surface of the second part being located below the lower surface of the first part and below the lower surface of each of the plurality of first insulating parts; and a plurality of metal layers being respectively provided on the lower surfaces of the plurality of terminals, the lower surface of each of the first parts being located above the lower surface of the second insulating parts provided between the first parts, the lower surface of the first part and the lower surface of the second insulating part being curved convexly upward, and the curvature of the lower surface of the second insulating part being greater than 1 times and less than 1.1 times the curvature of the lower surface of the first part.

5. A method for manufacturing a semiconductor device, wherein: For a structure, a part of the terminal portion is removed by cutting, thereby reducing the thickness of the above-mentioned part of the terminal portion, and the above-mentioned terminal portion after cutting is electrolytically etched, the above-mentioned structure includes: a first conductive portion; a semiconductor element, which is arranged on the above-mentioned first conductive portion; and the above-mentioned terminal portion is away from the above-mentioned first conductive portion in a second direction, and the above-mentioned second direction is perpendicular to the first direction from the above-mentioned first conductive portion toward the above-mentioned semiconductor element. The above-mentioned terminal portion after cutting includes a first part and a second part arranged between the above-mentioned first part and the above-mentioned first conductive portion, and the lower surface of the above-mentioned second part is located at a position lower than the lower surface of the above-mentioned first part. After the above-mentioned electrolytic etching, the above-mentioned second part The above-mentioned lower surface of the part is located below the above-mentioned lower surface of the first part, and is located below the lower surface of the first insulating part arranged between the above-mentioned first conductive part and the above-mentioned second part, a plurality of the above-mentioned terminal parts are arranged in a third direction perpendicular to the above-mentioned first direction and the above-mentioned second direction, the above-mentioned lower surface of each of the above-mentioned first parts is located above the lower surface of the second insulating part arranged between the above-mentioned first parts, the above-mentioned lower surface of the above-mentioned first part and the above-mentioned lower surface of the above-mentioned second insulating part are convexly curved upward, and the curvature of the above-mentioned lower surface of the above-mentioned second insulating part is greater than 1 times and less than 1.1 times the curvature of the above-mentioned lower surface of the above-mentioned first part.

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