Block diagonal structure sc-lDPC code and construction method and system thereof

Abstract

The application discloses a block diagonal structure SC-LDPC code and a construction method and system thereof, and the SC-LDPC construction method is simple in steps and convenient to implement. Under the premise of meeting the diagonal band structure of the SC-LDPC, the problem of the row weight of the check matrix being 0 is solved, the check relationship of the check matrix is enhanced, a low bit error rate can be obtained, and the coding performance is improved. When the bit error rate is 10 ‑4 -1, the gain is 1dB-1.2dB, and the current performance requirement is met. Compared with the traditional SC-LDPC code structure, the main difference is that m s B matrices are added, and the overall structure still meets the diagonal band structure of the SC-LDPC. In the application, the B matrix is a matrix with a size of 3*5. In the matrix B, it is ensured that each row has an element "1", so that the occurrence of the row weight of the check matrix being 0 can be greatly reduced, and the element "1" can further enhance the connection between the check nodes and the variable nodes, and the check relationship of the check matrix is strengthened.

Description

TECHNICAL FIELD

[0001] The application relates to a block-diagonal structure SC-LDPC code and a construction method and system thereof, and belongs to the technical field of communication. BACKGROUND

[0002] Low density parity check (LDPC) code is a kind of channel coding capable of approaching the Shannon channel capacity limit, and spatially coupled low-density parity-check code (SC-LDPC) is a kind of channel coding derived from LDPC convolutional code. The new convolutional LDPC code combines the respective advantages of LDPC code and convolutional code, has excellent decoding error correction performance, and can meet the demand characteristics of high-speed coding and decoding of block LDPC code. The spatial coupling characteristic can make the SC-LDPC code appear a "threshold saturation" phenomenon, so that the SC-LDPC code can theoretically approach the Shannon capacity limit performance.

[0003] Since the diagonal band structure of the traditional SC-LDPC code cannot meet the performance demand, an improved scheme for the SC-LDPC code structure is proposed. SUMMARY

[0004] The application provides a block-diagonal structure SC-LDPC code and a construction method and system thereof, and solves the problems disclosed in the background art.

[0005] In order to solve the above technical problems, the technical scheme adopted by the application is as follows: a block-diagonal structure SC-LDPC code, wherein the SC-LDPC code is:

[0006]

[0007] For each sub-LDPC code matrix constituting the SC-LDPC code, m s is the constraint length of the SC-LDPC code, and B is a 3*5 matrix.

[0008] Correspondingly, a construction method of the block-diagonal structure SC-LDPC code is provided, wherein m s matrices are added to the SC-LDPC code, so that the overall structure still satisfies the diagonal band structure of the SC-LDPC.

[0009] Further, a periodic time-varying SC-LDPC code with a code length of 2500 and a period of 2 is selected, and the exponent matrix P of the SC-LDPC code is:

[0010]

[0011] Correspondingly, an SC-LDPC code construction system of a block diagonal structure adds m s matrices in the SC-LDPC code, so that the overall structure still satisfies the diagonal band structure of the SC-LDPC.

[0012] Further, the SC-LDPC code construction system selects a periodic time-varying SC-LDPC code with a code length of 2500 and a period of 2, and the exponent matrix P of the SC-LDPC code is as follows:

[0013]

[0014] Correspondingly, a computer readable storage medium storing one or more programs: the one or more programs include instructions, which when executed by a computing device, cause the computing device to perform any of the above methods.

[0015] Correspondingly, a computing device includes:

[0016] one or more processors, one or more memories, and one or more programs, wherein the one or more programs are stored in the one or more memories and configured to be executed by the one or more processors, and the one or more programs include instructions for performing any of the above methods.

[0017] The beneficial effects achieved by the present application are:

[0018] The SC-LDPC construction method proposed by the present application has simple steps and is convenient to implement. Under the premise of satisfying the diagonal band structure of the SC-LDPC, the problem of row weight 0 existing in the check matrix is solved, the check relationship of the check matrix is enhanced, a low bit error rate can be obtained, the coding performance is improved, there is a gain of 1dB-1.2dB at a bit error rate of 10-4, and the current performance requirements are met. BRIEF DESCRIPTION OF DRAWINGS

[0019] Figure 1 is the SC-LDPC decoding curve comparison graph of the code length 2500 periodic time-varying SC-LDPC of the present application;

[0020] Figure 2 is the SC-LDPC decoding curve comparison graph of the code length 2500 time-invariant SC-LDPC of the present application. DETAILED DESCRIPTION

[0021] The present application will be further described below in conjunction with the drawings. The following examples are only used to more clearly illustrate the technical solutions of the present application, and cannot be used to limit the protection scope of the present application.

[0022] The present application will be further described below in conjunction with the drawings and specific embodiments.

[0023] The traditional SC-LDPC code is represented as follows:

[0024]

[0025] For each sub-LDPC code matrix that makes up the SC-LDPC code, m s The constraint length of the SC-LDPC code.

[0026] It can also be defined It can also be represented using a symbolic matrix as H(D) = [H0|D·H1|...|D]0 · H1|...|D T-1 ·H T-1 ], where each H(D) is H s The sign matrix is ​​given by T, where T is the period. When T = 1, the generated matrix is ​​time-invariant; otherwise, it is time-varying. The exponent matrix P is the matrix of H(D) with respect to the exponent D. The above expression yields the check matrix.

[0027] The exponent matrix P is a matrix in H(D) with respect to the exponent of D. The general expression for the exponent matrix is:

[0028] The expression for the check matrix can be obtained from the exponent matrix.

[0029] This invention proposes an improved SC-LDPC structure, and the expression for the improved SC-LDPC code parity-check matrix is ​​as follows:

[0030]

[0031] The main difference between this structure and the traditional SC-LDPC code structure lies in the addition of m. s The B matrix still satisfies the diagonal band structure of SC-LDPC. In this invention, the B matrix is ​​a 3*5 matrix. Each row of matrix B is guaranteed to contain the element "1", thus greatly reducing the occurrence of rows with zero weight in the check matrix. The element "1" further strengthens the connection between check nodes and variable nodes, enhancing the check relationship of the check matrix.

[0032] like Figure 1 As shown, this implementation uses a periodic time-varying SC-LDPC code with a code length of 2500 and a period of 2, whose exponent matrix P is...

[0033]

[0034] Simulation comparisons were performed on the parity-check matrices of the two structures to obtain decoding performance curves.

[0035] like Figure 2As shown, a time-invariant SC-LDPC code with a code length of 2500 is selected for simulation, and the exponent matrix P thereof is

[0036]

[0037] The decoding performance curves are obtained by simulating and comparing the check matrices of the two structures.

[0038] The above only describes the preferred embodiments of the present application, and it should be noted that, for those skilled in the art, without departing from the technical principles of the present application, some improvements and modifications can be made, and these improvements and modifications should also be considered as the protection scope of the present application.

[0039] A computer-readable storage medium storing one or more programs, the one or more programs comprising instructions which, when executed by a computing device, cause the computing device to perform a method for constructing an SC-LDPC code with a block-diagonal structure.

[0040] A computing device comprising one or more processors, one or more memories, and one or more programs, wherein the one or more programs are stored in the one or more memories and configured to be executed by the one or more processors, the one or more programs comprising instructions for performing a method for constructing an SC-LDPC code with a block-diagonal structure.

[0041] Those skilled in the art will appreciate that embodiments of the present application can be provided as methods, systems, or computer program products. Therefore, the present application can take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present application can take the form of a computer program product implemented on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROMs, optical storage, etc.) containing computer usable program code.

[0042] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to embodiments of the present application. It should be understood that each flow and / or block in the flowcharts and / or block diagrams, as well as combinations of flows and / or blocks in the flowcharts and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing apparatus to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing apparatus produce a device that implements the functions specified in the flowcharts and / or block diagrams. Figure 1 The functions specified in a flow or multiple flows and / or blocks Figure 1 The means for performing the functions specified in a flow or multiple flows and / or blocks.

[0043] These computer program instructions can also be stored in a computer readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer readable memory produce an article of manufacture including instructions which implement the flow Figure 1 The flow or flows and / or blocks Figure 1 The flow or flows and / or blocks

[0044] These computer program instructions can also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions that execute on the computer or other programmable apparatus provide steps for implementing the flow Figure 1 The flow or flows and / or blocks Figure 1 The flow or flows and / or blocks

[0045] The above merely provides an embodiment of the present application, but is not intended to limit the present application, and any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall fall within the scope of the claims of the present application.

Claims

1. A method for constructing a block-diagonal structured SC-LDPC code, characterized in that, The SC-LDPC code is: For each sub-LDPC code matrix of the SC-LDPC code, m s is a constraint length of the SC-LDPC code, B is a 3*5 matrix, and each row in the matrix B has an element "1" to reduce the occurrence of a row weight of 0 in the check matrix. The element "1" is used to enhance the connection between the check node and the variable node and to strengthen the check relationship of the check matrix. m s B matrices are added in the SC-LDPC code, so that the overall structure still satisfies the diagonal band structure of the SC-LDPC.

2. The method of constructing an SC-LDPC code with a block-diagonal structure according to claim 1, wherein, Definitions The symbol matrix representation is H(D) = [H0|D·H1|...|D T-1 ·H T-1 ], where each H(D) is a symbol matrix of H s , T is the period, when T = 1, the generated matrix is time-invariant, otherwise it is time-varying; The exponential matrix P is the matrix in H(D) with respect to D exponents, expressed as The parity check matrix expression can be obtained from the exponent matrix; The periodic time-varying SC-LDPC code with a code length of 2500 and a period of 2 is selected, and the exponent matrix P is:

3. The construction system of the construction method of the block diagonal structure SC-LDPC code according to claim 1, characterized in that, Definitions The symbol matrix representation is H(D) = [H0|D·H1|...|D T-1 ·H T-1 ], where each H(D) is a symbol matrix of H s , T is the period, when T = 1, the resulting matrix is time-invariant, otherwise it is time-varying; The exponential matrix P is the matrix in H(D) with respect to D exponents, expressed as The parity check matrix expression can be obtained from the exponent matrix; The periodic time-varying SC-LDPC code with a code length of 2500 and a period of 2 is selected, and the exponent matrix P is:

4. A computer-readable storage medium storing one or more programs, the one or more programs comprising instructions that when executed by a computer cause the computer to perform a method comprising: The one or more programs include instructions that, when executed by a computing device, cause the computing device to perform any of the methods of claims 1 or 2.

5. A computing device, comprising: Including: One or more processors, one or more memories, and one or more programs, wherein the one or more programs are stored in the one or more memories and configured to be executed by the one or more processors, and the one or more programs include instructions for performing any of the methods of claims 1 or 2.

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