chip

Abstract

The present invention provides a wafer comprising an annular portion and a processing portion. The processing portion is connected to the annular portion. The processing portion has a polished top surface and a bottom surface opposite the top surface. The processing portion is surrounded by the annular portion. The region of the top surface connecting to the annular portion is an upwardly curved arc surface.

Description

Technical Field

[0001] The present invention relates to a wafer, and in particular to a processed wafer. Background Art

[0002] In the semiconductor industry, the method of manufacturing chips includes first forming an ingot and then slicing the ingot to obtain wafers. The ingot is produced, for example, in a high-temperature environment. Currently, ingot growth methods include the Czochralski process, physical vapor transport (PVT), high-temperature chemical vapor deposition (HT-CVD), and liquid phase epitaxy (LPE).

[0003] In a typical ingot manufacturing method, a seed crystal is placed in a high-temperature furnace. The seed crystal comes into contact with a gaseous or liquid feedstock, and semiconductor material forms on the surface of the seed crystal until an ingot of the desired size is obtained. The ingot can have different crystalline structures depending on the manufacturing method and the feedstock used.

[0004] After the ingot is grown, it is cooled to room temperature by furnace cooling or other methods. After the ingot has cooled, a cutter is used to remove the poorly shaped ends of the ingot, and then the ingot is ground to the desired size (e.g., 3 inches to 12 inches) using a grinding wheel. In some embodiments, a flat edge or V-shaped groove is ground on the edge of the ingot. This flat edge or V-shaped groove is used to mark the crystal orientation of the ingot or to fix the ingot in place.

[0005] The ingot is then sliced ​​to obtain multiple wafers. For example, the method of slicing the ingot includes cutting with a knife or steel wire in combination with abrasive particles (such as diamond particles). Generally speaking, after slicing, the ingot is grinded to adjust the thickness of the wafer. The grinding process can also make the surface of the wafer relatively flat. However, during the grinding process, the wafer is easily scratched due to the abrasive or debris generated by grinding getting stuck on the surface of the wafer.

[0006] The current common wafer grinding process is prone to causing wafer cracking due to excessive processing intensity when processing the wafer to a thinner thickness. Therefore, a Taiko grinding process has been developed to reduce the thickness of the wafer to less than 200 microns (or even less than 50 microns). During the Taiko grinding process, a certain thickness is retained at the edge of the wafer to improve the structural strength of the wafer. However, this design means that the fine chips generated when grinding or polishing the wafer cannot be properly removed due to the thick edge of the wafer. This can easily cause unnecessary scratches and impacts on the wafer during processing, seriously damaging the processing quality and geometric morphology of the wafer. Therefore, how to improve the chip removal ability of the wafer during grinding or polishing has become a problem that still needs to be solved today. Summary of the Invention

[0007] The present invention provides a wafer which can improve the problem of scratches on the edge of a processed portion.

[0008] At least one embodiment of the present invention provides a wafer. The wafer includes an annular portion and a processed portion. The processed portion is connected to the annular portion. The processed portion has a polished top surface and a bottom surface opposite the top surface. The processed portion is surrounded by the annular portion. The region of the top surface connecting to the annular portion is an upwardly curved arc surface, and the arc surface causes the thickness of the processed portion in the local region connecting to the annular portion to increase as it approaches the annular portion. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 is a top view schematically illustrating a wafer grinding process according to an embodiment of the present invention;

[0010] Figure 2 is a schematic cross-sectional view of a wafer according to an embodiment of the present invention;

[0011] Figure 3 is a schematic cross-sectional view of a wafer according to an embodiment of the present invention;

[0012] Figure 4 is a graph showing thickness distribution of a cross section of a processed portion of a wafer according to an embodiment of the present invention;

[0013] Figure 5 is a graph showing thickness distribution of a cross section of a processed portion of another wafer according to an embodiment of the present invention;

[0014] Figure 6 is a graph showing thickness distribution of a cross section of a processed portion of another wafer according to an embodiment of the present invention;

[0015] Figure 7 is a graph showing thickness distribution of a cross section of a processed portion of another wafer according to an embodiment of the present invention;

[0016] Figure 8A is a schematic cross-sectional view of a local area of ​​a wafer according to an embodiment of the present invention;

[0017] Figure 8B is a schematic cross-sectional view of a local area of ​​a wafer according to a comparative example of the present invention;

[0018] Figure 9 FIG. 1 is a cross-sectional schematic diagram of a wafer polishing process according to an embodiment of the present invention.

[0019] Description of Reference Numerals

[0020] 100, 100a: wafer;

[0021] 110: annular part;

[0022] 120: processing part;

[0023] B1, B2: bottom surface;

[0024] C: working platform;

[0025] CR: radius of curvature;

[0026] CS: cambered surface;

[0027] D: direction;

[0028] L: width;

[0029] P: grinding head;

[0030] P1: grinding stone;

[0031] P2: grinding wheel;

[0032] R1: first area;

[0033] R2: second region;

[0034] R3: marginal area;

[0035] RimH, TE, TL, TH, X1, X2: thickness;

[0036] S2: lateral wall;

[0037] T1, T2: top surface;

[0038] W: width;

[0039] Z: particles. DETAILED DESCRIPTION

[0040] Reference will now be made in detail to exemplary embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Whenever possible, the same reference numerals are used in the drawings and the description to refer to the same or like parts.

[0041] Figure 1 FIG. 1 is a top view schematically illustrating a wafer polishing process according to an embodiment of the present invention. Figure 2 FIG. 1 is a schematic cross-sectional view of a wafer according to an embodiment of the present invention.

[0042] Please refer to Figure 1 and Figure 2 , a grinding process is performed on the wafer 100. For example, the wafer 100 is placed on a work platform C, and then the top surface of the wafer 100 is ground using a grinding head P. In some embodiments, the work platform C and the grinding head P rotate in a clockwise direction and in a counterclockwise direction, respectively, but the present invention is not limited thereto. In this embodiment, the grinding process is Taiko grinding. In this embodiment, the material of the wafer 100 includes, for example, silicon (Si), gallium arsenide (GaAs), indium phosphide (InP), indium antimonide (InSb), gallium nitride (GaN), silicon carbide (SiC), zinc selenide (ZnSe), or other suitable semiconductor materials.

[0043] The polished wafer 100 includes an annular portion 110 and a processed portion 120. The processed portion 120 is connected to the annular portion 110. The processed portion 120 has a polished top surface T1 and a bottom surface B1 opposite to the top surface T1. The processed portion 120 is surrounded by the annular portion 110. The thickness of the annular portion 110 is greater than that of the processed portion 120. Therefore, the annular portion 110 can increase the strength of the wafer 100 and reduce warping of the wafer 100. In addition, the thicker annular portion 110 of the wafer 100 makes the edge of the wafer 100 less likely to crack or chip during processing.

[0044] In this embodiment, the area where the top surface T1 of the processed portion 120 connects to the annular portion 110 is an upwardly curved arc surface CS (i.e., curved toward the direction close to the top surface T2 of the annular portion 110). The arc surface CS causes the thickness of the processed portion 120 in the local area connected to the annular portion 110 to increase as it approaches the annular portion 110.

[0045] When the thickness of the processed portion 120 in the local area connected to the annular portion 110 increases as it approaches the annular portion 110, as shown in FIG. Figure 8AAs shown, at the arc surface CS, the thickness X1 of the processed portion 120 closer to the annular portion 110 is greater than the thickness X2 of the processed portion 120 farther from the annular portion 110. This facilitates the removal of fine particles Z generated during the wafer polishing process along the arc surface CS (e.g., along direction D), preventing such fine particles Z from becoming lodged at the interface between the processed portion 120 and the annular portion 110, thereby reducing the risk of scratches on the edges of the processed portion 120. In some embodiments, the cross-sectional shape of the top surface T1 of the processed portion 120 is W-shaped or U-shaped. This embodiment does not limit the thickness of the entire processed portion 120 to increasing as it approaches the annular portion 110.

[0046] If the area where the top surface T1 of the processed portion 120 connects to the annular portion 110 is a downwardly curved surface CS (i.e., curved in a direction away from the top surface T2 of the annular portion 110) or a plane perpendicular to the side surface of the annular portion, the fine particles Z generated during the grinding process of the wafer 100 are likely to get stuck at the junction of the processed portion 120 and the annular portion 110, causing scratches on the edge of the processed portion 120. These scratches may cause the yield of the film layers (such as epitaxial layers, metal layers, or insulating layers) subsequently deposited on the wafer 100 to be poor. For example, if Figure 8B As shown, the area where the top surface T1 of the processed portion 120 connects to the annular portion 110 is a downwardly curved arc surface CS. At the arc surface CS, the thickness X1 of the processed portion 120 relatively close to the annular portion 110 is smaller than the thickness X2 of the processed portion 120 relatively far from the annular portion 110. Therefore, fine particles Z generated during the wafer grinding process are easily stuck at the interface between the processed portion 120 and the annular portion 110, causing scratches on the edge of the processed portion 120. In some embodiments, the downwardly curved arc surface CS at the area where the top surface T1 of the processed portion 120 connects to the annular portion 110 may cause the cross-sectional shape of the top surface T1 of the processed portion 120 to exhibit an M-shaped or n-shaped shape.

[0047] Back to Figure 1 In this embodiment, in order to further avoid scratches on the edge of the processed portion 120 of the wafer 100, the structure of the top surface T1 of the processed portion 120 is adjusted. In this embodiment, the thickness of the annular portion 110 is Rim H Micrometer, Rim H The thickness of the annular portion 110 is 200 μm to 1500 μm, preferably 300 μm to 900 μm, and most preferably 400 μm to 800 μm. In some embodiments, the annular portion 110 of the wafer 100 is chamfered, that is, the top surface T2 of the annular portion 110 and the bottom surface B2 of the annular portion 110 are curved or inclined surfaces, and the thickness Rim of the annular portion 110 is HDefined as the maximum thickness of the annular portion 110 (i.e., the maximum thickness from the top surface T2 to the bottom surface B2). In this embodiment, the grinding head P grinds downward along the sidewall S2 of the annular portion 110 until the sidewall S2 of the annular portion 110 extends substantially perpendicular to the work platform C (or the bottom surface B1 of the processing portion 120). The bottom surface B1 of the processing portion 120 is substantially flush with the bottom surface B2 of the annular portion 110. In other words, the bottom surfaces B1 and B2 are substantially continuous.

[0048] The maximum thickness of the processing portion 120 where it connects to the annular portion 110 is T E In other words, the maximum thickness of the portion where the processed portion 120 connects to the side wall S2 of the annular portion 110 is T E In other words, the distance from the boundary where the side wall S2 of the annular portion 110 is connected to the top surface T1 of the processed portion 120 to the bottom surface B2 of the annular portion 110 is T E Micron. The design of the cambered surface CS is to make it easy to remove the debris generated during the processing, so the thickness of Rim H With thickness T E The smaller the difference between the two, the better. In some embodiments, 0.5≤thickness T E / Thickness Rim H ≤1, where 0.75≤thickness T E / Thickness Rim H ≤1 is better.

[0049] The width (or diameter) of the processed portion 120 is L mm, where L is between 70 mm and 300 mm. The portion of the processed portion located within a distance of 0.15L from the annular portion 110 is defined as the edge region R3. The curved surface CS is located in the edge region R3, and the curved surface CS causes the thickness of the processed portion 120 in the edge region R3 to decrease as it moves away from the annular portion 110. In this embodiment, the upper surface of the edge region R3 of the entire processed portion 120 is the curved surface CS, that is, the horizontal width X (or the width of the vertical projection) of the curved surface CS is 0.15L, but the present invention is not limited to this. In some embodiments, the horizontal width X of the upwardly curved curved surface CS in the edge region R3 is 0.01L≤X≤0.15L. In a preferred embodiment, 0.02L≤X≤0.14L. In a more preferred embodiment, 0.03L≤X≤0.13L.

[0050] The portion of the processed portion 120 located at a distance of 0.15L to 0.3L from the annular portion 110 is defined as a first region R1. The thinnest portion of the processed portion is located in the first region R1, and the thickness of the thinnest portion of the processed portion R1 is T L In this embodiment, (T E -T L) is greater than or equal to 4 microns, so that the fine particles generated by the grinding wafer 100 are more easily removed along the curved surface CS. In this embodiment, the thickness of the thinnest portion from the top surface T1 of the processing portion 120 to the bottom surface B1 of the processing portion 120 is T L micrometer.

[0051] The portion of the processed portion 120 located at a distance of 0.3L to 0.5L from the annular portion 110 is defined as a second region R2. The thickness of the thickest portion of the processed portion 120 located in the second region R2 is T H micrometers, and T H 0.1Rim H to 0.7 rim H In this embodiment, the thickness of the thickest portion from the top surface T1 of the processed portion 120 in the second region R2 to the bottom surface B1 of the processed portion 120 in the second region R2 is TH micrometers. In this embodiment, T E Greater than T H , and T H Greater than T L In some embodiments, the arc surface CS surrounds the first region R1 and the second region R2.

[0052] In this embodiment, the average thickness of the processed portion 120 in the second region R2 is greater than the average thickness of the processed portion 120 in the first region R1, thereby preventing the thinnest portion of the processed portion 120 from appearing in the second region R2 and reducing the occurrence of thinner portions of the processed portion 120 in the second region R2 than the thinner portions of the processed portion 120 in the first region R1. I The probability of the part being processed is increased, thereby preventing the fine chips generated during processing from staying in the second region R2 and increasing the probability of the fine chips being discharged from the edge region R3.

[0053] In the present embodiment, the cross-sectional shape of the top surface T1 of the processed portion 120 is similar to a W-shape.

[0054] Based on the above, the wafer 100 of this embodiment can avoid the problem of scratches on the edge of the processed portion 120 after grinding.

[0055] Figure 3 FIG. 1 is a schematic cross-sectional view of a wafer according to an embodiment of the present invention.

[0056] It must be pointed out here that Figure 3 The implementation examples follow Figure 1 and Figure 2 The component numbers and partial contents of the embodiments are the same or similar components, and the description of the same technical contents is omitted. For the description of the omitted parts, please refer to the above embodiments and will not be repeated here.

[0057] Please refer to Figure 3The ground wafer 100a includes an annular portion 110 and a processed portion 120. The processed portion 120 is connected to the annular portion 110. The processed portion 120 has a ground top surface T1 and a bottom surface B1 opposite to the top surface T1. The processed portion 120 is surrounded by the annular portion 110. The thickness of the annular portion 110 is greater than that of the processed portion 120. Therefore, the annular portion 110 can increase the strength of the wafer 100a and reduce warping of the wafer 100a. In addition, because the annular portion 110 of the wafer 100 is thicker than the processed portion 120, the edge of the wafer 100a is less likely to crack or chip during processing.

[0058] In this embodiment, the area where the top surface T1 of the processing portion 120 connects to the annular portion 110 is an upwardly curved arc surface CS (i.e., curved toward the direction close to the top surface T2 of the annular portion 110). This allows fine particles generated by the wafer 100a during the grinding process to be easily removed along the aforementioned arc surface CS, preventing the aforementioned fine particles from being stuck at the junction of the processing portion 120 and the annular portion 110, thereby reducing the problem of scratches on the edge of the processing portion 120.

[0059] In this embodiment, the portion of the processed portion 120 located within a distance of 0.15L from the annular portion 110 is defined as the edge region R3. The curved surface CS causes the thickness of the processed portion 120 in the edge region R3 to decrease as it moves away from the annular portion 110, and the curved surface CS is located within the edge region R3. In this embodiment, the entire upper surface of the edge region R3 of the processed portion 120 is the curved surface CS, meaning that the horizontal width X of the curved surface CS is 0.15L, but the present invention is not limited to this. In some embodiments, the horizontal width X of the upwardly curved curved surface CS in the edge region R3 is 0.01L≤X≤0.15L. In a preferred embodiment, 0.02L≤X≤0.14L. In a more preferred embodiment, 0.03L≤X≤0.13L.

[0060] In this embodiment, the portion of the processed portion 120 located at a distance of 0.15L to 0.5L from the annular portion is defined as the first region R1. The thickness of the thinnest portion of the processed portion 120 in the first region R1 is T L In other words, the thickness of the thinnest portion from the top surface T1 of the processed portion 120 in the first region R1 to the bottom surface B1 of the processed portion 120 in the first region R1 is T L The thickness of the thickest part of the processed portion 120 in the first region R1 is T H In other words, the thickness of the thickest portion from the top surface T1 of the processed portion 120 in the first region R1 to the bottom surface B1 of the processed portion 120 in the first region R1 is T H In some embodiments, the curved surface CS surrounds the first region R1.

[0061] In this embodiment, the thickest portion of the processed portion 120 in the first region R1 is located closest to the edge region R3 , but the present invention is not limited thereto. In other embodiments, the thickest portion of the processed portion 120 in the first region R1 is located elsewhere in the first region R1 .

[0062] In this embodiment, (T E -T L ) is greater than or equal to (T H -T L +1.5 μm), where T H 0.1Rim H to 0.7 rim H In some embodiments, the first region R1 of the processed portion 120 is substantially planar, ie, T H Equal to T L , therefore, (T E -T L ) is greater than or equal to 1.5 microns.

[0063] In this embodiment, the cross-sectional shape of the top surface T1 of the processed portion 120 is similar to a U-shape.

[0064] Based on the above, the wafer 100 a of this embodiment can avoid the problem of scratches on the edge of the processed portion 120 after grinding.

[0065] Figure 4 FIG. 1 is a graph showing thickness distribution of a cross section of a processed portion of a wafer according to an embodiment of the present invention. Figure 5 FIG. 4 is a graph showing thickness distribution of a cross section of a processed portion of a wafer according to another embodiment of the present invention.

[0066] It must be pointed out here that Figure 4 Examples and Figure 5 The implementation examples follow Figure 1 and Figure 2 The component numbers and partial contents of the embodiments are the same or similar components, and the description of the same technical contents is omitted. For the description of the omitted parts, please refer to the above embodiments and will not be repeated here.

[0067] exist Figure 4 and Figure 5 In the figure, the horizontal axis represents the lateral position of the cross section of the processed portion of the wafer, in millimeters; the vertical axis represents the thickness of the processed portion of the wafer at different positions, in microns. Figure 4 Examples and Figure 5 In the embodiment, T E Greater than T H , and TH Greater than T L . (T E -T L ) is greater than or equal to 4 microns.

[0068] Based on the above, the wafer can avoid the problem of scratches on the edge of the processed part after grinding.

[0069] Figure 6 FIG. 4 is a graph showing thickness distribution of a cross section of a processed portion of another wafer according to an embodiment of the present invention. Figure 7 FIG. 4 is a graph showing thickness distribution of a cross section of a processed portion of a wafer according to yet another embodiment of the present invention.

[0070] It must be pointed out here that Figure 6 Examples and Figure 7 The implementation examples follow Figure 3 The component numbers and partial contents of the embodiments are the same or similar components, and the description of the same technical contents is omitted. For the description of the omitted parts, please refer to the above embodiments and will not be repeated here.

[0071] exist Figure 6 and Figure 7 In the figure, the horizontal axis represents the lateral position of the cross section of the processed portion of the wafer, in millimeters; the vertical axis represents the thickness of the processed portion of the wafer at different positions, in microns. Figure 6 Examples and Figure 7 In the embodiment, T E Greater than T H , and T H Greater than T L . (T E -T L ) is greater than or equal to (T H -T I +1.5 μm).

[0072] Based on the above, the wafer can avoid the problem of scratches on the edge of the processed part after grinding.

[0073] Figure 9 FIG. 1 is a partial cross-sectional diagram of a wafer grinding process according to an embodiment of the present invention. For example, Figure 9 It is a partial cross-sectional schematic diagram of the grinding process of the wafer in any of the aforementioned embodiments.

[0074] Please refer to Figure 9, the wafer 100 is ground with a grinding head P. In this embodiment, the grinding head P includes a grinding stone (grinding abrasives) P1 and a grinding wheel P2. A plurality of grinding stones P1 are arranged on the grinding wheel P2. In this embodiment, the area where the top surface T1 of the processing portion 120 connects to the annular portion 110 is an upward curved surface CS (i.e., curved toward the direction close to the top surface T2 of the annular portion 110). The curved surface CS causes the thickness of the processing portion 120 in the local area connected to the annular portion 110 to increase as it approaches the annular portion 110. In some embodiments, the width (or diameter) of the processing portion 120 is L mm (please refer to Figure 2 or Figure 3 ), the curvature radius of the R angle (Radius) of the arc surface CS is CR, 0.01L≤CR≤L. In a preferred embodiment, 0.01L≤CR≤0.5L. In a more preferred embodiment, 0.01L≤CR≤0.25L. In some embodiments, the width W (or diameter) of the grinding stone P1 on the grinding head P is smaller than the curvature radius of the R angle of the arc surface CS. Therefore, the grinding head P can better control the width and shape of the arc surface CS so that 0.01L <CR<L。

[0075] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the above embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A wafer comprising: annular part; as well as A processing portion connected to the annular portion, wherein the processing portion has a ground top surface and a bottom surface opposite to the top surface, and the processing portion is surrounded by the annular portion, wherein the maximum thickness of the position where the processing portion is connected to the annular portion is T E micrometers, the width of the processed portion is L millimeters, the portion of the processed portion located within 0.15L from the annular portion is defined as an edge region, wherein the region where the top surface connects to the annular portion is an upwardly curved arc surface, the arc surface is located in the edge region, and the arc surface causes the thickness of the processed portion in the edge region connected to the annular portion to decrease as it moves away from the annular portion, and wherein the horizontal width of the arc surface is X, and 0.01L≤X≤0.15L, and the curvature radius of the R angle of the arc surface is CR, 0.01L≤CR≤L, the portion of the processed portion located at a distance of 0.15L to 0.3L from the annular portion is defined as a first region, and the portion of the processed portion located at a distance of 0.3L to 0.5L from the annular portion is defined as a second region, wherein the thinnest portion of the processed portion is located in the first region, and the thickness of the thinnest portion of the processed portion is T L micrometers, wherein the thickness of the thickest portion of the processed portion located in the second region is T H micrometers, where (T E -T L ) is greater than or equal to 4 microns, wherein the thickness of the annular portion is Rim H micrometers, and T H 0.1Rim H to 0.7 rim H , where T E Greater than T H , and T H Greater than T L . 2 . The wafer according to claim 1 , wherein an average thickness of the processed portion in the second region is greater than an average thickness of the processed portion in the first region.

3. The wafer according to claim 1 , wherein the inner sidewall of the annular portion extends in a direction perpendicular to the bottom surface of the processed portion, and the distance from the junction of the sidewall of the annular portion connected to the top surface of the processed portion to the bottom surface of the annular portion is T E Micrometers, the thickness of the thinnest part from the top surface of the processed part to the bottom surface of the processed part is T L micrometers, the thickness of the thickest part from the top surface of the processed part in the second region to the bottom surface of the processed part in the second region is T H micrometer.

4. A wafer comprising: annular part; as well as A processing portion connected to the annular portion, wherein the processing portion has a ground top surface and a bottom surface opposite to the top surface, and the processing portion is surrounded by the annular portion, wherein the maximum thickness of the position where the processing portion is connected to the annular portion is T E micrometers, the width of the processed portion is L millimeters, the portion of the processed portion located within 0.15L from the annular portion is defined as an edge region, wherein the region where the top surface connects to the annular portion is an upwardly curved arc surface, the arc surface is located in the edge region, and the arc surface causes the thickness of the processed portion in the edge region connected to the annular portion to decrease as it moves away from the annular portion, and wherein the horizontal width of the arc surface is X, and 0.01L≤X≤0.15L, and wherein the curvature radius of the R angle of the arc surface is CR, 0.01L≤CR≤L, the portion of the processed portion located at a distance of 0.15L to 0.5L from the annular portion is defined as a first region, and the thickness of the thinnest portion of the processed portion in the first region is T L micrometers, wherein the thickness of the thickest portion of the processed portion in the first region is T H micrometers, where (T E -T L ) is greater than or equal to (T H -T L +1.5 microns), wherein the thickness of the annular portion is Rim H micrometers, and T H 0.1Rim H to 0.7 rim H , where T E Greater than T H , and T H Greater than T L .

5. The wafer according to claim 4, wherein the inner sidewall of the annular portion extends in a direction perpendicular to the bottom surface of the processed portion, and the distance from the junction of the sidewall of the annular portion connected to the top surface of the processed portion to the bottom surface of the annular portion is T E micrometers, the thickness of the thinnest portion from the top surface of the processed portion in the first region to the bottom surface of the processed portion in the first region is T L micrometers, the thickness of the thickest part from the top surface of the processed part in the first region to the bottom surface of the processed part in the first region is T H micrometer. The wafer according to claim 4 , wherein the bottom surface of the processed portion is substantially flush with a bottom surface of the annular portion.

7. The wafer according to claim 4, wherein 0.5≤T E / Rim H ≤1.

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