Fast overcurrent detection in battery management systems

Abstract

The present disclosure relates to fast overcurrent detection in battery management systems. Described herein are improved overcurrent detection and mitigation systems, methods, and techniques for BMSs. A BMS monitor can detect overcurrent using two different techniques. A first technique can detect overcurrent based on average power over different overlapping time periods. A second technique can detect overcurrent based on determining an analog junction temperature of a switching device.

Description

Technical Field

[0001] This invention generally relates to safety technologies and mechanisms of battery management systems (BMS), such as overcurrent detection. Background Technology

[0002] With the rapid development of smart grids and electric vehicle (EV) technologies, rechargeable batteries have become an important large-scale energy storage device. Battery Management Systems (BMS) monitor rechargeable batteries, providing relevant data, such as battery charge levels, to control systems. BMSs have a wide range of applications, from grid energy storage to electric vehicles and other consumer products such as electric bicycles and electric scooters.

[0003] Rechargeable batteries, being essentially electrochemical, can exhibit a variety of undesirable operating characteristics, such as gas release, electrolyte leakage, or thermal problems, such as overheating or exothermic reactions with oxygen. One such undesirable situation is overcurrent, where a single cell or battery pack generates or absorbs a current greater than expected. Overcurrent can lead to overheating and even thermal runaway.

[0004] Switching mechanisms, such as mechanical relays, can be provided to selectively connect and disconnect the battery from its corresponding load (e.g., the traction motor of an electric vehicle (EV) or associated control circuitry) in the event of a battery failure. However, mechanical relays can be expensive, slow, and bulky. Attached Figure Description

[0005] The various accompanying drawings illustrate only exemplary embodiments of this disclosure and should not be construed as limiting its scope.

[0006] Figure 1 This is a block diagram of an example section of the BMS.

[0007] Figure 2A-2B An example of a current spike in the system is shown.

[0008] Figure 3 The illustration shows an example section of the BMS monitor.

[0009] Figure 4 An example of a time window is illustrated.

[0010] Figure 5A The illustration shows the thermal resistance distribution of an example MOSFET.

[0011] Figure 5B The circuit representation of the Cauer model of the example MOSFET is shown.

[0012] Figure 6A An example binary RC system is shown.

[0013] Figure 6B The current diagram of the binary RC system is shown.

[0014] Figure 6C A circuit diagram of a Cauer model of an example MOSFET is shown.

[0015] Figure 6D The set of binary RC pairs is displayed.

[0016] Figure 6E A network with switched resistors is shown.

[0017] Figure 6F The switching timing scheme is shown.

[0018] Figure 7 The illustration shows an example section of the BMS monitor. Detailed Implementation

[0019] Embodiments of this disclosure provide improved overcurrent detection and mitigation systems, methods, and techniques for use in a battery management system (BMS). The BMS can be installed in an electric vehicle (EV). The BMS monitor can detect overcurrent using two different techniques, thereby providing redundancy and improving reliability. The first technique can detect overcurrent based on average power over different overlapping time periods. The second technique can detect overcurrent based on determining the modeled junction temperature of the switching devices (e.g., semiconductor elements) that couple the battery to the load. Both techniques can take into account historical information about circuit performance, such as past current glitches. If an overcurrent is detected by either technique, the switching devices can be quickly disabled, thus preventing switching device failure. Therefore, the overcurrent detection techniques described herein improve the safety and reliability of the BMS while reducing cost.

[0020] This document describes a battery monitor for protecting a switching device used to supply power to a load. The battery monitor may include converter circuitry having an input for receiving voltage and an oscillator for generating a pulse sequence based on the voltage. The battery monitor may also include digital circuitry with a first detector and a second detector, the first detector detecting the occurrence or non-occurrence of a first fault event of the switching device based on deterministic characteristics of pulse sequences measured at at least two different time windows, and the second detector detecting the occurrence or non-occurrence of a second fault event of the switching device by determining the modeled junction temperature of the switching device based on the pulse sequence.

[0021] The document also describes a method for protecting a switching device used to supply power to a load. The method may include detecting an input voltage; generating a pulse sequence based on the input voltage; determining the occurrence or non-occurrence of a first fault event of the switching device based on deterministic characteristics of the pulse sequence measured at at least two different time windows; determining the occurrence or non-occurrence of a second fault event of the switching device by determining a modeled junction temperature of the switching device based on the pulse sequence; and disabling the switching device in response to determining the occurrence of the first or second fault event.

[0022] The document also describes an apparatus for protecting a switching device used to supply power to a load. The apparatus may include a converter circuit having an input for receiving a voltage, and an oscillator for generating a pulse sequence based on the voltage. The apparatus may also include a fault detector comprising multiple timing filters and comparators to: determine the power consumed over multiple time windows based on the pulse sequence; for each time window, compare the power consumed for that time window with a corresponding power threshold for that window; detect an overcurrent event based on the comparison; and disable the switching device in response to the detection of an overcurrent event.

[0023] Figure 1 The diagram illustrates a block diagram of an example portion of BMS 100. BMS 100 may include multiple battery cells 102.1-102.N, BMS monitor 104, fuse 106, load 108, switching device 110, shunt resistor 112, or logic gate 114 and drive circuit 116.

[0024] Battery cells 102.1-102.N can be provided as battery modules for a battery pack. For example, the battery pack can use lithium-ion chemistry and provide a battery pack or other battery pack, such as providing a nominal 48-volt output or other desired output. Batteries of different specifications, sizes, and shapes can be used. Battery cells 102.1-102.N can be monitored by a BMS monitor 104. For example, the BMS monitor 104 may include multiple voltage measurement channels, such as 16 channels.

[0025] BMS monitor 104 may be provided as an integrated circuit. As an illustrative example, the integrated circuit may include a monolithic integrated circuit or an integrated module comprising multiple integrated circuit dies or other circuit elements within a common integrated circuit device package. BMS monitor 104 may include hardware and software to measure the voltage, current, and / or temperature levels of battery cells 102.1-102.N. BMS monitor 104 may store those measurements in a memory, such as an EEPROM. BMS monitor 104 may also transmit these measurement results to a main controller (not shown) via a communication interface using a wired network, a wireless network, or a combination thereof.

[0026] Battery cells 102.1-102.N may also be coupled to fuse 106, load 108, switching device 110, and shunt resistor 112. Load 108 may be a component receiving power from battery cells 102.1-102.N, such as an EV traction motor. Load 108 may be fully or partially powered by battery cells 102.1-102.N. Fuse 106 may be used in emergency situations where battery cells 102.1-102.N need to be permanently disconnected from load 108 (e.g., in case of extreme overheating).

[0027] Switching device 110 can selectively connect and disconnect battery cells 102.1-102.N to load 108. Switching device 110 can be provided as a metal-oxide-semiconductor field-effect transistor (MOSFET). For example, switching device 110 can be provided as a silicon carbide (SiC) MOSFET configured to operate at high voltages. MOSFETs are more advantageous than mechanical relays because they are less expensive and have faster response times. However, MOSFETs may have lower fault tolerance and are therefore more susceptible to damage from battery failure events such as overcurrent. Furthermore, when used as switching device 110, the MOSFET may be one of the first devices to fail in the circuit. When a MOSFET fails, it typically fails due to a short circuit. This short-circuit characteristic can cause catastrophic failure of one or more battery cells because it creates a short circuit between battery cells 102.1-102.N and load 108. Although fuse 106 may blow before causing significant damage, a blown fuse 106 may render connected devices (such as loads) unusable. In the EV example, the EV may be drivable and may have to be taken to a service station for expensive repairs.

[0028] Therefore, the BMS monitor 104 can disable (e.g., shut down, limit operation) the switching device 110 (e.g., MOSFET) under certain conditions, such as overcurrent conditions. The BMS monitor 104 can detect the voltage across the shunt resistor 112. Based on the detected voltage, it can detect an overcurrent event and then turn off the switching device 110 (e.g., MOSFET) relatively quickly before a failure may occur. In this example, the BMS monitor 104 can detect overcurrent events using two different techniques (OC1 and OC2), as described in further detail below. If either OC detection technique indicates an overcurrent event, the output of the OR logic gate 114 can trigger the drive circuit 116 to disable the switching device 110. The OR logic gate 114 and / or the drive circuit 116 can be integrated with the BMS monitor 104.

[0029] Some overcurrent detection techniques may not accurately detect overcurrent events at the switching device 110. Current flow can include transients caused by switching in the load 108 (e.g., an EV traction motor), so simply defining an overcurrent event as "a current exceeding a threshold within a specific time period" may not effectively protect the switching device 110.

[0030] Figure 2A-2B An example of a current spike in the system is shown. Figure 2A Two spikes (or glitches) are shown: a first spike 202 with an amplitude of 2000A lasting for 1 microsecond and a second spike 204 with an amplitude of 500A lasting for 2 microseconds. Consider setting a threshold for detecting overcurrent events for current spikes exceeding 400A with a duration of at least 2 microseconds. Here, the second spike 204 (500A for 2 microseconds) would be detected as an overcurrent event, while the first spike 202 (2000A for 1 microsecond) would not be detected. This could be problematic because the first spike 202 could consume eight times more energy in a switching device (e.g., a MOSFET) compared to the wider second spike 204.

[0031] Furthermore, the failure of switching devices (such as MOSFETs) may depend on the history of current (as well as power and heat dissipation) in the system, rather than the current at a single point in time. Figure 2B The diagram illustrates a first set of current spikes 206, each with an amplitude of 2000 A and a duration of 1 microsecond, and a second set of current spikes 208, each with an amplitude of 500 A and a duration of 2 microseconds. Consider setting a threshold for detecting overcurrent events for current spikes exceeding 600 A and with a duration of at least 2 microseconds. Here, neither the spikes in the first nor the second set 206, 208 trigger the detection of an overcurrent event. This could be problematic because each spike could potentially generate a certain amount of heat in the switching device (e.g., a MOSFET), and the continuous nature of the spikes could lead to overheating of the switching device, resulting in switching device failure. Therefore, the overcurrent of the switching device (e.g., a MOSFET) depends not only on the current magnitude at a specific time but also on the history of circuit performance.

[0032] Figure 3 The illustration shows an example portion of a BMS monitor 300. The BMS monitor 300 can detect shunt resistors R (e.g., Figure 1 The voltage across the shunt resistor 112. Based on the detected voltage, the BMS monitor 300 can detect overcurrent events using two different detection techniques, detecting overcurrent event 1 (OC1) and event 2 (OC2). (See above reference...) Figure 1As explained, the occurrence of any overcurrent event (OC1 and / or OC2) can trigger the disabling of switching devices, such as MOSFETs (e.g., Figure 1 (Switching device 110).

[0033] The BMS monitor 300 may include two processing chains 310 and 350 corresponding to two different fault detection technologies. The first processing chain 310 may include a first analog front-end circuit 312, a first counter 314, and a first digital engine 316. The first analog front-end circuit 312 may receive or detect the voltage across a shunt resistor and convert the detected voltage into a pulse sequence (or periodic pulses).

[0034] The first analog front-end circuit 312 may include a first voltage-to-power converter 312.1 and a first current-controlled oscillator (CCO) 312.2. The first voltage-to-power converter 312.1 can convert the detected voltage into a power signal. The first voltage-to-power converter 312.1 can use, for example, a device with specified transconductance characteristics to convert the detected voltage into a current signal. The current signal can then be squared to generate a power signal, since the square of the current can represent power, p(t) = i(t). 2 R, where I is current and R is resistance. The first CCO 312.2 can convert a power signal into a pulse sequence. Therefore, the pulse sequence can be current-controlled. Each pulse may correspond to a "unit of energy". The frequency of the pulse sequence can be proportional to the square of the detected voltage. For example, if a detected 1V voltage produces a pulse sequence with a frequency of 1Hz, then a detected 2V voltage can produce a pulse sequence with a frequency of 4Hz (2V squared).

[0035] The first counter 314 can count the number of pulses in the generated pulse sequence. The first counter 314 can be a rotary counter or other reset counter, such that after it reaches its maximum count, it can toggle and start counting again. For example, if the count is from 1 to 12, then after the count reaches 12, it restarts counting from 1. The first counter 314 can be provided as a grayscale counter, such as a 4-bit grayscale counter.

[0036] The first counter 314 may be coupled to the first digital engine 316. The first digital engine 316 may be implemented using a combination of hardware and software. The first digital engine 316 may include a processor, a microprocessor, a digital state machine, and / or other suitable components.

[0037] The first digital engine 314 can receive a pulse sequence and can detect a first fault event, such as a first overcurrent event (OC1), based on the received pulse sequence. The pulse sequence generated by the first counter 314 can be generated asynchronously, as it represents current and may include spikes (or glitches), as described above. Therefore, the first digital engine 314 can synchronize the pulse sequence with its system clock (SCLK). For each clock cycle (e.g., 125 nanoseconds) or set of clock cycles of the system clock, the first digital engine 314 can store the previously obtained pulse sequence value in register 316.1 and can subtract it from the currently obtained pulse sequence value using subtractor 316.2 to generate the energy sequence (also called the power sequence) for that clock cycle (or set of clock cycles). The energy sequence may correspond to the energy / power consumed in the last cycle (or set of clock cycles). The first counter 314 can be large enough that it does not complete a full rotation of its count within the clock cycle of the system clock.

[0038] The first digital engine 316 may include an OC1 detector 316.3 to detect overcurrent events based on the generated energy sequence. The OC1 detector 316.3 may detect OC1 based on the energy average over different time periods. The OC1 detector 316.3 may use multiple exponential moving average (EMA) windows.

[0039] Figure 4 An example of a time window is illustrated. Figure 4 Five time windows, W1-W5, are shown. Time windows W1-W5 can be measured looking backward from the current time. Time window W1 can be the shortest window from the current time to the penultimate time, for example, 1 microsecond. From the current time to the second-to-last time, time window W2 can be longer than W1, for example, 10 microseconds. From the current time to the third-to-last time, time window W3 can be longer than W2, for example, 100 microseconds. From the current time backward to the current time, time window W4 can be longer than W3, for example, 1000 microseconds. From the current time to the fifth-to-last time, time window W5 can be longer than W4, for example, 10000 microseconds. Time windows can be implemented using timing filters. The period of the timing window can be configurable. These time periods can be configured based on the time period of the MOSFET's thermal ladder, as discussed in further detail below.

[0040] For each time window, the average power consumption can be determined simultaneously. The average power consumption can be a function of the energy sequence observed during each time period. Therefore, in Figure 4 In the example, the average power of time windows W1-W5 can be displayed as the power consumed in the last 1 microsecond, 10 microseconds, 100 microseconds, 1000 microseconds and 10000 microseconds, respectively.

[0041] Each time window can also be associated with a power threshold. The average power of each window can be compared to the corresponding power threshold. The individual threshold for each window can be configurable. For example, the threshold can be obtained based on simulations of switching devices (MOSFETs). The simulations can assume maximum permissible case temperature and junction temperature, as described in further detail below.

[0042] If the average power of any determined time window exceeds its respective power threshold, the BMS monitor 300 (e.g., OC1 detector 316.3) can determine that an overcurrent event OC1 has occurred. Using different time windows to determine the digital estimate of power consumption can eliminate or reduce false alarms of overcurrent events from current spikes (glitch) while also responding to multiple short spikes.

[0043] Return to reference Figure 3 Next, the second processing chain 350 will be described. The second processing chain 350 may include a second analog front-end circuit 352, a first counter 354, and a first digital engine 356. The second analog front-end circuit 352 may be similar to or substantially the same as the first analog front-end circuit 312. Therefore, the second analog front-end circuit 352 can receive or detect the voltage across the shunt resistor and convert the detected voltage into a pulse sequence (or periodic pulses).

[0044] The second analog front-end circuit 352 may include a second voltage-to-power converter 352.1 and a second current-controlled oscillator (CCO) 352.2, and these components may operate in the same manner as their counterparts in the first analog front-end circuit 312, as described above. The second voltage-to-power converter 352.1 can convert the detected voltage into a power signal. The second voltage-to-power converter 352.1 may use, for example, a transconductance device to convert the detected voltage into a current signal. The current signal can then be squared to generate a power signal. The second CCO 352.2 can convert the power signal into a pulse sequence. Therefore, the pulse sequence may be current-controlled. Each pulse may correspond to a "unit of energy". The frequency of the pulse sequence may be proportional to the square of the detected voltage.

[0045] The second counter 354 can operate in the same manner as the first counter 314 described above. The second counter 354 can be a rotary counter, such that after reaching its maximum count, it can toggle the count and restart. For example, if the count is from 1 to 12, then after reaching 12, it restarts counting from 1. The second counter 354 can be provided as a grayscale counter, such as a 4-bit grayscale counter.

[0046] In one example, one or more analog and counter components (e.g., 312 and 315, 314 and 354) in the first and second processing chains 310, 350 can be combined or integrated together. For example, a single analog front-end circuit and / or counter can be provided.

[0047] The second counter 354 can be coupled to the second digital engine 356. The second digital engine 356 can be implemented using a combination of hardware and software. The second digital engine 356 may include a processor, a microprocessor, a digital state machine, and / or other suitable components.

[0048] The second digital engine 354 can receive a pulse sequence and can detect a second fault event, such as a second overcurrent event (OC2), based on the received pulse sequence. The pulse sequence generated by the second counter 354 can be generated asynchronously, as it represents current and may include spikes (or glitches), as described above. Therefore, the second digital engine 354 can synchronize the pulse sequence with its system clock (SCLK). For each clock cycle (e.g., 125 nanoseconds) or set of clock cycles of the system clock, the second digital engine 354 can store the previously obtained pulse sequence value in register 356.1 and can subtract it from the currently obtained pulse sequence value using subtractor 356.2 to generate the energy sequence (also called the power sequence) for that clock cycle (or set of clock cycles). The energy sequence can correspond to the energy / power consumed in the last cycle (or set of clock cycles). The second counter 354 can be large enough that it does not complete a full rotation of its count within the clock cycle of the system clock.

[0049] The second digital engine 356 may include an OC2 detector 356.3 to detect overcurrent events based on the generated energy sequence. The OC2 detector 356.3 may determine a modeled (e.g., virtual) junction temperature of a switching device (e.g., a MOSFET junction), compare the determined modeled junction temperature with a temperature threshold, and detect the occurrence of an overcurrent event OC2 based on the comparison.

[0050] The junction temperature of a MOSFET can be a reliable indicator of its safety and proper operability. For example, some MOSFETs can operate safely and normally at junction temperatures below 175°C, and may fail if their junction temperature exceeds 175°C for an extended period. Therefore, overcurrent conditions can be detected based on the junction temperature of a switching MOSFET.

[0051] Actual (or real) junction temperature can be difficult to measure. However, junction temperature is related to the power dissipated by the MOSFET, not only the instantaneous power at a selected point in time, but also the historical power dissipated over a period of time. Therefore, the OC2 detector 356.3 can determine the model junction temperature based on the power dissipated by the MOSFET, which is detected by a digital representation of the MOSFET's energy sequence and thermal characteristics.

[0052] Figure 5A The thermal resistance curve of an example MOSFET is shown. Figure 5B The circuit representation of the Cauer model of the example MOSFET is shown. Figure 5A In the diagram, the x-axis represents the time scale, and the y-axis represents the thermal resistance (or impedance) of the sample MOSFET. The thermal resistance can be calculated by dividing the temperature difference between the junction and the case of the MOSFET by the energy.

[0053] MOSFETs can be modeled as a network of cascaded resistors and capacitors, known as a Cauer thermal ladder, such as... Figure 5B As shown. A Cauer model can include a linear network of resistors and capacitors, with its input ports supplied with current proportional to the power, and its terminal ports supplied with a known thermal potential, such as the case temperature Tcase. The junction temperature Tj can correspond to the node between the first capacitor (Cj1) and the first resistor (RTj13) in the Cauer model. The values ​​of the resistors and capacitors in the Cauer model are based on the inherent characteristics of the MOSFET and can therefore be obtained from a digital model of the MOSFET, such as the SPICE (a simulation program with an integrated circuit focus) model. In one example, the numerical representation can be characterized as ΔT / (RiCi).

[0054] Return to reference Figure 3 The OC2 detector 356.3 can obtain, for example, the values ​​of the Cauer model of the switching device (e.g., MOSFET) from the digital model of the switching device, and can convert them into digital register values. Therefore, these digital register values ​​for resistors and capacitors in the Cauer model are configurable. Thus, based on the energy sequence and the digital Cauer model register values, the OC2 detector 356.3 can calculate the virtual junction temperature Tj of the switching device. The OC2 detector 353.3 can then compare the virtual junction temperature Tj with a temperature threshold (e.g., 175°C). If the determined virtual junction temperature Tj exceeds the temperature threshold, the BMS monitor 300 (e.g., the OC2 detector 356.3) can determine that an overcurrent event OC2 has occurred.

[0055] In response to the detection of either (or both) overcurrent events OC1 and OC2, the switching device can be disabled. The detection techniques described herein can quickly detect overcurrent events, thus enabling the switching device to be disabled relatively quickly before it fails.

[0056] Figures 6A-6F The computational techniques used to describe modeling (e.g., virtual) junction temperatures. Figure 6A An example binary RC system is shown. Here, two capacitors C1 and C2 are coupled in parallel with the intermediate resistor R to form a binary RC system. Figure 6B It shows Figure 6A The current curves in a binary RC system. There is a first potential V1 between C1 and R, and a second potential V2 between C2 and R.

[0057] V1 and V2 can be characterized as follows:

[0058]

[0059]

[0060] n is the time period, Δt is the periodic time, and τ is the time constant.

[0061] V1 and V2 can also be characterized as:

[0062]

[0063]

[0064] As mentioned above, a MOSFET can be modeled as a network of resistors and capacitors, such as the Cauer model. Therefore, the calculation techniques for V1[n+1] and V2[n+1] described above can be used to calculate the virtual junction temperature. Figure 6C A circuit diagram of a Cauer model of an example MOSFET is shown. As shown, the circuit diagram of this model includes a network of resistors (R1, R2, R3, R4, R5, R6) and capacitors (C0, C1, C2, C3, C4, C5). This resistor and capacitor network can be converted into multiple sets of binary pairs. Figure 6D The set of binary RC pairs is shown. Two computational elements (computational element 1 and computational element 2) can be used to solve for the value of the heat ladder when it is broken down into binary elements using a switching and timing scheme. The first computational element can be dedicated to solving for the first RC time constant, and the second computational element can be shared by the other RC elements.

[0065] Figure 6EA network with switched resistors is shown. Here, the resistors in the linear network can be replaced by switched resistors, and their resistance values ​​can be adjusted accordingly based on their binary positions. R1 remains R1 / 1; R2 becomes R2 / 2; R3 becomes R3 / 4; R4 becomes R / 8; R5 becomes R5 / 16; R6 becomes R6 / 32, and so on. Figure 6F The switching timing scheme is shown. As shown in the figure, the switching timing can be set so that the resistor connection timing is mutually exclusive. That is, only one resistor switch is closed at a time.

[0066] Therefore, one binary pair can be solved per cycle. For two computing elements, there may be mutually exclusive time slots for the second computing element, such as 2Δt, 4Δt, 8Δt, 16Δt, 32Δt, 64Δt, etc. The first computing element can be dedicated to solving the first binary pair. The time constant of the first binary pair can be equivalent to Δt. And the second computing element can then be shared by other binary pairs based on their mutually exclusive time slots. Then, the two computing elements may be able to solve for the value representing the thermal gradient of the MOSFET. The value of the first capacitor C0 can correspond to a junction temperature with a proportional constant, while the value of the capacitor can correspond to historical data.

[0067] Figure 7 The illustration shows an example portion of a BMS monitor 700. The BMS monitor 700 can detect shunt resistors R (e.g., Figure 1 The voltage across the shunt resistor 112. Based on the detected voltage, the BMS monitor 300 can use two different detection techniques to detect overcurrent events, detecting overcurrent event 1 (OC1) and event 2 (OC2) respectively. (See above reference...) Figure 1 As explained, the occurrence of one or both of the overcurrent events (OC1 and / or OC2) can trigger the disabling of switching devices, such as MOSFETs (e.g., Figure 1 (Switching device 110).

[0068] The BMS monitor 700 may include two processing chains 710 and 750 corresponding to two different overcurrent detection technologies. The first processing chain 710 may include analog components: a level converter 712, a polarity comparator 714, a polarity switch 716, a transconductor 718, a current signal squaring device 720, and a CCO 722.

[0069] Level shifter 712, polarity comparator 714, and polarity switch 716 can detect and adjust the voltage across the shunt resistor. Transconductor 718 can convert the detected (and adjusted) voltage into a current signal. Transconductor 718 can also apply gain, which can be adjustable. Current signal squaring device 720 can square the current signal to generate a squared current signal, which represents a power signal. CCO 722 can convert the squared current signal into a pulse sequence. Therefore, the pulse sequence can be current-controlled. Each pulse may correspond to a "unit of energy". The frequency of the pulse sequence can be proportional to the square of the detected voltage.

[0070] Counter 724 can count the number of pulses in a generated pulse sequence. Counter 724 can be provided as a rotary counter, such as a Galley counter.

[0071] Next, the pulse count can be received by the digital engine. Here, based on the system clock (SCLK), a previous value of the pulse count can be subtracted from the current value of the pulse count using a delay 726 and a subtractor 728 to generate an energy sequence (or power sequence) for a given clock cycle (or a set of clock cycles). The energy sequence can then be fed to multiple EMA filters 730. Each EMA filter 730 can be defined as a different time period, as discussed above. Each EMA filter 730 can determine the power consumed in its respective time window. A digital comparator 732 can compare the average power from each EMA filter 730 with a corresponding power threshold. The power thresholds for different windows can be configurable and can be set based on register values ​​from the main register file 734. The output of the digital comparator 732 can be fed into an OR gate 736. Therefore, if the average power of any determined time window exceeds its respective power threshold, the BMS monitor 700 can detect the occurrence of an overcurrent event OC1.

[0072] The second processing chain 750 may include analog components: a level shifter 752, a polarity comparator 754, a polarity switch 756, a current signal squaring device 760, and a CCO 762. These components may operate in the same or similar manner as their counterparts in the first processing chain 710. One or more of these components in the second processing chain 750 may be combined with or integrated with their counterparts in the first processing chain 710.

[0073] The second processing chain may also include a counter 764, a delay unit 766, and a subtractor 768 to generate an energy sequence. These components may operate in the same or similar manner as their counterparts in the first processing chain 710. One or more of these components in the second processing chain 750 may be combined or integrated with their counterparts in the first processing chain 710.

[0074] In the second processing chain 750, the Cauer thermal filter 770 can receive energy sequences. As described herein, the Cauer thermal filter 770 can also receive switching devices (e.g., T...). CASE The BMS monitor 700 can calculate the virtual junction temperature Tj of a switching device (e.g., a MOSFET) using the Cauer model's digital register values. The digital register values ​​can be configurable and set based on register values ​​from redundant register file 772 (or main register file 734). The digital comparator 774 can compare the virtual junction temperature with a temperature threshold. The temperature threshold can be configurable and set based on register values ​​from redundant register file 772 (or main register file 734). If the determined virtual junction temperature exceeds the temperature threshold, the BMS monitor 700 can detect the occurrence of an overcurrent event OC1. In response to the detection of at least one of overcurrent events OC1 and OC2, the switching device can be disabled.

[0075] Various annotations

[0076] Each of the above non-limiting aspects may exist independently or may be combined with one or more of the other aspects or other topics described herein in various permutations or combinations.

[0077] The above detailed description includes reference to the accompanying drawings, which form a part of the detailed description. The drawings illustrate, by way of illustration, specific embodiments in which the invention may be practiced. These implementations are generally also referred to as “examples.” Such examples may include elements other than those shown or described. However, the inventors have also contemplated examples that provide only those elements shown or described. Furthermore, the inventors have contemplated examples of any combination or arrangement of those elements (or one or more aspects thereof) shown or described, or with respect to a particular example (or one or more aspects thereof), or with respect to other examples (or one or more aspects thereof) shown or described herein.

[0078] In the event of any inconsistency between the usage in this document and any other document incorporated by reference, the usage in this document shall prevail.

[0079] In this document, as is common in patent documents, the terms “a” or “one” are used to include one or more, regardless of any other instances or uses of “at least one” or “one or more.” In this document, the term “or” is used to indicate a non-exclusive or, therefore, “A or B” includes “A but not B,” “B but not A,” and “A and B,” unless otherwise stated. In this document, the terms “comprising” and “wherein” are used as simple equivalents to the corresponding terms “comprising” and “wherein.” Furthermore, in the following claims, the terms “comprising” and “including” are open-ended, meaning that a system, apparatus, article, composition, formulation, or process, including elements other than those listed after the term in the claim, is still considered to be within the scope of that claim. Additionally, in the following claims, the terms “first,” “second,” and “third,” etc., are used merely as labels and are not intended to impose numerical requirements on their objects.

[0080] The methods described herein can be implemented, at least in part, by a machine or computer. Some examples may include a computer-readable or machine-readable medium encoded with instructions operable to configure an electronic device to perform the methods described in the examples above. Implementations of these methods may include code, such as microcode, assembly language code, high-level language code, etc. Such code may include computer-readable instructions for performing various methods. This code may form part of a computer program product. Furthermore, in the examples, the code may be tangibly stored on one or more volatile, non-transitory, or non-volatile tangible computer-readable media, for example, during execution or at other times. Examples of such tangible computer-readable media may include, but are not limited to, hard disks, removable disks, removable optical disks (e.g., optical discs and digital video disks), magnetic tapes, memory cards or memory sticks, random access memory (RAM), read-only memory (ROM), etc.

[0081] The above description is intended to be illustrative and not restrictive. For example, the examples (or one or more aspects thereof) described above may be used in combination with each other. Other embodiments may be used, for example, by those skilled in the art after reading the above description. The abstract is provided to enable the reader to quickly determine the nature of the technical disclosure. It is understood that this summary is not intended to be construed as limiting the scope or meaning of the claims. Furthermore, in the detailed description above, various features may be combined together to simplify this disclosure. This should not be construed as meaning that any unclaimed disclosed feature is essential to any claim. Rather, the inventive subject matter may not lie in all features of an implementation of a particular disclosure. Therefore, the following claims are incorporated herein by way of example or embodiment, each claim existing independently as a separate embodiment, and it is conceivable that such embodiments may be combined with each other in various combinations or arrangements. The scope of the invention should be determined by reference to the appended claims and the full scope of their equivalents.

Claims

1. A battery monitor for protecting a switching device used to supply power to a load, the battery monitor comprising: The converter circuit includes: Input for receiving voltage, and An oscillator for generating a pulse sequence based on the voltage; and Digital circuits, including: A first detector is used to detect the occurrence or non-occurrence of a first fault event of the switching device based on the average power of the pulse sequence measured at at least two different time windows. A second detector is used to detect the occurrence or non-occurrence of a second fault event of the switching device by determining the modeled junction temperature of the switching device based on the pulse sequence.

2. The battery monitor according to claim 1, further comprising: A resettable counter is used to count the pulses in the pulse sequence. The digital circuit is configured to determine the pulse count counted by the resettable counter and to determine the number of pulses received within a time period.

3. The battery monitor according to claim 1, wherein, The first fault event and the second fault event include overcurrent conditions.

4. The battery monitor according to claim 1, wherein, The battery monitor is configured to disable the switching device in response to detecting at least one of the first fault event or the second fault event.

5. The battery monitor according to claim 1, wherein, The switching device is a metal-oxide-semiconductor field-effect transistor (MOSFET).

6. The battery monitor according to claim 1, wherein, The first detector is configured as follows: Based on the pulse sequence, the power dissipated within different time windows is determined. For each time window, the power dissipated in that time window is compared with the corresponding power threshold for that window. The first fault event is detected in response to the power dissipated in at least one time window exceeding the corresponding power threshold of that window.

7. The battery monitor according to claim 1, wherein, The second detector is configured as follows: Obtain a digital representation of the resistor and capacitor values ​​of a linear network of resistors and capacitors representing the thermal characteristics of the switching device; and The modeling junction temperature is determined based on the resistor and capacitor values ​​and the pulse sequence.

8. The battery monitor according to claim 7, wherein, The second detector is further configured as follows: The resistors and capacitors are grouped into binary pairs; Assign the first computed element to the first binary pair; Assign the second computed element to the binary pair of the remaining groups.

9. The battery monitor according to claim 1, wherein, The converter circuit also includes: A voltage-to-power converter for converting the voltage into a squared current signal, and The oscillator is configured to convert the square current signal into the pulse sequence.

10. A method for protecting a switching device used to supply power to a load, comprising: Detect input voltage; Generate a pulse sequence based on the input voltage; The occurrence or non-occurrence of a first fault event of the switching device is determined based on the average power of the pulse sequence measured at at least two different time windows. The occurrence or non-occurrence of a second fault event of the switching device is determined by determining the modeled junction temperature of the switching device based on the pulse sequence; and In response to determining the occurrence of the first fault event or the second fault event, the operation of the switching device is disabled.

11. The method of claim 10, further comprising: The pulses in the pulse sequence are counted to generate a resettable count; and The number of pulses received within a time period is determined based on the resettable count.

12. The method according to claim 10, wherein, The first fault event and the second fault event include overcurrent conditions.

13. The method according to claim 10, wherein, The switching device is a metal-oxide-semiconductor field-effect transistor (MOSFET).

14. The method of claim 10, wherein, Determining whether the first fault event occurs or not includes: Based on the pulse sequence, the power dissipated within different time windows is determined. For each time window, the power dissipated in that time window is compared with the corresponding power threshold for that window. The first fault event is detected in response to the power dissipated in at least one time window exceeding the corresponding power threshold of that window.

15. The method of claim 10, wherein, Determining whether the second fault event occurs or not includes: Obtain a digital representation of the resistor and capacitor values ​​of a linear network of resistors and capacitors representing the thermal characteristics of the switching device; and The modeling junction temperature is determined based on the resistor and capacitor values ​​and the pulse sequence.

16. The method of claim 15, further comprising: The resistors and capacitors are grouped into binary pairs; Assign the first computed element to the first binary pair; Assign the second computed element to the binary pair of the remaining groups.

17. A means for protecting a switching device used to supply power to a load, the means comprising: The converter circuit includes: Input for receiving voltage, and An oscillator for generating a pulse sequence based on the voltage; The first fault detector, comprising multiple timing filters and comparators, is used for: The power dissipated over multiple time windows is determined based on the pulse sequence; For each of the plurality of time windows, the power dissipated in that time window is compared with the corresponding power threshold for that window; Based on the comparison, overcurrent events are detected; and In response to the detection of the overcurrent event, the switching device is disabled; A second fault detector is used to detect the occurrence or non-occurrence of a second fault event of the switching device by determining the modeled junction temperature of the switching device based on the pulse sequence.

18. The apparatus of claim 17, further comprising: A resettable counter is used to count the pulses in the pulse sequence. The first fault detector is configured to determine the pulse count counted by the resettable counter and to determine the number of pulses received within a time period.

19. The apparatus according to claim 17, wherein, The switching device is a metal-oxide-semiconductor field-effect transistor (MOSFET).

Images