A capacitive sensor

Abstract

The application discloses a capacitive sensor applied to the technical field of circuits, and relates to the technical field of circuits, and comprises a capacitive sensitive part, a direct current excitation generating circuit, a capacitive voltage conversion circuit, and an amplification circuit.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of circuit, in particular to a capacitive sensor. BACKGROUND

[0002] Capacitive sensors are often used to detect sensitive engineering physical quantities, for example, the current MEMS (Micro-Electro-Mechanical System) acceleration sensor can measure the capacitance change caused by the relative vibration of the resonator of the mechanical second-order system receiving the forced vibration of the machine in the sensor relative to the sensor fixed body fixed with the machine. The current capacitive sensor usually uses an alternating current carrier to excite the capacitance of the capacitive sensor, and at the same time obtains the alternating current carrier current change caused by the capacitance change of the sensor, so as to realize the measurement of the variable capacitance. However, the alternating current carrier will also cause the fixed capacitance to change the current, so the detected variable current needs to be subtracted from the alternating current caused by the fixed capacitance to obtain the current caused by the variable capacitance, and a complex modulation and demodulation conversion process is required to realize the measurement of the variable capacitance and the engineering physical quantity.

[0003] For reference Figure 1 The principle block diagram of the differential capacitance detection circuit based on the alternating current carrier excitation in the traditional scheme, the advantage of this scheme is that it can detect extremely slow changing variable capacitance and its corresponding physical quantity, for example, the MEMS acceleration sensor described above can be used to measure the gravitational acceleration, acceleration and deceleration of uniform motion. However, the capacitive detection circuit based on the alternating current carrier excitation needs to have a high-frequency carrier signal generation circuit, a switching phase-sensitive detection circuit, a low-pass demodulation circuit, etc., which makes the circuit structure complex, the reliability is low, and the performance requirements of operational amplifier and other components are very high.

[0004] In summary, how to more simply and conveniently realize the capacitive sensor and enhance the reliability is a technical problem that the technical personnel in the field urgently need to solve at present. SUMMARY

[0005] The purpose of the present application is to provide a capacitive sensor to more simply and conveniently realize the capacitive sensor and enhance the reliability.

[0006] To solve the above technical problems, the present application provides the following technical scheme:

[0007] A capacitive sensor, comprising:

[0008] A capacitance sensitive part for reflecting the value of the detected target quantity through the capacitance change of itself;

[0009] A direct current excitation generation circuit for outputting a set direct current;

[0010] A capacitance voltage conversion circuit connected with the capacitance sensitive part and the direct current excitation generation circuit respectively, for using the output of the direct current excitation generation circuit as a direct current reference, and performing capacitance voltage conversion to output a voltage signal reflecting the current capacitance value of the capacitance sensitive part;

[0011] An amplification circuit connected with the capacitance voltage conversion circuit, for performing voltage signal amplification, so that the current value of the target quantity to be measured is determined by the output voltage of the amplification circuit.

[0012] Preferably, the capacitance voltage conversion circuit is a differential capacitance voltage conversion circuit, and the amplification circuit is a differential amplification circuit, and the direct current excitation generation circuit is specifically configured to:

[0013] output a first direct current and a second direct current, and the voltage of the first direct current is -VREF=VREF-the voltage of the second direct current, VREF representing the voltage of the reference voltage terminal.

[0014] Preferably, the amplitudes of the first direct current and the second direct current are equal.

[0015] Preferably, the direct current excitation generation circuit comprises a first operational amplifier, a second operational amplifier, a first resistor, a second resistor, a third resistor, and a fourth resistor.

[0016] The positive input terminal of the first operational amplifier is connected with the first terminal of the first resistor, and the connection terminal is connected with the reference voltage terminal; the negative input terminal of the first operational amplifier is connected with the first terminal of the third resistor and the first terminal of the fourth resistor respectively, and the output terminal of the first operational amplifier is connected with the second terminal of the third resistor, and the connection terminal serves as the positive output terminal of the direct current excitation generation circuit to output the first direct current set.

[0017] The output terminal of the second operational amplifier is connected with the second terminal of the fourth resistor and the negative input terminal of the second operational amplifier respectively, and the connection terminal serves as the negative output terminal of the direct current excitation generation circuit to output the second direct current set; the positive input terminal of the second operational amplifier is connected with the second terminal of the first resistor and the first terminal of the second resistor respectively, and the second terminal of the second resistor is grounded.

[0018] Preferably, the capacitance sensitive part is a capacitance sensitive part adopting a bipolar differential capacitance structure, and when the target quantity to be measured changes, the differential capacitance value of the capacitance sensitive part changes synchronously to reflect the value of the detected target quantity to be measured.

[0019] Preferably, the capacitance sensitive part comprises a first dynamic capacitance, a second dynamic capacitance, a first static capacitance, and a second static capacitance.

[0020] The first end of the first dynamic capacitor is connected with the first end of the first static capacitor, and the connecting end serves as a first electrode end of the capacitive sensitive part; the second end of the second dynamic capacitor is connected with the second end of the second static capacitor, and the connecting end serves as a second electrode end of the capacitive sensitive part; the second end of the first dynamic capacitor is connected with the second end of the first static capacitor, the first end of the second dynamic capacitor and the first end of the second static capacitor respectively.

[0021] Preferably, the connecting end of the first dynamic capacitor and the connecting end of the second dynamic capacitor serve as a common end of the capacitive sensitive part.

[0022] Preferably, the common end is suspended, or the common end is grounded, or the common end is connected with a reference voltage end, or the common end is connected with a machine ground of the capacitive sensor.

[0023] Preferably, the capacitive sensor further comprises: a first shielding line for the first transmission line, and a second shielding line for the second transmission line.

[0024] The first transmission line is a wire for connecting the first excitation detection end of the differential capacitive voltage conversion circuit with the first electrode end of the capacitive sensitive part, and the second transmission line is a wire for connecting the second excitation detection end of the differential capacitive voltage conversion circuit with the second electrode end of the capacitive sensitive part.

[0025] Preferably, the first end of the first shielding line is connected with a first shielding end of the capacitive sensor housing, and the first end of the first shielding line is connected with the common end through a first shielding capacitor.

[0026] The first end of the second shielding line is connected with a second shielding end of the capacitive sensor housing, and the first end of the second shielding line is connected with the common end through a second shielding capacitor.

[0027] The second end of the first shielding line and the second end of the second shielding line are both connected with a reference voltage end or are both grounded.

[0028] Preferably, the first end of the first shielding line is connected with a first shielding end of the capacitive sensor housing, and the first end of the first shielding line is connected with the common end through a first shielding capacitor, and the second end of the first shielding line is connected with a positive output end of the direct current excitation generation circuit for outputting the first direct current.

[0029] The first end of the second shielding line is connected with a second shielding end of the capacitive sensor housing, and the first end of the second shielding line is connected with the common end through a second shielding capacitor, and the second end of the second shielding line is connected with a negative output end of the direct current excitation generation circuit for outputting the second direct current.

[0030] The common end is a connecting end of the first dynamic capacitance and the second dynamic capacitance.

[0031] Preferably, the differential amplification circuit comprises a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a third operational amplifier and a fourth operational amplifier.

[0032] A first end of the fifth resistor is a positive input end of the differential amplification circuit, a second end of the fifth resistor is connected with a second end of the sixth resistor and a positive input end of the third operational amplifier respectively, a first end of the sixth resistor is used for receiving the second direct current output by the direct current excitation generation circuit, a negative input end of the third operational amplifier is connected with a second end of the seventh resistor and a first end of the eighth resistor respectively, a first end of the seventh resistor is a negative input end of the differential amplification circuit, and an output end of the third operational amplifier is connected with a second end of the eighth resistor and a first end of the ninth resistor respectively.

[0033] A second end of the ninth resistor is connected with a second end of the tenth resistor and a positive input end of the fourth operational amplifier respectively, a first end of the tenth resistor is connected with a reference voltage end, a negative input end of the fourth operational amplifier is connected with a second end of the eleventh resistor and a first end of the twelfth resistor respectively, a first end of the eleventh resistor is used for receiving the first direct current output by the direct current excitation generation circuit, and an output end of the fourth operational amplifier is connected with a second end of the twelfth resistor and a connecting end is an output end of the differential amplification circuit.

[0034] Preferably, the differential amplification circuit comprises a twenty-ninth resistor, a thirtieth resistor, a thirty-first resistor, a thirty-second resistor, a thirty-third resistor, a thirty-fourth resistor and a ninth operational amplifier.

[0035] A first end of the twenty-ninth resistor is a positive input end of the differential amplification circuit, a second end of the twenty-ninth resistor is connected with a second end of the thirtieth resistor, a second end of the thirty-first resistor and a positive input end of the ninth operational amplifier respectively, a first end of the thirtieth resistor is used for receiving the second direct current output by the direct current excitation generation circuit, and a first end of the thirty-first resistor is connected with a reference voltage end.

[0036] The negative input end of the ninth operational amplifier is connected with the second end of the thirty-second resistor, the second end of the thirty-third resistor and the first end of the thirty-fourth resistor respectively, the output end of the ninth operational amplifier is connected with the second end of the thirty-fourth resistor and the connection end is the output end of the differential amplification circuit, the first end of the thirty-second resistor is used for receiving the first direct current output by the direct current excitation generation circuit, and the first end of the thirty-third resistor is the negative input end of the differential amplification circuit.

[0037] Preferably, the differential capacitive voltage conversion circuit comprises a fifth operational amplifier, a sixth operational amplifier, a first capacitor, a second capacitor, a thirteenth resistor, a fourteenth resistor, a fifteenth resistor and a sixteenth resistor.

[0038] The negative input end of the fifth operational amplifier is connected with the first end of the first capacitor and the first end of the thirteenth resistor respectively, and the connection end is the first excitation detection end of the differential capacitive voltage conversion circuit; the positive input end of the fifth operational amplifier is used for receiving the first direct current output by the direct current excitation generation circuit, the second end of the thirteenth resistor is connected with the first end of the fourteenth resistor, the output end of the fifth operational amplifier is connected with the second end of the first capacitor and the second end of the fourteenth resistor respectively, and the connection end is the positive output end of the differential capacitive voltage conversion circuit.

[0039] The negative input end of the sixth operational amplifier is connected with the first end of the second capacitor and the first end of the fifteenth resistor respectively, and the connection end is the second excitation detection end of the differential capacitive voltage conversion circuit; the positive input end of the sixth operational amplifier is used for receiving the second direct current output by the direct current excitation generation circuit, the second end of the fifteenth resistor is connected with the first end of the sixteenth resistor, the output end of the sixth operational amplifier is connected with the second end of the second capacitor and the second end of the sixteenth resistor respectively, and the connection end is the negative output end of the differential capacitive voltage conversion circuit.

[0040] Preferably, the differential capacitive voltage conversion circuit further comprises:

[0041] A first RC circuit, the first end of the first RC circuit is connected with the second end of the thirteenth resistor and the first end of the fourteenth resistor respectively, and the second end of the first RC circuit is connected with the second end of the fifteenth resistor and the first end of the sixteenth resistor respectively.

[0042] Preferably, the first RC circuit comprises a third capacitor and a seventeenth resistor.

[0043] The first end of the third capacitor is the first end of the first RC circuit, the second end of the third capacitor is connected with the first end of the seventeenth resistor, and the second end of the seventeenth resistor is the second end of the first RC circuit.

[0044] Preferably, further comprising:

[0045] A common-mode negative feedback circuit connected with the differential capacitor voltage conversion circuit, for reducing common-mode input current through the output negative feedback current.

[0046] Preferably, the common-mode negative feedback circuit comprises an eighteenth resistor, a nineteenth resistor, a fourth capacitor and a fifth capacitor.

[0047] The first end of the eighteenth resistor is connected with the positive output end of the differential capacitor voltage conversion circuit, the second end of the eighteenth resistor is connected with the first end of the nineteenth resistor, the second end of the fourth capacitor and the first end of the fifth capacitor respectively, the second end of the nineteenth resistor is connected with the negative output end of the differential capacitor voltage conversion circuit, the first end of the fourth capacitor is connected with the second excitation detection end of the differential capacitor voltage conversion circuit, and the second end of the fifth capacitor is connected with the first excitation detection end of the differential capacitor voltage conversion circuit.

[0048] Preferably, further comprising:

[0049] A charge multiplication circuit connected with the differential capacitor voltage conversion circuit, for increasing the gain of the differential capacitor voltage conversion circuit.

[0050] Preferably, the charge multiplication circuit is specifically used for:

[0051] The multiplication current signal proportional to the output current signal of the differential capacitor voltage conversion circuit is fed back to the differential capacitor voltage conversion circuit, so as to increase the input current of the differential capacitor voltage conversion circuit and improve the gain coefficient of the differential capacitor voltage conversion circuit.

[0052] Preferably, the charge multiplication circuit comprises a sixth capacitor and a seventh capacitor.

[0053] The first end of the sixth capacitor is connected with the positive output end of the differential capacitor voltage conversion circuit, the second end of the sixth capacitor is connected with the second excitation detection end of the differential capacitor voltage conversion circuit, the second end of the seventh capacitor is connected with the negative output end of the differential capacitor voltage conversion circuit, and the first end of the seventh capacitor is connected with the first excitation detection end of the differential capacitor voltage conversion circuit.

[0054] Preferably, further comprising:

[0055] A leakage suppression circuit connected with the differential capacitor voltage conversion circuit, used for reducing the external leakage resistance of the differential capacitor voltage conversion circuit.

[0056] Preferably, the leakage suppression circuit is composed of two identical comparison amplifier feedback control circuits, and the leakage suppression circuit is specifically used for:

[0057] When the differential capacitor voltage conversion circuit has an external leakage resistance, the DC drift caused by the external leakage resistance is identified by comparison amplification, and is fed back to the corresponding transmission line of the differential capacitor voltage conversion circuit by filtering to suppress the DC drift caused by the external leakage resistance.

[0058] Preferably, further comprising: a leakage suppression circuit connected with the differential capacitor voltage conversion circuit, used for reducing the external leakage resistance of the differential capacitor voltage conversion circuit, and the leakage suppression circuit comprises: a twentieth resistance, a twenty-first resistance, a twenty-second resistance, a twenty-third resistance, a twenty-fourth resistance, a twenty-fifth resistance, a twenty-sixth resistance, a twenty-seventh resistance, a seventh operational amplifier, an eighth operational amplifier and a second RC circuit;

[0059] The first end of the twentieth resistance is used as the first input end of the leakage suppression circuit, the second end of the twentieth resistance is connected with the first end of the second RC circuit and the positive input end of the seventh operational amplifier respectively, the negative input end of the seventh operational amplifier is connected with the second end of the twenty-first resistance and the first end of the twenty-second resistance respectively, the output end of the seventh operational amplifier is connected with the second end of the twenty-second resistance and the first end of the twenty-third resistance respectively, the second end of the twenty-third resistance is connected with the first excitation detection end of the differential capacitor voltage conversion circuit, and the first end of the twenty-first resistance is used for receiving the first DC current output by the DC excitation generation circuit.

[0060] The first end of the twenty-sixth resistance is used as the second input end of the leakage suppression circuit, the second end of the twenty-sixth resistance is connected with the second end of the second RC circuit and the positive input end of the eighth operational amplifier respectively, the negative input end of the eighth operational amplifier is connected with the second end of the twenty-fifth resistance and the first end of the twenty-fourth resistance respectively, the output end of the eighth operational amplifier is connected with the second end of the twenty-fourth resistance and the first end of the twenty-seventh resistance respectively, the second end of the twenty-seventh resistance is connected with the second excitation detection end of the differential capacitor voltage conversion circuit, and the first end of the twenty-fifth resistance is used for receiving the second DC current output by the DC excitation generation circuit.

[0061] The first input end of the leakage suppression circuit is connected with the second end of the thirteenth resistor and the first end of the fourteenth resistor respectively, and the second input end of the leakage suppression circuit is connected with the second end of the fifteenth resistor and the first end of the sixteenth resistor respectively.

[0062] With the technical scheme provided by the embodiment of the application, it is considered that although the traditional capacitive detection circuit based on alternating current carrier excitation has the advantage of being able to detect extremely slowly changing variable capacitance and the corresponding physical quantity, that is, being able to measure static information, in current engineering applications, a large number of detection requirements are directed to dynamic information, such as the acceleration of machine vibration, the rotating speed of a rotating shaft, the relative dynamic distance of two machine parts, and the like, that is, capacitive sensors that cannot measure static information but can measure dynamic information can be applied in most fields. In view of this, the scheme of the application considers that the application can not need to set a circuit for generating a high-frequency carrier excitation signal, but can realize capacitive detection based on direct current carrier excitation, so as to enable the capacitive sensor to have a simple structure and high reliability while realizing the measurement of dynamic information.

[0063] Specifically, in the scheme of the application, the capacitive sensitive part can reflect the value of the detected target quantity to be measured through the change of the capacitance thereof, and the capacitive voltage conversion circuit of the application can use the output of the direct current excitation generation circuit as a direct current reference, and then perform capacitive voltage conversion on the output of the capacitive sensitive part, so as to output a voltage signal for reflecting the current capacitance value of the capacitive sensitive part. Therefore, after the amplification circuit amplifies the voltage signal, the rear-stage circuit can determine the current value of the target quantity to be measured based on the output voltage of the amplification circuit. It can be seen that the scheme of the application can realize the detection of dynamic information, that is, the change of the value of the target quantity to be measured will be reflected on the change of the capacitance of the capacitive sensitive part. Moreover, since the scheme of the application does not need to generate a high-frequency carrier excitation signal as in the traditional scheme, but uses the output of the direct current excitation generation circuit to set a direct current, that is, the application adopts direct current carrier excitation to realize capacitive detection, the circuit structure is simple, the cost is low, and the reliability is very high. BRIEF DESCRIPTION OF DRAWINGS

[0064] In order to more clearly illustrate the technical schemes in the embodiments of the application or the prior art, the following will briefly introduce the drawings needed to be used in the embodiments or the prior art description. Obviously, the drawings in the following description are only some embodiments of the application, and for those skilled in the art, other drawings can also be obtained from these drawings without creative labor.

[0065] Figure 1 a principle block diagram of a differential capacitive detection circuit based on alternating current carrier excitation in the traditional scheme;

[0066] Figure 2a A structure diagram of a capacitive sensor according to an embodiment of the present application;

[0067] Figure 2b A structure diagram of a capacitive sensor according to an embodiment of the present application;

[0068] Figure 3a A structure diagram of a capacitive sensor according to an embodiment of the present application;

[0069] Figure 3b A structure diagram of a capacitive sensor according to an embodiment of the present application;

[0070] Figure 3c A structure diagram of a capacitive sensor according to an embodiment of the present application;

[0071] Figure 3d A structure diagram of a capacitive sensor according to an embodiment of the present application;

[0072] Figure 4 A structure diagram of a capacitive sensor according to an embodiment of the present application;

[0073] Figure 5 A structure diagram of a capacitive sensor according to an embodiment of the present application;

[0074] Figure 6 A structure diagram of a capacitive sensor according to an embodiment of the present application;

[0075] Figure 7a A structure diagram of a capacitive sensor according to an embodiment of the present application;

[0076] Figure 7b A structure diagram of a capacitive sensor according to an embodiment of the present application;

[0077] Figure 8a A structure diagram of a capacitive sensor according to an embodiment of the present application;

[0078] Figure 8b A structure diagram of a capacitive sensor according to an embodiment of the present application;

[0079] Figure 9a A structure diagram of a capacitive sensor according to an embodiment of the present application;

[0080] Figure 9b A structure diagram of a capacitive sensor according to an embodiment of the present application;

[0081] Figure 9c A structure diagram of a capacitive sensor according to an embodiment of the present application;

[0082] Figure 9d a simulation waveform schematic diagram in a fourth case;

[0083] Figure 9e a simulation waveform schematic diagram in a fifth case;

[0084] Figure 9f a simulation waveform schematic diagram in a sixth case;

[0085] Figure 9g a simulation waveform schematic diagram in a seventh case. DETAILED DESCRIPTION

[0086] The core of the present application is to provide a capacitive sensor, which adopts direct current carrier excitation to realize capacitive detection, has simple circuit structure, low cost and high reliability.

[0087] In order to enable the personnel in the technical field to better understand the present application scheme, the present application is further described in detail below in combination with the drawings and specific embodiments. Obviously, the described embodiments are only some of the embodiments of the present application, but not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by the person skilled in the art without making creative efforts belong to the scope of protection of the present application.

[0088] Please refer to Figure 2a , Figure 2a is a structural schematic diagram of a capacitive sensor in the present application, which can include:

[0089] a capacitive sensitive part 10, which is used to reflect the value of the detected target quantity through the change of its own capacitance;

[0090] a direct current excitation generation circuit 20, which is used to output a set direct current;

[0091] a capacitive voltage conversion circuit 30 connected with the capacitive sensitive part 10 and the direct current excitation generation circuit 20 respectively, which is used to use the output of the direct current excitation generation circuit 20 as a direct current reference, and perform capacitive voltage conversion to output a voltage signal for reflecting the current capacitance value of the capacitive sensitive part 10;

[0092] an amplification circuit 40 connected with the capacitive voltage conversion circuit 30, which is used to amplify the voltage signal, so that the current value of the target quantity to be detected is determined by the output voltage of the amplification circuit 40 based on the subsequent circuit.

[0093] Specifically, the specific structure of the capacitance sensitive part 10 can be set and adjusted as needed, as long as it can reflect the value of the detected target quantity through its own capacitance change. The specific type of the target quantity can also be various, such as the acceleration of machine vibration, the rotating speed of a rotating shaft, the relative dynamic distance between two machine parts, etc.

[0094] In actual application, considering the accuracy of measurement, the capacitance voltage conversion circuit 30 can be specifically a differential capacitance voltage conversion circuit 30, and the amplification circuit 40 can be specifically a differential amplification circuit 40. When the differential capacitance voltage conversion circuit 30 is adopted, the capacitance sensitive part 10 can be selected to have two output ports, i.e., the capacitance sensitive part 10 can be specifically a capacitance sensitive part adopting a bipolar differential capacitance structure. When the target quantity changes, the differential capacitance value of the capacitance sensitive part 10 changes synchronously to reflect the value of the detected target quantity.

[0095] That is to say, when the external physical quantity, such as vibration, rotating speed, angle, displacement, etc., changes, the differential capacitance value of the capacitance sensitive part 10 adopting the bipolar differential capacitance structure changes synchronously.

[0096] Of course, the specific structure of the capacitance sensitive part 10 adopting the bipolar differential capacitance structure can be selected as needed. For example, in one specific embodiment of the present application, refer to Figure 3a , which is a structural schematic diagram of the capacitance sensitive part 10 in one specific embodiment. It can include a first dynamic capacitance CD1, a second dynamic capacitance CD2, a first static capacitance CJ1, and a second static capacitance CJ2.

[0097] The first end of the first dynamic capacitance CD1 is connected with the first end of the first static capacitance CJ1, and the connection end serves as the first electrode end of the capacitance sensitive part 10. The second end of the second dynamic capacitance CD2 is connected with the second end of the second static capacitance CJ2, and the connection end serves as the second electrode end of the capacitance sensitive part 10. The second end of the first dynamic capacitance CD1 is connected with the second end of the first static capacitance CJ1, the first end of the second dynamic capacitance CD2, and the first end of the second static capacitance CJ2, respectively.

[0098] In Figure 3a the embodiment, the capacitance sensitive part 10 has two output ports, which are marked as the first electrode end and the second electrode end of the capacitance sensitive part 10, respectively. When the value of the detected target quantity is 0, Figure 3a the capacitance values of the first dynamic capacitance CD1 and the second dynamic capacitance CD2 in the embodiment are both 0. When the target quantity changes, the capacitance values of the first dynamic capacitance CD1 and the second dynamic capacitance CD2 change, i.e., the capacitance sensitive part 10 changes in capacitance.

[0099] It should be further noted that when the to-be-measured target quantity changes, the specific physical structure design that causes the first dynamic capacitance CD1 and the second dynamic capacitance CD2 of the capacitance sensitive part 10 to change can be various, and can be set according to actual needs, for example, due to the change of the to-be-measured target quantity, the position of the corresponding plate in the capacitance sensitive part 10 changes, and then the capacitance values of the first dynamic capacitance CD1 and the second dynamic capacitance CD2 change.

[0100] Figure 3a The capacitance sensitive part 10 in the capacitance sensitive part 10 includes a first capacitance sensitive part CMG1 and a second capacitance sensitive part CMG2, and when the to-be-measured target quantity changes, CMG1 and CMG2 can change by the same capacitance or change by a similar proportion of capacitance, depending on the structure design of the capacitance sensitive part 10. The capacitance values of the first static capacitance CJ1 and the second static capacitance CJ2 are not affected by the to-be-measured target quantity. CMG1=CJ1+CD1, CMG2=CJ2+CD2. In this application, the connection end of CMG1 and CMG2 is called the common end, that is, the connection end of the first dynamic capacitance CD1 and the second dynamic capacitance CD2 as the common end of the capacitance sensitive part 10, of course, the common end is also the connection end of the first static capacitance CJ1 and the second static capacitance CJ2.

[0101] In a specific embodiment of the present application, the common end can be suspended, or the common end can be grounded, or the common end can be connected with the reference voltage end, or the common end can be connected with the machine ground of the capacitive sensor. It can be seen that the flexibility of the connection mode of the common end is very high. In actual application, when the common end is grounded or connected with the reference voltage end, a dedicated cable can be used to connect to the ground GND or the reference voltage end VREF. The machine ground of the capacitive sensor can be the shell of the capacitive sensor, can be a conductive layer inside the shell of the capacitive sensor and insulated from the sensor shell, and in addition, the machine ground can be artificially or naturally connected with the power supply ground GND of the circuit.

[0102] In a specific embodiment of the present application, it can further include: a first shielding line for the first transmission line, and a second shielding line for the second transmission line.

[0103] The first transmission line is a wire for connecting the first excitation detection end of the differential capacitance voltage conversion circuit 30 and the first electrode end of the capacitance sensitive part 10, and the second transmission line is a wire for connecting the second excitation detection end of the differential capacitance voltage conversion circuit 30 and the second electrode end of the capacitance sensitive part 10.

[0104] In this embodiment, the first shielding line and the second shielding line are respectively arranged for the first transmission line and the second transmission line, which can effectively reduce external interference. For details, please refer to Figure 3bA first shielding line and a second shielding line are respectively arranged for the first transmission line and the second transmission line.

[0105] Further, in one specific embodiment of the present application, the first end of the first shielding line is connected to the first shielding end of the capacitive sensor housing, and the first end of the first shielding line is connected to the common end through a first shielding capacitor CC01. Figure 3d

[0106] The first end of the second shielding line is connected to the second shielding end of the capacitive sensor housing, and the first end of the second shielding line is connected to the common end through a second shielding capacitor CC02.

[0107] The second end of the first shielding line and the second end of the second shielding line are both connected to the reference voltage end or both grounded.

[0108] In this embodiment, the second end of the first shielding line and the second end of the second shielding line are both connected to the reference voltage end VREF or both connected to GND. Since the first shielding capacitor CC01 and the second shielding capacitor CC02 are arranged, it is beneficial to reduce interference.

[0109] Further, in one specific embodiment of the present application, the first end of the first shielding line is connected to the first shielding end of the capacitive sensor housing, and the first end of the first shielding line is connected to the common end through a first shielding capacitor CC01. The second end of the first shielding line is connected to the positive output end of the direct current excitation generation circuit 20 for outputting the first direct current.

[0110] The first end of the second shielding line is connected to the second shielding end of the capacitive sensor housing, and the first end of the second shielding line is connected to the common end through a second shielding capacitor CC02. The second end of the second shielding line is connected to the negative output end of the direct current excitation generation circuit 20 for outputting the second direct current.

[0111] The common end is the connection end of the first dynamic capacitor CD1 and the second dynamic capacitor CD2.

[0112] Reference can be made to Figure 3c The connection structure diagram of the first shielding line and the second shielding line in one specific embodiment. Figure 3c In this embodiment, CP1 represents the distribution capacitance of the first shielding line to the first transmission line, and CP2 represents the distribution capacitance of the second shielding line to the second transmission line. If the distribution capacitances CP1 and CP2 are fixed, they are equivalent to being connected in parallel to the static capacitances CJ1 and CJ2 of the capacitive sensitive part 10, which does not affect the performance of the sensor. However, if the distribution capacitances CP1 and CP2 are slightly jittered due to machine vibration or other reasons, alternating components CPD1 and CPD2 appear, which are equivalent to being connected in parallel to the dynamic capacitances CD1 and CD2 of the capacitive sensitive part 10, thereby causing noise interference.​

[0113] In this regard, in the above-mentioned embodiment, the second end of the first shield line and the second end of the second shield line are both connected to GND or VREF. In the embodiment of the present application, in order to overcome the noise caused by the above-mentioned alternating components CPD1 and CPD2 caused by the vibration of the transmission line and the shield line, the second end of the first shield line is connected to the positive output end of the direct current excitation generation circuit 20 for outputting the first direct current, and the second end of the second shield line is connected to the negative output end of the direct current excitation generation circuit 20 for outputting the second direct current. That is, the second end of the first shield line is connected to UR1, and the second end of the second shield line is connected to UR2, so as to implement equipotential driving of the distributed capacitances CP1 and CP2 of the transmission line surrounded by the shield line, and further eliminate the noise caused by the alternating components CPD1 and CPD2. The first shield line and the second shield line connected to UR1 and UR2 respectively pass through equal capacitors, i.e., the first shield capacitor CC01 and the second shield capacitor CC02, and are connected to the common end of CMG1 and CMG2 of the capacitive sensing part 10, i.e., the connection end of the first dynamic capacitor CD1 and the second dynamic capacitor CD2, so as to implement equipotential driving of the transmission line and the capacitive sensing part 10, thereby preventing the common end from coupling external interference.

[0114] The capacitive voltage conversion circuit 30, i.e., the C / V conversion circuit, is connected to the capacitive sensing part 10 and the direct current excitation generation circuit 20 respectively. The direct current excitation generation circuit 20 is used to output a set direct current, i.e., to provide a direct current reference voltage for the capacitive voltage conversion circuit 30, and the capacitive voltage conversion circuit 30 can perform capacitive voltage conversion on the output of the capacitive sensing part 10, so as to output a voltage signal reflecting the current capacitance value of the capacitive sensing part 10.

[0115] The specific structures of the capacitive voltage conversion circuit 30 and the direct current excitation generation circuit 20 can be set and adjusted as needed. As described above, the capacitive voltage conversion circuit 30 can be generally selected as a differential capacitive voltage conversion circuit 30, and the direct current excitation generation circuit 20 can be specifically used to output a set first direct current and a set second direct current, and the voltage of the first direct current is -VREF=VREF-VREF, where VREF represents the voltage of the reference voltage end. In actual applications, in order to facilitate the capacitive voltage conversion circuit 30 to effectively filter common mode interference, the amplitudes of the first direct current and the second direct current can be generally equal.

[0116] For reference Figure 2b is a structural schematic diagram of a capacitive sensor in a specific embodiment of the present application, Figure 2bThe capacitor voltage conversion circuit 30 in the application is a differential capacitor voltage conversion circuit 30, which is composed of two C / V circuits. Figure 2b The capacitor sensitive part in the application is also a capacitor sensitive part 10 with two output ports, Figure 2b The amplification circuit 40 in the application is a differential amplification circuit 40, which specifically includes a differential amplifier 1 and a differential amplifier 2.

[0117] In one specific embodiment of the application, refer to Figure 4 FIG. 2 is a structural schematic diagram of the DC excitation generation circuit 20 in one specific embodiment. The DC excitation generation circuit 20 in this specific embodiment has simple structure and high reliability, and can effectively output DC UR1 and UR2 with the voltage difference equal to the voltage of the reference voltage terminal VREF and the polarity opposite, i.e. the first DC UR1-VREF=VREF-the second DC. In the subsequent embodiments of the application, the first DC output by the DC excitation generation circuit 20 is marked as UR1, as the positive output terminal, and the second DC output by the DC excitation generation circuit 20 is marked as UR2, as the negative output terminal.

[0118] Figure 4 The DC excitation generation circuit 20 includes a first operational amplifier OP1, a second operational amplifier OP2, a first resistor R1, a second resistor R2, a third resistor R3 and a fourth resistor R4.

[0119] The positive input terminal of the first operational amplifier OP1 is connected with the first terminal of the first resistor R1 and the connection terminal is connected with the reference voltage terminal; the negative input terminals of the first operational amplifier OP1 are respectively connected with the first terminal of the third resistor R3 and the first terminal of the fourth resistor R4, and the output terminal of the first operational amplifier OP1 is connected with the second terminal of the third resistor R3 and the connection terminal is used as the positive output terminal of the DC excitation generation circuit 20 to output the set first DC.

[0120] The output terminal of the second operational amplifier OP2 is respectively connected with the second terminal of the fourth resistor R4 and the negative input terminal of the second operational amplifier OP2, and the connection terminal is used as the negative output terminal of the DC excitation generation circuit 20 to output the set second DC; the positive input terminals of the second operational amplifier OP2 are respectively connected with the second terminal of the first resistor R1 and the first terminal of the second resistor R2, and the second terminal of the second resistor R2 is grounded.

[0121] Figure 4 In the application, the reference voltage VREF is divided by the first resistor R1 and the second resistor R2 with respect to the ground voltage GND, and a negative excitation voltage UR2 relative to VREF is generated at the two terminals of the first resistor R1. The output terminal of the second operational amplifier OP2 follows the voltage on the first resistor R1 and outputs the negative excitation voltage UR2. In practical applications, the third resistor R3 can be set equal to the fourth resistor R4, and the first operational amplifier OP1 inverts and amplifies the negative excitation voltage UR2 by 1 times to output the positive excitation voltage UR1.

[0122] It should be noted that the specific value of the reference voltage VREF of the present application and the providing circuit of VREF can be set as needed, for example Figure 4 In the embodiment of the present application, the providing circuit of VREF is realized by a resistor R402 and a voltage stabilizing diode V401.

[0123] When the capacitor voltage conversion circuit 30 is selected as a differential capacitor voltage conversion circuit 30, it can be composed of a positive C / V conversion circuit and a negative C / V conversion circuit, and can refer to Figure 5 Fig. 2 is a structural schematic diagram of a differential capacitor voltage conversion circuit 30 in a specific embodiment, which includes a fifth operational amplifier OP5, a sixth operational amplifier OP6, a first capacitor C1, a second capacitor C2, a thirteenth resistor R13, a fourteenth resistor R14, a fifteenth resistor R15 and a sixteenth resistor R16.

[0124] The negative input end of the fifth operational amplifier OP5 is connected with the first end of the first capacitor C1 and the first end of the thirteenth resistor R13 respectively, and the connecting end is the first excitation detection end of the differential capacitor voltage conversion circuit 30; the positive input end of the fifth operational amplifier OP5 is used for receiving the first direct current output by the direct current excitation generation circuit 20, the second end of the thirteenth resistor R13 is connected with the first end of the fourteenth resistor R14, and the output end of the fifth operational amplifier OP5 is connected with the second end of the first capacitor C1 and the second end of the fourteenth resistor R14 respectively, and the connecting end is the positive output end of the differential capacitor voltage conversion circuit 30.

[0125] The negative input end of the sixth operational amplifier OP6 is connected with the first end of the second capacitor C2 and the first end of the fifteenth resistor R15 respectively, and the connecting end is the second excitation detection end of the differential capacitor voltage conversion circuit 30; the positive input end of the sixth operational amplifier OP6 is used for receiving the second direct current output by the direct current excitation generation circuit 20, the second end of the fifteenth resistor R15 is connected with the first end of the sixteenth resistor R16, and the output end of the sixth operational amplifier OP6 is connected with the second end of the second capacitor C2 and the second end of the sixteenth resistor R16 respectively, and the connecting end is the negative output end of the differential capacitor voltage conversion circuit 30.

[0126] Figure 5 In the embodiment, the positive C / V conversion circuit and the negative C / V conversion circuit each include one operational amplifier, two resistors and one capacitor, and the positive input end of the fifth operational amplifier OP5 in the positive C / V conversion circuit is connected to the positive excitation voltage UR1, i.e. receives the first direct current output by the direct current excitation generation circuit 20. The positive input end of the sixth operational amplifier OP6 in the negative C / V conversion circuit is connected to the negative excitation voltage UR2, i.e. receives the second direct current output by the direct current excitation generation circuit 20. Figure 5In the embodiment, the first excitation detection end and the second excitation detection end of the capacitor voltage conversion circuit 30 are marked as I1 and I2 respectively. The positive output end and the negative output end of the capacitor voltage conversion circuit 30 are marked as U01 and U02 respectively.

[0127] In the embodiment, the basic detection sensitivity function S of the positive C / V conversion circuit and the negative C / V conversion circuit can be expressed as: S = UR*CD / CM, wherein the parameter UR = UR1-VREF = VREF-UR2, CD = CD1 = CD2 is the dynamic capacitance of the capacitor sensitive part 10, and CM = C1 = C2 is the feedback capacitance from the output end of the fifth operational amplifier OP5 and the sixth operational amplifier OP6 to the negative input end.

[0128] In the embodiment, the application can further include:

[0129] The common-mode negative feedback circuit connected with the differential capacitor voltage conversion circuit 30 is used to reduce the common-mode input current through the output negative feedback current.

[0130] The common-mode negative feedback circuit arranged in the embodiment can be used to suppress common-mode interference. Through the common-mode negative feedback circuit, the common-mode input voltage can be prevented from exceeding the common-mode input range of the fifth operational amplifier OP5 and the sixth operational amplifier OP6, the common-mode voltage output by the fifth operational amplifier OP5 and the sixth operational amplifier OP6 is reduced, and the subsequent differential amplification circuit 40 can more effectively eliminate common-mode interference through differential amplification.

[0131] The specific structure of the common-mode negative feedback circuit can also be various, for example, in the embodiment, the common-mode negative feedback circuit can specifically include an eighteenth resistor R18, a nineteenth resistor R19, a fourth capacitor C4 and a fifth capacitor C5. Figure 6

[0132] The first end of the eighteenth resistor R18 is connected with the positive output end of the differential capacitor voltage conversion circuit 30, the second end of the eighteenth resistor R18 is connected with the first end of the nineteenth resistor R19, the second end of the fourth capacitor C4 and the first end of the fifth capacitor C5 respectively, the second end of the nineteenth resistor R19 is connected with the negative output end of the differential capacitor voltage conversion circuit 30, the first end of the fourth capacitor C4 is connected with the second excitation detection end of the differential capacitor voltage conversion circuit 30, and the second end of the fifth capacitor C5 is connected with the first excitation detection end of the differential capacitor voltage conversion circuit 30.

[0133] In the embodiment, the application can further include: Figure 6 ​In the embodiment, the eighteenth resistor R18 and the nineteenth resistor R19 can be set as two sampling devices, and in other embodiments, two equal capacitors can also be set as two sampling devices. The fourth capacitor C4 and the fifth capacitor C5 are two common-mode feedback capacitors. In addition, it should be noted that the connection ends of the two sampling devices, i.e. Figure 6 In the embodiment, the connection ends of the eighteenth resistor R18 and the nineteenth resistor R19 can be directly connected or connected to the connection ends of the common-mode feedback capacitors C4 and C5 through an operational amplifier follower, Figure 6 In the embodiment, the connection ends of the eighteenth resistor R18 and the nineteenth resistor R19 can be directly connected or connected to the connection ends of the common-mode feedback capacitors C4 and C5 through an operational amplifier follower,

[0134] For the common-mode negative feedback circuit of Figure 6 When the connection ends of the eighteenth resistor R18 and the nineteenth resistor R19 are connected to the connection ends of the C4 and C5 through an operational amplifier follower, the common-mode rejection effect function GM is: GM=20log(CG / CM), wherein CG=C4=C5, and CM=C1=C2, which are the feedback capacitors from the output ends of the fifth operational amplifier OP5 and the sixth operational amplifier OP6 to the negative input ends.

[0135] For example, when CG=C4=C5=1n and CM=C1=C2=10pF, the common-mode rejection effect can be represented as: GM=20log(CG / CM)=20log(1n / 10p)=40dB, and thus the common-mode rejection effects of the common-mode outputs UO1 and UO2 are both-40dB.

[0136] Further, in a specific embodiment of the present application, referring to Figure 6 The application can also include:

[0137] The first RC circuit has a first end connected to the second end of the thirteenth resistor R13 and the first end of the fourteenth resistor R14, and has a second end connected to the second end of the fifteenth resistor R15 and the first end of the sixteenth resistor R16.

[0138] In the specific embodiment of the present application, the first RC circuit connected to the differential capacitive voltage conversion circuit 30, i.e., the low-frequency bootstrap bypass, can effectively reduce the low-frequency cutoff frequency, expand the bandwidth, and thus effectively improve the low-frequency performance.

[0139] Figure 6 In the embodiment, the first RC circuit specifically includes a third capacitor C3 and a seventeenth resistor R17.

[0140] The first end of the third capacitor C3 is the first end of the first RC circuit, the second end of the third capacitor C3 is connected with the first end of the seventeenth resistor R17, and the second end of the seventeenth resistor R17 is the second end of the first RC circuit. In this embodiment, the first RC circuit is composed of the third capacitor C3 and the seventeenth resistor R17, which has simple structure and high reliability.

[0141] In a specific embodiment of the present application, it can also include:

[0142] A charge multiplication circuit connected with the differential capacitor voltage conversion circuit 30 and used for increasing the gain of the differential capacitor voltage conversion circuit 30.

[0143] In this embodiment, the gain of the differential capacitor voltage conversion circuit 30 is increased by the charge multiplication circuit, and the use flexibility of the present application is improved.

[0144] The specific structure of the charge multiplication circuit can be set and adjusted as needed. In a specific embodiment, the charge multiplication circuit can be specifically used for:

[0145] The multiplication current signal proportional to the output current signal of the differential capacitor voltage conversion circuit 30 is fed back to the differential capacitor voltage conversion circuit 30, so as to increase the input current of the differential capacitor voltage conversion circuit 30 and improve the gain coefficient of the differential capacitor voltage conversion circuit 30.

[0146] In this embodiment, the charge multiplication circuit specifically amplifies the output current of the differential capacitor voltage conversion circuit 30, and then feeds it back to the capacitor voltage conversion circuit 30, so as to improve the voltage gain of the capacitor voltage conversion circuit 30.

[0147] The specific structure of the charge multiplication circuit can be set and adjusted as needed. For example, in a specific embodiment of the present application, the charge multiplication circuit can include a sixth capacitor C6 and a seventh capacitor C7.

[0148] For details, please refer to Figure 7a The first end of the sixth capacitor C6 is connected with the positive output end of the differential capacitor voltage conversion circuit 30, the second end of the sixth capacitor C6 is connected with the second excitation detection end of the differential capacitor voltage conversion circuit 30, the second end of the seventh capacitor C7 is connected with the negative output end of the differential capacitor voltage conversion circuit 30, and the first end of the seventh capacitor C7 is connected with the first excitation detection end of the differential capacitor voltage conversion circuit 30.

[0149] In actual application, C6=C7 can be set. By charge multiplication, the gain improvement function BZ of the positive C / V conversion circuit and the negative C / V conversion circuit can be represented as:

[0150] BZ = 20log[CM / (CM-CBZ)], wherein CM = C1 = C2, the feedback capacitance from the output terminal to the negative input terminal of the fifth operational amplifier OP5 and the sixth operational amplifier OP6, CBZ = C6 = C7;

[0151] For example, CM = C1 = C2 = 1000 pF, CBZ = C6 = C7 = 990 pF,

[0152] BZ = 20log[CM / (CM-CBZ)] = 20log[1000p / (1000p-990p)] = 40 dB.

[0153] It can be seen that, in actual application, by appropriately increasing the capacitance values of the sixth capacitor C6 and the seventh capacitor C7, the gain can be improved, i.e., the charge multiplication effect can be strengthened.

[0154] The amplification circuit 40 can amplify the voltage signal, so that the subsequent circuit determines the current value of the to-be-measured target quantity based on the output voltage of the amplification circuit 40. Generally, the output voltage of the amplification circuit 40 can be proportional to the current value of the to-be-measured target quantity. The specific structure of the subsequent circuit can be set and adjusted according to actual needs, and depends on the specific design of the sensor.

[0155] As described above, the amplification circuit 40 can be a differential amplification circuit 40.

[0156] In one specific embodiment of the present application, referring to Figure 7a , the differential amplification circuit 40 can include a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a third operational amplifier OP3, and a fourth operational amplifier OP4.

[0157] The first end of the fifth resistor R5 serves as the positive input terminal of the differential amplification circuit 40, the second end of the fifth resistor R5 is connected with the second end of the sixth resistor R6 and the positive input terminal of the third operational amplifier OP3 respectively, the first end of the sixth resistor R6 is used to receive the second direct current output by the direct current excitation generation circuit 20, the negative input terminal of the third operational amplifier OP3 is connected with the second end of the seventh resistor R7 and the first end of the eighth resistor R8 respectively, the first end of the seventh resistor R7 serves as the negative input terminal of the differential amplification circuit 40, and the output terminal of the third operational amplifier OP3 is connected with the second end of the eighth resistor R8 and the first end of the ninth resistor R9 respectively.

[0158] The second end of the ninth resistor R9 is connected with the second end of the tenth resistor R10 and the positive input end of the fourth operational amplifier OP4 respectively, the first end of the tenth resistor R10 is connected with the reference voltage terminal, the negative input end of the fourth operational amplifier OP4 is connected with the second end of the eleventh resistor R11 and the first end of the twelfth resistor R12 respectively, the first end of the eleventh resistor R11 is used for receiving the first direct current output by the direct current excitation generation circuit 20, and the output end of the fourth operational amplifier OP4 is connected with the second end of the twelfth resistor R12 and the connection terminal is used as the output terminal of the differential amplification circuit 40.

[0159] Figure 7b In the embodiment, the differential amplification circuit 40 is two-stage, the output of the first stage is UCF, and the output of the second stage is UCFF. The differential amplification circuit 40 of the first stage includes the third operational amplifier OP3 and four resistors, and the fifth resistor R5, the sixth resistor R6, the seventh resistor R7 and the eighth resistor R8 can have equal resistance values.

[0160] In the conventional scheme, the first end of the sixth resistor R6 is connected with the ground GND or the reference voltage VREF. In this way, the direct current level of the output voltage UCF of the third operational amplifier OP3 is higher than that of U01, thereby causing signal amplitude limiting or dynamic range reduction.

[0161] In the scheme of the present application, the first end of the sixth resistor R6 is connected with the negative excitation voltage UR2, i.e., the first end of the sixth resistor R6 is used for receiving the second direct current UR2 output by the direct current excitation generation circuit 20. In this way, the direct current level of the output voltage UCF of the third operational amplifier OP3 is always equal to that of U01.

[0162] The differential amplification circuit 40 of the second stage includes the fourth operational amplifier OP4 and four resistors, and the ninth resistor R9, the tenth resistor R10, the eleventh resistor R11 and the twelfth resistor R12 can have equal resistance values.

[0163] In the conventional scheme, the first end of the eleventh resistor R11 is connected with the ground GND or the reference voltage VREF. In this way, the direct current level of the output voltage UCFF of the fourth operational amplifier OP4 is too high, thereby causing signal amplitude limiting or dynamic range reduction.

[0164] In the scheme of the present application, the first end of the eleventh resistor R11 is connected with the positive excitation voltage UR1, i.e., the first end of the eleventh resistor R11 is used for receiving the first direct current UR1 output by the direct current excitation generation circuit 20. In this way, the direct current level of the output voltage UCFF of the fourth operational amplifier OP4 is always equal to the reference voltage VREF, thereby achieving the effect of automatically stabilizing the optimal working point.

[0165] In the above embodiments, when the resistance values of the fifth resistor R5, the sixth resistor R6, the seventh resistor R7 and the eighth resistor R8 are all set to be equal, the dynamic amplification factor of the differential amplifier circuit 40 in the front stage is 1. When R9=R11 and R10=R12 are set, the dynamic amplification factor of the differential amplifier circuit 40 in the rear stage is R10 / R9=R12 / R11.

[0166] In one specific embodiment of the present application, referring to Figure 7b , the differential amplifier circuit 40 can include a twenty-ninth resistor R29, a thirtieth resistor R30, a thirty-first resistor R31, a thirty-second resistor R32, a thirty-third resistor R33, a thirty-fourth resistor R34 and a ninth operational amplifier OP9.

[0167] The first end of the twenty-ninth resistor R29 is used as the positive input end of the differential amplifier circuit 40, the second end of the twenty-ninth resistor R29 is connected to the second end of the thirtieth resistor R30, the second end of the thirty-first resistor R31 and the positive input end of the ninth operational amplifier OP9 respectively, the first end of the thirtieth resistor R30 is used to receive the second direct current UR2 output by the direct current excitation generation circuit 20, and the first end of the thirty-first resistor R31 is connected to the reference voltage end VREF.

[0168] The negative input end of the ninth operational amplifier OP9 is connected to the second end of the thirty-second resistor R32, the second end of the thirty-third resistor R33 and the first end of the thirty-fourth resistor R34 respectively, the output end of the ninth operational amplifier OP9 is connected to the second end of the thirty-fourth resistor R34 and the connection end is used as the output end of the differential amplifier circuit 40, the first end of the thirty-second resistor R32 is used to receive the first direct current UR1 output by the direct current excitation generation circuit 20, and the first end of the thirty-third resistor R33 is used as the negative input end of the differential amplifier circuit.

[0169] As can be seen from the circuit structure, in the embodiments of Figure 7a , only one operational amplifier, i.e., the ninth operational amplifier OP9, is needed to realize the differential amplifier circuit 40 of the present application and to realize the input operating point shift and the alternating current signal amplification. Since only one operational amplifier is needed, the number of operational amplifiers required is saved compared to the embodiments of Figure 8a .

[0170] In one specific embodiment of the present application, it can also include:

[0171] A leakage suppression circuit connected to the differential capacitor voltage conversion circuit 30 for reducing the external leakage resistance of the differential capacitor voltage conversion circuit 30.

[0172] In one specific embodiment of the present application, referring to Figure 8b, shows the external leakage resistance R05 and R06 of the differential capacitor voltage conversion circuit 30, which can cause the output UCFF of the positive C / V conversion circuit, the negative C / V conversion circuit and the differential amplification circuit 40 of the differential capacitor voltage conversion circuit 30 to deviate from the working point and to be amplitude-limited. Therefore, in this embodiment, the leakage suppression circuit which can reduce the external leakage resistance of the differential capacitor voltage conversion circuit 30 is provided.

[0173] The specific structure of the leakage suppression circuit can be set and adjusted as needed. In one specific embodiment of the present application, the leakage suppression circuit is composed of two identical comparison amplification feedback control circuits, and the leakage suppression circuit can be specifically used for:

[0174] When the differential capacitor voltage conversion circuit 30 has external leakage resistance, the DC drift caused by the external leakage resistance is identified by comparison amplification, and is fed back to the corresponding transmission line of the differential capacitor voltage conversion circuit 30 through filtering, so as to suppress the DC drift caused by the external leakage resistance.

[0175] Specifically, the wire for connecting the first excitation detection end of the differential capacitor voltage conversion circuit 40 and the first electrode end of the capacitor sensitive part 10 is called the first transmission line, and the wire for connecting the second excitation detection end of the differential capacitor voltage conversion circuit 40 and the second electrode end of the capacitor sensitive part 40 is called the second transmission line. When the differential capacitor voltage conversion circuit 30 has external leakage resistance, i.e. when the first transmission line and the second transmission line have leakage resistance to the potentials not equal to UR1 and UR2, it means that the differential capacitor voltage conversion circuit 30 has external leakage resistance, for example, VREF, GND and VCC are not equal to the potentials of UR1 and UR2. The leakage suppression circuit provided in the present application can identify the DC drift caused by the external leakage resistance by comparison amplification, and then feed back to the first transmission line and the second transmission line through filtering, so as to suppress the DC drift caused by the external leakage resistance.

[0176] In addition, it should be noted that the low-frequency bootstrap circuit, i.e. the design of the first RC circuit, is also beneficial to reduce the external leakage resistance of the differential capacitor voltage conversion circuit 30 in the above embodiment.

[0177] For details, please refer to Figure 8b For the structure diagram of the leakage suppression circuit in one specific embodiment, the leakage suppression circuit includes: the twentieth resistance R20, the twenty-first resistance R21, the twenty-second resistance R22, the twenty-third resistance R23, the twenty-fourth resistance R24, the twenty-fifth resistance R25, the twenty-sixth resistance R26, the twenty-seventh resistance R27, the seventh operational amplifier OP7, the eighth operational amplifier OP8 and the second RC circuit.

[0178] The first end of the twentieth resistor R20 is connected to the first input end of the leakage suppression circuit, the second end of the twentieth resistor R20 is connected to the first end of the second RC circuit and the positive input end of the seventh operational amplifier OP7 respectively, the negative input end of the seventh operational amplifier OP7 is connected to the second end of the twenty-first resistor R21 and the first end of the twenty-second resistor R22 respectively, the output end of the seventh operational amplifier OP7 is connected to the second end of the twenty-second resistor R22 and the first end of the twenty-third resistor R23 respectively, the second end of the twenty-third resistor R23 is connected to the first excitation detection end of the differential capacitor voltage conversion circuit 30, and the first end of the twenty-first resistor R21 is used for receiving the first direct current output by the direct current excitation generation circuit 20.

[0179] The first end of the twenty-sixth resistor R26 is connected to the second input end of the leakage suppression circuit, the second end of the twenty-sixth resistor R26 is connected to the second end of the second RC circuit and the positive input end of the eighth operational amplifier OP8 respectively, the negative input end of the eighth operational amplifier OP8 is connected to the second end of the twenty-fifth resistor R25 and the first end of the twenty-fourth resistor R24 respectively, the output end of the eighth operational amplifier OP8 is connected to the second end of the twenty-fourth resistor R24 and the first end of the twenty-seventh resistor R27 respectively, the second end of the twenty-seventh resistor R27 is connected to the second excitation detection end of the differential capacitor voltage conversion circuit 30, and the first end of the twenty-fifth resistor R25 is used for receiving the second direct current output by the direct current excitation generation circuit 20.

[0180] The first input end of the leakage suppression circuit is connected to the second end of the thirteenth resistor R13 and the first end of the fourteenth resistor R14 respectively, and the second input end of the leakage suppression circuit is connected to the second end of the fifteenth resistor R15 and the first end of the sixteenth resistor R16 respectively.

[0181] Figure 8b In the embodiment, the leakage suppression circuit is composed of two same comparison amplification feedback control circuits, the reliability of the circuit is higher, and the leakage suppression effect is better.

[0182] Figure 8b In the embodiment, one of the comparison amplification feedback control circuits contains the twentieth resistor R20, the twenty-first resistor R21, the twenty-second resistor R22, the twenty-third resistor R23 and the seventh operational amplifier OP7. The first end of the twentieth resistor R20 is connected to the W1 end, that is, the connection end of the thirteenth resistor R13 and the fourteenth resistor R14, that is, the first end of the first RC circuit. The output end of the seventh operational amplifier OP7 outputs a control voltage through the twenty-third resistor R23 and is connected to the first excitation detection end I1 of the differential capacitor voltage conversion circuit 30, that is, the negative input end of the fifth operational amplifier OP5 of the positive C / V conversion circuit.

[0183] The other one is a comparison amplification feedback control circuit, which comprises a twenty-fourth resistor R24, a twenty-fifth resistor R25, a twenty-sixth resistor R26, a twenty-seventh resistor R27 and an eighth operational amplifier OP8. The first end of the twenty-sixth resistor R26 is connected to the W2 end, i.e. the connecting end of the fifteenth resistor R15 and the sixteenth resistor R16, and is also connected to the second end of the first RC circuit. The output end of the eighth operational amplifier OP8 outputs a control voltage through the twenty-seventh resistor R27 and is connected to the second excitation detection end I2 of the differential capacitor voltage conversion circuit 30, i.e. the negative input end of the sixth operational amplifier OP6 of the negative C / V conversion circuit.

[0184] The second RC circuit is connected between the positive input end of the seventh operational amplifier OP7 and the positive input end of the eighth operational amplifier OP8, and comprises a twenty-eighth resistor R28 and an eighth capacitor C8 connected in series. Figure 9a

[0185] According to Faraday's theorem, when the voltage on the capacitor C is U, the charge Q obtained by the capacitor is Q=U*C. Therefore, when the fixed voltage U acts on the alternating capacitor Cd, the alternating charge on the capacitor can be represented as QD=U*Cd, and the differential of the alternating charge is the alternating current, which can be measured by the capacitor voltage conversion circuit 30. Similarly, when the capacitor is constant and the dynamic voltage changes, the alternating charge will also be generated on the capacitor, and the same can be measured by the capacitor voltage conversion circuit 30. Since the alternating capacitor cannot be obtained in circuit simulation, in order to simulate the alternating charge or alternating current generated by the alternating capacitor under the action of the fixed voltage, the alternating voltage UD can be applied to the fixed capacitor.

[0186] In the specific simulation, the signal generator UG can be set to convert UCD1 and UCD2, which are equivalent to UG, to act on the fixed values CD1 and CD2, respectively, so as to generate the alternating current, which is equivalent to the alternating current generated by the fixed voltages UR1 and UR2 acting on the alternating capacitors CD1 and CD1.

[0187] For reference Figure 9b ​Fig. 4 is a simulation waveform diagram of the first case. In this case, the common terminal is suspended, the excitation voltage amplitude is set to 2V, i.e. UR1=2V, UR1=-2V, and the dynamic capacitance size is 100fF. In this case, no shield line is set, there is a coupling capacitance of 1nF between the transmission line and the machine ground, and there is a 1V interference on the machine ground. In this case, a common-mode negative feedback circuit is set. As can be seen from the simulation waveform diagram, the output U01 at the positive output terminal of the differential capacitive voltage conversion circuit 30 and the output U02 at the negative output terminal of the differential capacitive voltage conversion circuit 30 both have a ground common-mode interference of a peak-to-peak value of 1V, so that no alternating signal corresponding to UG, VCD1, and VCD2 can be seen from U01 and U02. However, since the differential amplification circuit 40 eliminates the common-mode interference, the signal corresponding to UG can be extracted. In this case, the output sensitivity of the output UCFF of the differential amplification circuit 40 is S2=1V / 100fF=10V / 1pF.

[0188] Reference can be made to Figure 9c Fig. 5 is a simulation waveform diagram of the second case. In this case, the common terminal is suspended, the excitation voltage amplitude is set to 2V, and the dynamic capacitance size is 100fF. In this case, no shield line is set, there is a coupling capacitance of 1nF between the transmission line and the machine ground, and there is a 1V interference on the machine ground. In this case, no common-mode negative feedback circuit is set. As can be seen, the output U01 at the positive output terminal of the differential capacitive voltage conversion circuit 30 and the output U02 at the negative output terminal of the differential capacitive voltage conversion circuit 30 both have a strong ground common-mode interference, which reaches a peak-to-peak value of 6V. Compared with the first case in which the common-mode negative feedback circuit is set, the ground common-mode interference is increased by about 6 times and is close to the amplitude limiting, which can even cause the detection signal to be distorted, so that no alternating signal corresponding to UG, VCD1, and VCD2 can be seen from U01 and U02. However, since the differential amplification circuit 40 can eliminate the common-mode interference, the signal corresponding to UG can be extracted. In this case, the output sensitivity of the output UCFF of the differential amplification circuit 40 is S2=1V / 100fF=10V / 1pF.

[0189] Reference can be made to Figure 9dFig. 6 is a simulation waveform diagram of the third case. In this case, the common terminal is suspended, the excitation voltage amplitude is set to 2V, and the dynamic capacitance size is 100fF. In this case, the first and second shield lines are provided, the second end of the first shield line and the second end of the second shield line are connected to VREF, and the first end of the first shield line and the first end of the second shield line are connected to the machine ground through a 100nF capacitor, i.e., the first shield capacitor CC01 and the second shield capacitor CC02 are provided to suppress the interference to the machine ground, and a common mode negative feedback circuit is provided. As can be seen from the simulation waveform diagram, the ground interference is not obviously reduced. However, the output U01 of the positive output terminal and the output U02 of the negative output terminal of the differential capacitive voltage conversion circuit 30 have almost no ground common mode interference, because the capacitance of the transmission line to the shield line is connected to UR and has no effect of coupling interference, so the alternating signals corresponding to UG, VCD1 and VCD2 can be seen. Then, the residual common mode interference is removed by the differential amplification circuit 40 to extract the signal corresponding to UG, and the output sensitivity of UCFF of the differential amplification circuit 40 is S2=1V / 100fF=10V / 1pF. As can be seen from the simulation in this case, the first shield capacitor CC01 and the second shield capacitor CC02 have little effect on the suppression of interference.

[0190] For reference Figure 9e Fig. 7 is a simulation waveform diagram of the fourth case. In this case, the common terminal is connected to the machine ground, the excitation voltage amplitude is set to 2V, the dynamic capacitance size is 100fF, the second end of the first shield line and the second end of the second shield line are connected to VREF, and the first end of the first shield line and the first end of the second shield line are connected to the machine ground through a 100nF capacitor, i.e., the first shield capacitor CC01 and the second shield capacitor CC02 are provided to suppress the interference to the machine ground, and a common mode negative feedback circuit is provided. As can be seen from the simulation waveform diagram, the ground interference is not obviously reduced, and appears in the common terminal, and the output U01 of the positive output terminal and the output U02 of the negative output terminal of the differential capacitive voltage conversion circuit 30 also appear the ground common mode interference, and the alternating signals corresponding to UG, VCD1 and VCD2 can still be seen, because although the capacitance of the transmission line to the shield line is connected to UR and has no effect of coupling interference, the static capacitance couples the interference of the common terminal connected to the machine ground. After the signals containing the ground common mode interference of U01 and U02 are transmitted to the differential amplification circuit 40, the residual common mode interference can be removed by the differential amplification circuit 40 to extract the signal corresponding to UG, and the output sensitivity of UCFF of the differential amplification circuit 40 is S2=1V / 100fF=10V / 1pF.

[0191] For reference Figure 9fFig. 6 is a simulation waveform diagram in the sixth case. In this case, the common terminal is open (only 46uV DC drift), the dynamic capacitance CD1 = CD2 = 100fF is static, i.e. VCD1 = VCD2 = 0, and the excitation voltage UR1 = 2V. The second end of the first shield line is connected to VREF, the static capacitance CP1 of the first shield line to the first transmission line is 1nF, and there is also a 100fF vibration capacitance, i.e. CPD1 in Fig. 6. At this time, an interference of a peak-to-peak value of 1V is generated. As can be seen from the simulation in this case, when the second end of the first shield line is connected to VREF instead of UR1, a small dithering capacitance of the first shield line will also cause strong shield line vibration and thus interference output.

[0192] See Figure 9f Fig. 6 is a simulation waveform diagram in the sixth case. In this case, the common terminal is open (only 46uV DC drift), the dynamic capacitance CD1 = CD2 = 100fF is static, i.e. VCD1 = VCD2 = 0, and the excitation voltage UR1 = 2V. The second end of the first shield line is connected to VREF, the static capacitance CP1 of the first shield line to the first transmission line is 1nF, and there is also a 100fF vibration capacitance, i.e. CPD1 in Fig. 6. At this time, an interference of a peak-to-peak value of 1V is generated. As can be seen from the simulation in this case, when the second end of the first shield line is connected to VREF instead of UR1, a small dithering capacitance of the first shield line will also cause strong shield line vibration and thus interference output. Figure 9g Fig. 6 is a simulation waveform diagram in the sixth case. In this case, the common terminal is open (only 46uV DC drift), the dynamic capacitance CD1 = CD2 = 100fF is static, i.e. VCD1 = VCD2 = 0, and the excitation voltage UR1 = 2V. The second end of the first shield line is connected to VREF, the static capacitance CP1 of the first shield line to the first transmission line is 1nF, and there is also a 100fF vibration capacitance, i.e. CPD1 in Fig. 6. At this time, an interference of a peak-to-peak value of 1V is generated. As can be seen from the simulation in this case, when the second end of the first shield line is connected to VREF instead of UR1, a small dithering capacitance of the first shield line will also cause strong shield line vibration and thus interference output.

[0193] See ​Fig. 7 is a schematic diagram of a simulation waveform in the seventh case. In this case, the common terminal is open (only 46uV DC drift), the dynamic capacitances CD1=CD2=100fF are static, i.e. VCD1=VCD2=0, and the excitation voltage UR1=2V. The second terminal of the first shield line is connected to UR1=2V. Although the static capacitance CP1 of the first shield line to the first transmission line is 1nF, and there is also a vibration capacitance of 100fF, no interference is generated at the output terminal. The simulation in this case shows that when the second terminal of the first shield line is not connected to VREF but to UR1, even if the first shield line has a large vibration capacitance CPD1, no shield line vibration interference will occur at the output.

[0194] In a specific simulation case, when the external leakage resistances R05 and R06 of the differential capacitance voltage conversion circuit 30 are not present, the DC drift of UCFF output by the differential amplification circuit 40 is 1.09uV. When the external leakage resistances R05 and R06 of the differential capacitance voltage conversion circuit 30 are present and the leakage suppression circuit is provided, the DC drift of UCFF output by the differential amplification circuit 40 is 109mV. When the external leakage resistances R05 and R06 of the differential capacitance voltage conversion circuit 30 are present and the leakage suppression circuit is not provided, the DC drift of UCFF output by the differential amplification circuit 40 can reach 27V under the condition that the op-amp power supply voltage is infinite.

[0195] It can be seen that the leakage suppression circuit can suppress the DC drift of UCFF output by the differential amplification circuit 40 to a very low level. That is, the leakage suppression circuit is very important in engineering applications, can overcome the circuit drift caused by external leakage, and ensures the reliability and stability in engineering field.

[0196] By applying the technical solutions provided by the embodiments of the present application, it is considered that although the traditional capacitance detection circuit based on AC carrier excitation has the advantage of being able to detect extremely slowly changing changing capacitances and their corresponding physical quantities, i.e. being able to measure static information, in current engineering applications, a large number of detection requirements are directed to dynamic information, such as the acceleration of machine vibration, the rotation speed of a rotating shaft, the relative dynamic distance of two machine parts, etc. That is, a capacitance sensor that cannot measure static information but can measure dynamic information can be applied in most fields. In view of this, the scheme of the present application considers that the present application can not need to set a circuit for generating a high-frequency carrier excitation signal, but can realize capacitance detection based on a DC carrier excitation, can realize the measurement of dynamic information, and can make the capacitance sensor structure simple and reliable.

[0197] Specifically, in the scheme of the present application, the capacitance sensitive part 10 can reflect the value of the detected target quantity through the change of its own capacitance, and the capacitance-voltage conversion circuit 30 of the present application can use the output of the direct current excitation generation circuit 20 as a direct current reference, and then perform capacitance-voltage conversion on the output of the capacitance sensitive part 10, so as to output a voltage signal for reflecting the current capacitance value of the capacitance sensitive part 10. Therefore, after the amplification circuit 40 amplifies the voltage signal, the rear-stage circuit can determine the current value of the target quantity based on the output voltage of the amplification circuit 40. It can be seen that the scheme of the present application can realize dynamic information detection, that is, the change of the value of the target quantity will be reflected on the capacitance change of the capacitance sensitive part 10. Moreover, since the scheme of the present application does not need to generate a high-frequency carrier excitation signal as in the traditional scheme, but uses the output of the direct current excitation generation circuit 20 as a direct current, that is, the present application uses direct current carrier excitation to realize capacitance detection, so the circuit structure is simple, the cost is low, and the reliability is high.

[0198] It is also necessary to note that, in this document, the relationship terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between the entities or operations. Moreover, the terms "include", "contain" or any other variants thereof are intended to cover non-exclusive inclusion, so that the process, method, article or device including a series of elements not only includes those elements, but also includes other elements not explicitly listed or inherent to such process, method, article or device. Without more limitations, the element defined by the statement "including a" does not exclude the presence of another identical element in the process, method, article or device including the element.

[0199] The various embodiments in the specification are described in a progressive manner, and each embodiment focuses on the difference from other embodiments. The same or similar parts between various embodiments can be referred to each other. The skilled person can further realize that the units and algorithm steps of the examples described in combination with the embodiments disclosed in the present text can be realized by electronic hardware, computer software or combination of both. In order to clearly show the interchangeability of hardware and software, the composition and steps of each example have been described in the above description. Whether the functions are realized by hardware or software depends on the specific application and design constraints of the technical solution. The skilled person can use different methods to realize the described functions for each specific application, but such implementation should not be considered beyond the scope of the present application.

[0200] The principles and implementation manners of the present application are described by using specific examples in the present application, and the above examples are only used to help understand the technical solutions of the present application and the core ideas thereof. It should be noted that, for those skilled in the art, without departing from the principles of the present application, the present application can be improved and modified in several ways, and these improvements and modifications also fall within the protection scope of the present application.

Claims

1. A capacitive sensor, characterized by The application relates to a capacitance sensitive part, a direct current excitation generation circuit, a capacitance voltage conversion circuit, an amplification circuit and a leakage suppression circuit. The capacitance sensitive part is used for reflecting the detected value of a measured target quantity through self capacitance change. The direct current excitation generation circuit is used for outputting a set direct current. The capacitance voltage conversion circuit is connected with the capacitance sensitive part and the direct current excitation generation circuit, and is used for carrying out capacitance voltage conversion by taking the output of the direct current excitation generation circuit as a direct current reference, so as to output a voltage signal for reflecting the current capacitance value of the capacitance sensitive part. The amplification circuit is connected with the capacitance voltage conversion circuit, and is used for carrying out voltage signal amplification, so that the current value of the measured target quantity is determined by the output voltage of the amplification circuit. The capacitance voltage conversion circuit is a differential capacitance voltage conversion circuit, the amplification circuit is a differential amplification circuit, and the direct current excitation generation circuit is specifically used for outputting a set first direct current and a second direct current, and the voltage of the first direct current is -VREF=VREF-Voltage of the second direct current, wherein VREF represents the voltage of a reference voltage terminal. The capacitance sensitive part is a capacitance sensitive part adopting a bipolar differential capacitance structure, and the differential capacitance value of the capacitance sensitive part synchronously changes when the measured target quantity changes, so as to reflect the detected value of the measured target quantity. The capacitance sensitive part comprises a first dynamic capacitance, a second dynamic capacitance, a first static capacitance and a second static capacitance. The first end of the first dynamic capacitance is connected with the first end of the first static capacitance, and the connection end serves as a first electrode terminal of the capacitance sensitive part; the second end of the second dynamic capacitance is connected with the second end of the second static capacitance, and the connection end serves as a second electrode terminal of the capacitance sensitive part; the second end of the first dynamic capacitance is connected with the second end of the first static capacitance, the first end of the second dynamic capacitance and the first end of the second static capacitance. The application further comprises a first shielding line for a first transmission line and a second shielding line for a second transmission line. The first transmission line is a wire for connecting a first excitation detection terminal of the differential capacitance voltage conversion circuit with the first electrode terminal of the capacitance sensitive part, and the second transmission line is a wire for connecting a second excitation detection terminal of the differential capacitance voltage conversion circuit with the second electrode terminal of the capacitance sensitive part. The application further comprises a leakage suppression circuit connected with the differential capacitance voltage conversion circuit, and used for reducing the external leakage resistance of the differential capacitance voltage conversion circuit. The amplitude of the first direct current and the second direct current is equal.

2. The capacitive sensor of claim 1, wherein, The direct current excitation generation circuit comprises a first operational amplifier, a second operational amplifier, a first resistor, a second resistor, a third resistor and a fourth resistor.

3. The capacitive sensor of claim 1, wherein, The positive input terminal of the first operational amplifier is connected with the first end of the first resistor, and the connection end is connected with a reference voltage terminal; the negative input terminal of the first operational amplifier is connected with the first end of the third resistor and the first end of the fourth resistor respectively, and the output terminal of the first operational amplifier is connected with the second end of the third resistor, and the connection end serves as a positive output terminal of the direct current excitation generation circuit to output the set first direct current. ​ The output end of the second operational amplifier is connected with the second end of the fourth resistor and the negative input end of the second operational amplifier respectively, and the connection end is taken as the negative output end of the direct current excitation generation circuit to output the set second direct current. The positive input end of the second operational amplifier is connected with the second end of the first resistor and the first end of the second resistor respectively, and the second end of the second resistor is grounded.

4. The capacitive sensor of claim 1, wherein, The connection end of the first dynamic capacitor and the second dynamic capacitor is taken as the common end of the capacitive sensitive part. The common end is suspended, or grounded, or connected with a reference voltage end, or connected with the machine ground of the capacitive sensor.

5. The capacitive sensor of claim 1, wherein, The first end of the first shielding line is connected with the first shielding end of the capacitive sensor shell, and the first end of the first shielding line is connected with the common end through a first shielding capacitor. The first end of the second shielding line is connected with the second shielding end of the capacitive sensor shell, and the first end of the second shielding line is connected with the common end through a second shielding capacitor. The second end of the first shielding line and the second end of the second shielding line are both connected with a reference voltage end or both grounded.

6. The capacitive sensor of claim 1, wherein, The first end of the first shielding line is connected with the first shielding end of the capacitive sensor shell, and the first end of the first shielding line is connected with the common end through a first shielding capacitor. The second end of the first shielding line is connected with the positive output end of the direct current excitation generation circuit for outputting the first direct current. The first end of the second shielding line is connected with the second shielding end of the capacitive sensor shell, and the first end of the second shielding line is connected with the common end through a second shielding capacitor. The second end of the second shielding line is connected with the negative output end of the direct current excitation generation circuit for outputting the second direct current. The common end is the connection end of the first dynamic capacitor and the second dynamic capacitor.

7. The capacitive sensor of claim 1, wherein, The differential amplification circuit comprises a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a third operational amplifier and a fourth operational amplifier. The first end of the fifth resistor is taken as the positive input end of the differential amplification circuit. The second end of the fifth resistor is connected with the second end of the sixth resistor and the positive input end of the third operational amplifier respectively. The first end of the sixth resistor is used for receiving the second direct current output by the direct current excitation generation circuit. The negative input end of the third operational amplifier is connected with the second end of the seventh resistor and the first end of the eighth resistor respectively. The first end of the seventh resistor is taken as the negative input end of the differential amplification circuit. The output end of the third operational amplifier is connected with the second end of the eighth resistor and the first end of the ninth resistor respectively. The second end of the ninth resistor is connected with the second end of the tenth resistor and the positive input end of the fourth operational amplifier respectively, the first end of the tenth resistor is connected with a reference voltage terminal, the negative input end of the fourth operational amplifier is connected with the second end of the eleventh resistor and the first end of the twelfth resistor respectively, the first end of the eleventh resistor is used for receiving the first direct current output by the direct current excitation generation circuit, and the output end of the fourth operational amplifier is connected with the second end of the twelfth resistor and serves as an output terminal of the differential amplification circuit.

8. The capacitive sensor of claim 1, wherein, The differential amplification circuit comprises a twenty-ninth resistor, a thirtieth resistor, a thirty-first resistor, a thirty-second resistor, a thirty-third resistor, a thirty-fourth resistor and a ninth operational amplifier. The first end of the twenty-ninth resistor serves as a positive input terminal of the differential amplification circuit, the second end of the twenty-ninth resistor is connected with the second end of the thirtieth resistor, the second end of the thirty-first resistor and the positive input end of the ninth operational amplifier respectively, the first end of the thirtieth resistor is used for receiving the second direct current output by the direct current excitation generation circuit, and the first end of the thirty-first resistor is connected with a reference voltage terminal. The negative input end of the ninth operational amplifier is connected with the second end of the thirty-second resistor, the second end of the thirty-third resistor and the first end of the thirty-fourth resistor respectively, the output end of the ninth operational amplifier is connected with the second end of the thirty-fourth resistor and serves as an output terminal of the differential amplification circuit, the first end of the thirty-second resistor is used for receiving the first direct current output by the direct current excitation generation circuit, and the first end of the thirty-third resistor serves as a negative input terminal of the differential amplification circuit.

9. The capacitive sensor of claim 1, wherein, The differential capacitive voltage conversion circuit comprises a fifth operational amplifier, a sixth operational amplifier, a first capacitor, a second capacitor, a thirteenth resistor, a fourteenth resistor, a fifteenth resistor and a sixteenth resistor. The negative input end of the fifth operational amplifier is connected with the first end of the first capacitor and the first end of the thirteenth resistor respectively and serves as a first excitation detection terminal of the differential capacitive voltage conversion circuit, the positive input end of the fifth operational amplifier is used for receiving the first direct current output by the direct current excitation generation circuit, the second end of the thirteenth resistor is connected with the first end of the fourteenth resistor, the output end of the fifth operational amplifier is connected with the second end of the first capacitor and the second end of the fourteenth resistor respectively and serves as a positive output terminal of the differential capacitive voltage conversion circuit, and the second end of the fourteenth resistor is connected with the first end of the fifteenth resistor. The differential capacitive voltage conversion circuit comprises a fifth operational amplifier, a sixth operational amplifier, a first capacitor, a second capacitor, a thirteenth resistor, a fourteenth resistor, a fifteenth resistor and a sixteenth resistor. The negative input end of the fifth operational amplifier is connected with the first end of the first capacitor and the first end of the thirteenth resistor respectively and serves as a first excitation detection terminal of the differential capacitive voltage conversion circuit, the positive input end of the fifth operational amplifier is used for receiving the first direct current output by the direct current excitation generation circuit, the second end of the thirteenth resistor is connected with the first end of the fourteenth resistor, the output end of the fifth operational amplifier is connected with the second end of the first capacitor and the second end of the fourteenth resistor respectively and serves as a positive output terminal of the differential capacitive voltage conversion circuit, and the second end of the fourteenth resistor is connected with the first end of the fifteenth resistor. The negative input end of the sixth operational amplifier is connected with the first end of the second capacitor and the first end of the fifteenth resistor respectively, and the connection end is used as the second excitation detection end of the differential capacitor voltage conversion circuit; the positive input end of the sixth operational amplifier is used for receiving the second direct current output by the direct current excitation generation circuit, the second end of the fifteenth resistor is connected with the first end of the sixteenth resistor, and the output end of the sixth operational amplifier is connected with the second end of the second capacitor and the second end of the sixteenth resistor respectively, and the connection end is used as the negative output end of the differential capacitor voltage conversion circuit.

10. The capacitive sensor of claim 9, wherein, Further comprising: The first end of the first RC circuit is connected with the second end of the thirteenth resistor and the first end of the fourteenth resistor respectively, and the second end of the first RC circuit is connected with the second end of the fifteenth resistor and the first end of the sixteenth resistor respectively.

11. The capacitive sensor of claim 10, wherein, The first RC circuit comprises a third capacitor and a seventeenth resistor. The first end of the third capacitor is used as the first end of the first RC circuit, the second end of the third capacitor is connected with the first end of the seventeenth resistor, and the second end of the seventeenth resistor is used as the second end of the first RC circuit.

12. The capacitive sensor of claim 9, wherein, Further comprising: A common-mode negative feedback circuit connected with the differential capacitor voltage conversion circuit, used for reducing common-mode input current through output negative feedback current.

13. The capacitive sensor of claim 12, wherein, The common-mode negative feedback circuit comprises an eighteenth resistor, a nineteenth resistor, a fourth capacitor and a fifth capacitor. The first end of the eighteenth resistor is connected with the positive output end of the differential capacitor voltage conversion circuit, the second end of the eighteenth resistor is connected with the first end of the nineteenth resistor, the second end of the fourth capacitor and the first end of the fifth capacitor respectively, the second end of the nineteenth resistor is connected with the negative output end of the differential capacitor voltage conversion circuit, the first end of the fourth capacitor is connected with the second excitation detection end of the differential capacitor voltage conversion circuit, and the second end of the fifth capacitor is connected with the first excitation detection end of the differential capacitor voltage conversion circuit.

14. The capacitive sensor of claim 9, wherein, Further comprising: A charge multiplication circuit connected with the differential capacitor voltage conversion circuit, used for increasing the gain of the differential capacitor voltage conversion circuit.

15. The capacitive sensor of claim 14, wherein, The charge multiplication circuit is specifically used for: feeding back a multiplication current signal proportional to the output current signal of the differential capacitor voltage conversion circuit to the differential capacitor voltage conversion circuit, so as to increase the input current of the differential capacitor voltage conversion circuit and improve the gain coefficient of the differential capacitor voltage conversion circuit.

16. The capacitive sensor of claim 15, wherein, The charge multiplication circuit comprises a sixth capacitor and a seventh capacitor. The first end of the sixth capacitor is connected with the positive output end of the differential capacitor voltage conversion circuit, the second end of the sixth capacitor is connected with the second excitation detection end of the differential capacitor voltage conversion circuit, the second end of the seventh capacitor is connected with the negative output end of the differential capacitor voltage conversion circuit, and the first end of the seventh capacitor is connected with the first excitation detection end of the differential capacitor voltage conversion circuit.

17. The capacitive sensor of claim 1, wherein, The leakage suppression circuit is composed of two identical comparison amplification feedback control circuits, and the leakage suppression circuit is specifically used for: When the differential capacitor voltage conversion circuit has an external leakage resistance, the DC drift caused by the external leakage resistance is identified by comparison amplification, and is fed back to the corresponding transmission line of the differential capacitor voltage conversion circuit through filtering to suppress the DC drift caused by the external leakage resistance.

18. The capacitive sensor of claim 9, wherein, Further comprising: A leakage suppression circuit connected with the differential capacitor voltage conversion circuit for reducing the external leakage resistance of the differential capacitor voltage conversion circuit, and the leakage suppression circuit comprises: a twentieth resistance, a twenty-first resistance, a twenty-second resistance, a twenty-third resistance, a twenty-fourth resistance, a twenty-fifth resistance, a twenty-sixth resistance, a twenty-seventh resistance, a seventh operational amplifier, an eighth operational amplifier and a second RC circuit; The first end of the twentieth resistance is used as the first input end of the leakage suppression circuit, the second end of the twentieth resistance is connected with the first end of the second RC circuit and the positive input end of the seventh operational amplifier respectively, the negative input end of the seventh operational amplifier is connected with the second end of the twenty-first resistance and the first end of the twenty-second resistance respectively, the output end of the seventh operational amplifier is connected with the second end of the twenty-second resistance and the first end of the twenty-third resistance respectively, the second end of the twenty-third resistance is connected with the first excitation detection end of the differential capacitor voltage conversion circuit, and the first end of the twenty-first resistance is used for receiving the first DC current output by the DC excitation generation circuit. The first end of the twenty-sixth resistance is used as the second input end of the leakage suppression circuit, the second end of the twenty-sixth resistance is connected with the second end of the second RC circuit and the positive input end of the eighth operational amplifier respectively, the negative input end of the eighth operational amplifier is connected with the second end of the twenty-fifth resistance and the first end of the twenty-fourth resistance respectively, the output end of the eighth operational amplifier is connected with the second end of the twenty-fourth resistance and the first end of the twenty-seventh resistance respectively, the second end of the twenty-seventh resistance is connected with the second excitation detection end of the differential capacitor voltage conversion circuit, and the first end of the twenty-fifth resistance is used for receiving the second DC current output by the DC excitation generation circuit. The first input end of the leakage suppression circuit is connected with the second end of the thirteenth resistance and the first end of the fourteenth resistance respectively, and the second input end of the leakage suppression circuit is connected with the second end of the fifteenth resistance and the first end of the sixteenth resistance respectively.

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