Vertical structure schottky diode manufacturing process and schottky diode

Abstract

The application discloses a vertical structure Schottky diode manufacturing process and a Schottky diode. The manufacturing process comprises the following steps: providing a substrate; epitaxially growing on one side surface of the substrate to form a barrier layer; implanting ions on the barrier layer to form a P+ region; depositing a metal with a low work function on the P+ region by using a physical vapor deposition method or a chemical vapor deposition method to form a first ohmic contact metal layer; sputtering an alloy with a high work function on the barrier layer and performing annealing treatment to simultaneously form a second ohmic contact metal layer and a Schottky contact metal layer, the second ohmic contact metal layer is deposited on the first ohmic contact metal layer, and the Schottky contact metal layer is deposited on the second ohmic contact metal layer. The application solves the problem of a large forward surge ohm in the Schottky diode manufacturing process.

Description

Technical Field

[0001] This invention relates to the field of Schottky diodes, and particularly to a manufacturing process for a vertically structured Schottky diode and the Schottky diode itself. Background Technology

[0002] Power diodes are key components in circuit systems, widely used in consumer products such as high-frequency inverters, digital products, generators, and televisions. Power diodes are expanding in two important directions: increasing their output to thousands or even tens of thousands of amperes, enabling applications in high-temperature arc wind tunnels, resistance welding machines, and other similar fields; and decreasing reverse recovery time, exhibiting trends towards ultra-fast, ultra-soft, and ultra-durable characteristics, expanding their applications beyond rectification to various switching circuits. To meet the requirements of low power consumption, high frequency, high temperature, and miniaturization, their withstand voltage, on-resistance, turn-on voltage drop, reverse recovery characteristics, and high-temperature characteristics are becoming increasingly demanding.

[0003] To improve the reverse breakdown voltage, existing Schottky rectifiers use Schottky and ohmic contacts on the epitaxial barrier layer. However, this leads to a larger forward surge, which in turn affects the performance of the Schottky rectifier. Summary of the Invention

[0004] The main objective of this invention is to propose a manufacturing process for a vertical structure Schottky diode and a Schottky diode itself, aiming to solve the problem of large forward surge ohms in the Schottky diode manufacturing process.

[0005] To achieve the above objectives, this invention proposes a fabrication process for a vertical structure Schottky diode and a Schottky diode, comprising the following steps:

[0006] Provide substrate;

[0007] A barrier layer is epitaxially grown on one side surface of the substrate;

[0008] Ions are implanted into the barrier layer to form P+ regions;

[0009] A metal with a low work function is deposited on the P+ region using physical vapor deposition or chemical vapor deposition to form a first ohmic contact metal layer.

[0010] A high work function alloy is sputtered onto the barrier layer and then annealed to simultaneously form a second ohmic contact metal layer and a Schottky contact metal layer. The second ohmic contact metal layer is deposited on the first ohmic contact metal layer, and the Schottky contact metal layer is deposited on the second ohmic contact metal layer.

[0011] Optionally, the low work function metal is nickel, and the thickness of the first ohmic contact metal layer is 100nm~300nm.

[0012] Optionally, the high work function alloy is a Pt-Au alloy, the thickness of the second ohmic contact metal layer is 10nm~50nm, and the thickness of the Schottky contact metal layer is 50nm~300nm.

[0013] Optionally, the high work function alloy deposited on the barrier layer is annealed at a temperature of 450°C to 550°C.

[0014] Optionally, the step of implanting ions into the barrier layer to form a P+ region specifically includes:

[0015] Ions are injected into the barrier layer multiple times to obtain multiple pre-deposited regions;

[0016] Ions in the multiple pre-deposited regions are activated, and the ions in the pre-deposited regions undergo thermal diffusion to form multiple P+ regions.

[0017] Optionally, the thickness of the barrier layer is 4.5 μm to 5.5 μm.

[0018] Optionally, before implanting ions into the barrier layer to form a P+ region, the following steps are further included:

[0019] GaN material is epitaxially grown on the barrier layer to form a GaN protective layer.

[0020] Optionally, after implanting ions into the barrier layer to form a P+ region, the following steps are included:

[0021] Ion implantation is performed at the edge of the barrier layer to form an N+ cutoff ring;

[0022] A SiO2 passivation layer is deposited on the surface of the barrier layer relative to the substrate.

[0023] The substrate is thinned to 100μm~300μm and Ti / Ni / Ag ions are evaporated to form the back electrode.

[0024] Optionally, the following steps are included before thinning the substrate and evaporating Ti / Ni / Ag ions to form the back electrode:

[0025] A SIN passivation layer is deposited on the SiO2 passivation layer, the first ohmic contact metal layer, the second ohmic contact metal layer, or the Schottky contact metal layer to form a SIN passivation layer with a thickness of 0.3 μm to 1 μm.

[0026] This invention proposes a Schottky diode, which is prepared by the vertical structure Schottky diode fabrication process described above.

[0027] The vertical structure Schottky diode fabrication process of this invention includes the following steps: S10, providing a substrate; S20, epitaxially growing a barrier layer on one side surface of the substrate; S30, implanting ions into the barrier layer to form a P+ region; S40, depositing a low work function metal onto the P+ region using physical vapor deposition or chemical vapor deposition to form a first ohmic contact metal layer; and S50, sputtering a high work function alloy onto the barrier layer and annealing it to simultaneously form a second ohmic contact metal layer and a Schottky contact metal layer, with the second ohmic contact metal layer deposited on top of the first ohmic contact metal layer, and the Schottky contact metal layer deposited on top of the second ohmic contact metal layer. The ohmic contact is first fabricated using a low work function metal material, and then the ohmic and Schottky contacts are fabricated using a high work function metal material. In existing processes, high work function metals are used to simultaneously form ohmic and Schottky contacts, with the high work function metal covering the semiconductor. Due to the significant difference in work function, this results in a high Schottky barrier in the device. This invention employs a first ohmic contact metal layer formed by a low work function metal, covering the semiconductor layer. This reduces the work function difference between the contact materials, lowers the Schottky barrier, and reduces forward surge ohms. Simultaneously, because the low work function metal itself can improve the carrier transport efficiency at the contact surface, it lowers the contact barrier, thereby reducing forward surge ohms. This invention, by adopting this fabrication process, solves the problem of high forward surge ohms in Schottky diode fabrication. Attached Figure Description

[0028] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.

[0029] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.

[0030] Figure 1 This is a process flow diagram of one embodiment of the fabrication process of the vertical structure Schottky diode in this invention;

[0031] Figures 2-9 This is a cross-sectional view of a vertical Schottky diode during its fabrication process, as provided in a specific embodiment of the present invention.

[0032] Explanation of icon numbers:

[0033]

[0034] The objectives, features, and advantages of this invention will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0035] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present invention. It should be noted that if the embodiments of the present invention involve directional indicators (such as up, down, left, right, front, back, etc.), the directional indicators are only used to explain the relative positional relationship and movement of the components in a specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indicators will also change accordingly.

[0036] Furthermore, if the embodiments of this invention involve descriptions such as "first" or "second," these descriptions are for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined with "first" or "second" may explicitly or implicitly include at least one of those features. Additionally, the technical solutions of the various embodiments can be combined with each other, but this must be based on the ability of those skilled in the art to implement them. If the combination of technical solutions is contradictory or impossible to implement, it should be considered that such a combination of technical solutions does not exist and is not within the scope of protection claimed by this invention.

[0037] A vertical structure Schottky diode fabrication process is proposed to address the issue of high forward surge ohms in Schottky diode fabrication.

[0038] Reference Figure 1 In one embodiment of the present invention, the fabrication process of the vertical structure Schottky diode includes:

[0039] Step S10: Provide substrate 100;

[0040] Step S20: Epitaxial growth is performed on one side surface of the substrate 100 to form a barrier layer 200;

[0041] An n-type AlN epitaxial barrier layer (doping concentration 5E14~5E15, 4.5μm~5.5μm) is grown by MOCVD (metal-organic chemical vapor deposition) on a low-resistivity (0.002Ω·cm~0.004Ω·cm) silicon substrate. A GaN protective layer 300 (1nm~3nm) is then applied. The GaN protective layer 300 prevents AlN oxidation, and charge carriers can tunnel through during conduction. The key to Schottky geometry is the interface contact; the GaN protective layer 300 prevents oxidation damage to the Schottky metal layer.

[0042] Step S30: Implant ions into the barrier layer 200 to form a P+ region 210;

[0043] Multiple implantation of P+ ions is performed, followed by activation to achieve ion diffusion. The implantation depth of P+ ions is h = 0.5 μm ~ 2 μm, mj = 10+ / 1 μm, r1 = s1 = 1 μm ~ 3 μm, n = 2 ~ 10, Sd = 1 ~ 5 μm, Pd = 1 ~ 4, and Sd / Pd < 2. The specified implantation location aims to create high pressure, multiple P-ring partial pressures, and N-ring cutoff. High pressure can also be achieved by implanting Mg ions.

[0044] Step S40: Using physical vapor deposition or chemical vapor deposition, deposit a metal with a low work function onto the P+ region 210 to form a first ohmic contact metal layer 400.

[0045] Step S50: Sputter a high work function alloy onto the barrier layer 200 and perform annealing to simultaneously form a second ohmic contact metal layer 410 and a Schottky contact metal layer 420. The second ohmic contact metal layer 410 is deposited on the first ohmic contact metal layer 400, and the Schottky contact metal layer 420 is deposited on the second ohmic contact metal layer 410.

[0046] Schottky diodes have lower forward voltages, forward voltages, and reverse breakdown voltages compared to ordinary rectifier diodes. To improve the reverse breakdown voltage of Schottky diodes, current manufacturing processes simultaneously fabricate ohmic and Schottky contacts. This process increases the reverse breakdown voltage, but it also significantly increases the forward surge voltage of the Schottky diode. When fabricating ohmic and Schottky contacts in the p-doped region, metals with high work function are typically used as the material.

[0047] The fabrication process in this embodiment is the fabrication process of ohmic contacts and Schottky contacts in the P-doped region of Schottky diode fabrication. In this embodiment, ohmic contacts are first fabricated using a metal material with low work function, and then ohmic contacts and Schottky contacts are fabricated using a metal material with high work function.

[0048] Step S10: Provide a substrate 100; Step S20: Epitaxially grow a barrier layer 200 on one side surface of the substrate 100. (Refer to...) Figure 2 An n-type AlN epitaxial barrier layer 200 is epitaxially grown on substrate 100.

[0049] Step S30: Ions are implanted into the barrier layer 200 to form a P+ region 210, as shown in the figure. Figure 3 Generally, ions of Group IIIA elements are implanted to form P-doped regions. The purpose of implantation is to form high voltage. In addition to ions of Group IIIA elements, Mg ion implantation can also form high voltage.

[0050] Step S40: Using physical vapor deposition or chemical vapor deposition, a low work function metal is deposited on the P+ region 210 to form a first ohmic contact metal layer 400. (Refer to...) Figure 6 A low work function metal is deposited in the P+ region 210 to form a first ohmic contact metal layer 400. The first ohmic contact metal layer 400 formed by using a low work function metal improves the carrier transport efficiency at the contact surface and reduces the potential barrier at the contact surface.

[0051] Step S50: A high work function alloy is sputtered onto the barrier layer 200 and annealed to simultaneously form a second ohmic contact metal layer 410 and a Schottky contact metal layer 420. The second ohmic contact metal layer 410 is deposited on the first ohmic contact metal layer 400, and the Schottky contact metal layer 420 is deposited on the second ohmic contact metal layer 410. (Refer to...) Figure 7 The second ohmic contact metal layer 410 and the Schottky contact metal layer 420 are made of high work function metal. The second ohmic contact metal layer 410 formed of high work function metal covers the first ohmic contact metal layer 400 formed of low work function metal, and the Schottky contact metal layer 420 formed of high work function metal covers the second ohmic contact metal layer 410 formed of high work function metal.

[0052] In existing processes, high work function metals simultaneously form ohmic and Schottky contacts. The Schottky contact surface has a larger potential barrier, and its interaction with the ohmic contact surface further increases this barrier, hindering carrier transport and thus raising the forward turn-on voltage of the Schottky diode, resulting in a larger forward surge ohm. Conversely, the high work function metal covering the semiconductor also contributes to a higher Schottky barrier due to the significant difference in work function, further increasing the forward surge ohm of the Schottky diode.

[0053] Combining steps S40 and S50, compared to existing processes, the first ohmic contact metal layer 400 formed by a low work function metal is used to cover the semiconductor layer, which reduces the work function difference of the contact surface material, reduces the Schottky barrier, and reduces the forward surge ohm; at the same time, since the low work function metal itself can improve the transport efficiency of the contact surface carriers and reduce the barrier of the contact surface, the forward surge ohm is reduced.

[0054] The vertical structure Schottky diode fabrication process of this invention includes the following steps: S10, providing a substrate 100; S20, epitaxially growing a barrier layer 200 on one side surface of the substrate 100; S30, implanting ions into the barrier layer 200 to form a P+ region 210; S40, depositing a low work function metal onto the P+ region 210 using physical vapor deposition or chemical vapor deposition to form a first ohmic contact metal layer 400; and S50, sputtering a high work function alloy onto the barrier layer 200 and annealing it to simultaneously form a second ohmic contact metal layer 410 and a Schottky contact metal layer 420, wherein the second ohmic contact metal layer 410 is deposited on the first ohmic contact metal layer 400, and the Schottky contact metal layer 420 is deposited on the second ohmic contact metal layer 410. First, an ohmic contact is fabricated using a low work function metal material, followed by both ohmic and Schottky contacts using a high work function metal material. In existing processes, the high work function metal simultaneously forms both the ohmic and Schottky contacts, covering the semiconductor. Due to the significant difference in work function, this results in a high Schottky barrier in the device. This invention uses a first ohmic contact metal layer 400 formed from a low work function metal, covering the semiconductor layer. This reduces the work function difference between the contact materials, lowers the Schottky barrier, and reduces forward surge ohms. Simultaneously, the low work function metal itself improves the carrier transport efficiency at the contact surface, lowering the barrier and further reducing forward surge ohms. This invention, by employing this fabrication process, solves the problem of high forward surge ohms in Schottky diode fabrication.

[0055] In one embodiment, the low work function metal is nickel, and the thickness of the first ohmic contact metal layer 400 is 100nm~300nm.

[0056] In this embodiment, the low work function metal used can also be tungsten, titanium, beryllium, cadmium, or other metals.

[0057] In one embodiment, the high work function alloy is a Pt-Au alloy, the thickness of the second ohmic contact metal layer 410 is 10nm~50nm, and the thickness of the Schottky contact metal layer 420 is 50nm~300nm.

[0058] In one embodiment, the high work function alloy deposited on the barrier layer 200 is annealed at a temperature of 450°C to 550°C.

[0059] In this embodiment, a high work function alloy is sputtered onto the barrier layer 200, and the barrier layer 200 is heat-treated. Then, it is annealed at a temperature of 450°C to 550°C under the protection of an inert gas to simultaneously form a second ohmic contact metal layer 410 and a Schottky contact metal layer 420.

[0060] Reference Figure 4 In one embodiment, the step of implanting ions into the barrier layer 200 to form a P+ region 210 specifically includes:

[0061] Ions were implanted into the barrier layer more than 200 times to obtain multiple pre-deposited regions;

[0062] Ions in the plurality of pre-deposited regions are activated, and the ions in the pre-deposited regions undergo thermal diffusion to form a plurality of P+ regions 210.

[0063] In this embodiment, P+ ions are implanted multiple times and then activated. Figure 4 In the ion implantation, the ion implantation depth is h = 0.5 μm ~ 2 μm, mj = 10 + / 1 μm, r1 = s1 = 1 μm ~ 3 μm, n = 2 ~ 10, Sd = 1 ~ 5 μm, Pd = 1 ~ 4, and Sd / Pd < 2.

[0064] In one embodiment, the thickness of the barrier layer 200 is 4.5 μm to 5.5 μm.

[0065] Reference Figure 5 In one embodiment, before implanting ions into the barrier layer 200 to form the P+ region 210, the following step is further included:

[0066] GaN material is epitaxially grown on the barrier layer 200 to form a GaN protective layer 300.

[0067] In this embodiment, an n-type AlN epitaxial barrier layer 200 and a GaN protective layer 300 are epitaxially grown on the substrate 100. The thickness of the GaN protective layer 300 is 1nm~3nm. The GaN protective layer 300 prevents AlN oxidation and allows charge carriers to pass through quantum tunneling when the circuit is turned on.

[0068] Reference Figure 5 , Figure 6 ,and Figure 9 In one embodiment, after implanting ions into the barrier layer 200 to form a P+ region 210, the following steps are included:

[0069] Ion implantation is performed at the edge of the barrier layer 200 to form an N+ cutoff ring 220;

[0070] A SiO2 passivation layer 500 is deposited on one side surface of the barrier layer 200 relative to the substrate 100.

[0071] The substrate 100 is thinned to 100μm~300μm and Ti / Ni / Ag ions are evaporated to form the back electrode.

[0072] In this embodiment, refer to Figure 5 An N+ cutoff ring 220 is made at the edge of the barrier layer 200, Si is injected, and then activated to prevent impurities such as dicing and subsequent packaging from entering the extended region.

[0073] Reference Figure 6 A layer of SiO2 is deposited as a passivation layer with a thickness of 1µm to 3µm. SiO2 has the functions of anti-oxidation and insulation.

[0074] Reference Figure 9 The back Si substrate is thinned to 100um~300um, and Ti / Ni / Ag ions are evaporated to serve as the back electrode of the Schottky diode.

[0075] In one embodiment, the barrier layer of the Schottky diode is an AlN material barrier layer.

[0076] In this embodiment, the bandgap of AlN is more than 5 times that of Si and twice that of SiC and GaN, giving it a significant advantage in fabricating high-voltage power transistors. Existing Schottky diodes use Si (1.1 eV bandgap), SiC (3.2 eV bandgap), and GaN (3.4 eV bandgap), while AlN has a bandgap of 6.2 eV. A wider bandgap results in a higher breakdown voltage for the same barrier layer width, and the Schottky contact provides a lower forward voltage drop during forward conduction. Furthermore, because the Schottky contact only conducts electrons and has no charge storage effect, it meets the requirements for high-frequency, low-switching-loss applications, making it more advantageous for fabricating high-voltage power transistors.

[0077] In one embodiment, the substrate is a low-resistivity silicon substrate.

[0078] In this embodiment, the Schottky diode is based on a vertical structure, and the chip electrodes on the silicon substrate are vertically contacted, resulting in significant electrode consumption. Using a low-resistivity silicon substrate can reduce the loss of the Schottky diode.

[0079] In one embodiment, an N+ cutoff ring is formed at the edge of the die, Si is implanted, and then activated to obtain a high-resistivity region to form a cutoff ring, preventing impurities such as dicing and subsequent packaging from entering the extended region.

[0080] A SiO2 layer with a thickness of 1µm to 3µm is deposited as a passivation layer, and then a central contact hole is etched. Etching the central contact hole facilitates the doping of ions, serving as a connection between the semiconductor and the metal interconnect.

[0081] In one embodiment, the barrier layer is n-type doped, and the doped element can be silicon or germanium.

[0082] Reference Figure 8 In one embodiment, the following steps are included before thinning the substrate 100 and evaporating Ti / Ni / Ag ions to form the back electrode:

[0083] A SiO2 passivation layer 600 is deposited on the SiO2 passivation layer 500, the first ohmic contact metal layer 400, the second ohmic contact metal layer 410, or the Schottky contact metal layer 420 to form a SiN passivation layer 600, the thickness of which is 0.3 μm to 1 μm.

[0084] A SiO2 passivation layer 600 is deposited on the SiO2 passivation layer 500, the first ohmic contact metal layer 400, the second ohmic contact metal layer 410, or the Schottky contact metal layer 420 to form a SiN passivation layer 600. The SiN passivation layer 600 is deposited on the front side of the Schottky diode and serves to resist oxidation and provide insulation.

[0085] This invention proposes a Schottky diode, which is fabricated using the vertical structure Schottky diode fabrication process described above. Since the Schottky diode of this invention employs all the technical solutions of all the above embodiments, it possesses at least all the beneficial effects brought about by the technical solutions of the above embodiments, which will not be elaborated upon further here.

[0086] The above description is merely an optional embodiment of the present invention and does not limit the patent scope of the present invention. Any equivalent structural transformations made under the concept of the present invention using the description and drawings of the present invention, or direct / indirect applications in other related technical fields, are included within the patent protection scope of the present invention.

Claims

1. A fabrication process for a vertically structured Schottky diode, characterized in that, Includes the following steps: Provide substrate; A barrier layer is epitaxially grown on one side surface of the substrate; Ions are implanted into the barrier layer to form P+ regions; A metal with a low work function is deposited on the P+ region using physical vapor deposition or chemical vapor deposition to form a first ohmic contact metal layer. A high work function alloy is sputtered onto the barrier layer and then annealed to simultaneously form a second ohmic contact metal layer and a Schottky contact metal layer. The second ohmic contact metal layer is deposited on the first ohmic contact metal layer, and the Schottky contact metal layer is deposited on the second ohmic contact metal layer.

2. The fabrication process of the vertical structure Schottky diode as described in claim 1, characterized in that, The low work function metal is nickel, and the thickness of the first ohmic contact metal layer is 100nm to 300nm.

3. The fabrication process of the vertical structure Schottky diode as described in claim 1, characterized in that, The high work function alloy is a Pt-Au alloy, the thickness of the second ohmic contact metal layer is 10nm to 50nm, and the thickness of the Schottky contact metal layer is 50nm to 300nm.

4. The fabrication process of the vertical structure Schottky diode as described in claim 1, characterized in that, The high work function alloy is deposited on the barrier layer and annealed at a temperature of 450°C to 550°C.

5. The fabrication process of the vertical structure Schottky diode as described in claim 1, characterized in that, The step of implanting ions into the barrier layer to form a P+ region specifically includes: Ions are injected into the barrier layer multiple times to obtain multiple pre-deposited regions; Ions in the multiple pre-deposited regions are activated, and the ions in the pre-deposited regions undergo thermal diffusion to form multiple P+ regions.

6. The fabrication process of the vertical structure Schottky diode as described in claim 1, characterized in that, The thickness of the barrier layer is 4.5 μm to 5.5 μm.

7. The fabrication process of the vertical structure Schottky diode as described in claim 1, characterized in that, Before implanting ions into the barrier layer to form a P+ region, the following steps are also included: GaN material is epitaxially grown on the barrier layer to form a GaN protective layer.

8. The fabrication process of the vertical structure Schottky diode as described in claim 1, characterized in that, After implanting ions into the barrier layer to form a P+ region, the following steps are included: Ion implantation is performed at the edge of the barrier layer to form an N+ cutoff ring; A SiO2 passivation layer is deposited on the surface of the barrier layer relative to the substrate. The substrate is thinned to 100 μm to 300 μm and Ti / Ni / Ag ions are evaporated to form the back electrode.

9. The fabrication process of the vertical structure Schottky diode as described in claim 8, characterized in that, The following steps are included before thinning the substrate and evaporating Ti / Ni / Ag ions to form the back electrode: A SIN passivation layer is deposited on the SiO2 passivation layer, the first ohmic contact metal layer, the second ohmic contact metal layer, or the Schottky contact metal layer to form a SIN passivation layer with a thickness of 0.3 μm to 1 μm.

10. A Schottky diode, characterized in that, The Schottky diode is prepared by the vertical structure Schottky diode fabrication process as described in any one of claims 1 to 9.

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