Chip bump structure

Abstract

The present invention provides a bump structure of a chip, which is arranged on a surface of a chip and includes a plurality of connection bump groups, each of which includes a first connection bump and a second connection bump, and the first connection bump and the second connection bump have corresponding blocking structures. When the chip is arranged on a plate, the blocking structure of the first connection bump and the blocking structure of the second connection bump block the conductive medium, which can slow down the flow of the conductive medium and force the conductive medium to flow between the first connection bump and the second connection bump, so as to prevent the conductive particles of the conductive medium from leaving the surface of the connection bumps. In addition, there is a flow channel between the connection bumps, and at least one width of the flow channel is between 0.1μm and 8μm. Due to the limited space of the flow channel, it can be prevented that too many conductive particles on the surface of the connection bumps leave the surface of the connection bumps to the flow channel.

Description

Technical Field

[0001] The present invention relates to a bump structure of a chip, and more particularly to a bump structure arranged on the surface of the chip, which can prevent conductive particles of a conductive medium from leaving the surface of the bump when the chip is arranged on a board. Background Art

[0002] As the times evolve, electronic products are rapidly developing towards being lighter, thinner and smaller. Almost all electronic products use displays as devices for displaying information. For example, in camcorders, laptops, smart phones or other mobile devices, displays have become important devices in electronic products.

[0003] The display panel needs to be equipped with a driver chip to display images. The driver chip is used to drive the panel to operate and display images. Generally speaking, there are a variety of technologies to set the driver chip on the panel, and these technologies usually require the use of conductive media, such as anisotropic conductive film (ACF). The conductive medium contains conductive particles, which can contact the connection bumps of the driver chip and the electrical connectors of the panel, so the driver chip can be electrically connected to the panel. In this way, the driver chip can transmit the driving signal to the panel and drive the panel to display images.

[0004] In the prior art, when a driver chip is placed on a panel, the conductive medium will flow randomly on the surface of the driver chip, causing the conductive particles of the conductive medium to be unable to be effectively distributed on the surface of the connection bumps of the driver chip, thus affecting the ability of the driver chip to transmit signals to the panel, and the panel may not function properly. In addition, this problem is not only present in the driver chip of the panel, but also in other types of chips, such as microprocessor chips placed on a circuit board. Therefore, the industry needs a bump structure that can prevent the conductive particles from leaving the surface of the connection bumps. Summary of the invention

[0005] The present invention provides a bump structure of a chip, which includes a plurality of connection bumps disposed on the surface of the chip, and a flow channel is provided between the connection bumps, and at least one width of the flow channel is between 0.1 μm and 8 μm. When the chip is disposed on a board, due to the limited space of the flow channel, too many conductive particles on the surface of the connection bump can be prevented from leaving the surface of the connection bump to the flow channel, that is, a certain number of conductive particles can be maintained on the surface of the connection bumps.

[0006] One object of the present invention is to provide a bump structure of a chip, which includes a plurality of connecting bump groups arranged on the surface of the chip, each connecting bump group includes two connecting bumps, and the two connecting bumps respectively have a blocking structure to block the conductive medium when the chip is set on a board, thereby slowing down the flow of the conductive medium and preventing the conductive particles located on the surface of the connecting bump from leaving the surface of the connecting bump, thereby maintaining a certain number of conductive particles located on the surface of the connecting bump.

[0007] The present invention provides a bump structure of a chip, which is arranged on the surface of the chip and comprises a plurality of connecting bumps, the connecting bumps are spaced apart from each other, and a flow channel is provided between each of the connecting bumps, and at least one width of the flow channel is between 0.1 μm and 8 μm.

[0008] The present invention further provides a bump structure of a chip, which includes a plurality of connection bump groups, each of which includes a first connection bump and a second connection bump, the first connection bump and the second connection bump are spaced apart from each other, the first connection bump has a first convex portion, the first convex portion is located on a side of the first connection bump, the second connection bump has a second concave portion, the second concave portion is located on a side of the second connection bump, the first convex portion of the first connection bump corresponds to the second concave portion of the second connection bump. The first convex portion of the first connection bump and the second concave portion of the second connection bump serve as a blocking structure to slow down the flow of the conductive medium.

[0009] The present invention further provides a bump structure of a chip, which includes a plurality of connection bump groups, each of which includes a first connection bump and a second connection bump, the first connection bump and the second connection bump are spaced apart from each other, the first connection bump has a first convex portion, the first convex portion is located on a side of the first connection bump, the second connection bump has a second convex portion, the second convex portion is located on a side of the second connection bump, the first convex portion of the first connection bump corresponds to the second convex portion of the second connection bump. The first convex portion of the first connection bump and the second convex portion of the second connection bump serve as a blocking structure to slow down the flow of the conductive medium. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 : It is a three-dimensional schematic diagram of the first embodiment of the present invention;

[0011] Figure 2 : It is a schematic top view of the first embodiment of the present invention;

[0012] Figure 3 : It is a cross-sectional schematic diagram of a first embodiment of the present invention;

[0013] Figure 4 : It is a three-dimensional schematic diagram of a second embodiment of the present invention;

[0014] Figure 5: It is a top view schematic diagram of a second embodiment of the present invention;

[0015] Figure 6 : It is a cross-sectional schematic diagram of a second embodiment of the present invention;

[0016] Figure 7 : It is a three-dimensional schematic diagram of a third embodiment of the present invention;

[0017] Figure 8 : It is a schematic top view of a third embodiment of the present invention;

[0018] Fig. 9 : It is a cross-sectional schematic diagram of a third embodiment of the present invention;

[0019] Fig.10 : It is a three-dimensional schematic diagram of a fourth embodiment of the present invention; and

[0020] Fig.11 : It is a top view schematic diagram of the fourth embodiment of the present invention.

[0021]

Figure number comparison

[0022] 1 Bump structure

[0023] 2 Chip

[0024] 3 Surface

[0025] 10 connection bump set

[0026] 11 Connecting bumps

[0027] 12 first connection bump

[0028] 122 first convex part

[0029] 124 first recess

[0030] 14 Second connection bump

[0031] 142 Second recess

[0032] 144 second convex part

[0033] 16 runners

[0034] 20 panels

[0035] 22 Conductive parts

[0036] 30 Conductive medium

[0037] 32 Conductive particles

[0038] WWidth DETAILED DESCRIPTION

[0039] In order to further understand and appreciate the structural features and effects of the present invention, a preferred embodiment and detailed description are provided as follows:

[0040] See also Figure 1 , which is a three-dimensional schematic diagram of the first embodiment of the present invention. As shown in the figure, the bump structure 1 of the present invention is disposed on a surface 3 of a chip 2, and the bump structure 1 includes a plurality of connecting bumps 11, which are metal bodies.

[0041] See again Figure 1 Also see Figure 2 , Figure 3 , Figure 2 is a schematic top view of a first embodiment of the present invention; Figure 3 for Figure 2 As shown in the figure, the connecting bumps 11 are spaced apart from each other, and a flow channel 16 is provided between each of the connecting bumps 11. At least one width W of the flow channel 16 is between 0.1 μm (micrometer) and 8 μm (micrometer), preferably between 0.1 μm and 6 μm. A conductive medium 30 can flow in the flow channel 16. The conductive medium 30 includes a plurality of conductive particles 32.

[0042] In this embodiment, the width W is the width of an inlet and / or an outlet of the flow channel 16, and the width W is also the spacing between the connecting bumps 11. Limiting the width W of the flow channel 16 of the connecting bumps 11 means limiting the space of the flow channel 16, which is equivalent to limiting the number of conductive particles 30 that can be accommodated in the flow channel 16. When the conductive medium 30 is added to the surface 3 of the chip 2 and the chip 2 is to be set on the board 20, the chip 2 is subjected to force, causing the conductive medium 30 to flow on the surface 3 of the chip 2. Since the space of the flow channel 16 is limited, it is possible to prevent too many conductive particles 32 located on the surface of the connecting bump 11 from leaving the surface of the connecting bump 11 to the flow channel 16, and a certain number of conductive particles 32 can be maintained on the surface of the connecting bump 11. The board 30 can be a display panel or a circuit board, etc.

[0043] In this embodiment, the flow channel 16 may be a straight line or a non-straight line, such as an oblique line or an arc line, but this embodiment is not limited thereto.

[0044] See again Figure 1 , Figure 2 as well as Figure 3In this embodiment, each of the connecting bumps 11 corresponds to one of the plurality of conductive elements 22, and the conductive elements 22 are disposed on the board 20. When the conductive medium 30 is disposed between the chip 2 and the board 20 and the chip 2 is to be disposed on the board 20, the chip 2 is subjected to force, causing the conductive medium 30 to flow on the surface 3 of the chip 2. Since the space of the flow channel 16 is limited, the flow channel 16 can only accommodate a small amount of the conductive medium 30 and the conductive particles 32, so that the number of conductive particles 32 originally located on the surface of the connecting bump 11 that leave the surface of the connecting bump 11 to the flow channel 16 can be reduced, that is, a certain number of conductive particles 32 can be maintained on the surface of the connecting bump 11, so that the connecting bump 11 can be electrically connected to the conductive element 22 of the board 20 by the conductive particles 32, thereby ensuring the transmission capability between the chip 2 and the board 20. In this embodiment, the conductive medium 30 can be an anisotropic conductive film (ACF), but this embodiment is not limited thereto.

[0045] See again Figure 1 and Figure 2 The connecting protrusions 11 can be arranged into multiple rows, and the connecting protrusions 11 located in the rear row are staggered with the connecting protrusions 11 located in the front row, that is, the flow channels 16 of the connecting protrusions 11 located in the rear row will face the bottom of the connecting protrusions 11 located in the front row. Figure 2 The arrows shown indicate the flow direction of the conductive medium 30. When the conductive medium 30 flows out of the flow channel 16 located in the rear row, the conductive medium 30 is blocked by the connecting bumps 11 located in the front row and turned. This can slow down the flow of the conductive medium 30, and also reduce the number of conductive particles 32 located on the surface of the connecting bump 11 leaving the surface of the connecting bump 11.

[0046] See also Figure 4 , which is a three-dimensional schematic diagram of a second embodiment of the present invention. As shown in the figure, the bump structure 1 of the present invention comprises a plurality of connecting bump groups 10, which are spaced apart from each other and disposed on the surface 3 of the chip 2.

[0047] See again Figure 4 Also see Figure 5 , Figure 6 , Figure 5 is a schematic top view of a second embodiment of the present invention; Figure 6 for Figure 5AA direction cross-sectional view. In the present embodiment, each connecting protrusion set 10 includes a first connecting protrusion 12 and a second connecting protrusion 14. The first connecting protrusion 12 and the second connecting protrusion 14 are spaced apart from each other to form a flow channel 16. The first connecting protrusion 12 has a first protrusion 122, and the first protrusion 122 is located on a side surface of the first connecting protrusion 12. The second connecting protrusion 14 has a second concave portion 142, and the second concave portion 142 is located on a side surface of the second connecting protrusion 14. The first protrusion 122 corresponds to the second concave portion 142, that is, the first protrusion 122 faces the second concave portion 142, and the shapes of the two are complementary, so that a non-linear flow channel 16 is formed between the first connecting protrusion 12 and the second connecting protrusion 14.

[0048] In this embodiment, the first connecting protrusions 12 and the second connecting protrusions 14 are respectively disposed on the conductive members 22 of the plate 20. A flow channel 16 is provided between the first connecting protrusion 12 and the second connecting protrusion 14. The flow channel 16 passes through the first convex portion 122 of the first connecting protrusion 12 and the second concave portion 142 of the second connecting protrusion 14. The first convex portion 122 and the second concave portion 142 are blocking structures to block the conductive medium 30, so that the flow of the conductive medium 30 can be slowed down to prevent the conductive particles 32 located on the surfaces of the connecting protrusions 12 and 14 from leaving the surfaces of the connecting protrusions 12 and 14, so that a certain number of conductive particles 32 can be maintained on the surfaces of the connecting protrusions 12 and 14.

[0049] When the conductive medium 30 is disposed between the chip 2 and the board 20 and the chip 2 is to be disposed on the board 20, the chip 2 is subjected to force and the conductive medium 30 flows on the surface 3 of the chip 2. The conductive medium 30 is blocked by the first convex portion 122 of the first connecting bump 12 and the second concave portion 142 of the second connecting bump 14, and the flow is slowed down. Figure 5 As shown, the arrows indicate the flow direction of the conductive medium 30 .

[0050] Similar to the previous embodiment, at least one width W of the flow channel 16 between the first connecting bump 12 and the second connecting bump 14 is between 0.1 μm and 8 μm, preferably between 0.1 μm and 6 μm, so as to limit the space of the flow channel 16 and reduce the number of conductive particles 32 located on the surfaces of the connecting bumps 12 and 14 that leave the surfaces of the connecting bumps 12 and 14 to the flow channel 16, that is, a certain number of conductive particles 32 can be maintained on the surfaces of the connecting bumps 12 and 14. The width W is the width of the inlet and / or outlet of the flow channel 16.

[0051] See again Figure 4 , Figure 5 as well as Figure 6The first connecting protrusion 12 further has a first recess 124, which is located on the side of the first connecting protrusion 12. The second connecting protrusion 14 further has a second protrusion 144, which is located on the side of the second connecting protrusion 14. The first recess 124 corresponds to the second protrusion 144, that is, the first recess 124 is opposite to the second protrusion 144 and is complementary. The first recess 124 and the second protrusion 144 are also blocking structures. The flow channel 16 passes through the first recess 124 and the second protrusion 144, further increasing the turning of the flow channel 16, so as to further slow down the flow of the conductive medium 30. In addition, the connecting bump groups 10 can be arranged into multiple rows, and the connecting bump groups 10 located in the rear row are staggered with the connecting bump groups 10 located in the front row, that is, the flow channels 16 of the connecting bump groups 10 located in the rear row will face the bottom of the first connecting bumps 12 or the second connecting bumps 14 of the connecting bump groups 10 located in the front row, so that the flow of the conductive medium 30 can be slowed down.

[0052] In the above embodiment, the first protrusion 122 and the first recess 124 are the protrusion and recess of the first connection protrusion 12, so the first connection protrusion 12 may have a plurality of first protrusions 122 and a plurality of first recesses 124. Similarly, the second protrusion 144 and the second recess 142 are the protrusion and recess of the second connection protrusion 14, so the second connection protrusion 14 has a plurality of second protrusions 144 and a plurality of second recesses 142.

[0053] See also Figure 7 , Figure 8 , Fig. 9 , Figure 7 is a three-dimensional schematic diagram of a third embodiment of the present invention;

[0054] Figure 8 is a schematic top view of a third embodiment of the present invention; Fig. 9 for Figure 8 As shown in the figure, the difference between this embodiment and the previous embodiment is that the first protrusion 122 of the first connecting protrusion 12 extends into the second concave portion 142 of the second connecting protrusion 14, that is, the first protrusion 122 is located in the second concave portion 142, but the two do not contact each other, so that the flow channel 16 between the first connecting protrusion 12 and the second connecting protrusion 14 is more circuitous, and the conductive medium 30 can be blocked, forcing the conductive medium 30 to change the flow direction, thereby slowing down the flow of the conductive medium 30.

[0055] In this embodiment, the second protrusion 144 of the second connecting protrusion 14 also extends into the first recess 124 of the first connecting protrusion 12, that is, the second protrusion 144 is located in the first recess 124, but the two do not contact each other. As can be seen from the above description, the shape of the first connecting protrusion 12 and the shape of the second connecting protrusion 14 complement each other. Figure 8As shown, since the first protrusion 122 is located in the second concave portion 142 and the second protrusion 144 is located in the first concave portion 124, the flow channel 16 formed in this way has multiple turns, forcing the conductive medium 30 flowing in the flow channel 16 to change the flow direction again and again, thereby slowing down the flow of the conductive medium 30, thereby preventing the conductive particles 32 located on the surfaces of the connecting bumps 12 and 14 from leaving the surfaces of the connecting bumps 12 and 14. In addition, the conductive medium 30 can also be guided to flow around the connecting bumps 12 and 14, thereby concentrating the conductive particles 32 on the surfaces of the connecting bumps 12 and 14. The other structures and operating relationships of this embodiment are the same as those of the second embodiment, so they are not repeated here.

[0056] See also Fig.10 , which is a three-dimensional schematic diagram of a fourth embodiment of the present invention. As shown in the figure, the bump structure 1 includes a plurality of connecting bump groups 10, and the connecting bump groups 10 are spaced apart from each other and disposed on the surface 3 of the chip 2.

[0057] See again Fig.10 Also see Fig.11 , Fig.11 1 is a top view of the fourth embodiment of the present invention. As shown in the figure, each connecting protrusion set 10 includes a first connecting protrusion 12 and a second connecting protrusion 14, the first connecting protrusion 12 and the second connecting protrusion 14 are spaced from each other, the first connecting protrusion 12 has a first protrusion 122, the first protrusion 122 is located on one side of the first connecting protrusion 12, the second connecting protrusion 14 has a second protrusion 144, the second protrusion 144 is located on one side of the second connecting protrusion 14, and the first protrusion 122 corresponds to the second protrusion 144, so that a non-linear flow channel 16 is formed between the first connecting protrusion 12 and the second connecting protrusion 14. The flow channel 16 flows through the first protrusion 122 of the first connecting protrusion 12 and the second protrusion 144 of the second connecting protrusion 14.

[0058] In this embodiment, the first connecting protrusion 12 further has a first concave portion 124, which is located on the side of the first connecting protrusion 12, and the second connecting protrusion 14 further has a second concave portion 142, which is located on the side of the second connecting protrusion 14, and the first concave portion 124 corresponds to the second concave portion 142. The flow channel 16 further flows through the first concave portion 124 of the first connecting protrusion 12 and the second concave portion 142 of the second connecting protrusion 14. The first protrusion 122, the first concave portion 124, the second protrusion 144, and the second concave portion 142 serve as a blocking structure to block the conductive medium 30 and slow down the flow of the conductive medium 30. Since the first protrusion 122 is opposite to the second protrusion 144, the width of the flow channel 16 between the first protrusion 122 and the second protrusion 144 is shortened. In addition, since the first concave portion 124 is opposite to the second concave portion 142, the width of the flow channel 16 between the first concave portion 124 and the second concave portion 142 becomes larger. The width of the flow channel 16 of this embodiment changes, so the flow rate of the conductive medium 30 changes. In addition, the first convex portion 122, the first concave portion 124, the second convex portion 144, and the second concave portion 142 block the conductive medium 30, so that the flow of the conductive medium 30 can be slowed down.

[0059] In this embodiment, at least one width W of the flow channel 16 formed between the first connection bump 12 and the second connection bump 14 is between 0.1 μm and 8 μm, preferably between 0.1 μm and 6 μm, and the width W is the width of the inlet and / or outlet of the flow channel 16. The other structures and actuation relationships of this embodiment are the same as those of the second embodiment, so they are not described again.

[0060] The above is only a preferred embodiment of the present invention and is not intended to limit the scope of the present invention. All equivalent changes and modifications to the shape, structure, characteristics and spirit described in the claims of the present invention should be included in the scope of the claims of the present invention.

Claims

1. A bump structure of a chip, characterized in that: It is arranged on a surface of a chip, and the bump structure includes: A plurality of connection protrusion groups, each group comprising a first connection protrusion and a second connection protrusion, the first connection protrusion and the second connection protrusion are spaced from each other, the first connection protrusion has a plurality of first protrusions, the plurality of first protrusions are located on a side surface of the first connection protrusion, the second connection protrusion has a plurality of second concave portions, the plurality of second concave portions are located on a side surface of the second connection protrusion, the plurality of first protrusions of the first connection protrusion correspond to the plurality of second concave portions of the second connection protrusion; The plurality of first protrusions and the plurality of second concave portions serve as a blocking structure to block a conductive medium and slow down the flow of the conductive medium, wherein the conductive medium includes a plurality of conductive particles.

2. The bump structure of the chip according to claim 1, characterized in that: The first connecting protrusion has a plurality of first recesses, the plurality of first recesses are located between the plurality of first recesses and on the side surface of the first connecting protrusion, the second connecting protrusion has a plurality of second recesses, the plurality of second recesses are located between the plurality of second recesses and on the side surface of the second connecting protrusion, the plurality of first recesses correspond to the plurality of second recesses, the plurality of second recesses extend to the plurality of first recesses, and the plurality of first recesses extend to the plurality of second recesses.

3. The bump structure of the chip according to claim 2, characterized in that: A flow channel is formed between the first connecting protrusion and the second connecting protrusion, and the flow channel passes through the multiple first protrusions of the first connecting protrusion, the multiple second concave portions of the second connecting protrusion, the multiple first concave portions of the first connecting protrusion, and the multiple second protrusions of the second connecting protrusion.

4. The bump structure of the chip according to claim 1, characterized in that: A flow channel is formed between the first connecting protrusion and the second connecting protrusion, and the flow channel passes through the plurality of first protrusions of the first connecting protrusion and the plurality of second concave portions of the second connecting protrusion.

5. The bump structure of the chip according to claim 4, characterized in that: At least one width of the flow channel is between 0.1 μm and 8 μm.

6. The bump structure of the chip according to claim 5, characterized in that: The at least one width is a width of an inlet and / or an outlet of the flow channel.

7. The bump structure of the chip according to claim 4, characterized in that: The flow channel is not a straight line.

8. A bump structure of a chip, characterized in that: It is arranged on a surface of a chip, and the bump structure includes: A plurality of connection protrusion groups, each group comprising a first connection protrusion and a second connection protrusion, the first connection protrusion and the second connection protrusion are spaced from each other, the first connection protrusion has a plurality of first protrusions and a first concave portion, the plurality of first protrusions and the first concave portion are located on a side surface of the first connection protrusion, the first concave portion is located between the plurality of first protrusions, the second connection protrusion has a plurality of second protrusions and a second concave portion, the plurality of second protrusions and the second concave portion are located on a side surface of the second connection protrusion, the second concave portion is located between the plurality of second protrusions, the plurality of first protrusions of the first connection protrusion correspond to the plurality of second protrusions of the second connection protrusion, and the first concave portion corresponds to the second concave portion; The first protrusions, the first concave, the second protrusions and the second concave serve as a blocking structure to block a conductive medium and slow down the flow of the conductive medium, wherein the conductive medium includes a plurality of conductive particles.

9. The bump structure of the chip according to claim 8, characterized in that: A flow channel is formed between the first connecting protrusion and the second connecting protrusion, and the flow channel passes through the multiple first protrusions of the first connecting protrusion, the multiple second protrusions of the second connecting protrusion, the first concave portion of the first connecting protrusion, and the second concave portion of the second connecting protrusion. A first protrusion of the multiple first protrusions and a second protrusion of the multiple second protrusions shrink the width of the flow channel, the first concave portion and the second concave portion increase the width of the flow channel, and another first protrusion of the multiple first protrusions and another second protrusion of the multiple second protrusions shrink the width of the flow channel again.

10. The bump structure of the chip according to claim 9, characterized in that: At least one width of the flow channel is between 0.1 μm and 8 μm.

11. The bump structure of the chip according to claim 10, characterized in that: The at least one width is a width of an inlet and / or an outlet of the flow channel.

12. The bump structure of the chip according to claim 9, characterized in that: The flow channel is not a straight line.

13. A bump structure of a chip, characterized in that: It is arranged on a surface of a chip, and the bump structure includes: A plurality of connecting bumps are spaced apart from each other and each of which has a flow channel, wherein at least one width of the flow channel is between 0.1 μm and 8 μm; The at least one width of the flow channel limits the space of the flow channel to slow down the flow of a conductive medium, and the conductive medium includes a plurality of conductive particles.

14. The bump structure of the chip according to claim 13, characterized in that: The at least one width is a width of an inlet and / or an outlet of the flow channel.

15. The chip bump structure according to claim 13, characterized in that: The flow channel is not a straight line.

16. The bump structure of the chip according to claim 13, characterized in that: The connecting bumps respectively correspond to one of a plurality of conductive elements, and the conductive elements are disposed on a plate.

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