A method for depositing copper grid lines for heterojunction batteries
By depositing copper thin gate lines on the heterojunction cell silicon wafer to replace the silver gate lines, the problem of high production cost of heterojunction cells is solved, and the effects of cost reduction and environmental protection are achieved.
Patent Information
- Application Number
- CN202211014217.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-08-23
- Publication Date
- 2025-01-24
- Estimated Expiration
- 2042-08-23
AI Technical Summary
The production cost of heterojunction batteries is high, mainly due to the high cost of silver grid lines. Although the existing copper plating methods reduce costs, the process is complex and the environmental impact is great, making it difficult to effectively reduce costs.
By depositing copper grid lines on the silicon wafer, a protective film is used to deposit the copper fine grid line in PVD or RPD devices to form a copper -grille wire electrode, and printed the main grid line on the other side through the screen printing machine to replace the valuable ones Silver metal.
Effectively reduce the production costs of heterogeneous knots, simplify the process, reduce equipment costs, avoid the impact of the treatment of copper plating waste liquid on the environment, and protect the environment.
Smart Images

Figure CN115207170B_ABST
Abstract
Description
Technical Field
[0001] The invention belongs to the technical field of heterojunction batteries, and in particular relates to a method for depositing copper grid lines of heterojunction batteries. Background Art
[0002] The heterojunction cell is a high-efficiency crystalline silicon solar cell structure, a hybrid solar cell made of a crystalline silicon substrate and an amorphous silicon thin film, that is, a layer of non-doped (intrinsic) hydrogenated amorphous silicon thin film is added between the P-type hydrogenated amorphous silicon and the N-type hydrogenated amorphous silicon and the N-type silicon substrate. The full name of the heterojunction cell is the intrinsic thin-film heterojunction cell, a new type of cell based on the photovoltaic effect. Due to its unique double-sided symmetrical structure and the excellent passivation effect of the amorphous silicon thin film, it has the advantages of high conversion efficiency, high double-sidedness, almost no photo-induced degradation, good temperature characteristics, the use of thin silicon wafers, and the stacking of perovskites. At the same time, its manufacturing process is relatively short and it will be more popular in the future.
[0003] Heterojunction batteries will become the mainstream batteries in the future. The fundamental reason restricting the promotion of heterojunction batteries is their high cost. Silver grid lines are used on both sides of heterojunction battery grid lines, and the cost of silver grid lines accounts for more than 40% of their non-silicon costs. Reducing the cost of heterojunction battery grid lines is an effective way to reduce the cost of heterojunction batteries. At present, the industry has adopted the scheme of replacing silver grid lines with copper grid lines. The main way to achieve copper grid lines is electroplating copper, but electroplating copper has made slow progress due to its complex process flow, high cost of electroplating solution treatment, and impact on the environment. Although the cost of copper grid lines is much lower than that of silver grid lines when electroplating copper, electroplating copper requires several additional processes and equipment, and the cost of electroplating solution treatment needs to be increased. Minus the increased equipment and material costs, it is difficult to achieve the expected cost reduction of copper grid lines by electroplating copper, and the waste liquid of electroplating copper has an impact on the environment. For this reason, we propose a method for depositing copper grid lines for heterojunction batteries. Summary of the invention
[0004] The purpose of the present invention is to provide a method for depositing copper grid lines for heterojunction batteries. By depositing fine copper grid lines on silicon wafers and replacing precious silver metal with copper metal, the production cost of heterojunction batteries can be effectively reduced. At the same time, the fine grid lines are formed by a deposition method. Compared with copper electroplating, the production and research and development equipment is less, the process flow is simple, and there is no need to treat copper electroplating waste liquid, which reduces the impact of copper electroplating waste liquid on the environment, effectively protects the environment, and greatly reduces the equipment cost and production cost of heterojunction batteries in the production process, so as to solve the problems raised in the above-mentioned background technology.
[0005] To achieve the above object, the present invention provides the following technical solution: a method for depositing copper grid lines of heterojunction batteries, comprising the following steps:
[0006] S1, texturing and cleaning: cleaning the dirt on the surface of silicon wafer to obtain pyramid texture silicon wafer;
[0007] S2, amorphous silicon thin film deposition: an intrinsic amorphous silicon thin film and an n-type amorphous silicon thin film are sequentially deposited on the front side of the pyramid velvet silicon wafer, and an intrinsic amorphous silicon thin film and a p-type amorphous silicon thin film are sequentially deposited on the back side of the pyramid velvet silicon wafer to form an amorphous silicon thin film deposition silicon wafer;
[0008] S3, transparent conductive film deposition: depositing a transparent conductive film on the front and back sides of the amorphous silicon thin film deposition silicon wafer in sequence to form a transparent conductive film deposition silicon wafer;
[0009] S4, depositing copper fine grid lines: depositing copper fine grid lines on the front side or the back side of the transparent conductive film deposited silicon wafer to form a copper fine grid line deposited silicon wafer;
[0010] S5, screen printing gate lines: if copper fine gate lines are deposited on one side of the copper fine gate line deposition silicon wafer in S4, the fine gate lines are printed on the other side of the copper fine gate line deposition silicon wafer by a printer, and main gate lines are printed on the front and back sides of the copper fine gate line deposition silicon wafer;
[0011] If copper fine gate lines are deposited on both the front and back sides of the copper fine gate line deposited silicon wafer in S4, main gate lines are printed on the front and back sides of the copper fine gate line deposited silicon wafer by a printer.
[0012] Preferably, in S4, the specific steps are as follows:
[0013] S4.1. After the transparent conductive film is deposited on the silicon wafer, the carrier with the silicon wafer is taken out from the PVD or RPD equipment cavity, and a protective film is laid on the surface of the carrier using a robot so that the protective film covers the silicon wafer on the carrier. The carrier is then sent into a PVD or RPD equipment equipped with a copper target to deposit copper fine grid lines. After the deposition of the copper fine grid lines is completed, the carrier is taken out from the PVD or RPD equipment cavity, the protective film is removed by a robot, and the silicon wafer is introduced into a basket and enters S5.
[0014] Preferably, the protective film is opened according to the pattern of the copper fine grid lines on the heterojunction battery, so that the protective film is provided with shielding areas and hollow areas at equal intervals and staggered.
[0015] Preferably, in S4.1, when PVD or RPD is used to deposit the copper fine grid line, the steps are as follows:
[0016] S4.2. The silicon wafer is sent into a PVD or RPD device equipped with a copper target to deposit copper fine gate lines. The copper in the hollow area on the protective film is deposited on the corresponding surface of the silicon wafer, and the copper in the shielding area is deposited on the protective film. After the deposition of the copper fine gate lines is completed, the protective film is removed, and copper fine gate line electrodes are formed on the corresponding surface of the silicon wafer.
[0017] Preferably, the protective film is laid flat on the carrier plate, and the size of the protective film is smaller than the size of the carrier plate.
[0018] Preferably, the distance between the four sides of the protective film and the side edges of the carrier board is 0.5-3 cm.
[0019] Preferably, the protective film is made of a high temperature resistant and corrosion resistant reinforced resin composite material, and the protective film can be reused.
[0020] Preferably, in S5, the metal material used by the printer for screen printing the grid lines is silver metal.
[0021] Compared with the prior art, the present invention has the following beneficial effects:
[0022] 1. In the present invention, by depositing copper fine grid lines on silicon wafers, copper metal is used instead of precious silver metal, which can effectively reduce the production cost of heterojunction batteries. At the same time, the fine grid lines are formed by the deposition method. Compared with electroplating copper, the production and research equipment is less, the process flow is simple, and there is no need to treat electroplating copper waste liquid, which reduces the impact of electroplating copper waste liquid on the environment, effectively protects the environment, and greatly reduces the equipment cost and production cost of heterojunction batteries in the production process;
[0023] 2. The protective film is made of high temperature resistant and corrosion resistant reinforced resin composite material, and the protective film can be reused. The reinforced resin composite material can be a glass fiber reinforced resin composite material. The reinforced resin composite material has the characteristics of high temperature resistance, chemical corrosion resistance, electrical insulation, light weight, high strength, wide source of raw materials, and simple processing and molding; the reinforced resin composite material can withstand high temperatures, and has no effect on the strength when the temperature reaches 300°C. The softening temperature is 500-750°C, which can completely solve the problem of copper grid line deposition below 200°C without deformation and performance change; the reinforced resin composite material is light in weight and strong in strength, which is convenient to follow the graphic model, and the protective film cover is easy to operate on the surface of the silicon wafer and will not cause damage to the silicon wafer; the raw materials of the reinforced resin composite material are widely available, the processing is simple, the cost of the protective film is low, and no additional costs are added; at the same time, it is resistant to chemical corrosion and can be repeatedly cleaned and reused. BRIEF DESCRIPTION OF THE DRAWINGS
[0024] Figure 1 It is a schematic diagram of the process flow of the present invention;
[0025] Figure 2 is a schematic diagram of a silicon wafer and a carrier board of the present invention;
[0026] Figure 3 is a schematic diagram of a protective film of the present invention;
[0027] Figure 4 A detailed schematic diagram of the protective film of the present invention;
[0028] Figure 5 Schematic diagram of the protective film and carrier board of the present invention.
[0029] In the figure: 1, carrier board; 2, silicon wafer; 3, protective film; 301, shielding area; 302, hollow area. DETAILED DESCRIPTION
[0030] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0031] Embodiment 1:
[0032] In this embodiment, if Figure 1-Figure 5 As shown, the method for depositing copper grid lines of heterojunction batteries comprises the following steps:
[0033] S1, texturing and cleaning: cleaning the dirt on the surface of silicon wafer to obtain pyramid texture silicon wafer;
[0034] S2, amorphous silicon thin film deposition: an intrinsic amorphous silicon thin film and an n-type amorphous silicon thin film are sequentially deposited on the front side of the pyramid velvet silicon wafer, and an intrinsic amorphous silicon thin film and a p-type amorphous silicon thin film are sequentially deposited on the back side of the pyramid velvet silicon wafer to form an amorphous silicon thin film deposition silicon wafer;
[0035] S3, transparent conductive film deposition: depositing a transparent conductive film on the front and back sides of the amorphous silicon thin film deposition silicon wafer in sequence to form a transparent conductive film deposition silicon wafer;
[0036] S4, depositing copper fine grid lines: depositing copper fine grid lines on one side of the transparent conductive film deposition silicon wafer to form a copper fine grid line deposition silicon wafer;
[0037] In S4, the specific steps are as follows:
[0038] S4.1. After the transparent conductive film is deposited on the silicon wafer, the carrier 1 with the silicon wafer 2 is taken out from the PVD or RPD equipment cavity, and a protective film 3 is laid on the surface of the carrier 1 by a robot, so that the protective film 3 covers the silicon wafer 2 on the carrier 1, and the protective film 3 is laid flat on the carrier 1, and the size of the protective film 3 is smaller than the size of the carrier 1, and the four sides of the protective film 3 are 1.5 cm away from the side of the carrier 1. Then, it is sent into the PVD or RPD equipment equipped with a copper target to deposit copper fine grid lines. After the deposition of the copper fine grid lines is completed, the carrier 1 is taken out from the PVD or RPD equipment cavity, and the protective film 3 is removed by a robot, and the silicon wafer 2 is introduced into the basket to enter S5;
[0039] The protective film 3 is opened according to the pattern of the fine grid lines on the heterojunction battery, so that the shielding areas 301 and the hollow areas 302 are staggered and arranged at equal intervals on the protective film 3;
[0040] In S4.1, when PVD or RPD is used to deposit copper fine grid lines, the steps are as follows:
[0041] S4.2, the silicon wafer 2 is fed into a PVD or RPD device equipped with a copper target to deposit copper fine gate lines, the copper in the hollow area 302 on the protective film 3 is deposited on the corresponding surface of the silicon wafer 2, and the copper in the shielding area 301 is deposited on the protective film 3. After the deposition of the copper fine gate lines is completed, the protective film 3 is removed, and a copper fine gate line electrode is formed on the corresponding surface of the silicon wafer 2;
[0042] S5, screen printing gate lines: if copper fine gate lines are deposited on one side of the copper fine gate line deposition silicon wafer in S4, the fine gate lines are printed on the other side of the copper fine gate line deposition silicon wafer by a printer, and main gate lines are printed on the front and back sides of the copper fine gate line deposition silicon wafer;
[0043] In S5, the metal material used by the printer for screen printing the grid lines is silver metal.
[0044] In the present invention, by depositing copper fine grid lines on one side of the silicon wafer 2, the precious silver metal is replaced by copper metal, which can effectively reduce the production cost of the heterojunction battery. At the same time, according to the formation of the fine grid lines by the deposition method, compared with electroplating copper, the production and research equipment is less, the process flow is simple, and there is no need to treat the electroplating copper waste liquid, which reduces the impact of the electroplating copper waste liquid on the environment, effectively protects the environment, and greatly reduces the equipment cost and production cost of the heterojunction battery in the production process.
[0045] The cost of depositing a copper fine grid line on one side of the silicon wafer 2 is more than 40% lower than that of a conventional silver grid line, as shown in the cost comparison data in Table 1 below:
[0046] Table 1: Taking a 166mm heterojunction cell as an example:
[0047]
[0048] As can be seen from Table 1 above, the cost of depositing fine grid lines using copper metal on one side of the silicon wafer 2 is 42.2% lower than the cost of depositing pure silver grid lines on both sides of the silicon wafer 2, which greatly reduces the production cost of heterojunction batteries.
[0049] Embodiment 2:
[0050] In this embodiment, if Figure 1-Figure 5 As shown, the method for depositing copper grid lines of heterojunction batteries comprises the following steps:
[0051] S1, texturing and cleaning: cleaning the dirt on the surface of silicon wafer to obtain pyramid texture silicon wafer;
[0052] S2, amorphous silicon thin film deposition: an intrinsic amorphous silicon thin film and an n-type amorphous silicon thin film are sequentially deposited on the front side of the pyramid velvet silicon wafer, and an intrinsic amorphous silicon thin film and a p-type amorphous silicon thin film are sequentially deposited on the back side of the pyramid velvet silicon wafer to form an amorphous silicon thin film deposition silicon wafer;
[0053] S3, transparent conductive film deposition: depositing a transparent conductive film on the front and back sides of the amorphous silicon thin film deposition silicon wafer in sequence to form a transparent conductive film deposition silicon wafer;
[0054] S4, depositing copper fine grid lines: depositing copper fine grid lines on the front and back sides of the transparent conductive film deposited silicon wafer to form a copper fine grid line deposited silicon wafer;
[0055] In S4, the specific steps are as follows:
[0056] S4.1. After the transparent conductive film is deposited on the silicon wafer, the carrier 1 with the silicon wafer 2 is taken out from the cavity of the PVD or RPD equipment. A protective film 3 is laid on the surface of the carrier 1 by a manipulator, so that the protective film 3 covers the silicon wafer 2 on the carrier 1. The protective film 3 is laid flat on the carrier 1, and the size of the protective film 3 is smaller than the size of the carrier 1. The four sides of the protective film 3 are 1.5 cm away from the sides of the carrier 1. Then, the carrier 1 is sent into the PVD or RPD equipment equipped with a copper target to deposit copper fine grid lines. After the deposition of the copper fine grid lines is completed, the carrier 1 is taken out from the cavity of the PVD or RPD equipment, and the protective film 3 is removed by a manipulator. Then, the silicon wafer 2 is turned over by a manipulator, and the other side of the silicon wafer 2 is deposited with copper fine grid lines in the PVD or RPD equipment, so that copper fine grid lines are deposited on both sides of the silicon wafer 2. Then, the silicon wafer 2 is introduced into the flower basket and enters S5.
[0057] The protective film 3 is opened according to the pattern of the fine grid lines on the heterojunction battery, so that the shielding areas 301 and the hollow areas 302 are staggered and arranged at equal intervals on the protective film 3;
[0058] In S4.1, when PVD or RPD is used to deposit copper fine grid lines, the steps are as follows:
[0059] S4.2, the silicon wafer 2 is fed into a PVD or RPD device equipped with a copper target to deposit copper fine gate lines, the copper in the hollow area 302 on the protective film 3 is deposited on the corresponding surface of the silicon wafer 2, and the copper in the shielding area 301 is deposited on the protective film 3. After the deposition of the copper fine gate lines is completed, the protective film 3 is removed, and a copper fine gate line electrode is formed on the corresponding surface of the silicon wafer 2;
[0060] S5, screen printing grid lines: the copper fine grid lines are deposited on the front and back sides of the copper fine grid line deposited silicon wafer in S4, and the main grid lines are printed on the front and back sides of the copper fine grid line deposited silicon wafer by a printer;
[0061] In S5, the metal material used by the printer for screen printing the grid lines is silver metal.
[0062] In the present invention, by depositing copper fine grid lines on both the front and back sides of the silicon wafer 2, the precious silver metal is replaced by copper metal, which can effectively reduce the production cost of the heterojunction battery. At the same time, according to the formation of the fine grid lines by the deposition method, compared with electroplating copper, the production and research equipment is less, the process flow is simple, and there is no need to treat the electroplating copper waste liquid, which reduces the impact of the electroplating copper waste liquid on the environment, effectively protects the environment, and greatly reduces the equipment cost and production cost of the heterojunction battery in the production process.
[0063] The cost of depositing copper fine grid lines on both the front and back sides of the silicon wafer 2 is nearly 70% lower than that of conventional silver grid lines, as shown in the cost comparison data in Table 2 below:
[0064] Table 2: Taking a 166mm heterojunction cell as an example:
[0065]
[0066] As can be seen from Table 2 above, the cost of depositing fine grid lines using copper metal on one side of the silicon wafer 2 is 69.3% lower than the cost of depositing pure silver grid lines on both sides of the silicon wafer 2, which greatly reduces the production cost of heterojunction cells.
[0067] In this embodiment, if Figure 3 As shown, the protective film 3 is made of a high temperature resistant and corrosion resistant reinforced resin composite material, and the protective film 3 can be reused;
[0068] The reinforced resin composite material can be a glass fiber reinforced resin composite material. The reinforced resin composite material has the characteristics of high temperature resistance, chemical corrosion resistance, electrical insulation, light weight, high strength, wide source of raw materials, and simple processing and molding; the reinforced resin composite material can withstand high temperatures, and has no effect on strength when the temperature reaches 300°C. The softening temperature is 500-750°C, which can completely solve the problem of copper grid line deposition below 200°C without deformation and performance change; the reinforced resin composite material has light weight and high strength, is easy to follow the graphic model, and the protective film 3 is easy to operate on the surface of the silicon wafer 2 without causing damage to the silicon wafer; the raw material source of the reinforced resin composite material is wide, the processing and molding is simple, the cost of the protective film is low, and no additional costs are added; at the same time, it is resistant to chemical corrosion and can be repeatedly cleaned and reused.
[0069] Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the appended claims and their equivalents.
Claims
1. A method for depositing copper grid lines for heterojunction batteries, characterized in that: The steps include: S1, texturing and cleaning: cleaning the dirt on the surface of silicon wafer to obtain pyramid texture silicon wafer; S2, amorphous silicon thin film deposition: an intrinsic amorphous silicon thin film and an n-type amorphous silicon thin film are sequentially deposited on the front side of the pyramid velvet silicon wafer, and an intrinsic amorphous silicon thin film and a p-type amorphous silicon thin film are sequentially deposited on the back side of the pyramid velvet silicon wafer, and finally an amorphous silicon thin film deposition silicon wafer is formed; S3, transparent conductive film deposition: depositing a transparent conductive film on the front and back sides of the amorphous silicon thin film deposition silicon wafer in sequence to form a transparent conductive film deposition silicon wafer; S4, depositing copper fine grid lines: depositing copper fine grid lines on the front or back side of the transparent conductive film deposited silicon wafer to form a copper fine grid line deposited silicon wafer. The specific steps are as follows: S4.
1. After the transparent conductive film is deposited on the silicon wafer, the carrier (1) with the silicon wafer (2) is taken out from the PVD or RPD equipment chamber, and a protective film (3) is laid on the surface of the carrier (1) using a robot, so that the protective film (3) covers the silicon wafer (2) on the carrier (1), and then the carrier (1) is sent into the PVD or RPD equipment equipped with a copper target to deposit copper fine grid lines. After the deposition of the copper fine grid lines is completed, the carrier (1) is taken out from the PVD or RPD equipment chamber, and the protective film (3) is removed by the robot, and the silicon wafer (2) is introduced into the basket to enter S5. The protective film (3) is opened according to the pattern of the copper fine grid lines on the heterojunction battery, so that the protective film (3) is provided with shielding areas (301) and hollow areas (302) at equal intervals and in an alternating manner; When using PVD or RPD to deposit copper fine lines, the steps are as follows: S4.2, the silicon wafer (2) is fed into a PVD or RPD device equipped with a copper target to deposit copper fine gate lines, the copper in the hollow area (302) on the protective film (3) is deposited on the corresponding surface of the silicon wafer (2), and the copper in the shielding area (301) is deposited on the protective film (3). After the deposition of the copper fine gate lines is completed, the protective film (3) is removed, and a copper fine gate line electrode is formed on the corresponding surface of the silicon wafer (2); S5, screen printing gate lines: if copper fine gate lines are deposited on one side of the copper fine gate line deposition silicon wafer in S4, the fine gate lines are printed on the other side of the copper fine gate line deposition silicon wafer by a printer, and main gate lines are printed on the front and back sides of the copper fine gate line deposition silicon wafer; If copper fine gate lines are deposited on both the front and back sides of the copper fine gate line deposited silicon wafer in S4, main gate lines are printed on the front and back sides of the copper fine gate line deposited silicon wafer by a printer; The metal material used for screen printing grid lines of printing machines is silver metal; The protective film (3) is made of a high temperature resistant and corrosion resistant glass fiber reinforced resin composite material, and the protective film (3) can be reused.
2. A method for depositing copper grid lines for heterojunction batteries according to claim 1, characterized in that: The protective film (3) is laid flat on the carrier plate (1), and the size of the protective film (3) is smaller than the size of the carrier plate (1).
3. A method for depositing copper grid lines for heterojunction batteries according to claim 2, characterized in that: The distance between the four sides of the protective film (3) and the side of the carrier board (1) is 0.5-3 cm.
Citation Information
Patent Citations
Solar cell metal electrode and preparation method thereof
CN113555452A
System and method for manufacturing photovoltaic structures with a metal seed layer
US20170117423A1