Component for semiconductor manufacturing apparatus and method for manufacturing the same

Abstract

The present invention provides a member (10) for a semiconductor manufacturing apparatus, which includes: an upper plate (20) made of ceramic, which has a wafer placement surface (22) and does not have an electrode built therein; an intermediate plate (30) made of a conductive material, which is disposed on a surface of the upper plate (20) opposite to the wafer placement surface (22) and serves as an electrostatic electrode; and a lower plate (40) made of ceramic, which is joined to a surface of the intermediate plate (30) opposite to the surface on which the upper plate (20) is disposed.

Description

Technical Field

[0001] The present invention relates to a component for a semiconductor manufacturing apparatus and a method for manufacturing the same. Background Art

[0002] Conventionally, as a component for a semiconductor manufacturing apparatus, there has been known a component for a semiconductor manufacturing apparatus including: an upper plate made of ceramic, which has an electrostatic electrode and a heating electrode built therein; an intermediate plate made of a metal base material, which is joined to a surface of the upper plate on the side opposite to the wafer mounting surface via a first metal bonding layer; and a lower plate made of ceramic, which is joined to a surface of the intermediate plate on the side opposite to the surface joined to the upper plate via a second metal bonding layer (for example, Patent Document 1). In Patent Document 1, the upper assembly plate corresponds to the upper plate, the lower assembly plate corresponds to the intermediate plate, and the back plate corresponds to the lower plate.

[0003] Prior Art Documents

[0004] Patent Documents

[0005] Patent Document 1: Japanese Patent Application Laid-Open No. 2018-518833 Summary of the Invention

[0006] Problems to be Solved by the Invention

[0007] However, in the above-described component for a semiconductor manufacturing apparatus, since the electrostatic electrode is built in the upper plate, there may be a deviation in the thickness of a portion (dielectric layer) of the upper plate above the electrostatic electrode. Specifically, since the electrostatic electrode is buried on the wafer mounting surface side in the upper plate and there is a difference in the coefficient of thermal expansion between the electrostatic electrode and the ceramic constituting the upper plate, when the surface of the upper plate is polished, the upper plate is deformed and the thickness of the dielectric layer deviates. If the thickness of the dielectric layer deviates in the plane, the wafer adsorption force deviates in the plane, or in the case of generating plasma, the plasma density deviates in the plane, which is not preferable. If the thickness of the dielectric layer is thin, these problems tend to become significant.

[0008] The present invention has been made to solve such problems, and a main object thereof is to provide a component for a semiconductor manufacturing apparatus in which, even when the upper plate is thin, the uniformity of the thickness of the upper plate is good, in a component for a semiconductor manufacturing apparatus formed by joining an upper plate, an intermediate plate, and a lower plate.

[0009] Means for Solving the Problems

[0010] The component for a semiconductor manufacturing apparatus of the present invention includes:

[0011] an upper plate made of ceramic, which has a wafer mounting surface and does not have an electrode built therein;

[0012] An intermediate plate made of a conductive material, which is disposed on the surface of the upper plate on the side opposite to the wafer mounting surface and serves as an electrostatic electrode and an RF electrode; and

[0013] A lower plate made of ceramics, which is joined to the surface of the intermediate plate on the side opposite to the surface where the upper plate is disposed.

[0014] In this component for a semiconductor manufacturing apparatus, an upper plate made of ceramics without an internal electrode functions as a dielectric layer of an electrostatic chuck. Since the upper plate does not have an internal electrode, it is easier to make it flat compared to the case where an electrode is built in. Therefore, even if the upper plate (i.e., the dielectric layer) is thin, the uniformity of the thickness of the upper plate becomes good. As a result, the bonding property between the upper plate and the intermediate plate becomes good, and the residual stress after bonding is also reduced. In addition, when an RF voltage is applied to the intermediate plate to generate plasma, it is possible to prevent deviation of the plasma density in the plane of the upper plate.

[0015] In addition, in this specification, "upper" and "lower" do not represent an absolute positional relationship, but a relative positional relationship. Therefore, depending on the orientation of the component for a semiconductor manufacturing apparatus, "upper" and "lower" may become "lower" and "upper", or "left" and "right", or "front" and "back".

[0016] In the component for a semiconductor manufacturing apparatus of the present invention, the thickness of the upper plate may be 0.05 mm or more and 1.5 mm or less. It is preferably set within this range to a thickness that can obtain the desired adsorption and desorption characteristics. By setting the thickness of the upper plate within the above range, the capacitance of the upper plate becomes large, and accordingly, the impedance of the upper plate becomes small. Therefore, it is advantageous from the viewpoint of plasma generation.

[0017] In the component for a semiconductor manufacturing apparatus of the present invention, the lower plate may be internally provided with a heating electrode. Thus, since the intermediate plate is interposed between the lower plate with the heating electrode built in and the wafer mounting surface, heat diffuses through the intermediate plate and is transferred to the wafer. Therefore, the heat uniformity of the wafer becomes good. In this case, the lower plate may also be internally provided with a shielding electrode between the surface where the intermediate plate is disposed and the heating electrode. Thus, since the shielding electrode prevents RF current from flowing into the heating electrode, it is possible to prevent the RF current from having an adverse effect on the temperature control of the heating electrode.

[0018] In the component for a semiconductor manufacturing apparatus of the present invention, the diameter of the intermediate plate may be larger than the diameter of the upper plate. Thus, compared with the case where the diameter of the intermediate plate is the same as or smaller than the diameter of the upper plate, the plasma generation region expands, and thus it is easier to uniformly process the wafer using plasma.

[0019] In the component for a semiconductor manufacturing apparatus of the present invention, the surface of the intermediate plate that is exposed to the outside may be covered with an insulating film. In this way, corrosion of the surface of the intermediate plate that is exposed to the outside can be prevented. It should be noted that in the case where the component for a semiconductor manufacturing apparatus of the present invention has a first metal bonding layer that bonds the upper plate and the intermediate plate and a second metal bonding layer that bonds the lower plate and the intermediate plate, it is preferable that the portions of the first metal bonding layer and the second metal bonding layer that are exposed to the outside are also covered with an insulating film. In this way, corrosion of these portions can be prevented.

[0020] In the component for a semiconductor manufacturing apparatus of the present invention, the intermediate plate may be made of a composite material of metal and ceramic or made of metal, and the lower plate and the upper plate may be made of the same ceramic.

[0021] The component for a semiconductor manufacturing apparatus of the present invention may include a through-hole that penetrates the component for a semiconductor manufacturing apparatus in the thickness direction, and the through-hole may also be subjected to an anti-discharge treatment. In this way, discharge caused via the through-hole during wafer processing can be suppressed. It should be noted that examples of the anti-discharge treatment include: a treatment of covering a portion where a conductive material is exposed on the inner wall of the through-hole with an insulating film or an insulating tube; in the case where the through-hole is an air hole, a treatment of adhesively fixing a breathable plug to at least the portion of the hole that penetrates the upper plate with a resin, etc.

[0022] The manufacturing method of the component for a semiconductor manufacturing apparatus of the present invention may include:

[0023] (a) A step of preparing an upper ceramic plate having a wafer placement surface and not having an internally built electrode, a lower ceramic plate, and an intermediate plate made of a conductive material; and

[0024] (b) A step of obtaining a bonded body by disposing a first metal bonding material between the upper surface of the intermediate plate and the surface of the upper plate opposite to the wafer placement surface, and disposing a second metal bonding material between the lower surface of the intermediate plate and the upper surface of the lower plate, and then performing pressure heating in this state and returning to room temperature.

[0025] This manufacturing method may also include:

[0026] (a) A step of forming an upper ceramic plate on the upper surface of an intermediate plate made of a conductive material by spraying; and

[0027] (b) A step of obtaining a bonded body by disposing a metal bonding material between the lower surface of the intermediate plate and the upper surface of the lower ceramic plate, and then performing pressure heating in this state and returning to room temperature.

[0028] The manufacturing method of such a component for a semiconductor manufacturing apparatus is suitable for manufacturing the above-described component for a semiconductor manufacturing apparatus. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 is a cross-sectional view of the component 10 for a semiconductor manufacturing apparatus.

[0030] Figure 2 is a top view of the wafer placement surface 22.

[0031] Figure 3 is a top view showing an example of the heating electrode 44.

[0032] Figure 4 is a cross-sectional view showing a case where the component 10 for a semiconductor manufacturing apparatus is mounted on the cooling device 50.

[0033] Figure 5 is a manufacturing process diagram of the component 10 for a semiconductor manufacturing apparatus.

[0034] Figure 6 is a cross-sectional view of the component 110 for a semiconductor manufacturing apparatus.

[0035] Figure 7 is a cross-sectional view of the component 210 for a semiconductor manufacturing apparatus.

[0036] Figure 8 is a cross-sectional view of the component 310 for a semiconductor manufacturing apparatus.

[0037] Figure 9 is a partial cross-sectional view showing an example of the anti-discharge treatment applied to the through-hole 34.

[0038] Figure 10 is a partial cross-sectional view showing an example of the anti-discharge treatment applied to the through-hole 34.

[0039] Figure 11 is a partial cross-sectional view showing an example of the anti-discharge treatment applied to the through-hole 34. DETAILED DESCRIPTION OF THE INVENTION

[0040] Hereinafter, preferred embodiments of the present invention will be described with reference to the drawings. Figure 1 is a cross-sectional view of the component 10 for a semiconductor manufacturing apparatus (a cross-sectional view when cut along a vertical plane passing through the center of the component 10), Figure 2 is a top view of the wafer placement surface 22, Figure 3 is a top view showing an example of the heating electrode 44.

[0041] As Figure 1 ​​​​​​​​​​​As shown, the component 10 for a semiconductor manufacturing apparatus includes an upper plate 20, an intermediate plate 30, a lower plate 40, a first metal bonding layer 31, and a second metal bonding layer 32.

[0042] The upper plate 20 is a disk-shaped plate made of ceramic (such as alumina, aluminum nitride) with the same diameter as the silicon wafer W on which plasma processing is to be performed, and no electrode is built in. The diameter of the upper plate 20 is not particularly limited, and can be, for example, 250 to 350 mm. The upper surface of the upper plate 20 becomes the wafer placement surface 22. As Figure 2 shown, on the wafer placement surface 22, a sealing band 22a is formed along the outer edge, and a plurality of circular protrusions 22b are formed on the entire surface. The sealing band 22a and the circular protrusions 22b have the same height, and the height is, for example, several μm to several tens of μm.

[0043] The intermediate plate 30 is a disk-shaped plate, and its diameter is larger than the diameters of the upper plate 20 and the lower plate 40. The intermediate plate 30 is joined to the surface 23 of the upper plate 20 on the side opposite to the wafer placement surface 22 via the first metal bonding layer 31. Examples of the material of the intermediate plate 30 include conductive materials (composite materials, metals, etc.). Examples of the composite material include metal matrix composites (also called metal matrix compound (MMC)). Examples of MMC include materials containing Si, SiC, and Ti (also called SiSiCTi), materials obtained by impregnating SiC porous bodies with Al and / or Si, etc. Examples of the metal include Ti, Mo, etc.

[0044] The intermediate plate 30 can apply a DC voltage via a power supply terminal (not shown) by an external DC power supply 70 (refer to Figure 4 ). The upper plate 20 functions as a dielectric layer. Regarding the thickness of the upper plate 20, it is adjusted to a predetermined thickness (for example, 50 to 500 μm) in consideration of the force for adsorbing the wafer W. When a DC voltage is applied to the intermediate plate 30, the wafer W placed on the wafer placement surface 22 of the upper plate 20 is adsorbed and fixed to the wafer placement surface 22, and when the application of the DC voltage is released, the adsorption and fixation of the wafer W to the wafer placement surface 22 are released. The back surface of the wafer W adsorbed on the wafer placement surface 22 contacts the upper surfaces of the sealing band 22a and the circular protrusions 22b. In addition, a space is generated between the back surface of the wafer W and the portion of the wafer placement surface 22 where the sealing band 22a and the circular protrusions 22b are not provided. A heat transfer gas (such as He gas) is supplied to this space through a gas supply channel (not shown) that penetrates the component 10 for a semiconductor manufacturing apparatus in the vertical direction. Through this heat transfer gas, efficient heat exchange is performed between the upper plate 20 and the wafer W.

[0045] The intermediate plate 30 can apply a high-frequency (RF) voltage via a power supply terminal (not shown) by an external RF power supply 74 (refer to Figure 4)Apply an RF voltage. Above the wafer placement surface 22 of the member 10 for a semiconductor manufacturing apparatus, an upper electrode having a shower head (not shown) is disposed at a distance from the wafer placement surface 22. The upper electrode is grounded, and a reactive gas is supplied to the space between the wafer placement surface 22 and the upper electrode. When the reactive gas is supplied to this space while applying an RF voltage to the intermediate plate 30, plasma is generated between the upper plate 20 and the upper electrode.

[0046] The lower plate 40 is a disk-shaped ceramic plate having the same diameter as the upper plate 20, and a heating electrode 44 is built therein. The lower plate 40 is joined to the surface of the intermediate plate 30 on the side opposite to the surface joined to the upper plate 20 via a second metal bonding layer 32. As Figure 3 shown, the heating electrode 44 is formed in a pattern from one end 44a to the other end 44b in a single stroke over substantially the entire surface of the area when the lower plate 40 is viewed from above, and generates heat when a voltage is applied to heat the wafer W. The area where the heating electrode 44 is wired is a circular area when viewed from above. The heating electrode 44 can be applied with a voltage through a heating power supply via a power supply terminal (not shown) connected to one end 44a and the other end 44b.

[0047] When the materials of the upper plate 20 and the lower plate 40 are alumina, the material of the intermediate plate 30 is preferably SiSiCTi or metal Ti. When the material of the upper plate 20 is alumina, the thickness of the upper plate 20 is preferably 0.05 mm or more and 0.65 mm or less, more preferably 0.2 mm or more and 0.4 mm or less. When the materials of the upper plate 20 and the lower plate 40 are aluminum nitride, the material of the intermediate plate 30 is preferably a material obtained by impregnating Si into a SiC porous body or metal Mo. When the material of the upper plate 20 is aluminum nitride, the thickness of the upper plate 20 is preferably 0.1 mm or more and 1.5 mm or less, more preferably 0.3 mm or more and 0.7 mm or less.

[0048] The first and second metal bonding layers 31, 32 are made of an Al-containing material such as an Al-Si-Mg-based or Al-Mg-based material, for example. The thicknesses of the first and second metal bonding layers 31, 32 are not particularly limited, preferably 1 to 300 μm, more preferably 50 to 150 μm. In addition, the outer periphery of the first metal bonding layer 31 preferably does not protrude from the outer periphery of the upper plate 20, and the outer periphery of the second metal bonding layer 32 preferably does not protrude from the outer periphery of the lower plate 40. The first and second metal bonding layers 31, 32 are formed by, for example, thermal compression bonding (TCB). TCB is a known method in which a metal bonding material is sandwiched between two members to be joined, and the two members are pressure-joined in a state where they are heated to a temperature below the solidus temperature of the metal bonding material.

[0049] Next, a usage example of the member 10 for a semiconductor manufacturing apparatus will be described. Figure 4 FIG. 1 is a cross-sectional view showing a case where the member 10 for a semiconductor manufacturing apparatus is mounted on a cooling device 50. First, the member 10 for a semiconductor manufacturing apparatus is mounted on the cooling device 50 provided in a vacuum chamber (not shown). The cooling device 50 is a disk member made of a metal such as aluminum and has a refrigerant passage 52 inside through which a refrigerant can circulate. A circular groove 54 is provided at the center of the upper surface of the cooling device 50. The lower plate 40 is inserted into the circular groove 54. The cooling device 50 has an annular surface 56 surrounding the periphery of the circular groove 54. The member 10 for a semiconductor manufacturing apparatus is fixed to the cooling device 50 by a clamp ring 60 in a state where an annular sealing member 57 is disposed between the outer peripheral portion of the lower surface of the intermediate plate 30 and the annular surface 56 and the lower plate 40 is inserted into the circular groove 54. The outer diameter of the sealing member 57 is larger than the diameter of the circular groove 54 and smaller than the diameter of the intermediate plate 30. As the sealing member 57, for example, a metal gasket or the like can be cited. The clamp ring 60 is disposed on the annular surface 56 of the cooling device 50. A step 62 is provided on the inner peripheral surface of the clamp ring 60, and the step 62 presses the upper surface of the outer peripheral portion of the intermediate plate 30 from above. In addition, the clamp ring 60 has a vertical hole 64 through which a screw 65 can be inserted and a threaded hole 66 that can be screwed with a screw 67. The screw 65 is inserted into the vertical hole 64 from above and screwed with a threaded hole 58 provided on the annular surface 56 of the cooling device 50. The screw 67 is inserted into a screw insertion hole 59 that penetrates the cooling device 50 in the vertical direction from below and screwed with the threaded hole 66 provided on the back surface of the clamp ring 60. A plurality (for example, 8) of such screws 65 and 67 are provided at equal intervals in the circumferential direction of the clamp ring 60. Thereby, the space S surrounded by the circular groove 54, the lower plate 40, and the sealing member 57 is sealed. A heat transfer sheet or a heat transfer gas is filled in the sealed space S. In this way, the portions of the intermediate plate 30 of the member 10 for a semiconductor manufacturing apparatus that protrude outward from the upper plate 20 and the lower plate 40 are used as flanges for mounting on the cooling device 50. After that, the intermediate plate 30 is connected to the DC power supply 70 via the filter circuit 72 and to the RF power supply 74 via the filter circuit 76. The filter circuit 72 prevents RF current from flowing from the intermediate plate 30 into the DC power supply 70. The filter circuit 76 prevents DC current from flowing from the intermediate plate 30 into the RF power supply 74.

[0050] After the member 10 for a semiconductor manufacturing apparatus is mounted on the cooling device 50, the wafer W is placed on the wafer placement surface 22. Then, the inside of the vacuum chamber is decompressed by a vacuum pump to adjust to a predetermined degree of vacuum, and a DC voltage is applied to the intermediate plate 30 using the DC power supply 70 to adsorb and fix the wafer W to the wafer placement surface 22. The wafer W is in contact with the sealing tape 22a and the circular protrusion 22b (see Figure 2)Sealing is achieved. Thus, the space between the back surface of the wafer W and the portion of the wafer mounting surface 22 where the sealing tape 22a and the circular protrusion 22b are not provided is sealed. A heat transfer gas is supplied to this space. Since the heat transfer gas is enclosed, efficient heat conduction can be performed between the upper plate 20 and the wafer W. Next, the inside of the vacuum chamber is set to a reaction gas atmosphere at a predetermined pressure (for example, several tens to several hundreds of Pa). The reaction gas is supplied from a showerhead of an upper electrode (not shown). In this state, an RF voltage is applied to the intermediate plate 30 using the RF power supply 74 to generate plasma between the upper electrode and the upper plate 20. Then, the surface of the wafer W is etched using the generated plasma. A controller (not shown) controls the power supplied to the heating electrode 44 so that the temperature of the wafer W becomes a preset target temperature.

[0051] Next, a manufacturing example of the semiconductor manufacturing apparatus component 10 will be described. Figure 5 It is a manufacturing process diagram of the semiconductor manufacturing apparatus component 10. Hereinafter, an example in which the material of the upper plate 20 and the lower plate 40 is alumina and the material of the intermediate plate 30 is SiSiCTi will be described.

[0052] First, the upper plate 20, the intermediate plate 30, and the lower plate 40 are prepared (refer to Figure 5 A). This process is called process (a).

[0053] The upper plate 20 can be manufactured as follows. Here, a manufacturing example of the alumina upper plate 20 will be described. First, a disk-shaped alumina MC sheet is prepared. MC is an abbreviation for molded casting, which refers to a well-known method of injecting a ceramic slurry containing a ceramic raw material powder (here, an alumina raw material powder) and a molding agent into a molding die, and causing a chemical reaction of the molding agent in the molding die to mold the ceramic slurry, thereby obtaining a molded body. As the molding agent, for example, isocyanate and polyol can be included, and molding is performed through a urethane reaction. Next, the MC sheet is fired by a hot pressing method to obtain an alumina sintered body. By performing grinding or sandblasting on both surfaces of the obtained alumina sintered body to adjust the shape and thickness, a flat upper plate 20 is obtained (refer to Figure 5 A). At this time, the sealing tape 22a and the circular protrusion 22b are not formed on the wafer mounting surface 22. It should be noted that a green sheet can also be used instead of the alumina MC sheet.

[0054] The intermediate plate 30 can be manufactured in the following manner. Here, a manufacturing example of the SiSiC-Ti intermediate plate 30 will be described. First, a SiSiC-Ti disk member is produced. For example, a powder mixture is prepared, which contains 39 to 51% by mass of silicon carbide raw material particles with an average particle size of 10 μm or more and 25 μm or less, and contains one or more raw materials selected in such a way as to include Ti and Si. For Si and Ti from raw materials other than silicon carbide, the mass ratio of Si / (Si + Ti) is 0.26 to 0.54. As raw materials, for example, silicon carbide, metallic Si, and metallic Ti can be used. In this case, it is preferably mixed in such a way that silicon carbide is 39 to 51% by mass, metallic Si is 16 to 24% by mass, and metallic Ti is 26 to 43% by mass. Next, the obtained powder mixture is made into a disk-shaped green compact by uniaxial pressing, and the green compact is sintered at 1370 to 1460 °C by hot pressing in an inert atmosphere, thereby obtaining a SiSiC-Ti disk member. It should be noted that the pressing pressure during hot pressing is, for example, set to 50 to 300 kgf / cm 2 . Next, the shape and thickness of the obtained disk member are adjusted by grinding or the like to obtain the intermediate plate 30 (refer to Figure 5 A). Regarding the specific manufacturing conditions of the intermediate plate 30, for example, they can be set with reference to the conditions described in Japanese Patent No. 5666748.

[0055] The lower plate 40 can be manufactured in the following manner. Here, a manufacturing example of the alumina lower plate 40 will be described. First, disk-shaped first and second MC sheets made of alumina are prepared. Next, a heating electrode 44 is formed on the surface of the second MC sheet. As a method for forming the heating electrode 44, for example, screen printing, PVD, CVD, plating, or the like can be used. Next, the first MC sheet is laminated on the surface of the second MC sheet on which the heating electrode 44 is formed to form a laminate. Next, the laminate is fired by a hot pressing method, thereby obtaining an alumina sintered body with the heating electrode 44 built in. The shape and thickness are adjusted by performing grinding or sandblasting on both surfaces of the obtained alumina sintered body to obtain a flat lower plate 40 (refer to Figure 5 A). It should be noted that a printed circuit board can also be used instead of the alumina MC sheet.

[0056] Next, a flat-plate-shaped second metal bonding material 302 having the same diameter as the lower plate 40 is placed on the upper surface of the lower plate 40, and the intermediate plate 30 is placed thereon. Further, a flat-plate-shaped first metal bonding material 301 having the same diameter as the upper plate 20 is placed on the upper surface of the intermediate plate 30, and it is placed in such a manner that the lower surface of the upper plate 20 is in contact with the second metal bonding material 302. Thus, a laminated body in a state where the intermediate plate 30 is sandwiched between the upper plate 20 and the lower plate 40 via the respective metal bonding materials 301 and 302 is obtained. Next, the laminated body is pressurized at a temperature below the solidus temperature of the first and second metal bonding materials 301 and 302 (for example, a temperature equal to or higher than a temperature obtained by subtracting 20°C from the solidus temperature and equal to or lower than the solidus temperature), and the upper plate 20, the intermediate plate 30, and the lower plate 40 are subjected to TCB bonding (refer to Figure 5 B), and then returned to room temperature. Thus, a bonded body 80 in which the first metal bonding material 301 becomes the first metal bonding layer 31 and the second metal bonding material 302 becomes the second metal bonding layer 32 is obtained (refer to Figure 5 C). This process is referred to as process (b). As the first and second metal bonding materials 301 and 302, an Al-Mg-based bonding material or an Al-Si-Mg-based bonding material can be used. For example, in the case of performing TCB bonding using an Al-Si-Mg-based bonding material (containing 88.5 wt% Al, 10 wt% Si, 1.5 wt% Mg, and having a solidus temperature of about 560°C), in a vacuum atmosphere, the upper plate 20 is pressurized at a temperature of 540 to 560°C (for example, 550°C) at a pressure of 0.5 to 2.0 kg / mm 2 (for example, 1.5 kg / mm 2 ) for several hours. The first and second metal bonding materials 301 and 302 are preferably materials having a thickness of about 100 μm.

[0057] Next, a pattern mask for forming a sealing band 22a and a circular protrusion 22b is pasted on the wafer mounting surface 22 of the upper plate 20 of the bonded body 80, and a sandblasting medium is sprayed to perform sandblasting. By the sandblasting, the sealing band 22a and the circular protrusion 22b are formed on the wafer mounting surface 22. This process is referred to as process (c). Then, the mask is removed, and a member 10 for a semiconductor manufacturing apparatus is obtained (refer to Figure 5 D).

[0058] In the component 10 for a semiconductor manufacturing apparatus described in detail above, the ceramic upper plate 20 without an in-built electrode functions as a dielectric layer of an electrostatic chuck. Since the upper plate 20 does not have an in-built electrode, it is easier to make it flat compared to the case where an electrode is in-built. Therefore, even if the upper plate 20 (i.e., the dielectric layer) is thin, the thickness uniformity of the upper plate 20 is good. As a result, the bonding property between the upper plate 20 and the intermediate plate 30 becomes good, and the residual stress after bonding is also reduced. In addition, when an RF voltage is applied to the intermediate plate 30 to generate plasma, it is possible to prevent deviation of the plasma density in the plane of the upper plate 20.

[0059] In addition, the thickness of the upper plate 20 is set to be 0.05 mm or more and 1.5 mm or less, and preferably set within this range to a thickness that can obtain desired adsorption / desorption characteristics. Here, in the RF path from the intermediate plate 30 via the upper plate 20 and the plasma atmosphere to the upper electrode (not shown), if the upper plate 20 is thick, the capacitance C becomes small. If the capacitance C becomes small, the impedance Z of the upper plate 20 becomes high because it includes a term of 1 / (jωC). Therefore, if the upper plate 20 is thick, the RF loss becomes large, which is disadvantageous from the viewpoint of plasma generation. On the contrary, if the thickness of the upper plate 20 is set within the above range, the RF loss becomes small, which is advantageous from the viewpoint of plasma generation. The same applies when the thickness of the upper plate 20 is set to the minimum thickness for obtaining adsorption / desorption characteristics and electrical insulation. In addition, the smaller the frequency, the smaller ω is, and the larger the value of 1 / (jω) is, so the influence of the capacitance C becomes significant.

[0060] Furthermore, the ceramic lower plate 40 has a heating electrode 44 built therein. Since the intermediate plate 30 is interposed between the lower plate 40 having the heating electrode 44 built therein and the wafer mounting surface 22, heat diffuses through the intermediate plate 30 and is transferred to the wafer W. Therefore, the heat uniformity of the wafer W is good.

[0061] In addition, the diameter of the intermediate plate 30 is larger than the diameter of the upper plate 20. Therefore, compared to the case where the diameter of the intermediate plate 30 is the same as or smaller than the diameter of the upper plate 20, the plasma generation region expands. As a result, it is easy to uniformly process the wafer W using plasma.

[0062] Further, the method for manufacturing the member 10 for a semiconductor manufacturing apparatus includes: (a) a step of preparing an upper plate 20 having a wafer placement surface 22 and not having an in-built electrode, a lower plate 40 having a heating electrode 44 in-built therein, and an intermediate plate 30 made of a conductive material; and (b) a step of disposing a first metal bonding material 301 between the upper surface of the intermediate plate 30 and the lower surface of the upper plate 20 (the surface opposite to the wafer placement surface 22), and disposing a second metal bonding material 302 between the lower surface of the intermediate plate 30 and the upper surface of the lower plate 40, and after performing pressure heating in this state and returning to room temperature, obtaining a bonded body 80. This manufacturing method is suitable for manufacturing the above-described member 10 for a semiconductor manufacturing apparatus.

[0063] In addition, it goes without saying that the present invention is not limited to any of the above-described embodiments, and can be implemented in various ways as long as it belongs to the technical scope of the present invention.

[0064] For example, as in the case of the member 110 for a semiconductor manufacturing apparatus shown in Figure 6 , a shielding electrode 46 may be in-built in the lower plate 40. In Figure 6 , the same reference numerals are assigned to the constituent elements that are the same as those in the above-described embodiment. The shielding electrode 46 is in-built between the upper surface of the lower plate 40 (the surface where the intermediate plate 30 is provided) and the heating electrode 44. In this way, the shielding electrode 46 prevents RF current from flowing into the heating electrode 44, and thus it is possible to prevent an adverse effect of the RF current on the temperature control of the heating electrode 44.

[0065] Alternatively, as in the case of the member 210 for a semiconductor manufacturing apparatus shown in Figure 7 , the surface of the intermediate plate 30 that is exposed to the outside and the portions of the first and second metal bonding layers 31, 32 that are exposed to the outside may also be covered with an insulating film 33. In Figure 7 , the same reference numerals are assigned to the constituent elements that are the same as those in the above-described embodiment. As the insulating film 33, for example, a ceramic spray coating film or the like can be cited. In this way, it is possible to prevent corrosion of the surface of the intermediate plate 30 that is exposed to the outside and the portions of the first and second metal bonding layers 31, 32 that are exposed to the outside.

[0066] Alternatively, the upper plate 20 may be disposed on the upper surface of the intermediate plate 30 without passing through the first metal bonding layer 31, as in the case of the member 310 for a semiconductor manufacturing apparatus shown in Figure 8 . In Figure 8In the following, the same reference numerals are given to the same components as in the above-described embodiment. Specifically, a ceramic spray coating film may be formed on the upper surface of the intermediate plate 30, and this ceramic spray coating film may be used as the upper plate 20. Examples of the ceramic spray coating film include an alumina spray coating film and a yttrium oxide spray coating film. As an example of a method for manufacturing the member 310 for a semiconductor manufacturing apparatus, a method including the following steps may be mentioned: (a) a step of forming the upper plate 20 on the upper surface of the intermediate plate 30 by spraying; and (b) a step of disposing a metal bonding material between the lower surface of the intermediate plate 30 and the upper surface of the lower plate 40, and performing pressure heating in this state and then returning to room temperature to obtain a bonded body.

[0067] In the above-described embodiment, as Figures 9 - 11 shown, the member 10 for a semiconductor manufacturing apparatus may also include a through hole 34 that penetrates the member 10 for a semiconductor manufacturing apparatus in the thickness direction, and this through hole 34 may be subjected to an anti-discharge treatment. For example, as Figure 9 shown, the inner wall of the through hole 34 in the portion where the first metal bonding layer 31, the intermediate plate 30, and the second metal bonding layer 32 are exposed may be covered with an insulating film 35. Further, as Figure 10 shown, an insulating tube 36 may be inserted into the through hole 34, and the inner wall of the through hole 34 in the portion where the first metal bonding layer 31, the intermediate plate 30, and the second metal bonding layer 32 are exposed may be covered with the insulating tube 36. At this time, the outer peripheral surface of the insulating tube 36 may be bonded and fixed with a resin. Further, when the through hole 34 is a gas hole, as Figure 11 shown, an air-permeable plug 37 made of an insulating material may be inserted into at least the portion of the through hole 34 that penetrates the upper plate 20. At this time, the periphery of the air-permeable plug 37 may be bonded and fixed with a resin. If the Figures 9 - 11 configuration is adopted, it is possible to suppress discharge through the through hole 34 during the processing of the wafer W. It should be noted that in Figures 9 - 11 , the same reference numerals are given to the same components as in the above-described embodiment. Further, Figure 9 and Figure 10 the through hole 34 is not particularly limited in use, and for example, it may be a thimble hole or a gas hole.

[0068] In the above-described embodiment, the first metal bonding layer 31 is provided between the upper plate 20 and the intermediate plate 30, and the second metal bonding layer 32 is provided between the intermediate plate 30 and the lower plate 40, but a resin bonding layer may be provided instead of these metal bonding layers 31 and 32. Examples of the resin bonding layer include a silicone-based resin. The resin bonding layer may be formed using a paste or a sheet.

[0069] In the above embodiment, the sealing band 22a and the circular protrusion 22b are not formed on the upper plate 20 prepared in step (a), but the sealing band 22a and the circular protrusion 22b may be formed on the upper plate 20 by sandblasting at this stage. In this case, step (c) is not required.

[0070] In the above-mentioned embodiment, the diameter of the upper plate 20 is made the same as the diameter of the chip W, but the diameter of the upper plate 20 may be larger than the diameter of the chip W, or smaller than the diameter of the chip W.

[0071] In the above-mentioned embodiment, the heating electrode 44 is provided so as to cover substantially the entire surface of the region when the lower plate 40 is viewed from above, but the region when the lower plate 40 is viewed from above may be divided into a central circular region and an annular region outside the central circular region, and a heating electrode may be provided for each region. In addition, the annular region may be further divided into a plurality of regions, and a heating electrode may be provided for each of the divided regions.

[0072] In the above-described embodiment, a single layer of the heating electrode 44 is provided on the lower plate 40 . However, a plurality of layers (a plurality of layers in the vertical direction) of the heating electrode 44 may be provided on the lower plate 40 .

[0073] In the above-described embodiment, the heater electrode 44 is built in the lower plate 40 , but the lower plate 40 need not necessarily have an electrode built in.

[0074] Example

[0075] Hereinafter, preferred examples of the present invention will be described. The present invention is not limited in any way by the following examples. Experimental Examples 1 to 10 correspond to examples of the present invention. The results thereof are shown in Tables 1 and 2.

[0076] [Table 1]

[0077]

[0078] [Table 2]

[0079]

[0080] [Experimental Example 1]

[0081] The component 10 for a semiconductor manufacturing apparatus of the above-described embodiment is manufactured by the above-described manufacturing method. The materials and dimensions of the upper plate 20, the intermediate plate 30, and the lower plate 40 are shown in Table 1. After separately manufacturing the upper plate 20, the intermediate plate 30, and the lower plate 40, a first metal bonding material 301 is disposed between the upper plate 20 and the intermediate plate 30, and a second metal bonding material 302 is disposed between the lower plate 40 and the intermediate plate 30, and the upper plate 20, the intermediate plate 30, and the lower plate 40 are bonded by TCB. As the first and second metal bonding materials 301 and 302, an Al—Si—Mg-based bonding material is used. Further, in Experimental Example 1, in order to obtain the adsorption / desorption characteristics and electrical insulation properties of the wafer W, the thickness of the upper plate 20 made of alumina was set to 0.3 mm.

[0082] Since the upper plate 20 does not have an electrode built therein, deformation of the upper plate 20 before bonding was not observed, the bonding property during subsequent TCB bonding was also good, and the residual stress after bonding was also eliminated. Further, the management of the distance from the intermediate plate 30, which functions as an electrostatic electrode and an RF electrode, to the upper surface of the upper plate 20 was simplified. Moreover, in the RF path from the intermediate plate 30 via the upper plate 20 and the plasma atmosphere to an upper electrode (not shown), the capacitance of the upper plate 20 becomes large, and thus the RF loss becomes small. Therefore, it is also possible to cope with the application of low-frequency RF. Note that, in an experiment in which the thickness of the upper plate 20 was changed from 0.3 mm to 3 mm, the capacitance of the upper plate was only 10% of that in Experimental Example 1, and thus the RF loss became large.

[0083] [Experimental Examples 2 to 4]

[0084] In Experimental Examples 2 to 4, the thickness of the upper plate 20 was changed as shown in Table 1, and other than that, the component 10 for a semiconductor manufacturing apparatus was manufactured in the same manner as in Experimental Example 1. In Experimental Examples 2 to 4, since the upper plate 20 also does not have an electrode built therein, deformation of the upper plate 20 before bonding was not observed, the bonding property during subsequent TCB bonding was also good, and the residual stress after bonding was also eliminated. Further, the management of the distance from the intermediate plate 30, which functions as an electrostatic electrode and an RF electrode, to the upper surface of the upper plate 20 was simplified. Moreover, in the RF path from the intermediate plate 30 via the upper plate 20 and the plasma atmosphere to an upper electrode (not shown), the capacitance of the upper plate 20 becomes large, and thus the RF loss becomes small. Therefore, it is also possible to cope with the application of low-frequency RF. However, in Experimental Example 4, since the thickness of the upper plate 20 exceeded 1.5 mm, the capacitance became smaller than that in Experimental Examples 1 to 3. Therefore, the thickness of the upper plate 20 is preferably 0.05 mm or more and 1.5 mm or less.

[0085] [Experimental Example 5]

[0086] The above-described member 310 for a semiconductor manufacturing apparatus is manufactured under the conditions shown in Experimental Example 5 of Table 1 (refer to Figure 8 ). In Experimental Example 5, the upper plate 20 is formed on the upper surface of the intermediate plate 30 by spraying, and a metal bonding material is disposed between the lower surface of the intermediate plate 30 and the upper surface of the lower plate 40 to perform TCB bonding.

[0087] In Experimental Example 5, since the upper plate 20 does not have an electrode built therein, deformation of the upper plate 20 before bonding is not observed, the bonding property during subsequent TCB bonding is also good, and the residual stress after bonding is also eliminated. In addition, the management of the distance from the intermediate plate 30, which functions as an electrostatic electrode and an RF electrode, to the upper surface of the upper plate 20 is simplified. Moreover, in the RF path from the intermediate plate 30 via the upper plate 20 and the plasma atmosphere to an upper electrode (not shown), the capacitance becomes large, so the RF loss becomes small. Therefore, it is also possible to cope with the application of low-frequency RF. It should be noted that members 310 for a semiconductor manufacturing apparatus in which the thickness of the upper plate 20 of the alumina sprayed film is changed to 0.05 mm, 1.5 mm, and 1.6 mm are manufactured and evaluated according to Experimental Example 5, and the same results as in Experimental Examples 2 to 4 are obtained.

[0088] [Experimental Example 6]

[0089] The member 10 for a semiconductor manufacturing apparatus of the above-described embodiment is manufactured in the same manner as in Experimental Example 1 under the conditions shown in Experimental Example 6 of Table 2. It should be noted that in Experimental Example 6, in order to obtain the adsorption / desorption characteristics and electrical insulation properties of the wafer W, the thickness of the upper plate 20 made of AlN is set to 0.5 mm.

[0090] In Experimental Example 6, since the upper plate 20 does not have an electrode built therein, deformation of the upper plate 20 before bonding is not observed, the bonding property during subsequent TCB bonding is also good, and the residual stress after bonding is also eliminated. In addition, the management of the distance from the intermediate plate 30, which functions as an electrostatic electrode and an RF electrode, to the upper surface of the upper plate 20 is simplified. Moreover, in the RF path from the intermediate plate 30 via the upper plate 20 and the plasma atmosphere to an upper electrode (not shown), the capacitance becomes large, so the RF loss becomes small. Therefore, it is also possible to cope with the application of low-frequency RF. It should be noted that in the experiment in which the thickness of the upper plate 20 is changed from 0.5 mm to 3 mm, the capacitance is only about 17% of that in Experimental Example 6, so the RF loss becomes large.

[0091] [Experimental Examples 7 to 10]

[0092] In Experimental Examples 7 to 10, AlN was used as the material of the upper plate 20 and the lower plate 40, and the thickness of the upper plate 20 was changed as shown in Table 2. Except for this, the member 310 for a semiconductor manufacturing apparatus was fabricated in the same manner as in Experimental Example 5. In Experimental Examples 7 to 10, since no electrode was incorporated in the upper plate 20, deformation of the upper plate 20 before bonding was not observed, the bondability during subsequent TCB bonding was also good, and the residual stress after bonding was eliminated. In addition, management of the distance from the intermediate plate 30, which functions as an electrostatic electrode and an RF electrode, to the upper surface of the upper plate 20 was simplified. Moreover, in the RF path from the intermediate plate 30 via the upper plate 20 and the plasma atmosphere to an upper electrode (not shown), the capacitance of the upper plate 20 became large, so the RF loss became small. Therefore, it was also possible to cope with the application of low-frequency RF. However, in Experimental Example 10, since the thickness of the upper plate 20 exceeded 1.5 mm, the capacitance became smaller compared with Experimental Examples 6 to 9. Therefore, the thickness of the upper plate 20 is preferably 0.05 mm or more and 1.5 mm or less.

[0093] This application is based on a claim of priority from Japanese Patent Application No. 2021-16207 filed on February 4, 2021, the entire contents of which are incorporated herein by reference.

[0094] Industrial Applicability

[0095] The present invention can be used for members for semiconductor manufacturing apparatuses such as wafer processing apparatuses for processing wafers.

[0096] Symbol Explanation

[0097] 10, 110, 210, 310: Members for semiconductor manufacturing apparatuses, 20: Upper plate, 22: Wafer placement surface, 22a: Sealing tape, 22b: Circular protrusion, 30: Intermediate plate, 31: First metal bonding layer, 32: Second metal bonding layer, 33: Insulating film, 34: Through hole, 35: Insulating film, 36: Insulating tube, 37: Ventilation plug, 40: Lower plate, 44: Heating electrode, 44a: One end, 44b: The other end, 46: Shielding electrode, 50: Cooling device, 52: Refrigerant passage, 54: Circular groove, 56: Annular surface, 57: Sealing member, 58: Threaded hole, 59: Screw insertion hole, 60: Clamping ring, 62: Step, 64: Vertical hole, 65: Screw, 66: Threaded hole, 67: Screw, 70: DC power supply, 72: Filter circuit, 74: RF power supply, 76: Filter circuit, 80: Bonded body, 301: First metal bonding material, 302: Second metal bonding material.

Claims

1. A component for a semiconductor manufacturing apparatus, comprising: An upper plate made of ceramic, which has a wafer placement surface and does not have built-in electrodes; An intermediate plate made of a conductive material, which is disposed on the surface of the upper plate opposite to the wafer placement surface and serves as an electrostatic electrode and an RF electrode; and A lower plate made of ceramic, which is joined to the surface of the intermediate plate opposite to the surface where the upper plate is disposed, The lower plate has a heating electrode built therein, The lower plate has a shielding electrode built between the surface where the intermediate plate is disposed and the heating electrode, The diameter of the intermediate plate is larger than the diameter of the upper plate.

2. The component for a semiconductor manufacturing apparatus according to claim 1, wherein the thickness of the upper plate is 0.05 mm or more and 1.5 mm or less.

3. The component for a semiconductor manufacturing apparatus according to claim 1 or 2, wherein the surface of the intermediate plate exposed to the outside is covered with an insulating film.

4. The component for a semiconductor manufacturing apparatus according to claim 1 or 2, wherein the intermediate plate is made of a composite material of metal and ceramic or made of metal, and the lower plate and the upper plate are made of the same ceramic.

5. The component for a semiconductor manufacturing apparatus according to claim 1 or 2, which has a through-hole penetrating the component for a semiconductor manufacturing apparatus in the thickness direction, The through-hole is subjected to anti-discharge treatment.

6. A manufacturing method of a component for a semiconductor manufacturing apparatus, comprising: (a) A step of preparing an upper plate made of ceramic having a wafer placement surface and not having built-in electrodes, a lower plate made of ceramic, and an intermediate plate made of a conductive material; And (b) A step of obtaining a joined body by disposing a first metal joining material between the upper surface of the intermediate plate and the surface of the upper plate opposite to the wafer placement surface, and disposing a second metal joining material between the lower surface of the intermediate plate and the upper surface of the lower plate, and then performing pressure heating in such a state and returning to room temperature, The lower plate has a heating electrode built therein, The lower plate has a shielding electrode built between the surface where the intermediate plate is disposed and the heating electrode, The diameter of the intermediate plate is larger than the diameter of the upper plate.

7. A manufacturing method of a component for a semiconductor manufacturing apparatus, comprising: (a) A step of forming an upper plate made of ceramic on the upper surface of an intermediate plate made of a conductive material by spraying; And (b) A step of obtaining a joined body by disposing a metal joining material between the lower surface of the intermediate plate and the upper surface of the lower plate made of ceramic, and then performing pressure heating in such a state and returning to room temperature, The lower plate has a heating electrode built therein, The lower plate has a shielding electrode built between the surface where the intermediate plate is disposed and the heating electrode, The diameter of the intermediate plate is larger than the diameter of the upper plate.

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