Motor drive device

Abstract

One embodiment of the present application is a motor drive device including a first drive circuit that controls conduction periods of a first upper arm switch and a first lower arm switch connected to one end of a coil of a single-phase DC motor; a second drive circuit that controls conduction periods of a second upper arm switch and a second lower arm switch connected to the other end of the coil; a current detection circuit that detects a current flowing in the coil and outputs a current detection signal indicating a detection result of the current; a first protection circuit that determines whether an overcurrent occurs on the basis of the current detection signal and outputs a first enable signal indicating a determination result to the first drive circuit; and a second protection circuit that determines whether an overcurrent occurs on the basis of the current detection signal and outputs a second enable signal indicating a determination result to the second drive circuit. A first enable signal line through which the first enable signal is transmitted to the first drive circuit and a second enable signal line through which the second enable signal is transmitted to the second drive circuit are independent wirings from each other.

Description

Technical Field

[0001] This invention relates to motor drive devices. Background Technology

[0002] In recent years, to miniaturize devices with motors, single-phase DC motors have become the most common choice. To prevent overheating and fires from single-phase DC motors, high safety requirements are placed on the motor drive unit that drives them. Therefore, a protection function is incorporated into the motor drive unit to cut off power to the single-phase DC motor in the event of an overcurrent.

[0003] In particular, the VDE standard, which serves as a safety standard in Germany, requires that the redundancy of protection functions be enhanced by redundancy of the aforementioned protection functions installed in the motor drive device. Patent Document 1 discloses a power conversion device for an electric motor drive with redundant protection functions.

[0004] A commonly disclosed power conversion device for driving a motor includes an inverter, two gate drive circuits, a PWM signal generation unit, and a safety stop unit. The safety stop unit, upon receiving either of two externally provided stop commands, fixes the output of at least one of the two gate drive circuits to be off. For example, Patent Document 1 discloses a power conversion device for driving a motor.

[0005] Existing technical documents

[0006] Patent documents

[0007] Patent Document 1: Japanese Patent Application Publication No. 2013-247693 Summary of the Invention

[0008] The problem that the invention aims to solve

[0009] The VDE standard requires that the motor's protection functions be dualized (redundant). However, if this requirement is met using software processing such as a microcomputer, a costly and lengthy software program evaluation is necessary. In the technology of Patent Document 1, a microcomputer is required to generate two stop commands, thus necessitating a software program evaluation to determine whether the VDE standard is met. Therefore, in the technology of Patent Document 1, the evaluation of the dualized protection functions requires a considerable amount of time and is costly.

[0010] To address the aforementioned issues, it is suggested that two stop commands be generated as hardware protection circuits. However, this requires designing drive circuits, protection circuits, and wiring patterns to ensure that the redundancy of protection functions required by the VDE standard is not compromised.

[0011] In view of the above circumstances, one of the objectives of this invention is to provide a motor drive device that can satisfy the following two necessary conditions.

[0012] (1) It can be implemented at low cost and in a short time to evaluate whether it meets the VDE standard.

[0013] (2) It can avoid compromising the redundancy of the protection functions required by the VDE standard.

[0014] Methods for solving problems

[0015] One aspect of the present invention is a motor drive device that drives a single-phase DC motor. The motor drive device includes a first drive circuit, a second drive circuit, a current detection circuit, a first protection circuit, and a second protection circuit. The first drive circuit includes a first upper arm switch electrically connecting one end of the coil of the single-phase DC motor to a power supply, a first lower arm switch electrically connecting one end of the coil to GND, and circuitry for controlling the energization of the first upper arm switch and the first lower arm switch. The second drive circuit includes a second upper arm switch electrically connecting the other end of the coil to the power supply, a second lower arm switch electrically connecting the other end of the coil to GND, and circuitry for controlling the energization of the second upper arm switch and the second lower arm switch. The current detection circuit detects the current flowing in the coil and outputs a current detection signal indicating the detection result. The first protection circuit determines whether an overcurrent has occurred based on the current detection signal and outputs a first enable signal indicating the determination result to the first drive circuit. The second protection circuit determines whether an overcurrent has occurred based on the current detection signal and outputs a second enable signal indicating the determination result to the second drive circuit. The first enable signal line that transmits the first enable signal to the first drive circuit and the second enable signal line that transmits the second enable signal to the second drive circuit are independent wirings.

[0016] Invention Effects

[0017] According to the above-described manner of the present invention, a motor drive device that satisfies the following two necessary conditions can be provided.

[0018] (1) It can be implemented at low cost and in a short time to evaluate whether it meets the VDE standard.

[0019] (2) It can avoid compromising the redundancy of the protection functions required by the VDE standard. Attached Figure Description

[0020] Figure 1 This is a diagram showing the circuit structure of the motor drive device according to this embodiment.

[0021] Figure 2This is a diagram showing the internal structure of the first drive circuit and the second drive circuit.

[0022] Figure 3 This is a diagram showing the direction of the coil current flowing in the coil of a single-phase DC motor during forward rotation.

[0023] Figure 4 This is a diagram showing the direction of the coil current flowing in the coil of a single-phase DC motor in reverse mode.

[0024] Figure 5 This diagram illustrates the state of applying regenerative braking based on regenerative current to a single-phase DC motor when an overcurrent occurs. Detailed Implementation

[0025] Hereinafter, an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

[0026] Figure 1 This is a diagram showing the circuit structure of the motor drive device 1 according to this embodiment. The motor drive device 1 is a device for driving a single-phase DC motor 2. The motor drive device 1 includes a first drive circuit 10, a second drive circuit 20, a current detection circuit 30, a first protection circuit 40, a second protection circuit 50, and a controller 60.

[0027] The first drive circuit 10 and the second drive circuit 20 are, for example, driver ICs such as IPM (Intelligent Power Module). The first drive circuit 10 has a first output terminal 10a, a first power input terminal 10b, a first GND terminal 10c, a first enable signal input terminal 10d, and a first PWM signal input terminal 10e. Similarly, the second drive circuit 20 has a second output terminal 20a, a second power input terminal 20b, a second GND terminal 20c, a second enable signal input terminal 20d, and a second PWM signal input terminal 20e.

[0028] The first output terminal 10a of the first drive circuit 10 is electrically connected to one end of the coil 2a of the single-phase DC motor 2. The second output terminal 20a of the second drive circuit 20 is electrically connected to the other end of the coil 2a. The first power input terminal 10b of the first drive circuit 10 and the second power input terminal 20b of the second drive circuit 20 are electrically connected to the power supply P1, which provides the power voltage required to drive the single-phase DC motor 2. The first GND terminal 10c of the first drive circuit 10 and the second GND terminal 20c of the second drive circuit 20 are electrically connected to ground (GND) via the current detection circuit 30.

[0029] The first drive circuit 10 includes: a first upper arm switch 11, which electrically connects one end of the coil 2a of the single-phase DC motor 2 to the power supply P1; a first lower arm switch 12, which electrically connects one end of the coil 2a to GND; and a circuit that controls the energization period of the first upper arm switch 11 and the first lower arm switch 12, details of which will be described later. The second drive circuit 20 includes: a second upper arm switch 21, which electrically connects the other end of the coil 2a to the power supply P1; a second lower arm switch 22, which electrically connects the other end of the coil 2a to GND; and a circuit that controls the energization period of the second upper arm switch 21 and the second lower arm switch 22. By cooperating in operation, the first drive circuit 10 and the second drive circuit 20 control the magnitude and direction of the current flowing in the coil 2a of the single-phase DC motor 2. As a result, the rotational speed of the single-phase DC motor 2 is controlled.

[0030] The current detection circuit 30 is a circuit that detects the current flowing in the coil 2a (coil current) and outputs a current detection signal representing the detection result of the coil current. The coil current is the current flowing between the power supply P1 and GND via the coil 2a, the first drive circuit 10, and the second drive circuit 20. The current detection circuit 30 has a shunt resistor 31.

[0031] One end of the shunt resistor 31 is electrically connected to the first GND terminal 10c of the first drive circuit 10, the second GND terminal 20c of the second drive circuit 20, the input terminal 40a of the first protection circuit 40, and the input terminal 50a of the second protection circuit 50. The other end of the shunt resistor 31 is electrically connected to GND. A voltage proportional to the coil current flowing in the shunt resistor 31 is generated between the terminals of the shunt resistor 31. This voltage between the terminals of the shunt resistor 31 is input as a current detection signal to the input terminals 40a of the first protection circuit 40 and 50a of the second protection circuit 50.

[0032] The first protection circuit 40 is a circuit that determines whether an overcurrent has occurred based on the aforementioned current detection signal and outputs a first enable signal indicating the determination result to the first drive circuit 10. The first protection circuit 40 includes an input terminal 40a, an output terminal 40b, a first resistor divider circuit 41, a first comparator 42, a first pull-up resistor 43, and a first diode 44.

[0033] As described above, the input terminal 40a of the first protection circuit 40 is electrically connected to one end of the shunt resistor 31. On the other hand, the output terminal 40b of the first protection circuit 40 is electrically connected to the first enable signal input terminal 10d of the first drive circuit 10 via the first enable signal line 71.

[0034] The first resistor voltage divider circuit 41 is a circuit that generates the first threshold voltage. The first resistor voltage divider circuit 41 has a first upper resistor 41a and a first lower resistor 41b. The first upper resistor 41a and the first lower resistor 41b are connected in series between a power supply P2, which provides a power supply voltage lower than that of power supply P1, and GND. The voltage generated at the intermediate node N1 between the first upper resistor 41a and the first lower resistor 41b, i.e., the voltage between the terminals of the first lower resistor 41b, is the first threshold voltage.

[0035] The first comparator 42 is a circuit that compares the voltage of the current detection signal with a first threshold voltage and outputs a signal representing the comparison result as a first enable signal. The inverting input terminal 42a of the first comparator 42 is electrically connected to the input terminal 40a of the first protection circuit 40. That is, the current detection signal is input to the inverting input terminal 42a of the first comparator 42. The non-inverting input terminal 42b of the first comparator 42 is electrically connected to the intermediate node N1 of the first resistor divider circuit 41. That is, the first threshold voltage is input to the non-inverting input terminal 42b of the first comparator 42. Alternatively, if necessary, a resistor divider circuit for dividing the voltage of the current detection signal can be provided before the inverting input terminal 42a.

[0036] The first comparator 42 has an open-collector output terminal 42c. The output terminal 42c of the first comparator 42 is electrically connected to the power supply P2 via a first pull-up resistor 43. When the voltage of the current detection signal is below a first threshold voltage, the output terminal 42c of the first comparator 42 is in an open-circuit state. As a result, the voltage at the output terminal 42c of the first comparator 42 becomes the voltage of the power supply P2, i.e., a high-level voltage. On the other hand, when the voltage of the current detection signal is above the first threshold voltage, the output terminal 42c of the first comparator 42 is electrically connected to GND. As a result, the voltage at the output terminal 42c of the first comparator 42 becomes a ground-level voltage, i.e., a low-level voltage.

[0037] In other words, when the voltage of the current detection signal is below the first threshold voltage, i.e., when no overcurrent is generated, a first enable signal with a high-level voltage is output from the output terminal 42c of the first comparator 42. On the other hand, when the voltage of the current detection signal is above the first threshold voltage, i.e., when an overcurrent is generated, a first enable signal with a low-level voltage is output from the output terminal 42c of the first comparator 42.

[0038] The output terminal 42c of the first comparator 42 and the output terminal 40b of the first protection circuit 40 are electrically connected via the first diode 44. The cathode terminal of the first diode 44 is electrically connected to the output terminal 42c of the first comparator 42. The anode terminal of the first diode 44 is electrically connected to the output terminal 40b of the first protection circuit 40. That is, the anode terminal of the first diode 44 is electrically connected to the first enable signal input terminal 10d of the first drive circuit 10 via the first enable signal line 71. In this embodiment, the first diode 44 is a Schottky barrier diode.

[0039] The second protection circuit 50 is a circuit that determines whether an overcurrent has occurred based on the aforementioned current detection signal and outputs a second enable signal indicating the determination result to the second drive circuit 20. The second protection circuit 50 includes an input terminal 50a, an output terminal 50b, a second resistor divider circuit 51, a second comparator 52, a second pull-up resistor 53, and a second diode 54.

[0040] As described above, the input terminal 50a of the second protection circuit 50 is electrically connected to one end of the shunt resistor 31. On the other hand, the output terminal 50b of the second protection circuit 50 is electrically connected to the second enable signal input terminal 20d of the second drive circuit 20 via the second enable signal line 72.

[0041] The second resistor voltage divider circuit 51 is a circuit that generates the second threshold voltage. The second resistor voltage divider circuit 51 has a second upper resistor 51a and a second lower resistor 51b. The second upper resistor 51a and the second lower resistor 51b are connected in series between the power supply P2 and GND. The voltage generated at the intermediate node N2 between the second upper resistor 51a and the second lower resistor 51b, i.e., the voltage between the terminals of the second lower resistor 51b, is the second threshold voltage. In this embodiment, the second threshold voltage is equal to the first threshold voltage.

[0042] The second comparator 52 is a circuit that compares the voltage of the current detection signal with a second threshold voltage and outputs a signal representing the comparison result as a second enable signal. The inverting input terminal 52a of the second comparator 52 is electrically connected to the input terminal 50a of the second protection circuit 50. That is, the current detection signal is input to the inverting input terminal 52a of the second comparator 52. The non-inverting input terminal 52b of the second comparator 52 is electrically connected to the intermediate node N2 of the second resistor divider circuit 51. That is, the second threshold voltage is input to the non-inverting input terminal 52b of the second comparator 52. Alternatively, if necessary, a resistor divider circuit that divides the voltage of the current detection signal can be provided before the inverting input terminal 52a.

[0043] The second comparator 52 has an open-collector output terminal 52c. The output terminal 52c of the second comparator 52 is electrically connected to the power supply P2 via a second pull-up resistor 53. When the voltage of the current detection signal is below the second threshold voltage, the output terminal 52c of the second comparator 52 is in an open-circuit state. As a result, the voltage at the output terminal 52c of the second comparator 52 becomes the voltage of the power supply P2, i.e., a high-level voltage. On the other hand, when the voltage of the current detection signal is above the second threshold voltage, the output terminal 52c of the second comparator 52 is electrically connected to GND. As a result, the voltage at the output terminal 52c of the second comparator 52 becomes a ground-level voltage, i.e., a low-level voltage.

[0044] In other words, when the voltage of the current detection signal is below the second threshold voltage, i.e., when no overcurrent occurs, a second enable signal with a high-level voltage is output from the output terminal 52c of the second comparator 52. On the other hand, when the voltage of the current detection signal is above the second threshold voltage, i.e., when an overcurrent occurs, a second enable signal with a low-level voltage is output from the output terminal 52c of the second comparator 52.

[0045] The output terminal 52c of the second comparator 52 and the output terminal 50b of the second protection circuit 50 are electrically connected via the second diode 54. The cathode terminal of the second diode 54 is electrically connected to the output terminal 52c of the second comparator 52. The anode terminal of the second diode 54 is electrically connected to the output terminal 50b of the second protection circuit 50. That is, the anode terminal of the second diode 54 is electrically connected to the second enable signal input terminal 20d of the second drive circuit 20 via the second enable signal line 72. In this embodiment, the second diode 54 is a Schottky barrier diode.

[0046] The controller 60 is, for example, a processor IC such as an MPU (Micro Processing Unit). The controller 60 has a first PWM signal output terminal 60a, a second PWM signal output terminal 60b, a current detection terminal 60c, a first enable signal output terminal 60d, and a second enable signal output terminal 60e.

[0047] The controller 60 outputs a first control signal to the first drive circuit 10 for controlling the first drive circuit 10. Specifically, the first PWM signal output terminal 60a of the controller 60 is electrically connected to the first PWM signal input terminal 10e of the first drive circuit 10. The controller 60 outputs a first PWM signal with a predetermined duty cycle as the aforementioned first control signal from the first PWM signal output terminal 60a to the first PWM signal input terminal 10e.

[0048] The controller 60 outputs a second control signal to the second drive circuit 20 for controlling the second drive circuit 20. Specifically, the second PWM signal output terminal 60b of the controller 60 is electrically connected to the second PWM signal input terminal 20e of the second drive circuit 20. The controller 60 outputs a second PWM signal with a predetermined duty cycle from the second PWM signal output terminal 60b to the second PWM signal input terminal 20e as the aforementioned second control signal.

[0049] The current sensing terminal 60c of the controller 60 is electrically connected to one end of the shunt resistor 31. That is, the controller 60 has a current sensing terminal 60c that receives an input current sensing signal. The first enable signal output terminal 60d of the controller 60 is electrically connected to the first enable signal line 71. The second enable signal output terminal 60e of the controller 60 is electrically connected to the second enable signal line 72.

[0050] Both the first enable signal output terminal 60d and the second enable signal output terminal 60e are open-collector type output terminals. The first enable signal output terminal 60d is electrically connected to the output terminal 40b of the first protection circuit 40 via the first enable signal line 71. The second enable signal output terminal 60e is electrically connected to the output terminal 50b of the second protection circuit 50 via the second enable signal line 72.

[0051] Therefore, in this embodiment, the output terminal 42c of the first comparator 42 and the first enable signal output terminal 60d of the controller 60 are connected via a first pull-up resistor 43. Additionally, in this embodiment, the output terminal 52c of the second comparator 52 and the second enable signal output terminal 60e of the controller 60 are connected via a second pull-up resistor 53.

[0052] The controller 60 determines whether an overcurrent has occurred based on the current detection signal input via the current detection terminal 60c according to a prescribed procedure, and controls the state of the first enable signal output terminal 60d and the state of the second enable signal output terminal 60e based on the determination result.

[0053] Specifically, when the voltage of the current detection signal is below the third threshold voltage, the controller 60 controls the first enable signal output terminal 60d and the second enable signal output terminal 60e to a high level. Conversely, when the voltage of the current detection signal is above the third threshold voltage, the controller 60 electrically connects the first enable signal output terminal 60d and the second enable signal output terminal 60e to GND. The third threshold voltage is set to a value equal to the first and second threshold voltages.

[0054] When the output terminal 42c of the first comparator 42 is open and the first enable signal output terminal 60d of the controller 60 is at a high level, the voltage of the first enable signal line 71 becomes high. In this case, a first enable signal with a high level voltage is input to the first enable signal input terminal 10d of the first drive circuit 10. In other words, when it is determined that no overcurrent has occurred in either the first protection circuit 40 or the controller 60, a first enable signal with a high level voltage is input to the first enable signal input terminal 10d of the first drive circuit 10.

[0055] When at least one of the output terminal 42c of the first comparator 42 and the first enable signal output terminal 60d of the controller 60 is connected to GND, the voltage of the first enable signal line 71 becomes a low-level voltage. In this case, a first enable signal with a low-level voltage is input to the first enable signal input terminal 10d of the first drive circuit 10. In other words, when it is determined that an overcurrent has occurred in at least one of the first protection circuit 40 and the controller 60, a first enable signal with a low-level voltage is input to the first enable signal input terminal 10d of the first drive circuit 10.

[0056] When the output terminal 52c of the second comparator 52 is open and the second enable signal output terminal 60e of the controller 60 is at a high level, the voltage of the second enable signal line 72 becomes high. In this case, a second enable signal with a high level voltage is input to the second enable signal input terminal 20d of the second drive circuit 20. In other words, when it is determined that no overcurrent has occurred in either the second protection circuit 50 or the controller 60, a second enable signal with a high level voltage is input to the second enable signal input terminal 20d of the second drive circuit 20.

[0057] When at least one of the output terminal 52c of the second comparator 52 and the second enable signal output terminal 60e of the controller 60 is connected to GND, the voltage of the second enable signal line 72 becomes a low-level voltage. In this case, a second enable signal with a low-level voltage is input to the second enable signal input terminal 20d of the second drive circuit 20. In other words, if it is determined that an overcurrent has occurred in at least one of the second protection circuit 50 and the controller 60, a second enable signal with a low-level voltage is input to the second enable signal input terminal 20d of the second drive circuit 20.

[0058] In this embodiment, the first enable signal line 71, which transmits the first enable signal to the first drive circuit 10, and the second enable signal line 72, which transmits the second enable signal to the second drive circuit 20, are independent wirings. "Independent wirings" refers to an electrically separated pair of wirings. More specifically, with no electronic components installed on the circuit board, the resistance between the first enable signal line 71 and the second enable signal line 72, which are mounted on the circuit board, is measured. If a resistance value of 10 MΩ or higher is measured, then the first enable signal line 71 and the second enable signal line 72 are an electrically separated pair of wirings.

[0059] Next, refer to Figure 2 The internal structures of the first drive circuit 10 and the second drive circuit 20 are described in detail.

[0060] like Figure 2 As shown, the first drive circuit 10 includes a first upper arm switch 11, a first lower arm switch 12, and a first gate control circuit 13. The first gate control circuit 13 is a circuit that controls the energization of the first upper arm switch 11 and the first lower arm switch 12.

[0061] In this embodiment, the first upper arm switch 11 is an N-channel MOS-FET. The first upper arm switch 11 is connected between the first power input terminal 10b and the first output terminal 10a. The drain terminal of the first upper arm switch 11 is electrically connected to the first power input terminal 10b. The source terminal of the first upper arm switch 11 is electrically connected to the first output terminal 10a and the first gate control circuit 13. The gate terminal of the first upper arm switch 11 is electrically connected to the first gate control circuit 13. Alternatively, the first upper arm switch 11 can also be a P-channel MOS-FET or a transistor.

[0062] In this embodiment, the first lower arm switch 12 is an N-channel MOS-FET. The first lower arm switch 12 is connected between the first output terminal 10a and the first GND terminal 10c. The drain terminal of the first lower arm switch 12 is electrically connected to the first output terminal 10a. The source terminal of the first lower arm switch 12 is electrically connected to the first GND terminal 10c and the first gate control circuit 13. The gate terminal of the first lower arm switch 12 is electrically connected to the first gate control circuit 13. Alternatively, the first lower arm switch 12 can also be a MOS-FET or a transistor.

[0063] The first gate control circuit 13 is electrically connected to the first enable signal input terminal 10d and the first PWM signal input terminal 10e. That is, the first gate control circuit 13 is input with the first enable signal and the first PWM signal. The first gate control circuit 13 controls the first upper arm gate voltage, which is the gate-source voltage of the first upper arm switch 11, and the first lower arm gate voltage, which is the gate-source voltage of the first lower arm switch 12, according to the first enable signal and the first PWM signal.

[0064] Specifically, when the first enable signal is high and the first PWM signal is high, the first gate control circuit 13 controls the first upper arm gate voltage to a high level and the first lower arm gate voltage to a low level. In this case, the first upper arm switch 11 is in the ON state and the first lower arm switch 12 is in the OFF state. Alternatively, when the first enable signal is high and the first PWM signal is low, the first gate control circuit 13 controls the first upper arm gate voltage to a low level and the first lower arm gate voltage to a high level. In this case, the first upper arm switch 11 is in the OFF state and the first lower arm switch 12 is in the ON state. On the other hand, when the first enable signal is low, the first gate control circuit 13 forcibly controls both the first upper arm gate voltage and the first lower arm gate voltage to a low level, regardless of the level of the first PWM signal. In this case, the first upper arm switch 11 and the first lower arm switch 12 are forcibly in the OFF state.

[0065] like Figure 2 As shown, the second drive circuit 20 includes a second upper arm switch 21, a second lower arm switch 22, and a second gate control circuit 23. The second gate control circuit 23 is a circuit that controls the energization of the second upper arm switch 21 and the second lower arm switch 22.

[0066] In this embodiment, the second upper arm switch 21 is an N-channel MOS-FET. The second upper arm switch 21 is connected between the second power input terminal 20b and the second output terminal 20a. The drain terminal of the second upper arm switch 21 is electrically connected to the second power input terminal 20b. The source terminal of the second upper arm switch 21 is electrically connected to the second output terminal 20a and the second gate control circuit 23. The gate terminal of the second upper arm switch 21 is electrically connected to the second gate control circuit 23. Alternatively, the second upper arm switch 21 can also be a P-channel MOS-FET or a transistor.

[0067] In this embodiment, the second lower arm switch 22 is an N-channel MOS-FET. The second lower arm switch 22 is connected between the second output terminal 20a and the second GND terminal 20c. The drain terminal of the second lower arm switch 22 is electrically connected to the second output terminal 20a. The source terminal of the second lower arm switch 22 is electrically connected to the second GND terminal 20c and the second gate control circuit 23. The gate terminal of the second lower arm switch 22 is electrically connected to the second gate control circuit 23. Alternatively, the second lower arm switch 22 can also be a MOS-FET or a transistor.

[0068] The second gate control circuit 23 is electrically connected to the second enable signal input terminal 20d and the second PWM signal input terminal 20e. That is, the second gate control circuit 23 is input with the second enable signal and the second PWM signal. The second gate control circuit 23 controls the second upper arm gate voltage, which serves as the gate-source voltage of the second upper arm switch 21, and the second lower arm gate voltage, which serves as the gate-source voltage of the second lower arm switch 22, according to the second enable signal and the second PWM signal.

[0069] Specifically, when the second enable signal is high and the second PWM signal is high, the second gate control circuit 23 controls the second upper arm gate voltage to a high level and the second lower arm gate voltage to a low level. In this case, the second upper arm switch 21 is turned on and the second lower arm switch 22 is turned off. Alternatively, when the second enable signal is high and the second PWM signal is low, the second gate control circuit 23 controls the second upper arm gate voltage to a low level and the second lower arm gate voltage to a high level. In this case, the second upper arm switch 21 is turned off and the second lower arm switch 22 is turned on. On the other hand, when the second enable signal is low, the second gate control circuit 23 forcibly controls both the second upper arm gate voltage and the second lower arm gate voltage to a low level, regardless of the level of the second PWM signal. In this case, the second upper arm switch 21 and the second lower arm switch 22 are forcibly turned off.

[0070] As described above, the H-bridge circuit is constructed from the first drive circuit 10 and the second drive circuit 20. The operation of the H-bridge circuit constructed from the first drive circuit 10 and the second drive circuit 20 will be explained below.

[0071] First, the operation of the H-bridge circuit when no overcurrent is generated will be explained.

[0072] In the absence of overcurrent, the voltage of the current detection signal output from the current detection circuit 30 is lower than the first threshold voltage, the second threshold voltage, and the third threshold voltage. Therefore, it is determined that no overcurrent has occurred in either the first protection circuit 40 or the controller 60, and as a result, a first enable signal with a high-level voltage is input to the first enable signal input terminal 10d of the first drive circuit 10. Similarly, it is determined that no overcurrent has occurred in either the second protection circuit 50 or the controller 60, and as a result, a second enable signal with a high-level voltage is input to the second enable signal input terminal 20d of the second drive circuit 20. The single-phase DC motor 2 rotates by alternately repeating the forward and reverse rotation modes described below.

[0073] During the forward rotation mode, a first PWM signal with a duty cycle set according to the target rotation speed is input to the first PWM signal input terminal 10e of the first drive circuit 10, and a low-level second PWM signal is input to the second PWM signal input terminal 20e of the second drive circuit 20. As a result, during the forward rotation mode, the first upper arm switch 11 and the first lower arm switch 12 are PWM driven by the first PWM signal. On the other hand, during the forward rotation mode, the second upper arm switch 21 is in the off state, and the second lower arm switch 22 is in the on state.

[0074] For example, when the actual speed of the single-phase DC motor 2 approaches the target speed from a low speed, if the deviation between the actual speed and the target speed is large, the controller 60 increases the rate of change of the high-level time of the first PWM signal; if the deviation is small, it decreases the rate of change of the high-level time of the first PWM signal. Furthermore, when the actual speed reaches the target speed, the controller 60 maintains the high-level time of the first PWM signal at approximately a constant value.

[0075] On the other hand, when the actual speed of the single-phase DC motor 2 approaches the target speed from a high speed, the controller 60 sets the high-level time of the first PWM signal to zero or a minimum value before the actual speed reaches the target speed. When the actual speed reaches the target speed, the high-level time of the first PWM signal is maintained at approximately constant. Furthermore, when the actual speed is lower than the target speed, the controller 60 switches to the control described above for the case where the actual speed approaches the target speed from a low speed.

[0076] like Figure 3As shown, during the forward rotation mode, the coil current Ic flows in the following order: power supply P1, first upper arm switch 11, coil 2a, second lower arm switch 22, current detection circuit 30 (shunt resistor 31), and GND. During the forward rotation mode, as described above, by driving the first upper arm switch 11 and the first lower arm switch 12 with PWM, the current value of the coil current Ic becomes the current value required to make the single-phase DC motor 2 rotate at the target speed.

[0077] During the reverse mode, a second PWM signal with a duty cycle set according to the target rotational speed is input to the second PWM signal input terminal 20e of the second drive circuit 20, and a low-level first PWM signal is input to the first PWM signal input terminal 10e of the first drive circuit 10. As a result, during the reverse mode, the second upper arm switch 21 and the second lower arm switch 22 are PWM driven by the second PWM signal. On the other hand, during the reverse mode, the first upper arm switch 11 is in the off state, and the first lower arm switch 12 is in the on state.

[0078] For example, when the actual speed of the single-phase DC motor 2 approaches the target speed from a low speed, if the deviation between the actual speed and the target speed is large, the controller 60 increases the rate of change of the high-level time of the second PWM signal; if the deviation is small, it decreases the rate of change of the high-level time of the second PWM signal. Furthermore, when the actual speed reaches the target speed, the controller 60 maintains the high-level time of the second PWM signal at approximately a constant value.

[0079] On the other hand, when the actual speed of the single-phase DC motor 2 approaches the target speed from a high speed, the controller 60 sets the high-level time of the second PWM signal to zero or a minimum value before the actual speed reaches the target speed. When the actual speed reaches the target speed, the high-level time of the second PWM signal is maintained at approximately constant. Furthermore, when the actual speed is lower than the target speed, the controller 60 switches to the control described above for the case where the actual speed approaches the target speed from a low speed.

[0080] like Figure 4 As shown, during the reverse mode, the coil current Ic flows in the following order: power supply P1, second upper arm switch 21, coil 2a, first lower arm switch 12, current detection circuit 30 (shunt resistor 31), and GND. During the reverse mode, as described above, by driving the second upper arm switch 21 and the second lower arm switch 22 with PWM, the current value of the coil current Ic becomes the current value required to make the single-phase DC motor 2 rotate at the target speed.

[0081] By alternately repeating the forward and reverse rotation patterns described above, the single-phase DC motor 2 rotates at the target speed.

[0082] Next, the operation of the H-bridge circuit under overcurrent conditions will be explained.

[0083] In the event of an overcurrent, the voltage of the current detection signal output from the current detection circuit 30 is higher than the first threshold voltage, the second threshold voltage, and the third threshold voltage. Therefore, it is determined that an overcurrent has occurred in at least one of the first protection circuit 40 and the controller 60, resulting in the input of a first enable signal with a low-level voltage to the first enable signal input terminal 10d of the first drive circuit 10. Similarly, it is determined that an overcurrent has occurred in at least one of the second protection circuit 50 and the controller 60, resulting in the input of a second enable signal with a low-level voltage to the second enable signal input terminal 20d of the second drive circuit 20.

[0084] When the first enable signal, which is active high, goes low, both the first upper arm switch 11 and the first lower arm switch 12 are forced to the open state, regardless of the first PWM signal. Similarly, when the second enable signal, which is active high, goes low, both the second upper arm switch 21 and the second lower arm switch 22 are forced to the open state, regardless of the second PWM signal.

[0085] As described above, in the event of an overcurrent, all arm switches are forcibly opened. As a result, no coil current flows through coil 2a. Figure 5 As shown, when the coil current stops flowing, the single-phase DC motor 2 operates as a generator, with regenerative current Ir flowing through the body diodes of the first upper arm switch 11 and the second upper arm switch 21, which are N-channel MOS-FETs, in the illustrated path. By applying regenerative braking based on the regenerative current Ir, the rotation of the single-phase DC motor 2 stops.

[0086] As described above, in the event of an overcurrent, the rotation of the single-phase DC motor 2 can be forcibly stopped.

[0087] For example, consider a case where the voltage at the first enable signal input terminal 10d is fixed at a high level due to an internal fault in the first drive circuit 10, i.e., the voltage at the first enable signal line 71 is fixed at a high level. In this case, even if an overcurrent occurs, the first drive circuit 10 will continue to operate in both forward and reverse modes as usual. On the other hand, in this embodiment, since the first enable signal line 71 and the second enable signal line 72 are independently wired, the second enable signal line 72 is not electrically affected by the first enable signal line 71. Therefore, even if an overcurrent occurs while the voltage at the first enable signal line 71 is fixed at a high level, a second enable signal with a low level will be normally input to the second enable signal input terminal 20d of the second drive circuit 20. As a result, the second drive circuit 20 is forcibly disconnected, independent of the first drive circuit 10, and the single-phase DC motor 2 stops.

[0088] As described above, even if the voltage of the first enable signal line 71 is fixed at a high level due to an internal fault in the first drive circuit 10, a normal low-level second enable signal can still be transmitted to the second drive circuit 20 when an overcurrent occurs. Similarly, even if the voltage of the second enable signal line 72 is fixed at a high level due to an internal fault in the second drive circuit 20, a normal low-level first enable signal can still be transmitted to the first drive circuit 10 when an overcurrent occurs. Therefore, the redundancy of the protection function required by the VDE standard is achieved.

[0089] As described above, the motor drive device 1 of this embodiment includes a first drive circuit 10, a second drive circuit 20, a current detection circuit 30, a first protection circuit 40, and a second protection circuit 50. The first drive circuit 10 includes: a first upper arm switch 11 that electrically connects one end of the coil 2a of the single-phase DC motor 2 to a power supply P1; a first lower arm switch 12 that electrically connects one end of the coil 2a to GND; and a circuit that controls the energizing periods of the first upper arm switch 11 and the first lower arm switch 12. The second drive circuit 20 includes: a second upper arm switch 21 that electrically connects the other end of the coil 2a to the power supply P1; a second lower arm switch 22 that electrically connects the other end of the coil 2a to GND; and a circuit that controls the energizing periods of the second upper arm switch 21 and the second lower arm switch 22. The current detection circuit 30 detects the coil current flowing in the coil 2a and outputs a current detection signal representing the detection result of the coil current. The first protection circuit 40 determines whether an overcurrent has occurred based on the current detection signal and outputs a first enable signal indicating the determination result to the first drive circuit 10. The second protection circuit 20 determines whether an overcurrent has occurred based on the current detection signal and outputs a second enable signal indicating the determination result to the second drive circuit 20.

[0090] In the motor drive device 1 described above, the first enable signal line 71 that transmits the first enable signal to the first drive circuit 10 and the second enable signal line 72 that transmits the second enable signal to the second drive circuit 20 are independent wirings.

[0091] The VDE standard requires redundancy (duplication) of motor protection functions. However, if this requirement is met using software processing such as microcomputers, costly and time-consuming software program evaluation is necessary. In contrast, this embodiment utilizes two hardware protection circuits to meet the VDE standard requirements, eliminating the need for software program evaluation. As a result, VDE standard compliance can be evaluated at a low cost, and the evaluation period can be shortened.

[0092] Furthermore, by making the first enable signal line 71 and the second enable signal line 72 independently wired, for example, even if the voltage of the first enable signal line 71 is fixed at a high level (effective potential) due to an internal fault in the first drive circuit 10, the influence on the second enable signal line 72 can be avoided. As a result, a normal low-level second enable signal can be transmitted to the second drive circuit 10 in the event of an overcurrent, achieving the redundancy of protection functions required by the VDE standard.

[0093] Therefore, according to this embodiment, a motor drive device 1 that can satisfy the following two necessary conditions can be provided.

[0094] (1) It can be implemented at low cost and in a short time to evaluate whether it meets the VDE standard.

[0095] (2) It can avoid compromising the redundancy of the protection functions required by the VDE standard.

[0096] The motor drive device 1 of this embodiment further includes a controller 60, which outputs a first PWM signal for controlling the first drive circuit 10 to the first drive circuit 10, and outputs a second PWM signal for controlling the second drive circuit 20 to the second drive circuit 20. The controller 60 has a first enable signal output terminal 60d electrically connected to the first enable signal line 71 and a second enable signal output terminal 60e electrically connected to the second enable signal line 72.

[0097] Therefore, in addition to the two protection circuits, the controller 60 can output a first enable signal to the first drive circuit 10 and a second enable signal to the second drive circuit 20. As a result, the redundancy of the protection functions required by the VDE standard can be further enhanced.

[0098] In the motor drive device 1 of this embodiment, the controller 60 has a current detection terminal 60c that receives an input current detection signal.

[0099] By inputting a current detection signal to the controller 60, the controller 60 can determine whether an overcurrent has occurred through software processing, and output a first enable signal and a second enable signal indicating the determination result from the controller 60 to the first drive circuit 10 and the second drive circuit 20. As a result, the redundancy of the protection function in the event of an overcurrent can be further enhanced.

[0100] In this embodiment, the first protection circuit 40 includes: a first resistor divider circuit 41 that generates a first threshold voltage; and a first comparator 42 that compares the voltage of the current detection signal with the first threshold voltage and outputs a signal indicating the comparison result as a first enable signal. The second protection circuit 50 includes: a second resistor divider circuit 51 that generates a second threshold voltage; and a second comparator 52 that compares the voltage of the current detection signal with the second threshold voltage and outputs a signal indicating the comparison result as a second enable signal. The output terminal 42c of the first comparator 42 is wire-ORed with the first enable signal output terminal 60d of the controller 60. The output terminal 52c of the second comparator 52 is wire-ORed with the second enable signal output terminal 60e of the controller 60.

[0101] Therefore, with a simple circuit structure, at least one of the two drive circuits can be put into a stopped state when a low-level (non-effective potential) enable signal is output from at least one of the protection circuit and the controller.

[0102] In this embodiment, the first protection circuit 40 further includes a first diode 44 connected between the output terminal 42c of the first comparator 42 and the first enable signal output terminal 60d of the controller 60. The second protection circuit 50 further includes a second diode 54 connected between the output terminal 52c of the second comparator 52 and the second enable signal output terminal 60e of the controller 60. The anode terminal of the first diode 44 is connected to the first enable signal output terminal 60d, and the cathode terminal of the first diode 44 is connected to the output terminal 42c of the first comparator 42. The anode terminal of the second diode 54 is connected to the second enable signal output terminal 60e, and the cathode terminal of the second diode 54 is connected to the output terminal 52c of the second comparator 52.

[0103] By configuring the first diode 44 in this way, the first protection circuit 40 can be electrically disconnected from the circuit connected to its subsequent stages under normal conditions when no overcurrent occurs. This prevents noise generated from the analog components constituting the first protection circuit 40 from propagating to the subsequent circuits. Furthermore, in the event of an overcurrent anomaly, the low-level enable signal output from the protection circuit (comparator) is preferentially transmitted to the drive circuit compared to the enable signal output from the controller.

[0104] Alternatively, it is not necessary to set the first diode 44 and the second diode 54, but in this case, it is impossible to obtain the effect of preventing noise from propagating to the subsequent circuit of the first protection circuit 40.

[0105] In this embodiment, the first diode 44 and the second diode 54 are Schottky barrier diodes, respectively.

[0106] By using Schottky barrier diodes as the first diode 44 and the second diode 54, when the open-collector output terminal of the comparator is connected to GND, the voltage of the enable signal (the output voltage of the comparator) can be reduced to a value close to the ground level, thus reliably switching the drive circuit to the stop state.

[0107] [Variation Example]

[0108] This invention is not limited to the above-described embodiments, and the various structures described in this specification can be appropriately combined within a range that does not contradict each other.

[0109] For example, in the above embodiment, the case where the first drive circuit 10 and the second drive circuit 20 are implemented by different driver ICs has been described. In contrast, the first drive circuit 10 and the second drive circuit 20 can also be implemented by a single driver IC.

[0110] Furthermore, in the above embodiment, the controller 60 determines whether an overcurrent has occurred based on the current detection signal input via the current detection terminal 60c according to a predetermined procedure, and controls the state of the first enable signal output terminal 60d and the state of the second enable signal output terminal 60e based on the determination result. Alternatively, for example, the output signal of a temperature sensor capable of detecting the temperature of the single-phase DC motor 2 can be input to the controller 60. In this case, the controller 60 determines whether an overheating has occurred based on the output signal of the temperature sensor according to a predetermined procedure, and controls the state of the first enable signal output terminal 60d and the state of the second enable signal output terminal 60e based on the determination result.

[0111] Furthermore, in the above embodiment, the case where a Schottky barrier diode is used as the first diode 44 and the second diode 54 has been described, but other diodes may also be used as the first diode 44 and the second diode 54.

[0112] Label Explanation

[0113] 1: Motor drive unit; 2: Single-phase DC motor; 2a: Coil; 10: First drive circuit; 11: First upper arm switch; 12: First lower arm switch; 20: Second drive circuit; 21: Second upper arm switch; 22: Second lower arm switch; 30: Current detection circuit; 31: Shunt resistor; 40: First protection circuit; 41: First resistor voltage divider circuit; 42: First comparator; 44: First diode; 50: Second protection circuit; 51: Second resistor voltage divider circuit; 52: Second comparator; 54: Second diode; 60: Controller; 71: First enable signal line; 72: Second enable signal line.

Claims

1. A motor drive device for driving a single-phase DC motor, wherein, The motor drive device has: The first drive circuit has a first upper arm switch, a first lower arm switch, and a circuit for controlling the energization of the first upper arm switch and the first lower arm switch. The first upper arm switch electrically connects one end of the coil of the single-phase DC motor to the power supply, and the first lower arm switch electrically connects one end of the coil to GND. The second drive circuit has a second upper arm switch, a second lower arm switch, and circuitry for controlling the energization of the second upper arm switch and the second lower arm switch. The second upper arm switch electrically connects the other end of the coil to the power supply, and the second lower arm switch electrically connects the other end of the coil to GND. A current detection circuit that detects the current flowing in the coil and outputs a current detection signal representing the detection result of the current. The first protection circuit determines whether an overcurrent has occurred based on the current detection signal and outputs a first enable signal indicating the determination result to the first drive circuit. as well as The second protection circuit determines whether an overcurrent has occurred based on the current detection signal and outputs a second enable signal indicating the determination result to the second drive circuit. The first enable signal line that transmits the first enable signal to the first drive circuit and the second enable signal line that transmits the second enable signal to the second drive circuit are independent wirings.

2. The motor drive device according to claim 1, wherein, The motor drive device also includes a controller that outputs a first control signal for controlling the first drive circuit to the first drive circuit, and outputs a second control signal for controlling the second drive circuit to the second drive circuit. The controller has: The first enable signal output terminal is electrically connected to the first enable signal line; and The second enable signal output terminal is electrically connected to the second enable signal line.

3. The motor drive device according to claim 2, wherein, The controller has a current detection terminal into which the current detection signal is input.

4. The motor drive device according to claim 2 or 3, wherein, The first protection circuit has: The first resistor voltage divider circuit generates the first threshold voltage; and The first comparator compares the voltage of the current detection signal with the first threshold voltage and outputs a signal representing the comparison result as the first enable signal. The second protection circuit has: The second resistor voltage divider circuit generates the second threshold voltage; and The second comparator compares the voltage of the current detection signal with the second threshold voltage and outputs a signal representing the comparison result as the second enable signal. The output terminal of the first comparator is connected via a wire OR connection to the first enable signal output terminal of the controller. The output terminal of the second comparator is connected via a wire OR connection to the second enable signal output terminal of the controller. When at least one of the first protection circuit, the second protection circuit, and the controller outputs a low-level enable signal as an ineffective potential, at least one of the first drive circuit and the second drive circuit can be put into a stopped state.

5. The motor drive device according to claim 4, wherein, The first protection circuit also includes a first diode connected between the output terminal of the first comparator and the first enable signal output terminal of the controller. The second protection circuit also includes a second diode connected between the output terminal of the second comparator and the second enable signal output terminal of the controller. The anode terminal of the first diode is connected to the first enable signal output terminal. The cathode terminal of the first diode is connected to the output terminal of the first comparator. The anode terminal of the second diode is connected to the second enable signal output terminal. The cathode terminal of the second diode is connected to the output terminal of the second comparator.

6. The motor drive device according to claim 5, wherein, The first diode and the second diode are Schottky barrier diodes, respectively.

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