Pixel driving circuit and display panel

Abstract

The application discloses a pixel driving circuit and a display panel. In the pixel driving circuit, a first initialization module is configured to initialize a light-emitting module in an initialization stage; a second initialization module is configured to initialize a control end of a driving module in the initialization stage; a data writing module is configured to write a data voltage to the control end of the driving module and a compensation continuation module through a threshold compensation module in a data writing stage; a storage module is configured to store a control end potential of the driving module; the first initialization module is further configured to clamp the potential of the storage module; the compensation continuation module is configured to compensate the control end of the driving module in a compensation continuation stage; a light-emitting control module is configured to turn on a path between a first power signal input end and the light-emitting module in a light-emitting stage; and the driving module is configured to provide a driving current to the light-emitting module in the light-emitting stage, and the light-emitting module emits light in response to the driving current. The threshold compensation effect of the pixel driving circuit and the brightness uniformity of the display panel are improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display, and in particular to a pixel driving circuit and a display panel. BACKGROUND

[0002] An active-matrix organic light emitting diode (AMOLED) display panel has been widely applied to the display field due to its advantages over a liquid crystal display panel in terms of display color saturation, power consumption and bending. In the process of display of the AMOLED display panel, a pixel driving circuit drives a light emitting device to emit light.

[0003] With the development of display technology, a display panel supports a plurality of display modes of refresh frequencies to meet the needs of people in different application scenarios. For example, in the application scenarios of screen-off and e-book, the display panel can be applied to a display mode of low refresh frequency to reduce the power consumption of the display panel on the basis of meeting the display needs. In the application scenarios of dynamic picture display such as game and movie, the display panel can be applied to a display mode of high refresh frequency to meet the display needs. When the refresh frequency of the display panel is relatively high, the one-frame time of the pixel driving circuit is relatively short. When the one-frame time of the pixel driving circuit includes a threshold compensation phase, the time length of the threshold compensation phase is relatively short, which easily leads to insufficient threshold compensation time of the pixel driving circuit, and thus the threshold compensation effect of the pixel driving circuit is poor, and further the brightness uniformity of the display panel is poor. SUMMARY

[0004] The present application provides a pixel driving circuit and a display panel to improve the threshold compensation effect of the pixel driving circuit and improve the brightness uniformity of the display panel.

[0005] In a first aspect, an embodiment of the present application provides a pixel driving circuit, comprising a driving module, a light emitting module, a first initialization module, a data writing module, a threshold compensation module, a storage module, a compensation continuation module, a light emitting control module and a second initialization module.

[0006] The first initialization module is connected with the light-emitting module, and is configured to initialize the light-emitting module in an initialization stage; the second initialization module is connected with the control end of the driving module, and is configured to initialize the control end of the driving module in the initialization stage; the data writing module is connected with the second end of the driving module and the compensation continuation module, the threshold compensation module is connected between the first end and the control end of the driving module, and the data writing module is configured to write a data voltage to the control end of the driving module and the compensation continuation module through the threshold compensation module in a data writing stage; the storage module is connected between the control end of the driving module and the first initialization module, and is configured to store a potential of the control end of the driving module; the first initialization module is further configured to clamp a potential of the storage module; the compensation continuation module is configured to compensate a threshold of the control end of the driving module in a compensation continuation stage; the light-emitting control module is connected between a first power signal input end and the light-emitting module, and is configured to turn on a path between the first power signal input end and the light-emitting module in a light-emitting stage; the driving module is configured to provide a driving current to the light-emitting module in the light-emitting stage, and the light-emitting module emits light in response to the driving current.

[0007] Optionally, the compensation continuation module comprises a first storage capacitor.

[0008] A first pole of the first storage capacitor is connected with a first voltage input end, and a second pole of the first storage capacitor is connected with the second end of the driving module.

[0009] Preferably, the first power signal input end is multiplexed as the first voltage input end.

[0010] Optionally, the data writing module comprises a first transistor, the threshold compensation module comprises a second transistor, the driving module comprises a driving transistor, and the first initialization module comprises a third transistor.

[0011] The first electrode of the first transistor is connected with a data signal input terminal, the second electrode of the first transistor is connected with the second electrode of a drive transistor and the second end of the compensation continuation module, the gate of the first transistor is connected with a first scan signal input terminal, the first electrode of the second transistor is connected with the first electrode of the drive transistor, the second electrode of the second transistor is connected with the gate of the drive transistor and the first end of the storage module, the gate of the second transistor is connected with a second scan signal input terminal, the first electrode of the third transistor is connected with a first initialization signal input terminal, the second electrode of the third transistor is connected with the second end of the storage module and the anode of the light emitting module, and the gate of the third transistor is connected with a third scan signal input terminal; the effective level duration of a second scan signal provided by the second scan signal input terminal is greater than the effective level duration of a first scan signal provided by the first scan signal input terminal.

[0012] Optionally, the light emitting control module comprises a fourth transistor and a fifth transistor.

[0013] The first electrode of the fourth transistor is connected with the first power signal input terminal, the second electrode of the fourth transistor is connected with the first electrode of the drive module, the gate of the fourth transistor is connected with a first light emitting control signal input terminal, the first electrode of the fifth transistor is connected with the second electrode of the drive module, the second electrode of the fifth transistor is connected with the anode of the light emitting module, the gate of the fifth transistor is connected with a second light emitting control signal input terminal, and the cathode of the light emitting module is connected with a second power signal input terminal.

[0014] Preferably, a first light emitting control signal provided by the first light emitting control signal input terminal controls the fourth transistor to be turned on in the light emitting stage, and a second light emitting control signal provided by the second light emitting control signal input terminal controls the fifth transistor to be turned on in the initialization stage and the light emitting stage.

[0015] Optionally, the pixel driving circuit further comprises a third initialization module.

[0016] The third initialization module is connected with the second end of the drive module, and the third initialization module is configured to initialize the second end of the drive module in an initialization stage.

[0017] Optionally, the third initialization module comprises a sixth transistor, the first electrode of the sixth transistor is connected with a second initialization signal input terminal, the second electrode of the sixth transistor is connected with the second end of the drive module, and the gate of the sixth transistor is connected with a fourth scan signal input terminal.

[0018] Optionally, the pixel driving circuit further comprises a seventh transistor.

[0019] The first electrode of the seventh transistor is connected with the anode of the light-emitting module, the second electrode of the seventh transistor is connected with the third initialization signal input end, and the gate of the seventh transistor is connected with the fourth scan signal input end.

[0020] Optionally, the second initialization signal input end is multiplexed as the third initialization signal input end.

[0021] Optionally, the second initialization module comprises an eighth transistor, the first electrode of the eighth transistor is connected with the fourth initialization signal input end, the second electrode of the eighth transistor is connected with the control end of the driving module, and the gate of the eighth transistor is connected with the fifth scan signal input end.

[0022] In a second aspect, the embodiment of the present application further provides a display panel comprising the pixel driving circuit of the first aspect.

[0023] The technical scheme of the embodiment of the present application writes the data voltage into the driving module and the compensation continuation module in the data writing stage through the data writing module, and then writes the data voltage into the driving module continuously in the compensation continuation stage through the compensation continuation module, so that the threshold compensation time of the pixel driving circuit is increased on the basis of not affecting the length of the data writing stage when the pixel driving circuit works at a high refresh frequency, and the threshold compensation effect of the pixel driving circuit is improved, and the brightness uniformity of the display panel is improved. BRIEF DESCRIPTION OF DRAWINGS

[0024] Figure 1 A structural schematic diagram of a pixel driving circuit provided by the prior art is shown in FIG. 1.

[0025] Figure 2 A structural schematic diagram of a pixel driving circuit provided by the embodiment of the present application is shown in FIG. 2.

[0026] Figure 3 A structural schematic diagram of another pixel driving circuit provided by the embodiment of the present application is shown in FIG. 3.

[0027] Figure 4 A structural schematic diagram of another pixel driving circuit provided by the embodiment of the present application is shown in FIG. 4.

[0028] Figure 5 A structural schematic diagram of another pixel driving circuit provided by the embodiment of the present application is shown in FIG. 5. Figure 4 A timing diagram corresponding to the pixel driving circuit provided by the embodiment of the present application is shown in FIG. 6.

[0029] Figure 6 A structural schematic diagram of another pixel driving circuit provided by the embodiment of the present application is shown in FIG. 7.

[0030] Figure 7 A timing diagram corresponding to the pixel driving circuit provided by the embodiment of the present application is shown in FIG. 8. Figure 6 A timing diagram corresponding to the pixel driving circuit provided by the embodiment of the present application is shown in FIG. 8.

[0031] Figure 8 This is a schematic diagram of another pixel driving circuit provided in an embodiment of the present invention;

[0032] Figure 9 This is a schematic diagram of another pixel driving circuit provided in an embodiment of the present invention;

[0033] Figure 10 This is a schematic diagram of another pixel driving circuit provided in an embodiment of the present invention;

[0034] Figure 11 for Figure 10 A timing diagram corresponding to the provided pixel driving circuit;

[0035] Figure 12 This is a schematic diagram of the structure of a display panel provided in an embodiment of the present invention. Detailed Implementation

[0036] The present invention will now be described in further detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and not intended to limit it. Furthermore, it should be noted that, for ease of description, the accompanying drawings show only the parts relevant to the present invention, and not all of the structures.

[0037] Figure 1 A schematic diagram of a pixel driving circuit provided by the prior art. For example... Figure 1 As shown, the pixel driving circuit includes a driving transistor Mdr, a data writing transistor M1, a threshold compensation transistor M2, a first light-emitting control transistor M3, a second light-emitting control transistor M4, an anode initialization transistor M5, a storage capacitor Cst, and a light-emitting device D1. The driving transistor Mdr, data writing transistor M1, threshold compensation transistor M2, first light-emitting control transistor M3, second light-emitting control transistor M4, and anode initialization transistor M5 are exemplarily shown as N-type transistors, and their specific connection relationships are as follows... Figure 1In the process of the operation of the pixel driving circuit, in the initialization stage, the threshold compensation transistor M2, the first light-emitting control transistor M3 and the anode initialization transistor M5 are turned on, the first voltage provided by the first voltage input terminal Vdd is written into the gate of the driving transistor Mdr through the threshold compensation transistor M2, the gate initialization of the driving transistor Mdr is realized, and the driving transistor Mdr is turned on. At the same time, the initialization voltage is written into the anode of the light-emitting device D1 through the anode initialization transistor M5, and the anode initialization of the light-emitting device D1 is realized. In the data writing stage, the driving transistor Mdr is in the on state, the data writing transistor M1, the threshold compensation transistor M2 and the anode initialization transistor M5 are in the on state, the data voltage vdata is written into the gate of the driving transistor Mdr through the data writing transistor M1, the driving transistor Mdr and the threshold compensation transistor M2, the writing of the data voltage vdata and the threshold compensation of the driving transistor Mdr are realized, and the storage capacitor Cst maintains the gate potential of the driving transistor Mdr. At the same time, the other end of the storage capacitor Cst maintains the initialization voltage. In the light-emitting stage, the first light-emitting control transistor M3 and the second light-emitting control transistor M4 are turned on, the driving transistor Mdr forms a driving current according to the first voltage provided by the first voltage input terminal Vdd and the gate potential, and the driving current is transmitted to the anode of the light-emitting device D1 through the second light-emitting control transistor M4, and the light-emitting device D1 emits light.

[0038] In the data writing stage of the pixel driving circuit, a relatively long time is needed to complete the threshold compensation of the driving transistor Mdr. When the pixel driving circuit works at a high refresh frequency, the time of each stage of the operation of the pixel driving circuit is relatively short, so that the time length of the data writing stage of the pixel driving circuit cannot meet the time required by the threshold compensation of the driving transistor Mdr, and the threshold compensation effect of the pixel driving circuit is relatively poor, and the brightness uniformity of the display panel is relatively poor.

[0039] In view of the above technical problems, the embodiment of the present application provides a pixel driving circuit. Figure 2 The structure of the pixel driving circuit provided by the embodiment of the present application is shown in the figure. Figure 2As shown, the pixel driving circuit comprises a driving module 10, a light-emitting module 20, a first initialization module 30, a data writing module 40, a threshold compensation module 50, a storage module 60, a compensation continuation module 70, a light-emitting control module 80 and a second initialization module 90; the first initialization module 30 is connected with the light-emitting module 20, and the first initialization module 30 is configured to initialize the light-emitting module 20 in an initialization stage; the second initialization module 90 is connected with a control end of the driving module 10, and the second initialization module 90 is configured to initialize the control end of the driving module 10 in the initialization stage; the data writing module 40 is connected with a second end of the driving module 10 and the compensation continuation module 70, and the threshold compensation module 50 is connected between a first end and the control end of the driving module 10; the data writing module 40 is configured to write a data voltage to the control end of the driving module 10 and the compensation continuation module 70 through the threshold compensation module 50 in a data writing stage; the storage module 60 is connected between the control end of the driving module 10 and the first initialization module 30, and the storage module 60 is configured to store a potential of the control end of the driving module 10; the first initialization module 30 is further configured to clamp a potential of the storage module 60; the compensation continuation module 70 is configured to perform threshold compensation on the control end of the driving module 10 in a compensation continuation stage; the light-emitting control module 80 is connected between a first power signal input end VDD and the light-emitting module 20, and the light-emitting control module 80 is configured to turn on a path between the first power signal input end VDD and the light-emitting module 20 in a light-emitting stage; the driving module 10 is configured to provide a driving current to the light-emitting module 20 in the light-emitting stage, and the light-emitting module 20 emits light in response to the driving current.

[0040] Specifically, the first initialization module 30 is connected with the light-emitting module 20, the first initialization module 30 can receive a first initialization signal, when the first initialization module 30 is in a pass-through state, the first initialization module 30 transmits the first initialization signal to the light-emitting module 20, and the light-emitting module 20 is initialized, thereby avoiding the "stealing light" problem of the pixel driving circuit in the initialization stage and the residual image phenomenon when the light-emitting module 20 is driven to emit light. Meanwhile, the first initialization signal can be a signal with a fixed potential. The first initialization module 30 is connected with the second end of the storage module 60, when the first initialization module 30 outputs the first initialization signal, the potential of the second end of the storage module 60 can be fixed, which is beneficial to ensure the accuracy of threshold compensation of the storage module 60 in the subsequent working process of the pixel driving circuit. The second initialization module 90 is connected with the control end of the driving module 10, the second initialization module 90 can receive a second initialization signal, when the second initialization module 90 is in a pass-through state, the second initialization signal is transmitted to the control end of the driving module 10, and the control end of the driving module 10 is initialized, thereby improving the influence of the data voltage of the previous frame on the current frame, and making the driving module 10 in a conduction state. The data writing module 40 is connected with the second end of the driving module 10 and the second end of the compensation continuation module 70, the first end of the compensation continuation module 70 is connected with a fixed potential, the threshold compensation module 50 is connected between the first end and the control end of the driving module 10, and the first end of the storage module 60 is connected with the control end of the driving module 10. In the data writing stage, the data writing module 40 and the threshold compensation module 50 are in a pass-through state, the data writing module 40 writes the data voltage into the compensation continuation module 70, and the compensation continuation module 70 stores the data voltage. Meanwhile, the data voltage is written into the control end of the driving module 10 through the driving module 10 and the threshold compensation module 50, so as to realize the writing of the data voltage and the threshold compensation of the driving module 10. In the compensation continuation stage, the data writing module 40 is in a cut-off state, so that the working frequency requirement of the pixel driving circuit in the data writing stage is met, the threshold compensation module 50 maintains a pass-through state, the data voltage stored in the compensation continuation module 70 continues to be written into the control end of the driving module 10 through the driving module 10 and the threshold compensation module 50, the writing of the data voltage and the threshold compensation of the driving module 10 can be continued, the threshold compensation time of the driving module 10 is increased, thereby the threshold compensation effect of the pixel driving circuit can be improved, and the brightness uniformity of the display panel is improved. Meanwhile, the storage module 60 stores the potential difference between the two ends.The light emitting control module 80 is connected between the first power signal input end VDD and the light emitting module 20, and in the light emitting stage, the light emitting control module 80 turns on the path between the first power signal input end VDD and the light emitting module 20, so that the driving current formed according to the potential difference between the storage module 60 is transmitted to the light emitting module 20, and the light emitting module 20 emits light in response to the driving current.

[0041] The technical scheme of the embodiment, through the data writing module, data voltage is written to the driving module and the compensation continuation module in the data writing stage, and then in the compensation continuation stage, the compensation continuation module can continue to write the data voltage to the driving module, so that the threshold compensation time of the pixel driving circuit can be increased on the basis of not affecting the length of the data writing stage when the pixel driving circuit works at a high refresh frequency, thereby the threshold compensation effect of the pixel driving circuit can be improved, and the brightness uniformity of the display panel is improved.

[0042] Figure 3 Another structure schematic diagram of a pixel driving circuit is provided for the embodiment of the application. Figure 3 As shown in the figure, the compensation continuation module 70 includes a first storage capacitor C1; the first pole of the first storage capacitor C1 is connected with the first voltage input end V1, and the second pole of the first storage capacitor C1 is connected with the second end of the driving module 10.

[0043] Specifically, the first voltage V1 provided by the first voltage input end V1 can be a voltage signal with a fixed potential. The first pole of the first storage capacitor C1 is connected with the first voltage input end V1, so that the potential of the first pole of the first storage capacitor C1 is fixed. The second pole of the first storage capacitor C1 is connected with the second end of the driving module 10, that is, connected with the data writing module 40. In the data writing stage, the data voltage provided by the data writing module 40 is written to the second pole of the first storage capacitor C1, so that the first storage capacitor C1 can store the data voltage. Then in the compensation continuation stage, the data writing module 40 is in an open circuit state, so that the data writing stage meets the working frequency requirement of the pixel driving circuit, and at the same time, the threshold compensation module 50 maintains the path state, the data voltage stored by the first storage capacitor C1 continues to be written to the control end of the driving module 10 through the driving module 10 and the threshold compensation module 50, the writing of the data voltage and the threshold compensation of the driving module 10 can be continued, the threshold compensation time of the driving module 10 is increased, so that the threshold compensation time of the pixel driving circuit can be increased on the basis of not affecting the length of the data writing stage when the pixel driving circuit works at a high refresh frequency, thereby the threshold compensation effect of the pixel driving circuit can be improved, and the brightness uniformity of the display panel is improved.

[0044] It should be noted that, Figure 3The compensation continuation module 70 is exemplarily shown to include the first storage capacitor C1. In other embodiments, the compensation continuation module 70 can also include a plurality of capacitors to meet the capacitance value required for data voltage storage. Alternatively, in other embodiments, the compensation continuation module 70 can also include other elements having storage function, which is not limited herein.

[0045] Optionally, with reference back to Figure 3 , the first power signal input terminal VDD is multiplexed as the first voltage input terminal V1.

[0046] Specifically, the first power signal provided by the first power signal input terminal VDD is a signal with fixed potential. By setting the first power signal input terminal VDD to be multiplexed as the first voltage input terminal V1, the first power signal provided by the first power signal input terminal VDD can fix the first potential of the first storage capacitor C1, and additional setting of the first voltage input terminal V1 can be avoided, so that additional wiring for transmitting the first voltage on the display panel can be avoided, which is beneficial to simplify the wiring design on the display panel.

[0047] It should be noted that in other embodiments, other conventional wirings with fixed potential on the display panel can also be used to provide voltage to the first voltage input terminal V1, for example, the display panel is also provided with an initialization signal line for providing an initialization signal. The initialization signal has a fixed potential, and at this time the initialization signal line can be used to provide a fixed potential for the first voltage input terminal V1, which is not limited herein.

[0048] Figure 4 Another structure schematic diagram of a pixel driving circuit provided by the embodiments of the present application is provided. As shown in Figure 4As shown, the data writing module 40 includes a first transistor T1, the threshold compensation module 50 includes a second transistor T2, the driving module 10 includes a driving transistor Tdr, and the first initialization module 30 includes a third transistor T3. The first electrode of the first transistor T1 is connected with a data signal input terminal VDATA, the second electrode of the first transistor T1 is connected with the second electrode of the driving transistor Tdr and the second terminal of the compensation continuation module 70, the gate of the first transistor T1 is connected with a first scan signal input terminal S1, the first electrode of the second transistor T2 is connected with the first electrode of the driving transistor Tdr, the second electrode of the second transistor T2 is connected with the gate of the driving transistor Tdr and the first terminal of the storage module 60, the gate of the second transistor T2 is connected with a second scan signal input terminal S2, the first electrode of the third transistor T3 is connected with a first initialization signal input terminal VREF1, the second electrode of the third transistor T3 is connected with the second terminal of the storage module 60 and the anode of the light emitting module 20, and the gate of the third transistor T3 is connected with a third scan signal input terminal S3. The effective level duration of the second scan signal provided by the second scan signal input terminal S2 is greater than the effective level duration of the first scan signal provided by the first scan signal input terminal S1.

[0049] Specifically, Figure 4 As shown in the specific embodiment, the first transistor T1, the second transistor T2, the third transistor T3 and the driving transistor Tdr are all N-type transistors. When the first scan signal provided by the first scan signal input terminal S1 is at a high level, the first transistor T1 is turned on. Similarly, when the second scan signal provided by the second scan signal input terminal S2 is at a high level, the second transistor T2 is turned on. When the third scan signal provided by the third scan signal input terminal S3 is at a high level, the third transistor T3 is turned on. With reference to the specific embodiment, Figure 4 The first terminal of the compensation continuation module 70 is connected with a first voltage input terminal V1, and the first voltage provided by the first voltage input terminal V1 fixes the potential of the first terminal of the compensation continuation module 70. The storage module 60 can include a second storage capacitor C2. The first terminal of the storage module 60 is connected with the gate of the driving transistor Tdr, for storing the potential of the gate of the driving transistor Tdr. The light emitting module 20 can be a light emitting device E1. Figure 5 As shown in the specific embodiment, the first transistor T1, the second transistor T2, the third transistor T3 and the driving transistor Tdr are all N-type transistors. When the first scan signal provided by the first scan signal input terminal S1 is at a high level, the first transistor T1 is turned on. Similarly, when the second scan signal provided by the second scan signal input terminal S2 is at a high level, the second transistor T2 is turned on. When the third scan signal provided by the third scan signal input terminal S3 is at a high level, the third transistor T3 is turned on. With reference to the specific embodiment, Figure 4 A timing diagram corresponding to the pixel driving circuit provided by the embodiment is shown in FIG. 3. In the timing diagram, s1 is a timing of the first scan signal, s2 is a timing of the second scan signal, and s3 is a timing of the third scan signal. The working process of the pixel driving circuit will be described below in combination with the specific embodiment. Figure 4 A timing diagram corresponding to the pixel driving circuit provided by the embodiment is shown in FIG. 3. In the timing diagram, s1 is a timing of the first scan signal, s2 is a timing of the second scan signal, and s3 is a timing of the third scan signal. The working process of the pixel driving circuit will be described below in combination with the specific embodiment. Figure 5 A timing diagram corresponding to the pixel driving circuit provided by the embodiment is shown in FIG. 3. In the timing diagram, s1 is a timing of the first scan signal, s2 is a timing of the second scan signal, and s3 is a timing of the third scan signal. The working process of the pixel driving circuit will be described below in combination with the specific embodiment.

[0050] In the initialization stage t11, the first scan signal is low, the second scan signal is low, and the third scan signal is high. The first transistor T1 and the second transistor T2 are turned off, the third transistor T3 is turned on, the first initialization signal provided by the first initialization signal input terminal VREF1 is transmitted to the second end of the storage module 60 and the anode of the light-emitting module 20 through the third transistor T3, the light-emitting module 20 is initialized, and the potential of the second end of the storage module 60 is fixed. At the same time, the control end of the driving module 10 is initialized by the second initialization module 90.

[0051] In the data writing stage t12, the first scan signal is high, the second scan signal is high, and the third scan signal is high. The first transistor T1, the second transistor T2, and the third transistor T3 are turned on. The data voltage provided by the data signal input terminal VDATA is written to the second end of the compensation continuation module 70 through the first transistor T1, and the compensation continuation module 70 stores the data voltage. At the same time, the first transistor T1 writes the data voltage to the gate of the driving transistor Tdr through the driving transistor Tdr and the second transistor T2, realizing the writing of the data voltage and the threshold compensation of the driving transistor Tdr. The storage module 60 stores the gate potential of the driving transistor Tdr. Since the potential of the second end of the storage module 60 is the first initialization signal, i.e., the potential of the second end of the storage module 60 is fixed, the accuracy of the storage module 60 storing the gate potential of the driving transistor Tdr can be ensured.

[0052] In the compensation continuation stage t13, the first scan signal is low, the second scan signal is high, and the third scan signal is high. The first transistor T1 is turned off, and the second transistor T2 and the third transistor T3 are turned on. The first transistor T1 stops providing the data voltage, so that the process of writing the data voltage to the pixel driving circuit is only completed in the data writing stage, meeting the time requirement of the pixel driving circuit working in the high refresh frequency data writing stage. At the same time, the second transistor T2 is turned on, so that the data voltage stored in the compensation continuation module 70 is written to the gate of the driving transistor Tdr through the driving transistor Tdr and the second transistor T2, the process of writing the data voltage to the gate of the driving transistor Tdr can be continued, and the threshold compensation process of the driving transistor Tdr is increased. Thus, the threshold compensation time of the pixel driving circuit can be increased without affecting the length of the data writing stage when the pixel driving circuit works in the high refresh frequency, thereby improving the threshold compensation effect of the pixel driving circuit and improving the brightness uniformity of the display panel.

[0053] In addition, continuing to refer to Figure 5After the compensation continuation phase t13, a transition phase is further included. In the transition phase, the first scan signal is at low level, the second scan signal is at low level, the third scan signal is at high level, the first transistor T1 and the second transistor T2 are turned off, the third transistor T3 is turned on, and the data writing phase and the compensation continuation phase are completed. Meanwhile, the third transistor T3 is turned on, the anode of the light emitting module 20 is initialized, and the second end of the storage module 60 is at the first initialization signal, i.e., the second end of the storage module 60 is fixed.

[0054] In the light emitting phase t14, the first scan signal is at low level, the second scan signal is at low level, and the third scan signal is at low level. The first transistor T1, the second transistor T2 and the third transistor T3 are turned off, and the first end of the second storage capacitor C2 is in a floating state. When the light emitting control module 80 turns on the path between the first power signal input end VDD and the light emitting module 20, the second end potential of the second storage capacitor C2 changes, and the first end potential of the second storage capacitor C2 changes according to the coupling effect of the second storage capacitor C2, so that the potential difference between the two ends of the second storage capacitor C2 remains unchanged. Thus, the driving current formed by the driving transistor Tdr according to the potential difference between the two ends of the second storage capacitor C2 is transmitted to the light emitting device E1, and the light emitting device E1 emits light in response to the driving current.

[0055] For example, with reference to Figure 4 , the light emitting control module 80 can include a fourth transistor T4 and a fifth transistor T5. The first pole of the fourth transistor T4 is connected with the first power signal input end VDD, the second pole of the fourth transistor T4 is connected with the first pole of the driving transistor Tdr, the first pole of the fifth transistor T5 is connected with the second pole of the driving transistor Tdr, the second pole of the fifth transistor T5 is connected with the anode of the light emitting module 20, the gates of the fourth transistor T4 and the fifth transistor T5 are connected with the light emitting control signal input end EM, and the cathode of the light emitting module 20 is connected with the second power signal input end VSS. Figure 4 For example, the fourth transistor T4 and the fifth transistor T5 are N-type transistors in the above embodiment. For example, with reference to Figure 4 and Figure 5 In the light emitting phase t14, the light emitting control signal em provided by the light emitting control signal input end EM is at high level, the fourth transistor T4 and the fifth transistor T5 are controlled to be turned on, the second end potential of the second storage capacitor C2 changes, and the first end potential of the second storage capacitor C2 changes according to the coupling effect of the second storage capacitor C2, so that the potential difference between the two ends of the second storage capacitor C2 remains unchanged. Thus, the driving current formed by the driving transistor Tdr according to the potential difference of the second storage capacitor C2 is transmitted to the anode of the light emitting device E1 through the fifth transistor T5, and the light emitting device E1 emits light according to the driving current.

[0056] It should be noted that,Figure 4 The example shown illustrates that the first transistor T1, the second transistor T2, the third transistor T3, and the driving transistor Tdr are all N-type transistors. In other embodiments, the first transistor T1, the second transistor T2, the third transistor T3, and the driving transistor Tdr may also be P-type transistors, in which case the timing of the first scan signal, the second scan signal, and the third scan signal can be adaptively adjusted; this is not limited here.

[0057] Figure 6 This is a schematic diagram of another pixel driving circuit provided in an embodiment of the present invention. Figure 6 As shown, the light-emitting control module includes a fourth transistor T4 and a fifth transistor T5. The first terminal of the fourth transistor T4 is connected to the first power supply signal input terminal VDD, the second terminal of the fourth transistor T4 is connected to the first terminal of the driving module 10, and the gate of the fourth transistor T4 is connected to the first light-emitting control signal input terminal EM1. The first terminal of the fifth transistor T5 is connected to the second terminal of the driving module 10, the second terminal of the fifth transistor T5 is connected to the anode of the light-emitting module 20, the gate of the fifth transistor T5 is connected to the second light-emitting control signal input terminal EM2, and the cathode of the light-emitting module 20 is connected to the second power supply signal input terminal VSS. The first light-emitting control signal provided by the first light-emitting control signal input terminal EM1 controls the fourth transistor T4 to conduct during the light-emitting stage, and the second light-emitting control signal provided by the second light-emitting control signal input terminal EM2 controls the fifth transistor T5 to conduct during the initialization stage and the light-emitting stage.

[0058] Specifically, Figure 6The fourth transistor T4 and the fifth transistor T5 are exemplarily shown as N-type transistors. When the first light-emitting control signal provided by the first light-emitting control signal input terminal EM1 is at a high level, the fourth transistor T4 is turned on; when the second light-emitting control signal provided by the second light-emitting control signal input terminal EM2 is at a high level, the fifth transistor T5 is turned on. In the initialization stage, the third scanning signal is at a high level, the second light-emitting control signal is at a high level, the third transistor T3 and the fifth transistor T5 are turned on, and the first initialization signal is transmitted to the second end of the driving module 10 through the third transistor T3 and the fifth transistor T5, so that the second end of the driving module 10 can be initialized, the driving module 10 can be further reset, and the residual image phenomenon of the pixel driving circuit when driving the light-emitting module 20 to emit light can be further improved. In the light-emitting stage, the first scanning signal, the second scanning signal and the third scanning signal are at low levels, the first light-emitting control signal is at a high level, and the second light-emitting control signal is at a high level. The first transistor T1, the second transistor T2 and the third transistor T3 are turned off, and the first end of the second storage capacitor C2 is in a floating state. The fourth transistor T4 and the fifth transistor T5 are both turned on, the potential of the second end of the second storage capacitor C2 changes, and the potential of the first end of the second storage capacitor C2 changes according to the coupling effect of the second storage capacitor C2, so that the potential difference between the two ends of the second storage capacitor C2 remains unchanged. The driving transistor Tdr forms a driving current according to the potential difference between the two ends of the second storage capacitor C2, and transmits the driving current to the anode of the light-emitting module 20 through the fifth transistor T5. The light-emitting module 20 emits light according to the driving current. The light-emitting module 20 can be the light-emitting device E1.

[0059] The display panel is provided with a light-emitting control driving circuit and a plurality of row pixel driving circuits. The light-emitting control driving circuit includes a plurality of cascaded shift registers. Each shift register outputs a light-emitting control signal, which is used to provide a light-emitting control signal for a row of pixel driving circuits. When the light-emitting control signal corresponding to a row of pixel driving circuits is a first light-emitting control signal, the second light-emitting control signal corresponding to the row of pixel driving circuits can be the light-emitting control signal output by the lower-level shift register. The effective level timing of the second light-emitting control signal lags behind the effective level timing of the first light-emitting control signal, that is, the high level of the second light-emitting control signal lags behind the high level of the first light-emitting control signal. Thus, in the initialization stage, the second light-emitting control signal is at an effective level (i.e., at a high level), the fifth transistor T5 is turned on, and the initialization of the second end of the driving module 10 is realized.

[0060] Exemplarily, Figure 7 For Figure 6A timing diagram corresponding to the pixel driving circuit is provided. Wherein, s1 is a timing of the first scan signal, s2 is a timing of the second scan signal, s3 is a timing of the third scan signal, em1 is a timing of the first emission control signal provided by the first emission control signal input end EM1, and em2 is a timing of the second emission control signal provided by the second emission control signal input end EM2. The working process of the pixel driving circuit is described below. Figure 6 and Figure 7 The working process of the pixel driving circuit is described below.

[0061] In the initialization stage t21, the first scan signal is at low level, the second scan signal is at low level, the third scan signal is at high level, the first emission control signal is at low level, and the second emission control signal is at high level. The first transistor T1, the second transistor T2 and the fourth transistor T4 are turned off, the third transistor T3 and the fifth transistor T5 are turned on, the first initialization signal provided by the first initialization signal input end VREF1 is transmitted to the second end of the storage module 60 and the anode of the light emitting module 20 through the third transistor T3, and the anode of the light emitting module 20 is initialized, and the potential of the second end of the storage module 60 is fixed. The first initialization signal is transmitted to the second end of the driving module 10 through the third transistor T3 and the fifth transistor T5, which can initialize the second end of the driving module 10 and further reset the driving module 10, which is conducive to further improving the residual image phenomenon when the pixel driving circuit drives the light emitting module 20 to emit light. At the same time, the second initialization module 90 initializes the control end of the driving module 10.

[0062] In the data writing stage t22, the first scan signal is at high level, the second scan signal is at high level, the third scan signal is at high level, the first emission control signal is at low level, and the second emission control signal is at low level. The first transistor T1, the second transistor T2 and the third transistor T3 are turned on, the fourth transistor T4 and the fifth transistor T5 are turned off, and the data voltage provided by the data signal input end VDATA is written into the second end of the compensation continuation module 70 through the first transistor T1. The compensation continuation module 70 stores the data voltage. At the same time, the first transistor T1 writes the data voltage into the gate of the driving transistor Tdr through the driving transistor Tdr and the second transistor T2, realizing the writing of the data voltage and the threshold compensation of the driving transistor Tdr. The storage module 60 stores the gate potential of the driving transistor Tdr. Since the second end potential of the storage module 60 is the first initialization signal, i.e. the second end potential of the storage module 60 is fixed, the storage module 60 can ensure the accuracy of storing the gate potential of the driving transistor Tdr.

[0063] In the compensation continuation phase t23, the first scan signal is low, the second scan signal is high, the third scan signal is high, the first light-emitting control signal is low, the second light-emitting control signal is low, the first transistor T1, the fourth transistor T4 and the fifth transistor T5 are turned off, the second transistor T2 and the third transistor T3 are turned on, the first transistor T1 stops providing the data voltage, so that the process of writing the data voltage into the pixel driving circuit is only completed in the data writing phase, meeting the time requirement of the pixel driving circuit working in the high refresh frequency in the data writing phase. At the same time, the second transistor T2 is turned on, so that the data voltage stored in the compensation continuation module 70 is written into the gate of the driving transistor Tdr through the driving transistor Tdr and the second transistor T2, the data voltage writing into the gate of the driving transistor Tdr can be continued, and the threshold compensation process of the driving transistor Tdr is increased, thereby increasing the threshold compensation time of the pixel driving circuit without affecting the length of the data writing phase when the pixel driving circuit works in the high refresh frequency, thereby improving the threshold compensation effect of the pixel driving circuit and improving the brightness uniformity of the display panel.

[0064] In addition, continuing to refer to Figure 7 After the compensation continuation phase t23, a transition phase is further included. In the transition phase, the first scan signal is low, the second scan signal is low, the third scan signal is high, the first transistor T1 and the second transistor T2 are turned off, and the third transistor T3 is turned on. The data writing phase and the compensation continuation phase are completed. At the same time, the third transistor T3 is turned on, the anode of the light-emitting module 20 is initialized, and the second end potential of the storage module 60 is the first initialization signal, i.e., the second end potential of the storage module 60 is fixed.

[0065] In the light-emitting phase t24, the first scan signal is low, the second scan signal is low, the third scan signal is low, the first light-emitting control signal is high, the second light-emitting control signal is high, the first transistor T1, the second transistor T2 and the third transistor T3 are turned off, and the first end of the second storage capacitor C2 is in a floating state. The fourth transistor T4 and the fifth transistor T5 are turned on, the second end potential of the second storage capacitor C2 changes, and the first end potential of the second storage capacitor C2 changes according to the coupling effect of the second storage capacitor C2, so that the potential difference between the two ends of the second storage capacitor C2 remains unchanged. The driving transistor Tdr forms a driving current according to the potential difference between the two ends of the second storage capacitor C2, and transmits the driving current to the anode of the light-emitting module 20 through the fifth transistor T5. The light-emitting module 20 emits light according to the driving current. The light-emitting module 20 can be the light-emitting device E1.

[0066] Figure 8 Another structure diagram of a pixel driving circuit provided by the embodiment of the present application is provided. As shown in FIG. 6, the pixel driving circuit includes a first scan signal line 10, a second scan signal line 20, a third scan signal line 30, a first light-emitting control signal line 40, a second light-emitting control signal line 50, a first initialization signal line 60, a first transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4, a fifth transistor T5, a first storage capacitor C1, a second storage capacitor C2, a driving transistor Tdr, a light-emitting module 20 and a storage module 60.Figure 8 As shown, the pixel driving circuit further comprises a third initialization module 100; the third initialization module 100 is connected with the second end of the driving module 10, and the third initialization module 100 is used for initializing the second end of the driving module 10 in the initialization stage.

[0067] Specifically, Figure 8 As exemplarily shown in FIG. 8, the light emitting control module 80 is only used for turning on the path between the first power signal input end VDD and the light emitting module 20 in the light emitting stage, so that the driving transistor Tdr transmits the driving current formed according to the potential difference between the two ends of the storage module 60 to the light emitting module 20, and the light emitting module 20 emits light in response to the driving current. Exemplarily, the light emitting control module 80 can comprise a fourth transistor T4 and a fifth transistor T5, and the gates of the fourth transistor T4 and the fifth transistor T5 are connected with the light emitting control signal input end EM. On this basis, the pixel driving circuit can comprise a third initialization module 100, the third initialization module 100 can receive a second initialization signal, in the initialization stage, the third initialization module 100 is in the path state, the third initialization module 100 transmits the second initialization signal to the second end of the driving module 10, and the second end of the driving module 10 is initialized, which can further reset the driving module 10, and is beneficial to further improve the residual image phenomenon when the pixel driving circuit drives the light emitting module 20 to emit light. Therefore, by using only one light emitting control signal input end EM to control the state of the light emitting control module 80, the control signal of the light emitting control module 80 can be simplified. Then, the second end of the driving module 10 is initialized by the third initialization module 100, which ensures the effect of the pixel driving circuit driving the light emitting module 20 to emit light.

[0068] In addition, one frame time is the time required for the display panel to refresh once, that is, the time required for the display panel to scan from the first row of pixel driving circuits to the last row of pixel driving circuits. Different refresh frequencies correspond to different one frame times. For example, when the refresh frequency is 10HZ, the time from the first row of the display panel to the last row is 100ms, that is, the one frame time is 100ms. When the refresh frequency is 120HZ, the time from the first row of the display panel to the last row is about 8.3ms, that is, the one frame time is 8.3ms. When the pixel driving circuit works at the basic refresh frequency, the one frame time of the pixel driving circuit can include one sub-frame. When the pixel driving circuit works at the low refresh frequency, the one frame time of the pixel driving circuit can include multiple sub-frames, and the multiple sub-frames are divided into a write frame and at least one holding frame, and each sub-frame corresponds to the one frame time of the basic refresh frequency. For example, when the pixel driving circuit works at 10HZ, if the basic refresh frequency is 120HZ, then the one frame time of the pixel driving circuit working at 10HZ can include 12 sub-frames, the first sub-frame is the write frame, and the remaining 11 sub-frames are the holding frames. By setting the third initialization module 100 to initialize the second end of the driving module 10 in the initialization stage of the write frame and the holding frame, the afterimage phenomenon of the light-emitting module 20 when emitting light is improved, and at the same time, the characteristics of the driving module 10 can be adjusted in the initialization stage of the write frame and the holding frame, thereby reducing the influence of the characteristics of the driving module 10 on the luminance of the light-emitting module 20, improving the luminance difference of the pixel driving circuit within one frame time, and further improving the screen flicker phenomenon of the display panel.

[0069] With reference to the foregoing Figure 8 , the third initialization module 100 includes a sixth transistor T6, the first electrode of the sixth transistor T6 is connected with the second initialization signal input end VREF2, the second electrode of the sixth transistor T6 is connected with the second end of the driving module 10, and the gate electrode of the sixth transistor T6 is connected with the fourth scan signal input end S4.

[0070] Specifically, Figure 8 The sixth transistor T6 is exemplarily shown as an N-type transistor in the figure. When the fourth scan signal provided by the fourth scan signal input end S4 is at a high level, the sixth transistor T6 is turned on, and the second initialization signal provided by the second initialization signal input end VREF2 is written to the second electrode of the driving transistor Tdr through the sixth transistor T6, so as to initialize the second electrode of the driving transistor Tdr and further reset the driving transistor Tdr, which is conducive to further improving the afterimage phenomenon of the pixel driving circuit driving the light-emitting module 20 to emit light.

[0071] Exemplarily, when the pixel driving circuit works at a low refresh frequency, in the initialization stage of the first sub-frame, the fourth scan signal provided by the fourth scan signal input end S4 is at a high level, the sixth transistor T6 is turned on, the second initialization signal provided by the second initialization signal input end VREF2 is transmitted to the second electrode of the driving transistor Tdr through the sixth transistor T6, and the second electrode of the driving transistor Tdr is initialized. In the data writing stage, the compensation continuation stage and the light emitting stage of the frame, the fourth scan signal is at a low level, and the sixth transistor T6 is turned off. Then in the initialization stage of the holding frame, the fourth scan signal is at a high level, the sixth transistor T6 is turned on, the second initialization signal is transmitted to the second electrode of the driving transistor Tdr through the sixth transistor T6, and the second electrode of the driving transistor Tdr is initialized.

[0072] Figure 9 Another structure schematic diagram of a pixel driving circuit is provided for an embodiment of the present application. As shown in the figure, Figure 9 The pixel driving circuit further includes a seventh transistor T7, the first electrode of the seventh transistor T7 is connected with the anode of the light emitting module 20, the second electrode of the seventh transistor T7 is connected with the third initialization signal input end VREF3, and the gate of the seventh transistor T7 is connected with the fourth scan signal input end S4.

[0073] Specifically, Figure 9 Exemplarily, the seventh transistor T7 is an N-type transistor, as shown in the figure. The seventh transistor T7 has the same on state as the sixth transistor T6. In the initialization stage of the writing frame and the holding frame, the fourth scan signal provided by the fourth scan signal input end S4 is at a high level, the seventh transistor T7 is turned on at the same time, the third initialization signal provided by the third initialization signal input end VREF3 is transmitted to the anode of the light emitting module 20 through the seventh transistor T7, and the anode of the light emitting module 20 is initialized, which can improve the residual image phenomenon when the pixel driving circuit drives the light emitting module 20 to emit light.

[0074] Optionally, the second initialization signal input end VREF2 is multiplexed as the third initialization signal input end VREF3.

[0075] Specifically, in the light emitting stage, the light emitting control module 80 turns on the path between the driving module 10 and the light emitting module 20, so that the second end potential of the driving module 10 is the same as the anode potential of the light emitting module 20. In the initialization stage, the second initialization signal input end VREF2 is multiplexed as the third initialization signal input end VREF3, so that the initial anode potential of the light emitting module 20 is the same as the initial second end potential of the driving module 10, which can reduce the setting of the initialization signal input end on the basis of ensuring the normal work of the pixel driving circuit, and further can reduce the wiring setting for providing the initialization signal on the display panel, which is beneficial to simplify the wiring design on the display panel.

[0076] Figure 10 Another structure schematic diagram of the pixel driving circuit provided by the embodiment of the present application is shown in FIG. 8. As shown in FIG. 8, the second initialization module 90 includes an eighth transistor T8, the first electrode of the eighth transistor T8 is connected with the fourth initialization signal input terminal VREF4, the second electrode of the eighth transistor T8 is connected with the control terminal of the driving module 10, and the gate of the eighth transistor T8 is connected with the fifth scan signal input terminal S5. Figure 10

[0077] Specifically, the eighth transistor T8 is exemplarily shown as an N-type transistor in FIG. 8. When the fifth scan signal provided by the fifth scan signal input terminal S5 is at a high level, the eighth transistor T8 is turned on, and the fourth initialization signal provided by the fourth initialization signal input terminal VREF4 is transmitted to the control terminal of the driving module 10 through the eighth transistor T8, so as to initialize the control terminal of the driving module 10. Figure 10

[0078] Figure 10 The light emitting control module 80 exemplarily includes the fourth transistor T4 and the fifth transistor T5, and the gate of the fourth transistor T4 and the gate of the fifth transistor T5 are both connected with the light emitting control signal input terminal EM. Figure 11 The timing diagram corresponding to the pixel driving circuit provided by the embodiment of the present application is shown in FIG. 9. Wherein, s1 is a timing of the first scan signal, s2 is a timing of the second scan signal, s3 is a timing of the third scan signal, s4 is a timing of the fourth scan signal, s5 is a timing of the fifth scan signal, and em is a timing of the light emitting control signal provided by the light emitting control signal input terminal EM. The working process of the pixel driving circuit working at a low refresh frequency is described below in combination with FIG. 9. Figure 10 Figure 10 Figure 11

[0079] ​​​​​In the initialization stage t31 of the writing frame, the first scan signal is at low level, the second scan signal is at low level, the third scan signal is at high level, the fourth scan signal is at high level, the fifth scan signal is at high level, the light emitting control signal is at low level, the first transistor T1, the second transistor T2, the fourth transistor T4 and the fifth transistor T5 are turned off, the third transistor T3, the sixth transistor T6, the seventh transistor T7 and the eighth transistor T8 are turned on, the first initialization signal provided by the first initialization signal input terminal VREF1 is transmitted to the second end of the storage module 60 and the anode of the light emitting module 20 through the third transistor T3, the light emitting module 20 is initialized, and the second end potential of the storage module 60 is fixed. At the same time, the third initialization signal provided by the third initialization signal input terminal VREF3 is also transmitted to the anode of the light emitting module 20 through the seventh transistor T7, and the anode of the light emitting module 20 is initialized. The second initialization signal provided by the second initialization signal input terminal VREF2 is transmitted to the second electrode of the driving transistor Tdr through the sixth transistor T6, and the second electrode of the driving transistor Tdr is initialized. The fourth initialization signal provided by the fourth initialization signal input terminal REF4 is transmitted to the gate electrode of the driving transistor Tdr through the eighth transistor T8, and the gate electrode of the driving transistor Tdr is initialized.

[0080] In the data writing stage t32 of the writing frame, the first scan signal is at high level, the second scan signal is at high level, the third scan signal is at high level, the fourth scan signal is at low level, the fifth scan signal is at low level, the light emitting control signal is at low level, the first transistor T1, the second transistor T2 and the third transistor T3 are turned on, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, the seventh transistor T7 and the eighth transistor T8 are turned off, the data voltage provided by the data signal input terminal VDATA is written into the second end of the compensation continuation module 70 through the first transistor T1, and the compensation continuation module 70 stores the data voltage. At the same time, the first transistor T1 writes the data voltage into the gate electrode of the driving transistor Tdr through the driving transistor Tdr and the second transistor T2, so as to realize the writing of the data voltage and the threshold compensation of the driving transistor Tdr. The storage module 60 stores the gate potential of the driving transistor Tdr. Since the second end potential of the storage module 60 is the first initialization signal, i.e. the second end potential of the storage module 60 is fixed, the accuracy of the storage module 60 storing the gate potential of the driving transistor Tdr can be ensured.

[0081] In the compensation continuation phase t33 of writing a frame, the first scan signal is at low level, the second scan signal is at high level, the third scan signal is at high level, the fourth scan signal is at low level, the fifth scan signal is at low level, the light-emitting control signal is at low level, the first transistor T1, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, the seventh transistor T7 and the eighth transistor T8 are turned off, the second transistor T2 and the third transistor T3 are turned on, and the first transistor T1 stops providing the data voltage, so that the process of writing the data voltage into the pixel driving circuit is only completed in the data writing phase, and the time requirement of the pixel driving circuit working in the high refresh frequency in the data writing phase is met. At the same time, the second transistor T2 is turned on, so that the data voltage stored in the compensation continuation module 70 is written into the gate of the driving transistor Tdr through the driving transistor Tdr and the second transistor T2, the data voltage writing into the gate of the driving transistor Tdr can be continued, and the threshold compensation process of the driving transistor Tdr is increased, so that the threshold compensation time of the pixel driving circuit can be increased without affecting the length of the data writing phase when the pixel driving circuit works in the high refresh frequency, and the threshold compensation effect of the pixel driving circuit can be improved, and the brightness uniformity of the display panel is improved.

[0082] With reference to the foregoing Figure 11 After the compensation continuation phase t33 of writing a frame, a transition phase is further included. In the transition phase, the first scan signal is at low level, the second scan signal is at low level, the third scan signal is at high level, the first transistor T1 and the second transistor T2 are turned off, and the third transistor T3 is turned on, so that the data writing phase and the compensation continuation phase are completed. At the same time, the third transistor T3 is turned on, the anode of the light-emitting module 20 is initialized, and the second end potential of the storage module 60 is the first initialization signal, that is, the second end potential of the storage module 60 is fixed.

[0083] In the light-emitting phase t34 of writing a frame, the first scan signal is at low level, the second scan signal is at low level, the third scan signal is at low level, the fourth scan signal is at low level, the fifth scan signal is at low level, the light-emitting control signal is at high level, the first transistor T1, the second transistor T2, the third transistor T3, the sixth transistor T6, the seventh transistor T7 and the eighth transistor T8 are turned off, and the first end of the second storage capacitor C2 is in a floating state. The fourth transistor T4 and the fifth transistor T5 are turned on, the second end potential of the second storage capacitor C2 changes, and the first end potential of the second storage capacitor C2 changes according to the coupling effect of the second storage capacitor C2, so that the potential difference between the two ends of the second storage capacitor C2 remains unchanged. The driving transistor Tdr forms a driving current according to the potential difference between the two ends of the second storage capacitor C2, and transmits the driving current to the anode of the light-emitting module 20 through the fifth transistor T5, and the light-emitting module 20 emits light according to the driving current. The light-emitting module 20 can be the light-emitting device E1.

[0084] In the initialization phase t35 of the maintaining frame, the first scan signal is at low level, the second scan signal is at low level, the third scan signal is at low level, the fourth scan signal is at high level, the fifth scan signal is at low level, the light emitting control signal is at low level, the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5 and the eighth transistor T8 are turned off, the sixth transistor T6 and the seventh transistor T7 are turned on, the second initialization signal provided by the second initialization signal input terminal VREF2 is transmitted to the second electrode of the driving transistor Tdr through the sixth transistor T6 to initialize the second electrode of the driving transistor Tdr. At the same time, the third initialization signal provided by the third initialization signal input terminal VREF3 is transmitted to the anode of the light emitting module 20 through the seventh transistor T7 to initialize the anode of the light emitting module 20.

[0085] In the transition phase t36 of the maintaining frame, the first scan signal is at low level, the second scan signal is at low level, the third scan signal is at low level, the fourth scan signal is at low level, the fifth scan signal is at low level, the light emitting control signal is at low level, the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, the seventh transistor T7 and the eighth transistor T8 are all turned off to maintain the current state of the pixel driving circuit.

[0086] In the light emitting phase t37 of the maintaining frame, the first scan signal is at low level, the second scan signal is at low level, the third scan signal is at low level, the fourth scan signal is at low level, the fifth scan signal is at low level, the light emitting control signal is at high level, the first transistor T1, the second transistor T2, the third transistor T3, the sixth transistor T6, the seventh transistor T7 and the eighth transistor T8 are turned off, and the first end of the second storage capacitor C2 is in a floating state. The fourth transistor T4 and the fifth transistor T5 are turned on, the potential of the second end of the second storage capacitor C2 changes, and the potential of the first end of the second storage capacitor C2 changes due to the coupling effect of the second storage capacitor C2, so that the potential difference between the two ends of the second storage capacitor C2 remains unchanged. The driving transistor Tdr forms a driving current according to the potential difference between the two ends of the second storage capacitor C2, and transmits the driving current to the anode of the light emitting module 20 through the fifth transistor T5, and the light emitting module 20 emits light according to the driving current.

[0087] The embodiment of the present application also provides a display panel. Figure 12 As shown in the structure schematic diagram of the display panel provided by the embodiment of the present application, Figure 12 As shown, the display panel comprises the pixel driving circuit 101 provided by any embodiment of the present application.

[0088] Specifically, the display panel comprises a display area AA, the display area AA is provided with a plurality of pixel units P, each pixel unit P comprises the pixel driving circuit 101 and the light emitting device E1 provided by any embodiment of the present application, the pixel driving circuit 101 provides driving current for the light emitting device E1, and the light emitting device E1 is driven to emit light. Since the display panel comprises the pixel driving circuit 101 provided by any embodiment of the present application, the display panel has the same beneficial effects as the pixel driving circuit 101, which will not be described here.

[0089] It should be noted that the above only describes the preferred embodiments of the present application and the technical principles applied. Those skilled in the art will understand that the present application is not limited to the specific embodiments described herein, and those skilled in the art can make various obvious changes, re-adjustments and substitutions without departing from the scope of the present application. Therefore, although the present application has been described in more detail through the above embodiments, the present application is not limited to the above embodiments, and can include more other equivalent embodiments without departing from the concept of the present application, and the scope of the present application is determined by the scope of the appended claims.

Claims

1. A pixel driving circuit, characterized by comprising: The driving module, the light-emitting module, the first initialization module, the data writing module, the threshold compensation module, the storage module, the compensation continuation module, the light-emitting control module and the second initialization module are included. The first initialization module is connected with the light-emitting module, and is used for initializing the light-emitting module in an initialization stage; the second initialization module is connected with the control end of the driving module, and is used for initializing the control end of the driving module in the initialization stage; the data writing module is connected with the second end of the driving module and the second end of the compensation continuation module, the first end of the compensation module is used for accessing a fixed potential, the threshold compensation module is connected between the first end and the control end of the driving module, and the data writing module is used for writing a data voltage into the control end of the driving module and the compensation continuation module through the threshold compensation module in a data writing stage; the storage module is connected between the control end of the driving module and the first initialization module, and is used for storing the potential of the control end of the driving module; the first initialization module is also used for clamping the potential of the storage module; the compensation continuation module is used for threshold compensation of the control end of the driving module in a compensation continuation stage; and the light-emitting control module is connected between the first power signal input end and the light-emitting module, and is used for turning on the path between the first power signal input end and the light-emitting module in a light-emitting stage. The driving module is used for providing a driving current to the light-emitting module in the light-emitting stage, and the light-emitting module emits light in response to the driving current.

2. The pixel driving circuit of claim 1, wherein, The compensation continuation module includes a first storage capacitor. The first end of the first storage capacitor is connected with a first voltage input end, and the second end of the first storage capacitor is connected with the second end of the driving module.

3. The pixel driving circuit of claim 2, wherein, The first power signal input end is multiplexed as the first voltage input end.

4. The pixel driving circuit of claim 1, wherein, The data writing module includes a first transistor, the threshold compensation module includes a second transistor, the driving module includes a driving transistor, and the first initialization module includes a third transistor. The first end of the first transistor is connected with a data signal input end, the second end of the first transistor is connected with the second end of the driving transistor and the second end of the compensation continuation module, the gate of the first transistor is connected with a first scanning signal input end, the first end of the second transistor is connected with the first end of the driving transistor, the second end of the second transistor is connected with the gate of the driving transistor and the first end of the storage module, the gate of the second transistor is connected with a second scanning signal input end, the first end of the third transistor is connected with a first initialization signal input end, the second end of the third transistor is connected with the second end of the storage module and the anode of the light-emitting module, and the gate of the third transistor is connected with a third scanning signal input end; the effective level duration of a second scanning signal provided by the second scanning signal input end is greater than the effective level duration of a first scanning signal provided by the first scanning signal input end.

5. The pixel driving circuit according to any one of claims 1-4, wherein, The light-emitting control module comprises a fourth transistor and a fifth transistor; The first electrode of the fourth transistor is connected with the first power signal input end, the second electrode of the fourth transistor is connected with the first electrode of the driving module, the gate electrode of the fourth transistor is connected with a first light-emitting control signal input end, the first electrode of the fifth transistor is connected with the second electrode of the driving module, the second electrode of the fifth transistor is connected with the anode of the light-emitting module, the gate electrode of the fifth transistor is connected with a second light-emitting control signal input end, and the cathode of the light-emitting module is connected with a second power signal input end.

6. The pixel driving circuit of claim 5, wherein, The first light-emitting control signal provided by the first light-emitting control signal input end controls the fourth transistor to be turned on in the light-emitting stage, and the second light-emitting control signal provided by the second light-emitting control signal input end controls the fifth transistor to be turned on in the initialization stage and the light-emitting stage.

7. The pixel driving circuit according to any one of claims 1-4, wherein, Further comprising a third initialization module; The third initialization module is connected with the second end of the driving module, and the third initialization module is used for initializing the second end of the driving module in the initialization stage.

8. The pixel driving circuit of claim 7, wherein, The third initialization module comprises a sixth transistor, the first electrode of the sixth transistor is connected with a second initialization signal input end, the second electrode of the sixth transistor is connected with the second end of the driving module, and the gate electrode of the sixth transistor is connected with a fourth scanning signal input end.

9. The pixel driving circuit of claim 8, wherein, Further comprising a seventh transistor; The first electrode of the seventh transistor is connected with the anode of the light-emitting module, the second electrode of the seventh transistor is connected with a third initialization signal input end, and the gate electrode of the seventh transistor is connected with the fourth scanning signal input end.

10. The pixel driving circuit of claim 9, wherein, The second initialization signal input end is multiplexed as the third initialization signal input end.

11. The pixel driving circuit of claim 1, wherein, The second initialization module comprises an eighth transistor, the first electrode of the eighth transistor is connected with a fourth initialization signal input end, the second electrode of the eighth transistor is connected with the control end of the driving module, and the gate electrode of the eighth transistor is connected with a fifth scanning signal input end.

12. A display panel, characterized by The pixel driving circuit comprises any one of claims 1-11.

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