Static random access memory (SRAM) fault processing device and SRAM fault processing method

Abstract

The present invention discloses a static random access memory (SRAM) fault processing device and an SRAM fault processing method. The device and method perform built-in self-test (BIST) and repair on static random access memory (SRAM) cells, and the device and method store fault and repair history information of previous SRAM tests, provide information for current testing, and reflect both BIST results and information about previous tests to perform multiple repairs until no spare SRAM is available.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to Korean Patent Application No. 10-2021-0049471, filed on April 15, 2021, which is hereby incorporated by reference in its entirety for all purposes. Technical Field

[0003] The present disclosure relates to a static random access memory (SRAM) fault handling device and an SRAM fault handling method. Although the present disclosure is suitable for a wide range of applications, it is particularly suitable for storing the repair status and repair history of fault results in previous tests, so that multiple repairs can be performed by reflecting both built-in self-test (BIST) results and previous test results until there is no spare SRAM available. Background Art

[0004] As processing becomes more detailed, SRAM cells are used more and more, making the reliability of SRAM cells important. In addition, because of the occurrence of "margin fail", SRAM cells cannot operate normally according to operating conditions (e.g., temperature, voltage, operating frequency, etc.), and SRAM cell repair also becomes more important. Margin fail means that when multiple tests are performed for the same test conditions or under different test conditions, the pass / fail (PASS / FAIL) results at a specific address are different. Due to test time and cost, built-in self-test (BIST) and repair are performed on SRAM cells under specific conditions (e.g., room temperature, low operating voltage, maximum operating frequency, etc.). When necessary, tests with other test conditions (e.g., high temperature, etc.) added to the SRAM cells are performed. If margin fail occurs due to the changed test conditions, repair or fault handling must be performed again on the corresponding SRAM chip. Therefore, when the result of the BIST test shows different fault aspects according to the test conditions, multiple repairs become complicated.

[0005] When performing multiple repairs, it is necessary to consider the possibility that BIST test results may be altered by margin failures in order to perform repairs for margin failures. For example, there may be cases where a specific address is a good SRAM cell under one test condition but a bad SRAM cell under another test condition; or conversely, there may be cases where a specific address is a bad SRAM cell under one test condition but a good SRAM cell under another test condition. With BIST testing, only the results of the currently running test are known, not the results of previous tests. Therefore, in multiple repairs, failure history information and repair status for previous tests of spare addresses must be provided, and non-volatile memory is required to store this failure history information and repair status.

[0006] In the past, testing was mainly performed only for the purpose of "hard fault" detection. That is, the margin failure has an aspect that varies according to the test conditions and due to the complexity of multiple repairs, only one repair is performed under the worst conditions in the prior art. When a fault occurs in the SRAM cell in a further performed test, fault processing is performed on the chip. However, since the reliability of the SRAM cell becomes more important due to the more detailed processing, the test is further performed for other test conditions. Here, in the case of margin failure (that is, failure occurs according to the conditions), unless multiple repairs are supported, even if there is a spare available SRAM, fault processing must be performed on the chip. There is a method of directly reading the repair information in the test equipment and performing the repair. However, when testing several chips at the same time, this method complicates the test program of the device and may not be supported according to the device. This reduces the test efficiency and has a direct impact on the yield rate.

[0007] Alternatively, there is a method in which, when the device is powered on, the BIST circuit is operated to store the faulty address of the real memory area and the normal address of the backup memory area in a register relative to the test result. Furthermore, when a write / read operation is performed on the faulty real address through actual operation of the device, the faulty real address is replaced with the normal backup address, and the write / read operation is performed on the SRAM. This has the advantage of not requiring an additional non-volatile memory, as the remapping is performed using a register that stores the faulty real address and the normal backup address. However, in this method, if the operating environment during the BIST operation differs from the operating environment during actual operation (e.g., temperature, voltage, operating frequency, etc.), margin failure may occur. If the device is powered on and the BIST operation is completed in a good operating environment based on the SRAM cell, but the operating environment is changed to a poor operating environment during actual operation, a fault may occur in the SRAM, which may affect reliability. Furthermore, in this method, it may not be easy to change the BIST operating conditions, for example, to reduce the SRAM operating voltage during the interval between BIST executions or to quickly control the operating frequency used in the BIST. In addition, when SRAM failure aspects vary depending on test conditions, margin failure may occur because the history of failure results of previous tests is not available.

[0008] As described above, in the past, when performing SRAM cell testing, even if repair was performed on a failed address, the history of failure results of previous tests could not be obtained, making it impossible to handle margin failures.

[0009] The above information disclosed in this Background section is only for enhancement of understanding of the background of the described technology and therefore it may contain information that does not form the prior art that is already known to a person of ordinary skill in the art. Summary of the Invention

[0010] Accordingly, the present disclosure is directed to a static random access memory (SRAM) fault handling device and an SRAM fault handling method that substantially obviates one or more of the above-mentioned problems.

[0011] To solve such problems, the present disclosure provides a method of storing repair status and failure history information for previously tested spare addresses, reflecting both BIST test results and information about previous tests, and performing multiple repairs until there is no spare available SRAM.

[0012] According to the present disclosure, a static random access memory (SRAM) fault processing device is provided. The SRAM may include a real memory area and a spare memory area. The SRAM fault processing device may include: a memory unit that stores repair information; a command map that obtains previously tested repair information from the memory unit and provides previously tested repair information; a built-in self-test (BIST) block unit that obtains previously tested repair information from the command map, performs a fault test on the entire address of the SRAM unit, distinguishes whether the fault address where the fault occurs is the address of the real memory area (real address) or the address of the spare memory area (spare address), and stores fault address information related to the fault address; an update unit that updates the fault address information by using the previously tested repair information obtained from the command map and the fault address information obtained from the BIST block unit; and a remapping control unit that updates the repair information by remapping the repair information based on the previously tested repair information and the updated fault address information obtained from the update unit, and sends the updated repair information to the command map, wherein the command map obtains the updated repair information and stores it in the memory unit.

[0013] In addition, the BIST block unit stores the failure address information in the failure real address unit when the failure address is a real address, or stores the failure address information in the failure spare address unit when the failure address is a spare address.

[0014] Furthermore, the BIST block unit excludes already repaired addresses among real addresses from the fault test based on repair information of a previous test obtained from the command map, and performs a fault test on the repaired and replaced spare addresses.

[0015] In addition, the update unit stores the repair information of the previous test obtained from the command mapping in the repair information register of the update unit, stores the fault address information of the fault real address unit in the updated fault real address unit, and stores the fault address information of the fault spare address unit in the updated fault spare address unit.

[0016] Furthermore, the repair information about each of the spare addresses includes: a repair state showing one of a repaired state, an available state, a failed state, and a canceled state; and a value of an initial address which is a real address repaired by each of the spare addresses.

[0017] In addition, when the repair state of the standby address obtained from the command mapping is in the repaired state and the standby address exists in the fault standby address unit, the update unit stores the value of the initial address of the standby address in the updated fault real address unit, and when the repair state of the standby address obtained from the command mapping is in the repaired state and the standby address does not exist in the fault standby address unit, the update unit stores the standby address in the updated fault standby address unit.

[0018] Furthermore, when the repair state of the spare address obtained from the command map is in the failed state or the canceled state and the spare address does not exist in the failed spare address unit, the update unit stores the spare address in the updated failed spare address unit.

[0019] Furthermore, when the number of fail addresses stored in the updated fail real address unit is less than or equal to the number of available addresses calculated based on the number of fail addresses stored in the updated fail spare address unit, the update unit determines that repair is possible.

[0020] In addition, the remapping control unit updates the repair information by remapping each of the spare addresses so as to repair the fault real address in the updated fault real address unit based on the updated fault real address information obtained from the updated fault spare address unit and the updated fault spare address information obtained from the updated fault spare address unit and the repair information of the previously tested spare address obtained from the repair information register of the update unit, and sends the updated repair information to the command mapping.

[0021] In addition, when the spare address exists in the updated fault spare address unit, the repair state of the spare address is in the repaired state and the value of the initial address of the spare address exists in the updated fault real address unit, the remapping control unit changes the repair state of the spare address to the cancel state; and when the spare address exists in the updated fault spare address unit, the repair state of the spare address is in the repaired state and the value of the initial address of the spare address does not exist in the updated fault real address unit, the remapping control unit maintains the repair state of the spare address as the repaired state.

[0022] In addition, when the spare address exists in the updated fault spare address unit and the repair state of the spare address is in the available state, the remapping control unit changes the repair state of the spare address to the invalid state in the command mapping; when the spare address exists in the updated fault spare address unit and the repair state of the spare address is in the invalid state, the remapping control unit maintains the repair state of the spare address as the invalid state in the command mapping; and when the spare address exists in the updated fault spare address unit and the repair state of the spare address is in the cancel state, the remapping control unit maintains the repair state of the spare address as the cancel state in the command mapping.

[0023] In addition, when the spare address does not exist in the updated fault spare address unit and the updated fault real address is a valid address within the real address range, the remapping control unit changes the repair state of the spare address to a repaired state in the command mapping, and records the updated fault real address in the initial address; and when the spare address does not exist in the updated fault spare address unit and the updated fault real address is an invalid address outside the real address range, the remapping control unit maintains the repair state of the spare address as an available state in the command mapping.

[0024] Furthermore, the SRAM fault handling device may further include an address remapping table that outputs a normal spare address replacing the faulty real address based on previously tested repair information or updated repair information from the command map when performing SRAM write / read access.

[0025] According to the present disclosure, a method is provided in which a static random access memory (SRAM) test device processes a fault of an SRAM including a real memory area and a spare memory area, the SRAM fault processing method may include: reading repair information of a previous test stored in a memory cell; providing the repair information of the previous test to a built-in self-test (BIST) circuit; performing a fault test on the entire address of the SRAM cell through the BIST circuit; when a fault occurs during the fault test, distinguishing whether the fault address that has failed is an address in the real memory area (real address) or an address in the spare memory area (spare address), and storing fault address information related to the fault address; updating the fault address information by using the fault address information and the repair information of the previous test; updating the repair information based on the updated fault address information and the repair information of the previous test, and sending the updated repair information to a command map; and storing the updated repair information in the memory cell.

[0026] Furthermore, storing the fail address information may include: storing the fail address information in a fail real address unit when the fail address is a real address; and storing the fail address information in a fail spare address unit when the fail address is a spare address.

[0027] Furthermore, performing the fault test includes excluding addresses that have been repaired in the previous test among the real addresses from the fault test based on repair information of the previous test, and performing the fault test on the repaired and replaced spare addresses.

[0028] In addition, updating the fault address information may include: storing previously tested repair information in the command map of the remapping unit; storing the fault address information of the fault real address unit in the updated fault real address unit, and storing the fault address information of the fault spare address unit in the updated fault spare address unit; checking whether repair can be performed by comparing the number of fault address information of the fault real address unit and the number of fault address information of the fault spare address unit; and updating the updated fault real address unit and the updated fault spare address unit by using the previously tested repair information, the fault address information in the fault real address unit, and the fault address information in the fault spare address unit.

[0029] In addition, the repair information about each of the spare addresses may include: a repair state showing one of a repaired state, an available state, a failed state, and a canceled state; and a value of an initial address as a real address repaired by each of the spare addresses.

[0030] In addition, updating the updated fault real address unit and the updated fault spare address unit may include: when the repair state of the spare address to be updated is in the repaired state and the spare address exists in the fault spare address unit, storing the value of the initial address of the spare address in the updated fault real address unit; and when the repair state of the spare address to be updated is in the repaired state and the spare address does not exist in the fault spare address unit, storing the spare address in the updated fault spare address unit.

[0031] In addition, updating the updated faulty real address unit and the updated faulty spare address unit may include storing the spare address in the updated faulty spare address unit when the repair state of the spare address to be updated is in an invalid state or a canceled state and the spare address does not exist in the faulty spare address unit.

[0032] Furthermore, checking whether repair is possible includes determining that repair is possible when the number of fail addresses stored in the fail real address unit is less than or equal to the number of available addresses calculated based on the number of fail addresses stored in the fail spare address unit.

[0033] In addition, updating the repair information may include: reviewing the starting address of the spare address; obtaining the faulty real address from the updated faulty real address unit; and updating the repair information by remapping each of the spare addresses so as to repair the faulty real address based on the previously tested repair information of the spare address and the updated faulty spare address information obtained from the updated faulty spare address unit.

[0034] In addition, remapping each of the spare addresses may include: when the spare address exists in the updated fault spare address unit, the repair state of the spare address is in the repaired state and the value of the initial address of the spare address exists in the updated fault real address unit, changing the repair state of the spare address to the cancel state; and when the spare address exists in the updated fault spare address unit, the repair state of the spare address is in the repaired state and the value of the initial address of the spare address does not exist in the updated fault real address unit, maintaining the repair state of the spare address as the repaired state.

[0035] In addition, remapping each of the spare addresses may include: when the spare address exists in the updated fault spare address unit and the repair state of the spare address is in the available state, changing the repair state of the spare address to the invalid state; when the spare address exists in the updated fault spare address unit and the repair state of the spare address is in the invalid state, maintaining the repair state of the spare address as the invalid state; and when the spare address exists in the updated fault spare address unit and the state of the spare address is in the cancel state, maintaining the repair state of the spare address as the cancel state.

[0036] In addition, remapping each of the spare addresses may include: when the spare address does not exist in the updated fault spare address unit and the fault real address obtained from the updated fault real address unit is a valid address within the real address range, changing the repair state of the spare address to a repaired state and recording the fault real address as the value of the initial address; and when the spare address does not exist in the updated fault spare address unit and the fault real address obtained from the updated fault real address unit is an invalid address outside the real address range, maintaining the repair state of the spare address as an available state.

[0037] In addition, the method may further include: when performing SRAM writing / reading, outputting a normal spare address in which the faulty real address is repaired based on the updated repair information or the previously tested repair information.

[0038] Various aspects of the present disclosure may provide an SRAM fault handling apparatus and method capable of repairing margin failure.

[0039] In addition, an SRAM failure processing apparatus and method for performing BIST by reflecting a repair status and failure history information on a previously tested spare address may also be provided.

[0040] In addition, an SRAM fail handling apparatus and method for generating updated fail address information by reflecting a repair status and fail history information about a previous test may also be provided.

[0041] In addition, an SRAM fault handling apparatus and method for performing remapping by reflecting a repair status and fault history information on a previous test may also be provided.

[0042] In addition, when a failure occurs in a spare address under a specific test condition, an SRAM fail handling apparatus and method may be provided that stores fail information of the spare address, thereby preventing the address from being used.

[0043] In addition, when a failure occurs in a repaired spare address under a specific test condition, an SRAM failure handling apparatus and method can be provided that stores failure information of the spare address to cancel the existing repair and assign the information to another spare address.

[0044] It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the disclosure as claimed. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] The accompanying drawings are included to provide a further understanding of the disclosure and are incorporated in and constitute a part of this disclosure. The drawings illustrate aspects of the disclosure and together with the description serve to explain the principles of the disclosure.

[0046] In the attached figure:

[0047] Figure 1 shows a configuration of an SRAM unit test device according to the present disclosure;

[0048] Figure 2 is a flow chart of an SRAM fault testing method of an SRAM testing device proposed in the present disclosure;

[0049] Figure 3 shows a memory structure according to the present disclosure, in which a failure address detected by the operation of the BIST circuit unit 101 is divided into a real memory area or a spare memory area and stored in a failure real address unit 102 or a failure spare address unit 103;

[0050] Figure 4 is a flowchart illustrating an operation in which an update control unit updates a failure address according to the present disclosure;

[0051] Figure 5 According to the implementation of the present disclosure Figure 4 a circuit diagram of an update unit for operation of

[0052] Figure 6 is a flowchart illustrating a remapping operation of a remapping unit according to the present disclosure; and

[0053] Figure 7 According to the implementation of the present disclosure Figure 6 Circuit diagram of the operation of the SRAM test equipment. DETAILED DESCRIPTION

[0054] Reference will now be made in detail to various aspects of the present disclosure, examples of which are illustrated in the accompanying drawings. Regardless of the drawing numbers, the same or similar elements are represented by the same reference numerals, and repeated description thereof may be omitted.

[0055] The suffix "module" or "part" of the components used in the following description is only given or mixed in view of the convenience of being easy to explain, and itself does not have any distinguishing meaning or function. In addition, "module" or "part" can mean software component or hardware component, such as field programmable gate array (FPGA), application specific integrated circuit (ASIC). "Part" or "module" performs a specific function. However, "part" or "module" does not mean to be limited to software or hardware. "Part" or "module" can be configured to be placed in an addressable storage medium or to be configured to recover one or more processors. Therefore, for example, "part" or "module" can include components such as software components, object-oriented software components, class components and task components, and can include processes, functions, attributes, steps, subroutines, program code segments, drivers, firmware, microcodes, circuits, data, databases, data structures, tables, arrays and variables. The components and functions provided in a "part" or "module" can be combined with a smaller number of components and "part" or "module", or can also be divided into additional components and "part" or "module".

[0056] The method or algorithm steps described with respect to some aspects of the present disclosure can be directly implemented by a hardware module or software module executed by a processor, or can be directly implemented by a combination of a hardware module and a software module. The software module can reside on a recording medium of RAM, flash memory, ROM, EPROM, EEPROM, resistor, hard disk, removable disk, CD-ROM or any other type known to those skilled in the art. An exemplary recording medium is coupled to the processor and the processor can read information from the recording medium and can record information in a storage medium. In another way, the recording medium can be formed integrally with the processor. The processor and the recording medium can reside in an application specific integrated circuit (ASIC). The ASIC may reside in the user's terminal.

[0057] Although terms including ordinal numbers such as first and second may be used to describe various components, these components are not limited to the above-mentioned terms. These terms are only used to distinguish one component from other components.

[0058] When a component is referred to as being “connected” to another component or “accessing” another component, it should be understood that not only is the component directly connected to the other component or accessing the other component, but another component may also exist between them. At the same time, when a component is referred to as being “directly connected” to another component or “directly accessing” another component, it should be understood that there is no component between the component and the other component.

[0059] First, the terms used in this specification will be briefly described.

[0060] Static random access memory (SRAM) is a semiconductor memory that can continuously store content as long as power is supplied to the memory. According to the present disclosure, SRAM can be used to store still image frame data for display on the screen of a display. Here, the SRAM can be composed of SRAM cells in the address range actually used by the display driver IC (hereinafter referred to as real addresses) and SRAM cells in the address range added as a spare and used to replace when a failure occurs in the real address (hereinafter referred to as spare addresses).

[0061] Built-in self-test (BIST) is a mechanism that can test each memory cell of an SRAM. BIST can perform fault testing on a cell by generating a background pattern, writing the background pattern to the cell or address to be tested, and then reading and comparing the background pattern. BIST can be embedded in the SRAM.

[0062] The failed real address means an address in the real address region that is determined to be a failed address because it fails the BIST. The failed spare address means an address in the spare address region that is determined to be a failed address because it fails the BIST.

[0063] Regarding the repair status of a standby address, "available" means that the standby address is "in an available state" so that the corresponding standby address can replace a faulty real address. "Repaired" means that the standby address is "in a repaired state" where the corresponding standby address has replaced a faulty real address. "Failed" means that the standby address is "in an invalid state." "Cancelled" means that a failure occurs while replacing and using the standby address, causing the standby address to be "in a canceled state."

[0064] Figure 1 A configuration of an SRAM cell testing device according to the present disclosure is shown.

[0065] Reference Figure 1 , the SRAM unit test apparatus of the present disclosure may include a BIST block unit 100 , an update unit 200 , a remapping unit 300 , and a memory unit 400 .

[0066] The BIST block unit 100 may include a BIST circuit unit 101 , a failure real address unit 102 , and a failure spare address unit 103 .

[0067] When a fault occurs in an SRAM cell within the real address range, the BIST circuit unit 101 can store the corresponding fault real address in the fault real address unit 102. When a fault occurs in an SRAM cell within the backup address range, the BIST circuit unit 101 can store the corresponding fault backup address in the fault backup address unit 103. If the corresponding fault address already exists in the fault real address unit 102 or the fault backup address unit 103, the BIST circuit unit 101 can avoid redundant storage. In addition, the BIST circuit unit 101 reflects the repair information of the previous test provided by the remapping unit 300 during testing, so that the fault real address repaired in the previous test is excluded from the test, and the backup address replaced by the repair can be tested in place of the corresponding fault real address. Therefore, the BIST circuit unit 101 can prevent redundant repair of the fault real address.

[0068] The updating unit 200 may include an updating control unit 201 , an updated faulty real address unit 202 , an updated faulty spare address unit 203 , and a repair information register 204 of the updating unit.

[0069] The update control unit 201 may update the updated failed real address unit 202 and the updated failed spare address unit 203 by reflecting the previously tested repair information received from the remapping unit 300 and the failed address information received from the BIST block unit 100 .

[0070] The remapping unit 300 may include a remapping control unit 301 , a command map 302 , and an address remapping table 303 .

[0071] The remapping control unit 301 can update the repair information by using the information of the updated fault real address unit 202, the updated fault spare address unit 203 and the repair information register 204 of the update unit, and record the updated repair information in the repair information field register on the command map 302.

[0072] The command map 302 may have a repair information field for displaying repair information about each spare address, and may store the repair information field about each spare address in a repair information field register.

[0073] The items and contents of the repair information field are shown in Table 1.

[0074]

[0075] Table 1

[0076] In addition, the repair status is determined by the values ​​of "invalid" and "valid" in the repair information field, and the content is as shown in Table 2.

[0077]

[0078] Table 2

[0079] The repair information about each spare address stored in the command map 302 may be stored in the nonvolatile memory 402 via the memory control unit 401. When the display driver IC is powered on or performs an operation, the command map 302 may read the repair information stored in the nonvolatile memory 402 and store the repair information stored in the nonvolatile memory 402 in the repair information field register.

[0080] Based on the repair information stored in the repair information field register of the command map 302 , the address remapping table 303 may provide the BIST circuit unit 101 with repair information including the failed real address and the spare address that has replaced the failed real address.

[0081] In addition, the address remapping table 303 can receive updated repair information or repair information obtained during SRAM testing from the command mapping 302, and output a normal spare address that replaces the faulty real address during the SRAM write / read operation, so that actual data can be written to the normal spare address that replaces the faulty real address of the SRAM or actual data can be read from the normal spare address that replaces the faulty real address of the SRAM.

[0082] Figure 2 4 is a flow chart of an SRAM fault testing method of an SRAM testing device proposed in the present disclosure.

[0083] SRAM test methods can include Figure 1 The configuration of the SRAM test equipment shown performs the operations.

[0084] The command map 302 may read previously tested repair information stored in the memory unit 400 ( S100 ).

[0085] The address remapping table 303 may provide the BIST circuit unit 101 with the repair information of the previous test read by the command map 302 ( S200 ).

[0086] The BIST circuit unit 101 may test the entire address of the SRAM cell including the real address region and the spare address region ( S300 ).

[0087] During testing, the BIST circuit unit 101 reflects the repair information of the previous test provided from the address remapping table 303, so that the faulty real address repaired in the previous test is excluded from the test, and the standby address replaced by the repair can be tested instead of the corresponding faulty real address. Therefore, the BIST circuit unit 101 can prevent redundant repairs of the faulty real address.

[0088] When a failure occurs during testing, the BIST circuit unit 101 can distinguish between the real address and the spare address to store the corresponding failure address information ( Figure 2 S400 shown).

[0089] When a fault occurs in an SRAM cell within the real address range, the BIST circuit unit 101 may store the corresponding fault real address in the fault real address unit 102. When a fault occurs in an SRAM cell within the spare address range, the BIST circuit unit 101 may store the corresponding fault spare address in the fault spare address unit 103. If the corresponding fault address already exists in the fault real address unit 102 or the fault spare address unit 103, the BIST circuit unit 101 may not perform redundant storage.

[0090] Figure 3 A memory structure according to the present disclosure is shown, in which a failed address detected by operation of a BIST circuit unit 101 is divided into a real memory area or a spare memory area and stored in a failed real address unit 102 or a failed spare address unit 103 .

[0091] The BIST circuit unit 101 can check for faults at all addresses of the SRAM cell (faulty real addresses 0 to N-1, and faulty spare addresses N to N+R-1). When a fault occurs at a specific address within the real address range (0 to N-1), the BIST circuit unit 101 can store the address in the faulty real address unit 102. However, if the corresponding address already exists in the faulty real address unit 102, the BIST circuit unit 101 may not redundantly store it. Similarly, when a fault occurs at a specific address within the spare address range (N to N+R-1), the BIST circuit unit 101 can store the address in the faulty spare address unit 103. If the corresponding address already exists in the faulty spare address unit 103, the BIST circuit unit 101 may not redundantly store it. If there are R spare addresses, it is sufficient if the depth of the faulty real address unit 102 and the faulty spare address unit 103 is also R. In addition, it is sufficient if the command map 302 has repair information field registers for the R spare addresses. If the number of faults that occur is a number greater than R, the corresponding SRAM may be discarded because all the faulty cells cannot be repaired.

[0092] Table 3 shows an example of previously tested repair information stored in the repair information field register in the command map 302 and the results stored in the fault real address unit 102 and the fault spare address unit 103 of the BIST block unit 100 according to the present disclosure, as well as the value of the repair information field register stored in the command map 302 after the operation of the BIST circuit unit 101 is completed. Here, the updated fault real address unit 202 and the updated fault spare address unit 203 may be initialized.

[0093]

[0094]

[0095] Table 3

[0096] In the aspects of Table 3, the range of real addresses is 0 to 99, and the range of spare addresses is 100 to 107. Since there are eight spare addresses, the depth of the failed real address unit 102 and the failed spare address unit 103 is also 8, and the command map 302 can have repair information fields for the eight spare addresses. The information of the failed real address unit 102 and the failed spare address unit 103 is related to the results of the current test of the BIST circuit unit 101, while the information of the repair information field register of the command map 302 shows the repair information of the previous test. Referring to the aspects of Table 3, according to the values ​​stored in the repair information field register, spare addresses 100, 102, and 103 are in the "repaired" state (meaning that they have been replaced and used), spare addresses 101 and 106 are in the "failed" state (meaning that a fault has occurred at the corresponding spare address through the previous BIST test), and spare addresses 104, 105, and 107 are in the "usable" state (meaning that they are usable spare addresses). In this aspect, it is assumed that address 127 is an unused address and is considered to be an invalid address. Therefore, since the entire address range is from 0 to 107, the address is represented by a 7-bit address. In addition, address 127 (binary number 1111111) is an unused address, so it can be specified and used as an invalid address to distinguish it from a valid address. According to another aspect, when the entire address range is from 0 to 127, the address is represented by an 8-bit address with one bit added, and address 255 (binary 11111111) can be used as an invalid address. Therefore, it is possible to check whether the address is valid only by the address value itself stored in the address unit.

[0097] If no fault address appears when the BIST circuit unit 101 operates in the second or subsequent tests, this means that the repair performed in the previous test is effective. When a fault address appears as shown in the example of Table 3 (for example, the real address 90 and the spare addresses 102, 105, and 101), it is necessary to perform repairs on additional faults. Therefore, it is necessary to reflect both the BIST test results and the repair information on the command map 302.

[0098] The update control unit 201 may update the fail address information ( ) by reflecting the repair information of the previous test received from the command map 302 and the fail address information received from the BIST block unit 100. Figure 2 S500 shown).

[0099] Figure 4 : is a flowchart illustrating an operation in which the update control unit 201 updates a fail address according to the present disclosure.

[0100] The update control unit 201 can generate an updated faulty real address unit 202 and an updated faulty spare address unit 203 by using the repair information of the previous test of the repair information field register of the command mapping 302 and the information about the current test of the faulty real address unit 102 and the faulty spare address unit 103 of the BIST block unit 100.

[0101] The update unit 200 may store the previously tested repair information stored in the command map 302 in the repair information register 204 of the update unit (S510). When the remapping unit 300 performs an automatic remapping operation, if the remapping unit 300 changes the repair information on the command map 302 while using the repair information on the command map 302, the existing repair information is changed to the intermediate updated repair information, and thus, the automatic remapping operation is affected. Therefore, to prevent this, the previously tested repair information may be stored and used in the repair information register 204 of the isolated update unit.

[0102] The updating unit 200 may store the failure real address information and the failure spare address information generated by the test in the BIST block unit 100 in the updated failure real address unit 202 and the updated failure spare address unit 203 (S520). According to this aspect, the failure real address information and the failure spare address information may be stored in the failure real address unit 102 and the failure spare address unit 103.

[0103] The update unit 200 can check whether repair is possible by comparing the number of failed addresses stored in the failed real address unit 102 and the number of failed addresses stored in the failed spare address unit 103 (S530). When the number of failed addresses stored in the failed real address unit 102 is less than or equal to the value obtained by subtracting the number of failed addresses stored in the failed spare address unit 103 from the total depth (=total number of spare addresses) of the failed spare address unit 103, that is, the number of available addresses of the failed spare address unit 103, repair is possible.

[0104] By sequentially accessing the repair information about the entire spare address in the repair information field register on the command map 302 , the repair information of the previous test may be reflected in the updated failed real address unit 202 and the updated failed spare address unit 203 .

[0105]

[0106] Table 4

[0107] Table 4 shows operations performed by the update control unit 201 according to the present disclosure based on the repair information about the spare address in the repair information field register on the command map 302 and based on whether the spare address exists in the failed spare address unit 103 .

[0108] The update control unit 201 may check the repair status of the spare address in the repair information field register on the command map 302 (S540). The update control unit 201 may check whether the corresponding spare address exists in the failed spare address unit 103 (S550).

[0109] When the repair status of the spare address in the repair information field register on the command map 302 is in the "repaired" state and the spare address exists in the failed spare address unit 103, the update control unit 201 can store the "address" (initial address) value of the spare address in the repair information field register on the command map 302 in the updated failed real address unit 202 (S561). The stored initial address information is the real address in the real memory area where the failure has occurred, and the stored initial address information can be allocated to another available spare address.

[0110] When the repair status of the spare address in the repair information field register on the command map 302 is "repaired", "failed" or "cancelled" and the spare address does not exist in the fault spare address unit 103 of the BIST block unit 100, the update control unit 201 can store the spare address in the updated fault spare address unit 203 (S562). In this regard, since the spare address has been used for repair (repaired), a fault has occurred (failed) or the repair has been canceled (cancelled), the corresponding spare address can be stored in the updated fault spare address unit 203 so that it will not be used in the next repair.

[0111] When the repair status about the spare address in the repair information field register on the command map 302 is in the "failed" state or the "cancel" state and the spare address exists in the failed spare address unit 103 of the BIST block unit 100, the update control unit 201 may not perform additional operations ("no operation" in Table 4).

[0112] When the repair status regarding the spare address in the repair information field register on the command map 302 is in the “available” state, the update control unit 201 may not perform additional operations (“no operation” in Table 4).

[0113] After the update unit 200 reflects all the repair information about the failed real address unit 102, the failed spare address unit 103, and the entire spare address in the repair information field register on the command map 302, the update unit 200 can recheck whether repair is possible based on the updated number of failed addresses stored in the updated failed real address unit 202 and the updated number of failed addresses stored in the updated failed spare address unit 203 (S560). When the number of failed addresses stored in the updated failed real address unit 202 is less than or equal to the value obtained by subtracting the number of failed addresses stored in the failed spare address unit 103 from the total depth (=total number of spare addresses) of the updated failed spare address unit 203, that is, the number of available addresses in the updated failed spare address unit 203, repair can be performed. If it is determined that repair is not possible, no operation is performed and the corresponding SRAM can be discarded.

[0114] Figure 5 According to the implementation of the present disclosure Figure 4 1 is a circuit diagram of the operation of the update unit 200.

[0115] Figure 5 An example of a circuit diagram is shown in which the update control unit 201 updates the fail address information in the updated fail real address unit 202 and the updated fail spare address unit 203 by using logic gates based on the information on the fail spare addresses 0 to R-1 stored in the fail spare address unit 103 and the repair information (fail, valid, address value) of the spare addresses 0 to R-1 of the repair information field register on the command map 302. Figure 4 The logical flow shown is executed Figure 5 The specific operation of the circuit diagram.

[0116] use Figure 5 The circuit diagram shown can be performed according to Figure 4 , and the following Tables 5 to 13 show changes in the values ​​of the updated failed real address unit 202 and the updated failed spare address unit 203 in the repair address update process according to the present disclosure.

[0117] The first table in Tables 5 to 13 shows the repair information stored in the repair information field register on the command map 302 and the repair status of the entire spare address according to the repair information. The second table shows the values ​​of the faulty real address unit 102 and the faulty spare address unit 103 generated by the operation of the BIST circuit unit 101. The third table shows the values ​​of the updated faulty real address unit 202 and the updated faulty spare address unit 203 in the update unit 200. In this aspect, since the entire address range is from 0 to 107, the address is represented by a 7-bit address. In addition, address 127 (binary number 1111111) is an unused address, so it is designated and used as an invalid address to distinguish it from a valid address.

[0118] Additionally, in Tables 5 to 13, “*” marks are added before the updated address values ​​of the failed real address unit 202 and the updated failed spare address unit 203 to clarify the updated values ​​of each aspect.

[0119]

[0120] Table 5

[0121] Table 5 shows the results of step S520 according to the present disclosure.

[0122] As shown in the example of Table 5, in step S520, the update control unit 201 of the update unit 200 may store 90 (i.e., the valid fail address of the fail real address unit 102) and 102, 105, and 101 (i.e., the valid fail addresses of the fail spare address unit 103) in the updated fail real address unit 202 and the updated fail spare address unit 203, respectively. The update control unit 201 may sequentially process the repair information about each spare address of the repair information field register of the command map 302, and reflect the previously tested repair information in the updated fail real address unit 202 and the updated fail spare address unit 203.

[0123]

[0124] Table 6

[0125] Table 6 shows the result of the operation in which the update control unit 201 updates the first spare address.

[0126] In the example shown in Table 6, the update control unit 201 can confirm that the repair state of the spare address 100 is the "repaired" state through the previous test according to step S540, and can confirm that the spare address 100 does not exist in the fault spare address unit 103 of the BIST block unit 100 according to step S550. This means that the spare address 100 has passed (PASS) the current test normally. However, the spare address 100 has been used for repair. Therefore, in order not to use the spare address 100 in the repair operation of allocating the spare address to be replaced for the fault real address, the update control unit 201 can add the spare address 100 to the updated fault spare address unit 203 (S562). Therefore, the spare addresses 102, 105, 101 and 100 exist in the updated fault spare address unit 203.

[0127]

[0128]

[0129] Table 7

[0130] Table 7 shows the result of the operation in which the update control unit 201 updates the second spare address.

[0131] In the example shown in Table 7, the update control unit 201 can confirm that the repair status of the spare address 101 is the "failed" state according to step S540, and can confirm that the spare address 101 exists in the failed spare address unit 103 according to step S550. This means that the spare address 101 is determined to be failed even in the current test of the BIST block unit 100 and exists in the failed spare address unit 103, and therefore, according to step S520, the spare address 101 is stored in the updated failed spare address unit 203. Therefore, the update control unit 201 does not need to further update the updated failed spare address unit 203.

[0132]

[0133]

[0134] Table 8

[0135] Table 8 shows the result of the operation in which the update control unit 201 updates the third spare address.

[0136] In the example shown in Table 8, the update control unit 201 can confirm that the repair status of the spare address 102 is the "repaired" state through the previous test according to step S540, and can confirm according to step S550 that the spare address 102 is determined to be a failure in the current test in the BIST block unit 100 and exists in the failed spare address unit 103. Therefore, since a failure (FAIL) occurs in the spare address 102 used for repair in the current test, the real address 12 must be repaired again. The update control unit 201 adds the real address 12, which is the "address" field value of the spare address 102, to the updated failed real address unit 202 through step S561. Therefore, the real addresses 90 and 12 exist in the updated failed real address unit 202.

[0137]

[0138]

[0139] Table 9

[0140] Table 9 shows the result of the operation in which the update control unit 201 updates the fourth spare address.

[0141] In the example shown in Table 9, the update control unit 201 can confirm that the repair status of the spare address 103 is "repaired" through the previous test according to step S540, and can confirm according to step S550 that the spare address 103 passes the current test in the BIST block unit 100 and does not exist in the failed spare address unit 103. However, since the spare address 103 has already been used for repair, the update control unit 201 can add the spare address 103 to the updated failed spare address unit 203 according to step S562 so that the spare address 103 is not used for the next repair. Therefore, the updated failed spare address unit 203 includes spare addresses 102, 105, 101, 100, and 103.

[0142]

[0143] Table 10

[0144] Table 10 shows the result of the operation in which the update control unit 201 updates the fifth spare address.

[0145] In the example shown in Table 10, the update control unit 201 can confirm that the repair status of the spare address 104 is "available" according to step S540. This means that the spare address 104 is normal and is not used for repair. In addition, the spare address 104 has also passed the current test of the BIST block unit 100 and does not exist in the faulty spare address unit 103. Therefore, since the spare address 104 can be used for repair in the future, the update control unit 201 does not add the spare address 104 to the updated faulty spare address unit 203.

[0146]

[0147] Table 11

[0148] Table 11 shows the result of the operation in which the update control unit 201 updates the sixth spare address.

[0149] In the example shown in Table 11, the update control unit 201 can confirm that the repair status of the spare address 105 is "available" according to step S540. This means that the spare address 105 is normal and is not used for repair. However, the spare address 105 was determined to be faulty in the current test and exists in the faulty spare address unit 103 of the BIST block unit 100. Therefore, according to step S520, the spare address 105 already exists in the updated faulty spare address unit 203, and the spare address 105 will not be used to replace the real address in future repair operations. Therefore, the update control unit 201 does not perform additional operations on the spare address 105.

[0150]

[0151]

[0152] Table 12

[0153] Table 12 shows the result of the operation in which the update control unit 201 updates the seventh spare address.

[0154] In the example shown in Table 12, the update control unit 201 can confirm that the repair status of the spare address 106 is the "failed" state according to step S540. This means that a failure (FAIL) has occurred in the spare address 106 in the previous test. However, according to step S550, the update control unit 201 can confirm that the spare address 106 has passed the current test and is not present in the failed spare address unit 103 of the BIST block unit 100. Since the spare address 106, which has passed the current test but was in the "failed" state in the previous test, should not be used for repair in the future, the update control unit 201 adds the spare address 106 to the updated failed spare address unit 203 according to step S562. Therefore, the updated failed spare address unit 203 includes spare addresses 102, 105, 101, 100, 103, and 106.

[0155]

[0156]

[0157] Table 13

[0158] Table 13 shows the result of the operation in which the update control unit 201 updates the eighth spare address.

[0159] In the example shown in Table 13, the update control unit 201 can confirm that the repair status of the spare address 107 is "available" according to step S540. This means that the spare address 107 has passed the previous test but has not been used for repair. In addition, the spare address 107 can pass the current test of the BIST block unit 100 and may not exist in the faulty spare address unit 103. Therefore, the spare address 107 can be used for repair in the future.

[0160] When the backup address 107, which is the end backup address, is reached, the update unit 200 can determine whether repair is possible based on the number of faulty addresses stored in the updated faulty real address unit 202 and the updated faulty backup address unit 203 according to step S560. In this regard, six of the eight backup units have been used in the "repaired" state, "failed" state, "cancelled" state, etc. through the updated faulty backup address unit 203 in the final updated address unit, and two backup units can be used as backups. In addition, since the update unit 200 needs to repair two real addresses through the updated faulty real address unit 202, the update unit 200 can determine that "repair is possible" (repairable).

[0161] The remapping unit 300 may remap and update the repair information by using the updated fault real address unit 202, the updated fault spare address unit 203, and the information of the repair information register 204 of the update unit, and may record the updated repair information in the repair information field register on the command map 302 ( Figure 2 S600 shown).

[0162] Figure 6 is a flowchart illustrating a remapping operation of the remapping unit 300 according to the present disclosure.

[0163] The remapping control unit 301 may review from a starting spare address relative to an address (repair address) for repairing a faulty real address (S610).

[0164] The fault real address can be obtained from the updated fault real address unit 202 (S620). In aspects of the present disclosure, the fault real address can be used by being divided into a valid fault real address and an invalid fault real address. A valid fault real address means an address used by the memory and within a normal range. For example, if the entire address range is from 0 to 107, the valid fault real address is represented by a 7-bit address, and address 127 (binary number 1111111) is an unused address, so that address 127 can be designated and used as an invalid fault real address to distinguish address 127 from a valid fault real address. If all bits of the fault address are 1, the fault address is an invalid address. Therefore, the remapping control unit 301 can read the updated fault real address unit 202 until a valid address is found. In order to replace the fault real address with a spare address, the remapping control unit 301 can check whether the reviewed spare address exists in the updated fault spare address unit 203, and can distinguish whether the spare address is a bad SRAM cell (S630). When the standby address exists in the updated failed standby address unit 203, the remapping control unit 301 may check the repair information about the standby address in the repair information register 204 of the update unit and remap the repair information, and record the remapped value of the standby address in the repair information field register on the command map 302 (S640). When the standby address does not exist in the updated failed standby address unit 203 and is a good SRAM cell, the remapping control unit 301 may use the standby address to repair the failed real address (S606). Table 14 below shows the operating conditions and operation contents of the remapping control unit 301, and shows the information about the standby address being reviewed for repair in the repair information register 204 of the update unit, i.e., the status, whether the failed real address read from the updated failed real address unit 202 is valid, whether the standby address exists in the updated failed standby address unit 203, whether the value of the original address of the standby address exists in the updated failed real address unit 202, and the operation of the remapping control unit 301 to change or maintain the repair information of the command map 302.

[0165]

[0166] Table 14

[0167] When the backup address reviewed for use in replacing the failed real address read from the updated failed real address unit 202 exists in the updated failed backup address unit 203, and when the repair information regarding the corresponding backup address in the repair information register 204 of the update unit is in the "repaired" state, and when the value of the "address" field regarding the corresponding backup address in the repair information register 204 of the update unit exists in the updated failed real address unit 202, the corresponding backup address indicates a bad SRAM cell. Since a failure occurs at the backup address used for repair through the BIST test, the remapping control unit 301 may keep the "valid" field and the "address" (initial address) field regarding the corresponding backup address in the repair information field register on the command map 302 as they are, and set the "invalid" field to 1. Accordingly, the repair state of the corresponding backup address that has been replaced and used for repair may be in the "cancelled" state (S601).

[0168] When the spare address being reviewed for replacing the faulty real address read from the updated faulty real address unit 202 exists in the updated faulty spare address unit 203, and when the repair information about the corresponding spare address in the repair information register 204 of the update unit is in the "repaired" state, and when the value of the "address" field about the corresponding spare address in the repair information register 204 of the update unit does not exist in the updated faulty real address unit 202, the corresponding spare address indicates a good SRAM cell and is replaced and used. The remapping control unit 301 can keep all fields about the corresponding spare address in the repair information field register on the command map 302 as they are, so that the repair state can be maintained in the "repaired" state (S602).

[0169] When the spare address being reviewed for replacing the faulty real address read from the updated faulty real address unit 202 exists in the updated faulty spare address unit 203, and when the repair information about the corresponding spare address in the repair information register 204 of the update unit is in the "available" state, the corresponding spare address indicates a bad SRAM cell. Since "failure" occurs at the corresponding spare address through the current BIST test and the repair state of the spare address in the repair information register 204 of the update unit is "available", the remapping control unit 301 can change the repair state of the corresponding spare address in the repair information field register on the command map 302 to the "failed" state (S603).

[0170] When the spare address being reviewed for replacing the faulty real address read from the updated faulty real address unit 202 exists in the updated faulty spare address unit 203, and when the repair information about the corresponding spare address in the repair information register 204 of the update unit is in the "failed" state, the corresponding spare address indicates a bad SRAM cell. The remapping control unit 301 may keep all fields about the corresponding spare address in the repair information field register on the command map 302 as they are, so that the repair state can be kept in the "failed" state (S604).

[0171] When the spare address being reviewed for replacing the failed real address read from the updated failed real address unit 202 exists in the updated failed spare address unit 203, and when the repair information about the corresponding spare address in the repair information register 204 of the update unit is in the "cancel" state, the corresponding spare address indicates a bad SRAM cell. The remapping control unit 301 can keep all fields about the corresponding spare address in the repair information field register on the command map 302 as they are, so that the repair state can be kept in the "cancel" state (S605).

[0172] When the backup address being reviewed to replace the failed real address read from the updated failed real address unit 202 does not exist in the updated failed backup address unit 203, the corresponding backup address indicates a good SRAM cell. If the address read from the updated failed real address unit 202 is a valid failed real address (S660), the remapping control unit 301 can record the corresponding failed real address in the "address" field of the corresponding backup address in the repair information field register on the command map 302, set the "valid" field to 1 and the "invalid" field to 0, respectively, and change the repair state of the backup address to the "repaired" state (S606). Therefore, when the corresponding failed real address is accessed, the failed real address is replaced with the specified backup address and repair is performed.

[0173] When the read address is invalid due to the absence of more valid addresses in the updated faulty real address unit 202, if the backup address being reviewed does not exist in the updated faulty backup address unit 203, the corresponding backup address indicates a good SRAM cell. If the address read from the updated faulty real address unit 202 is an invalid faulty real address (S660), the remapping control unit 301 may record all fields related to the corresponding backup address in the repair information field register on the command map 302 as 0. That is, the "usable" state may be maintained (S607).

[0174] Figure 7According to the implementation of the present disclosure Figure 6 Circuit diagram of the operation of the SRAM test equipment.

[0175] Figure 7 An example of a circuit diagram is shown in which the remapping control unit 301 performs repair by using logic gates based on the repair information (failure, validity, address value) of the spare addresses 0 to R-1 of the repair information register 204 of the update unit, the information of the failed real address 0 to R-1 stored in the updated failed real address unit 202, and the information of the failed spare address 0 to R-1 stored in the updated failed spare address unit 203, and records the repair in the spare addresses 0 to R-1 of the repair information field register on the command map 302. Figure 6 The logical flow shown is executed Figure 7 The specific operation of the circuit diagram.

[0176] Tables 15 to 23 show the automatic remapping process of step S600 according to the present disclosure.

[0177] Tables 15 to 23 are aspects of step S600 of remapping by using the result value of Table 13 according to the aspect of the updating step S500.

[0178] The first table in Tables 15 to 23 shows the repair information of the repair information register 204 of the update unit, which already stores the repair information from the previous test of the command map 302 and the repair status of the entire spare address according to the repair information. Furthermore, the second table shows the values ​​of the updated faulty spare address unit 203 and the updated faulty real address unit 202 generated by step S500 based on the results of Table 13. Furthermore, the third table shows the repair information remapped by step S600 and stored in the repair information field register on the command map 302, as well as the repair status of the entire spare address according to the repair information.

[0179] In this aspect, the repair status being set to “available” means that, in the repair information of the repair information field register of the command map 302 , the “invalid” field is set to 0 and the “valid” field is set to 0.

[0180] In addition, in this aspect, the repair status is set to "repaired" which means that in the repair information of the repair information field register of the command mapping 302, the "failed" field is set to 0, the "valid" field is set to 1, and the "address" field is set to the real address of the fault.

[0181] Additionally, in this aspect, the repair status being set to “failed” means that, in the repair information of the repair information field register of the command map 302 , the “failed” field is set to 1 and the “valid” field is set to 0.

[0182] Additionally, in this aspect, the repair status being set to “cancel” means that, in the repair information of the repair information field register of the command map 302 , the “invalid” field is set to 1 and the “valid” field is set to 1.

[0183] Additionally, in Tables 15 to 23, a "*" mark is added before each value of the repair information field register of the command map 302 to clarify the remapped and changed values ​​in various aspects.

[0184]

[0185] Table 15

[0186] In the example shown in Table 15, according to step S610, the remapping control unit 301 may designate the spare address 100, which is the starting spare address, as the repair address and begin reviewing. According to step S620, the remapping control unit 301 may read the failed real address from the updated failed real address unit 202. Here, the remapping control unit 301 may initialize "entry" to 0 in order to read the failed real address recorded at the beginning of the updated failed real address unit 202. According to the aspects of Table 15, the remapping control unit 301 may read the valid failed real address 90 from the updated failed real address unit 202. The remapping control unit 301 may check whether the spare address 100 reviewed in step S630 exists in the updated failed spare address unit 203. Since the spare address 100 exists in the updated failed spare address unit 203, the remapping control unit 301 performs step S640 to check the repair status of the spare address 100 from the repair information register 204 of the update unit. Since the standby address 100 is in the "repaired" state, according to step S650, the remapping control unit 310 can check whether the real address 45, which is the value of the "address" field of the standby address 100, exists in the updated faulty real address unit 202. Since the real address 45 does not exist in the updated faulty real address unit 202, according to step S602, the remapping control unit 301 can maintain the repair state of the standby address 100 in the "repaired" state.

[0187]

[0188] Table 16

[0189] In the example shown in Table 16, the remapping control unit 301 can review the next spare address 101 to find a spare address for repairing the real address 90 read from the updated faulty real address unit 202. According to step S630, the remapping control unit 301 can confirm that the corresponding spare address 101 exists in the updated faulty spare address unit 203, and according to step S640, confirm that the repair status of the spare address 101 is "failed". Therefore, according to step S604, the remapping control unit 301 can maintain the repair status of the spare address 101 as "failed" in the repair information field register of the command map 302.

[0190]

[0191] Table 17

[0192] In the example shown in Table 17, the remapping control unit 301 may review the next spare address 102 to find a spare address for repairing the real address 90 read from the updated faulty real address unit 202. The remapping control unit 301 may confirm that the spare address 102 exists in the updated faulty spare address unit 203 according to step S630, confirm that the repair status of the spare address 102 is the "repaired" status according to step S640, and confirm that the real address 12, which is the value of the "address" field of the spare address 102, exists in the updated faulty real address unit 202 according to step S650. Therefore, according to step S601, the remapping control unit 301 may change the repair status to the "cancelled" status by changing the "failed" field of the spare address 102 to 1 in the repair information field register on the command map 302.

[0193]

[0194]

[0195] Table 18

[0196] In the example shown in Table 18, the remapping control unit 301 may review the next spare address 103 to find a spare address for repairing the real address 90 read from the updated faulty real address unit 202. The remapping control unit 301 may confirm that the corresponding spare address 103 exists in the updated faulty spare address unit 203 according to step S630, confirm that the repair status of the spare address 103 is the "repaired" state according to step S640, and confirm that the real address 20, which is the "address" field value of the spare address 103, does not exist in the updated faulty real address unit 202 according to step S650. Therefore, according to step S602, the remapping control unit 301 may maintain the repair status of the spare address 103 in the repair information field register on the command map 302 as the "repaired" state.

[0197]

[0198]

[0199] Table 19

[0200] In the example shown in Table 19, the remapping control unit 301 may review the next spare address 104 to find a spare address to repair the real address 90 read from the updated faulty real address unit 202. According to step S630, the remapping control unit 301 may confirm that the spare address 104 does not exist in the updated faulty spare address unit 203. Therefore, according to step S606, the remapping control unit 301 may designate the spare address 104 as the spare address to repair the faulty real address 90. The remapping control unit 301 may set the "valid" field of the spare address 104 to 1 in the repair information field register on the command map 302, record the repair status as the "repaired" status, and record the "address" field as 90.

[0201]

[0202]

[0203] Table 20

[0204] In the example shown in Table 20, according to step S620, the remapping control unit 301 can read the valid failed real address 12 from the updated failed real address unit 202. The remapping control unit 301 can review the next spare address 105 to find a spare address to repair the real address 12. The remapping control unit 301 can confirm that the spare address 105 exists in the updated failed spare address unit 203 according to step S630, and confirm that the repair status of the spare address 105 is "available" according to step S640. Therefore, according to step S603, the remapping control unit 301 can change the repair status of the spare address 105 to "failed" by changing the "failed" field of the spare address 105 to 1 in the repair information field register on the command map 302.

[0205]

[0206] Table 21

[0207] In the example shown in Table 21, the remapping control unit 301 can review the next spare address 106 to find a spare address for repairing the real address 12 read from the updated faulty real address unit 202. The remapping control unit 301 can confirm that the spare address 106 exists in the updated faulty spare address unit 203 according to step S630, and confirm that the repair status of the spare address 106 is "failed" according to step S640. Therefore, according to step S604, the remapping control unit 301 can maintain the repair status of the spare address 106 as "failed" in the repair information field register on the command map 302.

[0208]

[0209] Table 22

[0210] In the example shown in Table 22, the remapping control unit 301 can review the spare address 107 to find a spare address for repairing the real address 12 read from the updated faulty real address unit 202. The remapping control unit 301 can confirm according to step S630 that the spare address 107 does not exist in the updated faulty spare address unit 203 and that the spare address 107 can be used for repair. Therefore, according to step S606, the remapping control unit 301 can set the "valid" field of the spare address 107 in the repair information field register on the command map 302 to 1, and then change the repair state to the "repaired" state and record the "address" field as 12.

[0211] Additionally, since the end backup address has been reached, the automatic remapping operation may be terminated.

[0212]

[0213]

[0214] Table 23

[0215] Table 23 shows an example of the result of the command map 302 finally updated by the remapping control unit 301 after performing the automatic remapping operation.

[0216] The memory unit 400 may store the repair information of the command map 302 in the nonvolatile memory 402, or may provide the repair information stored in the nonvolatile memory 402 to the command map 302 ( Figure 2 S700 shown in FIG.

[0217] The memory control unit 401 may store the value of the repair information field register for each spare address stored in the command map 302 in the nonvolatile memory 402. When the display driver IC is powered on or performs an operation, the memory control unit 401 may read the repair information stored in the nonvolatile memory 402 and store it in the command map 302.

[0218] According to the present disclosure, the non-volatile memory 402 may be an OTP, flash memory, etc. that can be overwritten.

[0219] According to the present disclosure, the method and apparatus proposed in the present disclosure can be provided as a separate device. However, according to another aspect, the method and apparatus can be implemented in software or hardware as a module embedded in an apparatus using SRAM such as a display, a television, etc.

[0220] It will be apparent to those skilled in the art that various modifications and variations may be made to the static random access memory (SRAM) fault handling apparatus and SRAM fault handling method of the present disclosure without departing from the spirit or scope of the present disclosure. Therefore, it is intended that the present disclosure cover modifications and variations of the present disclosure provided such modifications and variations come within the scope of the appended claims and their equivalents.

Claims

1. A fault handling device for a static random access memory (SRAM), wherein the static random access memory includes a real memory area and a spare memory area, the fault handling device comprising: a memory unit configured to store repair information; a command map configured to obtain previously tested repair information from the memory unit and to provide the previously tested repair information; a built-in self-test (BIST) block unit configured to obtain repair information of the previous test from the command map, perform a fault test on the entire address of the static random access memory cell, distinguish whether the fault address where the fault occurs is an address of the real memory area as a real address or an address of the spare memory area as a spare address, and store fault address information associated with the fault address; an update unit configured to update the fail address information by using the repair information of the previous test obtained from the command map and the fail address information obtained from the built-in self-test block unit; as well as a remapping control unit configured to update the repair information by remapping the repair information based on the previously tested repair information and the updated fault address information obtained from the update unit, and to send the updated repair information to the command map, The command mapping is configured to obtain the updated repair information and store it in the memory unit.

2. The fault handling device according to claim 1, wherein: The built-in self-test block unit is configured to: store the fail address information in a fail real address unit when the fail address is the real address, or store the fail address information in a fail spare address unit when the fail address is the spare address.

3. The fault handling device according to claim 1, wherein: The built-in self test block unit is configured to exclude already repaired addresses among the real addresses from the fault test based on the repair information of the previous test obtained from the command map, and perform the fault test on the repaired and replaced spare addresses.

4. The fault handling device according to claim 2, wherein: The update unit is configured to store the repair information of the previous test obtained from the command mapping in a repair information register of the update unit, store the fault address information of the fault real address unit in an updated fault real address unit, and store the fault address information of the fault spare address unit in an updated fault spare address unit.

5. The fault handling device according to claim 4, wherein: The repair information about each of the backup addresses includes: a repair status showing one of a repaired state, an available state, an invalid state, and a canceled state; and A value of an initial address as a real address repaired by each of the spare addresses.

6. The fault handling device according to claim 5, wherein: When the repair state of the spare address obtained from the command map is in the repaired state and the spare address exists in the failed spare address unit, the update unit is configured to store the value of the original address of the spare address in the updated failed real address unit, and When the repair state of the spare address obtained from the command map is in the repaired state and the spare address does not exist in the failed spare address unit, the update unit is configured to store the spare address in the updated failed spare address unit.

7. The fault handling device according to claim 5, wherein: When the repair state of the spare address obtained from the command map is in the failed state or the canceled state and the spare address does not exist in the failed spare address unit, the update unit is configured to store the spare address in the updated failed spare address unit.

8. The fault handling device according to claim 5, wherein: When the number of fail addresses stored in the updated fail real address unit is less than or equal to the number of available addresses calculated based on the number of fail addresses stored in the updated fail spare address unit, the update unit is configured to determine that repair is possible.

9. The fault handling device according to claim 5, wherein: The remapping control unit is configured to update the repair information by remapping each of the spare addresses so as to repair the fault real address in the updated fault real address unit based on the updated fault real address information obtained from the updated fault spare address unit and the updated fault spare address information obtained from the updated fault spare address unit and the previously tested repair information of the spare address obtained from the repair information register of the update unit, and send the updated repair information to the command mapping.

10. The fault handling device according to claim 9, wherein: When the spare address exists in the updated failed spare address unit, the repair state of the spare address is in the repaired state, and the value of the original address of the spare address exists in the updated failed real address unit, the remapping control unit is configured to change the repair state of the spare address to the canceled state, and When the standby address exists in the updated faulty standby address unit, and the repair state of the standby address is in the repaired state and the value of the initial address of the standby address does not exist in the updated faulty real address unit, the remapping control unit is configured to maintain the repair state of the standby address as the repaired state.

11. The fault handling device according to claim 9, wherein: When the spare address exists in the updated failed spare address unit and the repair state of the spare address is in the usable state, the remapping control unit is configured to change the repair state of the spare address to the failed state in the command map, wherein, when the spare address exists in the updated failed spare address unit and the repair state of the spare address is in the failed state, the remapping control unit is configured to maintain the repair state of the spare address as the failed state in the command mapping, and When the spare address exists in the updated failed spare address unit and the repair state of the spare address is in the cancel state, the remapping control unit is configured to maintain the repair state of the spare address as the cancel state in the command mapping.

12. The fault handling device according to claim 9, wherein: When the spare address does not exist in the updated failed spare address unit and the updated failed real address is a valid address within the real address range, the remapping control unit is configured to change the repair state of the spare address to the repaired state in the command map and record the updated failed real address in the initial address, and When the spare address does not exist in the updated failed spare address unit and the updated failed real address is an invalid address outside the real address range, the remapping control unit is configured to maintain the repair state of the spare address as the available state in the command map.

13. The fault handling device according to claim 1 further includes an address remapping table, which is configured to output a normal spare address that replaces the faulty real address based on the previously tested repair information or the updated repair information from the command mapping when performing static random access memory write / read access.

14. A method for processing a fault of a static random access memory (SRAM), wherein the static random access memory includes a real memory area and a spare memory area, the method comprising: reading previously tested repair information stored in a memory cell; providing the repair information of the previous test to a built-in self-test (BIST) circuit; performing a fault test on the entire address of the static random access memory cell by the built-in self-test circuit; when a fault occurs during the fault test, determining whether the fault that has occurred is an address in the real memory area that is a real address or an address in the spare memory area that is a spare address, and storing fault address information associated with the fault address; updating the fault address information by using the fault address information and the repair information of the previous test; updating the repair information based on the updated fault address information and the previously tested repair information, and sending the updated repair information to a command map; as well as The updated repair information is stored in the memory unit.

15. The method according to claim 14, wherein Storing the fault address information includes: When the fault address is the real address, storing the fault address information in a fault real address unit; and When the fault address is the spare address, the fault address information is stored in a fault spare address unit.

16. The method according to claim 14, wherein Performing the fault test includes excluding addresses that have been repaired among the real addresses in the previous test from the fault test based on repair information of the previous test, and performing the fault test on the repaired and replaced spare addresses.

17. The method according to claim 15, wherein: Updating the fault address information includes: storing said previously tested repair information in said command map of a remapping unit; storing the fault address information of the faulty real address unit in the updated faulty real address unit, and storing the fault address information of the faulty spare address unit in the updated faulty spare address unit; Checking whether repair is possible by comparing the number of failed address information of the failed real address unit and the number of failed address information of the failed spare address unit; and The updated failed real address unit and the updated failed spare address unit are updated by using the previously tested repair information, the failed address information in the failed real address unit, and the failed address information in the failed spare address unit.

18. The method according to claim 17, wherein: The repair information about each of the backup addresses includes: a repair status showing one of a repaired state, an available state, an invalid state, and a canceled state; and A value of an initial address as a real address repaired by each of the spare addresses.

19. The method according to claim 18, wherein Updating the updated fault real address unit and the updated fault spare address unit includes: When the repair state of the spare address to be updated is in the repaired state and the spare address exists in the fault spare address unit, storing the value of the initial address of the spare address in the updated fault real address unit; and When the repair state of the spare address to be updated is in the repaired state and the spare address does not exist in the failed spare address unit, the spare address is stored in the updated failed spare address unit.

20. The method according to claim 18, wherein Updating the updated fault real address unit and the updated fault spare address unit includes: When the repair state of the standby address to be updated is in the failed state or the canceled state and the standby address does not exist in the failed standby address unit, the standby address is stored in the updated failed standby address unit.

21. The method according to claim 17, wherein Checking whether repairs can be performed includes: When the number of fail addresses stored in the fail real address unit is less than or equal to the number of available addresses calculated based on the number of fail addresses stored in the fail spare address unit, it is determined that repair is possible.

22. The method according to claim 18, wherein Updating the repair information includes: Reviewing from the starting address of the backup address; Obtaining the fault real address from the updated fault real address unit; and The repair information is updated by remapping each of the spare addresses so as to repair the failed real address based on the previously tested repair information of the spare address and the updated failed spare address information obtained from the updated failed spare address unit.

23. The method according to claim 22, wherein Remapping each of the spare addresses includes: When the spare address exists in the updated failed spare address unit, the repair state of the spare address is in the repaired state, and the value of the initial address of the spare address exists in the updated failed real address unit, changing the repair state of the spare address to the canceled state; and When the standby address exists in the updated faulty standby address unit, the repair state of the standby address is in the repaired state, and the value of the initial address of the standby address does not exist in the updated faulty real address unit, the repair state of the standby address is maintained as the repaired state.

24. The method according to claim 22, wherein Remapping each of the spare addresses includes: When the standby address exists in the updated faulty standby address unit and the repair state of the standby address is in the available state, changing the repair state of the standby address to the failed state; When the standby address exists in the updated faulty standby address unit and the repair state of the standby address is in the failed state, maintaining the repair state of the standby address in the failed state; and When the spare address exists in the updated failed spare address unit and the state of the spare address is in the cancel state, the repair state of the spare address is maintained as the cancel state.

25. The method according to claim 22, wherein Remapping each of the spare addresses includes: When the spare address does not exist in the updated failed spare address unit and the failed real address obtained from the updated failed real address unit is a valid address within the real address range, changing the repair state of the spare address to the repaired state and recording the failed real address as the value of the initial address; and When the spare address does not exist in the updated failed spare address unit and the failed real address obtained from the updated failed real address unit is an invalid address outside the real address range, the repair state of the spare address is maintained as the available state.

26. The method of claim 14, further comprising: When performing static random access memory writing / reading, a normal spare address in which the faulty real address is repaired is output based on the updated repair information or the previously tested repair information.

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