Data processing method, device, electronic device, medium and chip
By converting floating-point data into fixed-point calculations, the problem of insufficient computing power of traditional CPUs is solved, and more efficient and accurate artificial intelligence model training and reasoning are achieved.
Patent Information
- Application Number
- CN202210946383.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-08-08
- Publication Date
- 2025-09-16
- Estimated Expiration
- 2042-08-08
AI Technical Summary
In the existing technology of artificial intelligence model calculation, traditional CPU computing power is insufficient, and floating-point data format calculation is complex and inefficient, resulting in waste of computing resources and inaccurate model training and reasoning.
A fixed-point data format with more mantissa bits is used to convert floating-point data into fixed-point calculations that do not include an exponent. By mapping elements to the interval [0, 2^n], all mantissa bits are used to represent element values, reducing computational complexity and improving accuracy.
It improves computing efficiency, saves hardware resources, enhances the training and reasoning accuracy of artificial intelligence models, and reduces the usage of hardware resources.
Smart Images

Figure CN115238236B_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the field of artificial intelligence technology, in particular to the field of artificial intelligence chip technology, and specifically to a data processing method, device, electronic device, computer-readable storage medium, and computer program product. Background Art
[0002] Artificial intelligence (AI) is the study of how computers can simulate certain human thought processes and intelligent behaviors (such as learning, reasoning, thinking, and planning). It encompasses both hardware and software technologies. AI hardware technologies generally include sensors, specialized AI chips, cloud computing, distributed storage, and big data processing. AI software technologies primarily encompass computer vision, speech recognition, natural language processing, machine learning / deep learning, big data processing, and knowledge graphs.
[0003] AI models involve numerous compute-intensive operators, primarily matrix multiplication, convolution, pooling, activation, and more. These calculations are extremely time-consuming, and traditional CPUs struggle to meet performance requirements. Consequently, heterogeneous computing has become mainstream, with various AI processors, including GPUs, FPGAs, and ASICs, widely used in AI model computations. Furthermore, the choice of data type plays a crucial role in the accuracy and performance of AI computations.
[0004] The approaches described in this section are not necessarily approaches that have been previously conceived or employed. Unless otherwise indicated, it should not be assumed that any approach described in this section is prior art simply by virtue of its inclusion in this section. Similarly, unless otherwise indicated, the issues raised in this section should not be considered as having been recognized in any prior art. Summary of the Invention
[0005] The present disclosure provides a method, an apparatus, an electronic device, a computer-readable storage medium, a computer program product, and a chip.
[0006] According to one aspect of the present disclosure, a data processing method is provided, including: obtaining a first matrix and a second matrix, wherein each element in the first matrix and the second matrix is stored in a first storage unit in a first data format, and wherein the first data format is a floating-point type and has 1 sign bit and m mantissa bits, and m is an integer greater than 1; for each element in the first matrix and the second matrix, converting the element into a corresponding conversion element, wherein the conversion element is stored in a second storage unit in a second data format, and wherein the second data format has 1 sign bit, 1 exponent bit and n mantissa bits, and n is an integer greater than m, and wherein the second data format and the first data format have the same number of bits, and the mantissa bits of each conversion element represent the value of the element corresponding to the conversion element; and based on the conversion elements corresponding to each element in the first matrix and the second matrix, respectively, calculating the product of the first matrix and the second matrix as a third matrix.
[0007] According to another aspect of the present disclosure, a data processing device is provided, including: an acquisition module, configured to acquire a first matrix and a second matrix, wherein each element in the first matrix and the second matrix is stored in a first storage unit in a first data format, and wherein the first data format is a floating point type and has 1 sign bit and m mantissa bits, and m is an integer greater than 1; a conversion module, configured to convert each element in the first matrix and the second matrix into a corresponding conversion element, wherein the conversion element is stored in a second storage unit in a second data format, and wherein the second data format has 1 sign bit, 1 exponent bit and n mantissa bits, and n is an integer greater than m, and wherein the second data format and the first data format have the same number of bits, and the mantissa bits of each conversion element represent the value of the element corresponding to the conversion element; and a calculation module, configured to calculate the product of the first matrix and the second matrix as a third matrix based on the conversion elements corresponding to each element in the first matrix and the second matrix.
[0008] According to another aspect of the present disclosure, an electronic device is provided, comprising: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the above method.
[0009] According to another aspect of the present disclosure, a non-transitory computer-readable storage medium storing computer instructions is provided, wherein the computer instructions are used to enable the computer to execute the above method.
[0010] According to another aspect of the present disclosure, a computer program product is provided, comprising a computer program, wherein the computer program implements the above method when executed by a processor.
[0011] According to another aspect of the present disclosure, an electronic circuit is provided, comprising: a circuit configured to execute the above method.
[0012] According to one or more embodiments of the present disclosure, a data processing method is provided that utilizes a data format with more mantissa bits than traditional floating-point data, thereby improving computational precision and further enhancing the accuracy of artificial intelligence model training and reasoning. Furthermore, by mapping the original floating-point data to all mantissa bits, floating-point calculations are converted to fixed-point calculations that do not include an exponent, thereby reducing computational difficulty, improving computational efficiency, and conserving hardware resources used for computation.
[0013] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present disclosure, nor are they intended to limit the scope of the present disclosure. Other features of the present disclosure will become readily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS
[0014] The accompanying drawings illustrate exemplary embodiments and constitute a part of the specification. Together with the description of the specification, they serve to explain exemplary implementation of the embodiments. The illustrated embodiments are for illustrative purposes only and do not limit the scope of the claims. Throughout the drawings, the same reference numerals designate similar, but not necessarily identical, elements.
[0015] Figure 1 A flow chart of a data processing method according to an embodiment of the present disclosure is shown;
[0016] Figure 2 A flowchart of a method for converting elements in a matrix into conversion elements according to an embodiment of the present disclosure is shown;
[0017] Figure 3 A flowchart of a method for converting elements in a first matrix into conversion elements according to an embodiment of the present disclosure is shown;
[0018] Figure 4 A structural block diagram of a data processing device according to an embodiment of the present disclosure is shown; and
[0019] Figure 5 A structural block diagram of an exemplary electronic device that can be used to implement the embodiments of the present disclosure is shown. DETAILED DESCRIPTION
[0020] The following description of exemplary embodiments of the present disclosure is made in conjunction with the accompanying drawings, including various details of the embodiments of the present disclosure to facilitate understanding, which should be considered as merely exemplary. Therefore, it should be appreciated by those skilled in the art that various changes and modifications may be made to the embodiments described herein without departing from the scope of the present disclosure. Similarly, for the sake of clarity and conciseness, descriptions of well-known functions and structures are omitted in the following description.
[0021] In this disclosure, unless otherwise specified, the use of terms such as "first" and "second" to describe various elements is not intended to limit the positional relationship, temporal relationship, or importance relationship of these elements. Such terms are only used to distinguish one element from another. In some examples, the first element and the second element may refer to the same instance of the element, while in some cases, based on the context of the description, they may also refer to different instances.
[0022] The terms used in the descriptions of the various examples described in this disclosure are for the purpose of describing specific examples only and are not intended to be limiting. Unless the context clearly indicates otherwise, if the number of elements is not specifically limited, the element may be one or more. In addition, the term "and / or" used in this disclosure encompasses any one and all possible combinations of the listed items.
[0023] In related technologies, the standard IEEE float type is primarily used in the calculation process of artificial intelligence models. With the continuous advancement of technology, new calculation types have emerged to replace the standard float, such as bfloat16, fp16, int16, and other new half-precision calculation types. fp16 and bfloat16 include sign, exponent, and mantissa bits. Because they have exponent bits, they can represent a wider range of values. However, the large number of exponent bits makes calculations more complex, so the computational efficiency is lower than that of int16. Because int16 uses fixed-point calculations, its computational efficiency is higher than that of fp16 / bfloat16. However, because it lacks an exponent bit, the range of numbers that can be represented is smaller than that of fp16 / bfloat16. During the training process of many artificial intelligence models, non-convergence may occur, so its scope of use is relatively limited.
[0024] To address the above issues, the present disclosure provides a data processing method that utilizes a data format with more mantissa bits than traditional floating-point data, thereby improving computational precision and further enhancing the accuracy of artificial intelligence model training and reasoning. Furthermore, by mapping the original floating-point data to all mantissa bits, floating-point calculations are converted to fixed-point calculations that do not include an exponent, thereby reducing computational difficulty, improving computational efficiency, and conserving hardware resources.
[0025] The embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings.
[0026] Figure 1 FIG. 1 shows a flow chart of a data processing method according to an embodiment of the present disclosure. Figure 1 As shown, the data processing method 100 includes: step S101, obtaining a first matrix and a second matrix, wherein each element in the first matrix and the second matrix is stored in a first storage unit in a first data format, and wherein the first data format is a floating point type and has 1 sign bit and m mantissa bits, and m is an integer greater than 1; step S102, for each element in the first matrix and the second matrix, converting the element into a corresponding conversion element, wherein the conversion element is stored in a second storage unit in a second data format, and wherein the second data format has 1 sign bit, 1 exponent bit and n mantissa bits, and n is an integer greater than m, and wherein the second data format and the first data format have the same number of bits, and the mantissa bit of each conversion element represents the value of the element corresponding to the conversion element; step S103, based on the conversion elements corresponding to each element in the first matrix and the second matrix, calculating the product of the first matrix and the second matrix as a third matrix.
[0027] Thus, in step S102, each element stored in the first data format in the first matrix and the second matrix is converted into a conversion element stored in the second data format, thereby using more mantissa bits to represent each element in the first matrix and the second matrix. Specifically, the value of each element is converted to the mantissa bits of the corresponding conversion element, and the matrix calculation of the floating-point type is converted to the matrix operation of the fixed-point type, which can effectively reduce the difficulty of the matrix calculation and save the hardware resources used for calculation. Thus, by converting the floating-point data in the first data format into the second data format with more mantissa bits, the accuracy of the calculation can be improved, and the accuracy of the training and reasoning of the artificial intelligence model using this method for matrix operation can be improved. At the same time, by converting the original floating-point data to all the mantissa bits of the conversion elements stored in the second data format, the floating-point matrix calculation is converted into a fixed-point calculation that does not contain an exponent. Compared with the exponential calculation, the fixed-point calculation is less difficult, thereby improving the calculation efficiency and saving the hardware resources used for calculation.
[0028] According to some embodiments, the first data format and the second data format both have 16 bits. Thus, by providing a second data format having a total of 16 bits of data and a 14-bit exponent, the product operation of traditional floating-point data in the first data format, such as fp16 and bfloat16, is converted into a fixed-point calculation on 14 mantissa bits, making it simpler and more efficient in hardware implementation, and energy efficiency close to that of the integer type int16 with the same number of bits. Compared with calculation types such as fp16 and bfloat16, it can reduce the use of hardware resources, thereby improving the peak performance of artificial intelligence chips.
[0029] For ease of description, the following description will be based on an example in which the second data format includes 16-bit data and the number of mantissa bits n is 14. However, it will be appreciated that the present disclosure is not limited to the conversion of 16-bit data and can also be used for the conversion of 32-bit single-precision floating-point numbers or 64-bit double-precision floating-point numbers, thereby converting floating-point operations that include exponential operations into fixed-point operations that do not include exponents, thereby improving computational efficiency and saving hardware computing resources.
[0030] Figure 2 FIG. 1 is a flow chart showing a method for converting elements in a matrix into conversion elements according to an embodiment of the present disclosure. Figure 2 As shown, step S102 includes: step S201, determining the first element with the largest absolute value in the first matrix, and recording the maximum absolute value of the first element as the first maximum value Max1; step S202, based on the first maximum value Max1, mapping each element in the first matrix to the interval [0, 2^n] to convert the element into a corresponding conversion element; step S203, determining the second element with the largest absolute value in the second matrix, and recording the maximum absolute value of the second element as the second maximum value Max2; and step S204, based on the second maximum value Max2, mapping each element in the second matrix to the interval [0, 2^n] to convert the element into a corresponding conversion element.
[0031] Thus, the data distribution in the two matrices is determined by respectively determining the maximum absolute value in the first matrix and the second matrix, so that data mapping is performed according to the respective data distributions. Specifically, each element in the matrix is mapped to the interval [0, 2^n] based on the maximum absolute value of the matrix, so that the absolute value of the corresponding element is represented by all the mantissa bits in the converted element stored in the second data format, thereby converting the floating-point calculation into a fixed-point calculation in the subsequent matrix calculation.
[0032] Figure 3 FIG. 5 is a flow chart showing a method for converting elements in a first matrix into conversion elements according to an embodiment of the present disclosure. Figure 3As shown, step S202 includes: step S301, based on the first maximum value, determining a first split point to split the interval [0, Max1] into two sub-intervals; and step S302, for each element in the first matrix, based on the sub-interval in which the element is located, determining the exponent bit of the conversion element corresponding to the element, and mapping the element to [0, 2 n ] to determine the mantissa of the conversion element corresponding to this element.
[0033] It is understood that the distribution range of each element in the first matrix, i.e., [0, Max1], can be determined by determining the maximum absolute value of the elements in the matrix. This distribution range can be further segmented by determining the split points, so that mapping calculations are performed separately according to the subintervals that each element falls into. This allows for a more detailed division of the data distribution range, thereby achieving higher calculation accuracy.
[0034] According to some embodiments, step S301 includes: determining the first segmentation point as To split the interval [0, Max1] into two subintervals and
[0035] Taking n as 14 as an example, when the second data format is 16-bit data with 14 mantissa bits, each element in the first matrix needs to be mapped to [0, 2 14 ] interval, using 14 mantissa bits to represent the absolute value of each element. The distribution interval [0, Max1] of the elements in the first matrix can be divided into 2 14 and the first copy is located at As a split point, the distribution interval [0, Max1] is divided into two sub-intervals and Thus, the data represented by the second data format has at least Compared with the first data format, the second data format has more mantissa bits and thus has higher precision, which can meet the precision requirements of most artificial intelligence models.
[0036] According to some embodiments, step S302 includes: for each element in the first matrix, determining the absolute value a of the element; in response to the element being in the subinterval In the conversion element, determine that the exponent bit of the element corresponding to the element is 0, and map the element to [0, 2 n ] to determine the mantissa of the conversion element corresponding to the element or in response to the element being in a subinterval In the conversion element, the exponent bit of the element corresponding to the element is determined to be 1, and the element is mapped to [0, 2 n ] to determine the mantissa of the element to be converted to the corresponding conversion element
[0037] Furthermore, by determining the subinterval where the element is located, the distribution range of the element can be determined more accurately, thereby obtaining higher calculation accuracy. When the value distribution is smaller within the interval, This interval is further divided into 2 14 share, making The accuracy within the range can be improved to Elements with larger values fall into subintervals with larger ranges. In, there is still precision.
[0038] It is understandable that the position of the set split point can determine the maximum value corresponding to the element in each subinterval, and further determine the precision of the element. Another embodiment of obtaining different precisions by setting different split points will be described below.
[0039] According to some embodiments, step S301 includes: determining the first segmentation point as To split the interval [0, Max1] into two subintervals and Here, i is a positive integer less than n.
[0040] According to some embodiments, step S302 includes: for each element in the first matrix, determining the absolute value a of the element; in response to the absolute value a being within the subinterval In the conversion element, determine that the exponent bit of the element corresponding to the element is 0, and map the element to [0, 2 n ] to determine the mantissa of the conversion element corresponding to the element Or in response to the absolute value a being in the subinterval In the conversion element, the exponent bit of the element corresponding to the element is determined to be 1, and the element is mapped to [0, 2 n ] to determine the mantissa of the element to be converted to the corresponding conversion element
[0041] Taking n as 14 as an example, when the second data format is 16-bit data with 14 mantissa bits, each element in the first matrix needs to be mapped to [0, 2 14 ] interval, using 14 mantissa bits to represent the absolute value of each element. When the first split point is determined to be greater than of Compared with determining the first segmentation point as In the case of The maximum value corresponding to the elements in is improved from Max1 to This can improve the accuracy of the elements in this interval, that is, the elements in the interval The precision of the elements in is determined by Upgraded to Furthermore, different values of i can be set to determine which interval of data to improve. For AI models with a specific data distribution, the value of i can be set based on the data distribution of the AI model to improve the accuracy of the data within the target interval.
[0042] It can be understood that the conversion process for each element in the second matrix is the same as the conversion process for the elements in the first matrix mentioned above, both of which convert the data in the first data format into the data in the second data format by mapping, which will not be elaborated here.
[0043] According to some embodiments, the data processing method 100 further includes: determining, for each element in the first matrix and each element in the second matrix, a restoration factor corresponding to the element, wherein the restoration factor satisfies the following condition: the conversion element corresponding to the element multiplied by the restoration factor corresponding to the element is equal to the absolute value of the element.
[0044] It is understood that data processing method 100 is used to convert a traditional floating-point data type into a new data type with more mantissa bits, thereby converting floating-point matrix calculations into fixed-point calculations, thereby reducing computational complexity and saving hardware resources. After conversion to fixed-point for matrix calculations, the calculation results still need to be converted back to the original data type, making this conversion process unknown to the user, thereby improving the user experience.
[0045] The process of converting the matrix calculation result to the original data type requires the above-mentioned restoration factor to be implemented. Specifically, when converting an element of the first data format to a conversion element of the second data format, the element is mapped to [0, 2 n ], the matrix calculation result can be converted to the original data type by multiplying the calculation result by the reciprocal of this factor, and the reciprocal of this factor is the recovery factor. The recovery factor is converted to the original data type by satisfying the following condition: the conversion element corresponding to the element multiplied by the recovery factor corresponding to the element is equal to the absolute value of the element.
[0046] According to some embodiments, the absolute value of each element in the third matrix is equal to the mantissa of the converted element of the third element corresponding to the element in the first matrix multiplied by the mantissa of the converted element of the fourth element corresponding to the element in the second matrix multiplied by the restoration factor corresponding to the third element multiplied by the restoration factor corresponding to the fourth element, and the sign bit of the element in the third matrix is the exclusive OR value of the sign bit of the third element and the sign bit of the fourth element.
[0047] As a result, floating-point matrix calculations are converted to fixed-point calculations with more mantissa bits, reducing the complexity of the calculations and improving the efficiency of the calculations. Due to the increase in mantissa bits, the accuracy of the data is also improved. At the same time, through the above process, automatic data conversion is achieved, and the calculation results can be automatically converted back to the original data type. In use, users do not feel the specific data type used in the calculation and the data conversion process, and can obtain higher-precision and more efficient calculation results and processes.
[0048] According to another aspect of the present disclosure, a data processing device is provided. Figure 4 As shown, the data processing device 400 includes: an acquisition module 401, configured to acquire a first matrix and a second matrix, wherein each element in the first matrix and the second matrix is stored in a first storage unit in a first data format, and wherein the first data format is a floating point type and has 1 sign bit and m mantissa bits, and m is an integer greater than 1; a conversion module 402, configured to convert each element in the first matrix and the second matrix into a corresponding conversion element, wherein the conversion element is stored in a second storage unit in a second data format, and wherein the second data format has 1 sign bit, 1 exponent bit and n mantissa bits, and n is an integer greater than m, and wherein the second data format and the first data format have the same number of bits, and the mantissa bits of each conversion element represent the value of the element corresponding to the conversion element; and a calculation module 403, configured to calculate the product of the first matrix and the second matrix as a third matrix based on the conversion elements corresponding to each element in the first matrix and the second matrix.
[0049] Thus, each element stored in the first data format in the first matrix and the second matrix is converted into a conversion element stored in the second data format by the conversion module 402, thereby using more mantissa bits to represent each element in the first matrix and the second matrix. The value of each element is converted to the mantissa bits of the corresponding conversion element, and the floating-point type matrix calculation is converted to a fixed-point type matrix operation, which can effectively reduce the difficulty of matrix calculation and save hardware resources for calculation. Thus, the data processing device 400 can improve the accuracy of calculation by converting the floating-point data in the first data format into the second data format with more mantissa bits, and can improve the accuracy of training and reasoning of the artificial intelligence model that uses this method for matrix operation. At the same time, the conversion module 402 converts the original floating-point data to all the mantissa bits of the conversion elements stored in the second data format, thereby converting the floating-point matrix calculation into a fixed-point calculation that does not contain an exponent. Compared with the exponential calculation, the fixed-point calculation is less difficult, thereby improving the calculation efficiency and saving the hardware resources used for calculation.
[0050] According to some embodiments, the first data format and the second data format both have 16 bits. Thus, by providing a second data format having a total of 16 bits of data and a 14-bit exponent, the product operation of traditional floating-point data in the first data format, such as fp16 and bfloat16, is converted into a fixed-point calculation on 14 mantissa bits, making it simpler and more efficient in hardware implementation, and energy efficiency close to that of the integer type int16 with the same number of bits. Compared with calculation types such as fp16 and bfloat16, it can reduce the use of hardware resources, thereby improving the peak performance of artificial intelligence chips.
[0051] It can be understood that the data processing device 400 provided by the present disclosure is not limited to the conversion of 16-bit data, but can also be used for the conversion of 32-bit single-precision floating-point numbers or 64-bit double-precision floating-point numbers, so as to convert floating-point operations including exponential operations into fixed-point operations that do not include exponents, thereby improving computing efficiency and saving hardware computing resources.
[0052] According to some embodiments, the conversion module 402 includes: a first determining unit configured to determine a first element with the largest absolute value in the first matrix, and record the maximum absolute value of the first element as a first maximum value Max1; a first mapping unit configured to map each element in the first matrix to [0, 2 n] interval to convert the element into the corresponding conversion element; the second determining unit is configured to determine the second element with the largest absolute value in the second matrix, and record the maximum absolute value of the second element as the second maximum value Max2; the second mapping unit is configured to map each element in the second matrix to [0, 2 n ] interval to convert the element into the corresponding conversion element.
[0053] Thus, the conversion module 402 determines the data distribution in the two matrices by determining the maximum absolute value in each of the first and second matrices, and maps the data according to the respective data distributions. Specifically, each element in the matrix is mapped to the interval [0, 2^n] based on the maximum absolute value of the matrix, so that the absolute value of the corresponding element is represented by all the mantissa bits in the conversion element stored in the second data format, thereby converting the floating-point calculation into a fixed-point calculation in the subsequent matrix calculation.
[0054] According to some embodiments, the first mapping unit includes: a first determining unit configured to determine a first splitting point based on the first maximum value to split the interval [0, Max1] into two sub-intervals; and a second determining sub-unit configured to determine, for each element in the first matrix, an exponent bit of a conversion element corresponding to the element based on the sub-interval in which the element is located, and map the element to [0, 2 n ] to determine the mantissa of the conversion element corresponding to this element.
[0055] It is understood that the first determination subunit can determine the distribution range of each element in the first matrix, i.e., [0, Max1], by determining the maximum absolute value of the elements in the matrix. This distribution range is further segmented by determining the split points, so that mapping calculations are performed separately according to the subintervals into which each element falls. This allows for more detailed division of the data distribution range, thereby achieving higher calculation accuracy.
[0056] According to some embodiments, the first sub-determining unit is further configured to: determine the first segmentation point as To split the interval [0, Max1] into two subintervals and
[0057] Taking n as 14 as an example, that is, when the second data format is 16-bit data with 14 mantissa bits, the first determination subunit needs to map each element in the first matrix to [0, 2 14] interval, so as to use 14 mantissa bits to represent the absolute value of each element. The first determining subunit can divide the distribution interval [0, Max1] of the elements in the first matrix into 2 14 and the first copy is located at As a split point, the distribution interval [0, Max1] is divided into two sub-intervals and Thus, the data represented by the second data format has at least Compared with the first data format, the second data format has more mantissa bits and thus has higher precision, which can meet the precision requirements of most artificial intelligence models.
[0058] According to some embodiments, the second determining subunit includes: a third determining subunit configured to determine, for each element in the first matrix, an absolute value a of the element; a fourth determining subunit configured to determine, in response to the element being within a subinterval In the conversion element, determine that the exponent bit of the element corresponding to the element is 0, and map the element to [0, 2 n ] to determine the mantissa of the conversion element corresponding to the element or a fifth determining subunit, configured to respond to the element being located in the subinterval In the conversion element, the exponent bit of the element corresponding to the element is determined to be 1, and the element is mapped to [0, 2 n ] to determine the mantissa of the element to be converted to the corresponding conversion element
[0059] Furthermore, by determining the subinterval where the element is located through the fourth determining subunit and the fifth determining subunit, the distribution range of the element can be determined more accurately, thereby obtaining higher calculation accuracy. When the value distribution is smaller within the interval, This interval is further divided into 2 14 share, making The accuracy within the range can be improved to Elements with larger values fall into subintervals with larger ranges. In, there is still precision.
[0060] According to some embodiments, the first determining subunit is further configured to: determine the first segmentation point as To split the interval [0, Max1] into two subintervals and Here, i is a positive integer less than n.
[0061] According to some embodiments, the second determining subunit includes: a sixth determining subunit configured to determine, for each element in the first matrix, an absolute value a of the element; a seventh determining subunit configured to determine, in response to the absolute value a being within a subinterval In the conversion element, determine that the exponent bit of the element corresponding to the element is 0, and map the element to [0, 2 n ] to determine the mantissa of the conversion element corresponding to the element or an eighth determining subunit, configured to respond to the absolute value a being within the subinterval In the conversion element, the exponent bit of the element corresponding to the element is determined to be 1, and the element is mapped to [0, 2 n ] to determine the mantissa of the element to be converted to the corresponding conversion element
[0062] Taking n as 14 as an example, when the second data format is 16-bit data with 14 mantissa bits, each element in the first matrix needs to be mapped to [0, 2 14 ] interval, using 14 mantissa bits to represent the absolute value of each element. When the first split point is determined to be greater than of Compared with determining the first segmentation point as In the case of The maximum value corresponding to the elements in is improved from Max1 to This can improve the accuracy of the elements in this interval, that is, the elements in the interval The precision of the elements in is determined by Upgraded to Furthermore, different values of i can be set to determine which interval of data to improve. For AI models with a specific data distribution, the value of i can be set based on the data distribution of the AI model to improve the accuracy of the data within the target interval.
[0063] It can be understood that the conversion process of each element in the second matrix by the data processing device 400 is the same as the conversion process of the elements in the first matrix mentioned above, both of which convert the data in the first data format into the data in the second data format by mapping, which will not be elaborated here.
[0064] According to some embodiments, the data processing device 400 further includes: a determination module configured to determine, for each element in the first matrix and each element in the second matrix, a restoration factor corresponding to the element, wherein the restoration factor satisfies the following condition: the conversion element corresponding to the element multiplied by the restoration factor corresponding to the element is equal to the absolute value of the element.
[0065] It is understood that data processing device 400 is used to convert traditional floating-point data types into new data types with more mantissa bits, thereby converting floating-point matrix calculations into fixed-point calculations, thereby reducing computational complexity and saving hardware resources. After conversion to fixed-point for matrix calculations, the calculation results still need to be converted back to the original data type, making this conversion process unknown to the user, thereby improving the user experience.
[0066] The process of the data processing device 400 converting the matrix calculation result into the original data type requires the restoration factor determined by the fifth determination module. Specifically, when converting an element in the first data format into a conversion element in the second data format, the absolute value of the element is multiplied by a factor by the first mapping module 303 to map the element to [0, 2 n ], the matrix calculation result can be converted to the original data type by multiplying the calculation result by the reciprocal of this factor, and the reciprocal of this factor is the recovery factor. The recovery factor is converted to the original data type by satisfying the following condition: the conversion element corresponding to the element multiplied by the recovery factor corresponding to the element is equal to the absolute value of the element.
[0067] According to some embodiments, the absolute value of each element in the third matrix is equal to the mantissa of the converted element of the third element corresponding to the element in the first matrix multiplied by the mantissa of the converted element of the fourth element corresponding to the element in the second matrix multiplied by the restoration factor corresponding to the third element multiplied by the restoration factor corresponding to the fourth element, and the sign bit of the element in the third matrix is the exclusive OR value of the sign bit of the third element and the sign bit of the fourth element.
[0068] Thus, the data processing device 400 converts the matrix calculation of floating-point numbers into fixed-point calculations with more mantissa bits, reducing the complexity of the calculation and improving the efficiency of the calculation. Due to the increase in mantissa bits, the accuracy of the data is also improved. At the same time, through the above process, the data processing device 400 realizes automatic conversion of data, and the calculation results can be automatically converted back to the original data type. In use, the user does not feel the specific data type used in the calculation and the data conversion process, and can obtain higher-precision and more efficient calculation results and calculation processes.
[0069] According to another aspect of the present disclosure, an electronic device is also provided, comprising: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform a data processing method.
[0070] According to another aspect of the present disclosure, a non-transitory computer-readable storage medium storing computer instructions is further provided, wherein the computer instructions are used to enable the computer to execute a data processing method.
[0071] According to another aspect of the present disclosure, a computer program product is provided, including a computer program, wherein the computer program implements the data processing method when executed by a processor.
[0072] According to another aspect of the present disclosure, an electronic circuit is provided, including: a circuit configured to execute a data processing method, and the electronic circuit may be implemented as a chip.
[0073] like Figure 5 As shown, the electronic device 500 includes a computing unit 501, which can perform various appropriate actions and processes according to a computer program stored in a read-only memory (ROM) 502 or a computer program loaded from a storage unit 508 into a random access memory (RAM) 503. Various programs and data required for the operation of the electronic device 500 can also be stored in the RAM 503. The computing unit 501, the ROM 502, and the RAM 503 are connected to each other via a bus 504. An input / output (I / O) interface 505 is also connected to the bus 504.
[0074] Multiple components in the electronic device 500 are connected to the I / O interface 505, including: an input unit 506, an output unit 507, a storage unit 508, and a communication unit 509. The input unit 506 can be any type of device that can input information to the electronic device 500. The input unit 506 can receive input digital or character information, and generate key signal input related to user settings and / or function control of the electronic device, and can include but is not limited to a mouse, a keyboard, a touch screen, a trackpad, a trackball, a joystick, a microphone and / or a remote control. The output unit 507 can be any type of device that can present information, and can include but is not limited to a display, a speaker, a video / audio output terminal, a vibrator and / or a printer. The storage unit 508 can include but is not limited to a magnetic disk, an optical disk. The communication unit 509 allows the electronic device 500 to exchange information / data with other devices through a computer network such as the Internet and / or various telecommunication networks, and can include but is not limited to a modem, a network card, an infrared communication device, a wireless communication transceiver and / or a chipset, such as Bluetooth TM devices, 802.11 devices, WiFi devices, WiMax devices, cellular communication devices, and / or the like.
[0075] The computing unit 501 can be a variety of general and / or special processing components with processing and computing capabilities. Some examples of the computing unit 501 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various dedicated artificial intelligence (AI) computing chips, various computing units that run machine learning model algorithms, digital signal processors (DSPs), and any appropriate processors, controllers, microcontrollers, etc. The computing unit 501 performs the various methods and processes described above, such as the data processing method. For example, in some embodiments, the data processing method can be implemented as a computer software program that is tangibly contained in a machine-readable medium, such as the storage unit 508. In some embodiments, part or all of the computer program can be loaded and / or installed on the electronic device 500 via the ROM 502 and / or the communication unit 509. When the computer program is loaded into the RAM 503 and executed by the computing unit 501, one or more steps of the data processing method described above can be performed. Alternatively, in other embodiments, the computing unit 501 can be configured to perform the data processing method by any other appropriate means (e.g., by means of firmware).
[0076] Various embodiments of the systems and techniques described above can be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), system-on-chip systems (SOCs), complex programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments can include being implemented in one or more computer programs that are executable and / or interpreted on a programmable system that includes at least one programmable processor, which can be a special purpose or general purpose programmable processor that can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.
[0077] The program code for implementing the method of the present disclosure can be written in any combination of one or more programming languages. These program codes can be provided to a processor or controller of a general-purpose computer, a special-purpose computer, or other programmable data processing device so that when the program code is executed by the processor or controller, the functions / operations specified in the flow chart and / or block diagram are implemented. The program code can be executed entirely on the machine, partially on the machine, as a stand-alone software package, partially on the machine and partially on a remote machine, or entirely on a remote machine or server.
[0078] In the context of the present disclosure, a machine-readable medium can be a tangible medium that can contain or store a program for use by or in conjunction with an instruction execution system, device or equipment. A machine-readable medium can be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium can include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, device or equipment, or any suitable combination of the foregoing. A more specific example of a machine-readable storage medium can include an electrical connection based on one or more lines, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
[0079] To provide interaction with a user, the systems and techniques described herein can be implemented on a computer having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and pointing device (e.g., a mouse or trackball) through which the user can provide input to the computer. Other types of devices can also be used to provide interaction with the user; for example, the feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including acoustic input, voice input, or tactile input).
[0080] The systems and techniques described herein can be implemented in a computing system that includes back-end components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes front-end components (e.g., a user computer having a graphical user interface or a web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such back-end components, middleware components, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include a local area network (LAN), a wide area network (WAN), and the Internet.
[0081] A computer system may include a client and a server. The client and server are generally remote from each other and typically interact through a communication network. The client-server relationship arises through computer programs running on the respective computers and having a client-server relationship with each other. The server may be a cloud server, a server in a distributed system, or a server integrated with a blockchain.
[0082] It should be understood that the various forms of the processes shown above can be used to reorder, add, or delete steps. For example, the steps described in this disclosure can be performed in parallel, sequentially, or in a different order, as long as the desired results of the technical solutions disclosed in this disclosure can be achieved. This is not limited herein.
[0083] Although the embodiments or examples of the present disclosure have been described with reference to the accompanying drawings, it should be understood that the above-mentioned methods, systems and devices are merely exemplary embodiments or examples, and the scope of the present invention is not limited by these embodiments or examples, but is only limited by the claims after authorization and their equivalents. Various elements in the embodiments or examples may be omitted or replaced by their equivalents. In addition, the steps may be performed in an order different from that described in this disclosure. Further, the various elements in the embodiments or examples may be combined in various ways. It is important that as technology evolves, many of the elements described herein may be replaced by equivalent elements that appear after this disclosure.
Claims
1. A data processing method, comprising: Obtain a first matrix and a second matrix, wherein each element in the first matrix and the second matrix is stored in a first storage unit in a first data format, and wherein the first data format is a floating point type and has 1 sign bit and m mantissa bits, where m is an integer greater than 1; For each element in the first matrix and the second matrix, convert the element into a corresponding conversion element, wherein the conversion element is stored in a second storage unit in a second data format, and wherein the second data format has 1 sign bit, 1 exponent bit, and n mantissa bits, and n is an integer greater than m, and wherein the second data format and the first data format have the same number of bits, and the mantissa bits of each conversion element represent the value of the element corresponding to the conversion element, wherein, for each element in the first matrix and the second matrix, converting the element into the corresponding conversion element includes: Determine a first element with the largest absolute value in the first matrix, and record the maximum absolute value of the first element as a first maximum value Max1; Based on the first maximum value Max1, each element in the first matrix is mapped to [0, 2 n ] interval to convert the element into the corresponding conversion element, including: Based on the first maximum value, determining a first split point to split the interval [0, Max1] into two sub-intervals; and For each element in the first matrix, based on the subinterval in which the element is located, determine the exponent bit of the conversion element corresponding to the element, and map the element to [0, 2 n ], To determine the mantissa of the conversion element corresponding to the element; Determine a second element with the largest absolute value in the second matrix, and record the maximum absolute value of the second element as a second maximum value Max2; and Based on the second maximum value Max2, each element in the second matrix is mapped to [0, 2 n ] interval to convert the element into the corresponding conversion element; and Based on the conversion elements corresponding to each element in the first matrix and the second matrix, the product of the first matrix and the second matrix is calculated as a third matrix.
2. The method according to claim 1, wherein The determining of a split point based on the first maximum value Max1 to split the interval [0, Max1] into two sub-intervals includes: Based on the first maximum value Max1, the first segmentation point is determined as To split the interval [0, Max1] into two subintervals and 3. The method according to claim 2, wherein: For each element in the first matrix, based on the subinterval in which the element is located, the exponent bit of the conversion element corresponding to the element is determined, and the element is mapped to [0, 2 n ] to determine the mantissa of the conversion element corresponding to the element includes: For each element in the first matrix, Determine the absolute value a of the element; In response to the element being in the subinterval In the conversion element, determine that the exponent bit of the element corresponding to the element is 0, and map the element to [0, 2 n ] to determine the mantissa of the conversion element corresponding to the element or In response to the element being in the subinterval In the conversion element, the exponent bit of the element corresponding to the element is determined to be 1, and the element is mapped to [0, 2 n ] to determine the mantissa of the element to be converted to the corresponding conversion element 4. The method according to claim 1, wherein The determining of a split point based on the first maximum value Max1 to split the interval [0, Max1] into two sub-intervals includes: Based on the first maximum value Max1, the first segmentation point is determined as To split the interval [0, Max1] into two subintervals and Here, i is a positive integer less than n.
5. The method according to claim 4, wherein For each element in the first matrix, based on the subinterval in which the element is located, the exponent bit of the conversion element corresponding to the element is determined, and the element is mapped to [0, 2 n ] to determine the mantissa of the conversion element corresponding to the element includes: For each element in the first matrix, Determine the absolute value a of the element; In response to the absolute value a being in the subinterval In the conversion element, determine that the exponent bit of the element corresponding to the element is 0, and map the element to [0, 2 n ] to determine the mantissa of the conversion element corresponding to the element or In response to the absolute value a being in the subinterval In the conversion element, the exponent bit of the element corresponding to the element is determined to be 1, and the element is mapped to [0, 2 n ] to determine the mantissa of the element to be converted to the corresponding conversion element 6. The method according to any one of claims 1 to 5, further comprising: For each element in the first matrix and each element in the second matrix, determine a restoration factor corresponding to the element, where the restoration factor satisfies the following conditions: The conversion element corresponding to the element multiplied by the restoration factor corresponding to the element is equal to the absolute value of the element.
7. The method according to claim 6, wherein: The absolute value of each element in the third matrix is equal to the mantissa of the conversion element of the third element corresponding to the element in the first matrix multiplied by the mantissa of the conversion element of the fourth element corresponding to the element in the second matrix multiplied by the restoration factor corresponding to the third element multiplied by the restoration factor corresponding to the fourth element, and the sign bit of the element in the third matrix is the exclusive OR value of the sign bit of the third element and the sign bit of the fourth element.
8. A data processing device comprising: an acquisition module configured to acquire a first matrix and a second matrix, wherein each element in the first matrix and the second matrix is stored in a first storage unit in a first data format, and wherein the first data format is a floating point type and has 1 sign bit and m mantissa bits, where m is an integer greater than 1; A conversion module is configured to convert each element in the first matrix and the second matrix into a corresponding conversion element, wherein the conversion element is stored in a second storage unit in a second data format, and wherein the second data format has 1 sign bit, 1 exponent bit and n mantissa bits, n is an integer greater than m, and wherein the second data format and the first data format have the same number of bits, and the mantissa bits of each conversion element represent the value of the element corresponding to the conversion element, wherein the conversion module includes: a first determining unit configured to determine a first element with a largest absolute value in the first matrix, and record the maximum absolute value of the first element as a first maximum value Max1; The first mapping unit is configured to map each element in the first matrix to [0, 2 n ] interval to convert the element into a corresponding conversion element, wherein the first mapping unit includes: a first determining subunit configured to determine, based on the first maximum value, a first dividing point to divide the interval [0, Max1] into two sub-intervals; and The second determining subunit is configured to determine, for each element in the first matrix, the exponent bit of the conversion element corresponding to the element based on the subinterval in which the element is located, and map the element to [0, 2 n ] to determine the mantissa of the conversion element corresponding to the element; a second determining unit configured to determine a second element with the largest absolute value in the second matrix, and record the maximum absolute value of the second element as a second maximum value Max2; The second mapping unit is configured to map each element in the second matrix to [0, 2 n ] interval to convert the element into the corresponding conversion element; and The calculation module is configured to calculate the product of the first matrix and the second matrix as a third matrix based on the conversion elements corresponding to each element in the first matrix and the second matrix.
9. The device according to claim 8, wherein The first determining subunit is further configured to: Based on the first maximum value Max1, the first segmentation point is determined as To split the interval [0, Max1] into two subintervals and 10. The device according to claim 9, wherein The second determining subunit includes: A third determining subunit is configured to determine, for each element in the first matrix, an absolute value a of the element; The fourth determining subunit is configured to respond to the element being located in the subinterval In the conversion element, determine that the exponent bit of the element corresponding to the element is 0, and map the element to [0, 2 n ] to determine the mantissa of the conversion element corresponding to the element or The fifth determining subunit is configured to respond to the element being located in the subinterval In the conversion element, the exponent bit of the element corresponding to the element is determined to be 1, and the element is mapped to [0, 2 n ] to determine the mantissa of the element to be converted to the corresponding conversion element 11. The device according to claim 8, wherein The first determining subunit is further configured to: Based on the first maximum value Max1, the first segmentation point is determined as To split the interval [0, Max1] into two subintervals and Here, i is a positive integer less than n.
12. The device according to claim 11, wherein The second determining subunit includes: a sixth determining subunit, configured to determine, for each element in the first matrix, an absolute value a of the element; The seventh determining subunit is configured to respond to the absolute value a being within the subinterval In the conversion element, determine that the exponent bit of the element corresponding to the element is 0, and map the element to [0, 2 n ] to determine the mantissa of the conversion element corresponding to the element or An eighth determining subunit is configured to respond to the absolute value a being within the subinterval In the conversion element, the exponent bit of the element corresponding to the element is determined to be 1, and the element is mapped to [0, 2 n ] to determine the mantissa of the element to be converted to the corresponding conversion element 13. The apparatus according to any one of claims 8 to 12, further comprising: The determination module is configured to determine, for each element in the first matrix and each element in the second matrix, a restoration factor corresponding to the element, where the restoration factor satisfies the following formula: The conversion element corresponding to the element multiplied by the restoration factor corresponding to the element is equal to the absolute value of the element.
14. The device according to claim 13, wherein The absolute value of each element in the third matrix is equal to the mantissa of the conversion element of the third element corresponding to the element in the first matrix multiplied by the mantissa of the conversion element of the fourth element corresponding to the element in the second matrix multiplied by the restoration factor corresponding to the third element multiplied by the restoration factor corresponding to the fourth element, and the sign bit of the element in the third matrix is the exclusive OR value of the sign bit of the third element and the sign bit of the fourth element.
15. An electronic device comprising: at least one processor; as well as a memory communicatively coupled to the at least one processor; in The memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the method according to any one of claims 1 to 7.
16. A non-transitory computer-readable storage medium storing computer instructions, wherein: The computer instructions are used to cause the computer to execute the method according to any one of claims 1 to 7.
17. A computer program product comprising a computer program, wherein When the computer program is executed by a processor, the method according to any one of claims 1 to 7 is implemented.
18. An electronic circuit comprising: Circuitry configured to perform the method according to any one of claims 1-7.
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