Embedded slope compensation circuit and switching converter
By designing an embedded ramp compensation circuit, the problem of ramp compensation circuits affecting the static operating point in existing technologies is solved, thereby simplifying system design and reducing complexity, and making it suitable for switching power converters.
Patent Information
- Application Number
- CN202210994433.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-08-18
- Publication Date
- 2026-01-02
- Estimated Expiration
- 2042-08-18
AI Technical Summary
Existing slope compensation circuits affect the quiescent operating point in switching power converters, increasing the difficulty and complexity of system design, and requiring additional EA modules to form a closed-loop system.
An embedded slope compensation circuit is adopted, including a slope generation module, a slope error sampling module, a slope compensation module, and a slope error correction module. By sampling and filtering the maximum value of the slope signal, and using the slope error signal to correct the voltage input signal, the static operating point of the voltage output signal relative to the input signal remains unchanged.
It enables slope compensation without changing the system's static operating point, simplifying system design and reducing design difficulty and complexity. It is applicable to both closed-loop and open-loop systems.
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Figure CN115242087B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the field of power technology, and in particular to an embedded ramp compensation circuit and a switching converter. BACKGROUND
[0002] Switching power converter can realize constant voltage output or constant current output in a certain load range, and has stable structure, high efficiency and various control modes. With the rapid development of consumer electronics market, switching power converter has been widely applied.
[0003] In order to enhance the stability of switching power converter, in some control schemes of switching power converter, ramp compensation is often considered to be introduced to avoid sub-harmonic oscillation of the system.
[0004] The commonly used ramp compensation circuit changes the original static working point of the converter, and the influence of the ramp compensation circuit on the static working point of the converter needs to be considered in application. For a system, in order to offset the influence of the traditional ramp compensation circuit on the static working point, an EA (error amplifier) module is usually set in the system to form a closed loop system, which greatly limits the application range of the ramp compensation circuit. In addition, when designing the EA module, the system error introduced by the ramp compensation circuit and the influence of the system error on the dynamic range of the EA module need to be fully considered, and at the same time, the stability of the system loop, the loop bandwidth and the dynamic response need to be ensured to meet the design requirements, which improves the design difficulty of the system. SUMMARY
[0005] The present application provides an embedded ramp compensation circuit which does not affect the static working point of the system, and thus does not significantly increase the design difficulty and complexity of the system, and is convenient to use. The present application further provides a switching converter comprising the embedded ramp compensation circuit.
[0006] In one aspect, the present application provides an embedded ramp compensation circuit, comprising:
[0007] a ramp generation module, configured to receive a control signal and generate a ramp signal according to the control signal;
[0008] a ramp error sampling module, connected to the ramp generation module, configured to receive the control signal and the ramp signal, and sample and hold the maximum value of the ramp signal according to the control signal and filter the maximum value to generate a ramp error signal;
[0009] a ramp compensation module, connected to the ramp generation module, configured to receive the ramp signal and perform ramp compensation on a voltage input signal using the ramp signal to form a voltage output signal; and
[0010] a slope error correction module, connected to the slope error sampling module and the slope compensation module, for correcting the slope compensation by using the slope error signal, so that the voltage output signal has an unchanged static working point relative to the voltage input signal.
[0011] Optionally, the slope generation module comprises a sawtooth wave generator.
[0012] Optionally, the slope error sampling module comprises:
[0013] a first switch element having a first end connected to the slope generation module for receiving the slope signal, a control end for receiving the control signal, and a second end;
[0014] a sample-and-hold capacitor connected between the second end of the first switch element and ground;
[0015] a second switch element having a first end connected to the second end of the first switch element, and a control end connected to the control end of the first switch element, wherein the first switch element and the second switch element are respectively used for being complementarily turned on according to the control signal; and
[0016] a slope error filter capacitor connected between the second end of the second switch element and ground.
[0017] Optionally, when the control signal is at a high level, the first switch element is turned on, the second switch element is turned off, and the sample-and-hold capacitor samples the slope signal; at the moment when the control signal jumps from the high level to a low level, the voltage of the sample-and-hold capacitor keeps the maximum value of the slope signal; when the control signal is at the low level, the first switch element is turned off and the second switch element is turned on, and the slope error filter capacitor filters the maximum value of the slope signal to generate a slope error signal.
[0018] Optionally, the slope compensation module performs the slope compensation by performing a difference calculation on the voltage input signal and the slope signal; when correcting the slope compensation, the slope error correction module makes the signal of the difference calculation superimposed with the slope error signal to form the voltage output signal.
[0019] Optionally, the slope compensation module comprises:
[0020] a first operational amplifier comprising a non-inverting input end, an inverting input end, and an output end; the non-inverting input end of the first operational amplifier is connected to the slope generation module for receiving the slope signal, and the inverting input end of the first operational amplifier is connected to the output end of the first operational amplifier;
[0021] a second operational amplifier comprising a non-inverting input terminal, an inverting input terminal and an output terminal; the non-inverting input terminal of the second operational amplifier is configured to receive the voltage input signal, and the inverting input terminal of the second operational amplifier is connected to the output terminal; and
[0022] a first resistor, a second resistor, a third resistor and a fourth resistor connected in series between the output terminal of the first operational amplifier and the output terminal of the second operational amplifier, and a voltage signal at a connection node of the third resistor and the fourth resistor is the voltage output signal.
[0023] Optionally, the slope error correction module comprises:
[0024] a third operational amplifier comprising a non-inverting input terminal, an inverting input terminal and an output terminal; the non-inverting input terminal of the third operational amplifier is connected to the slope error sampling module and configured to receive the slope error signal, the inverting input terminal of the third operational amplifier is connected to the connection node of the first resistor and the second resistor, and the output terminal of the third operational amplifier is connected to the connection node of the second resistor and the third resistor.
[0025] Optionally, the slope compensation module performs the slope compensation by performing superposition calculation on the voltage input signal and the slope signal; when the slope compensation is corrected, the slope error correction module subtracts the slope error signal from the signal of the superposition calculation to form the voltage output signal.
[0026] Optionally, the slope compensation module comprises:
[0027] a fourth operational amplifier comprising a non-inverting input terminal, an inverting input terminal and an output terminal; the non-inverting input terminal of the fourth operational amplifier is connected to the slope generation module and configured to receive the slope signal, the inverting input terminal of the fourth operational amplifier is connected to the output terminal of the fourth operational amplifier through a fifth resistor; and
[0028] a sixth resistor and a seventh resistor, a first end of the seventh resistor is configured to receive the voltage input signal, a second end of the seventh resistor is connected to a first end of the sixth resistor, a second end of the sixth resistor is connected to the output terminal of the fourth operational amplifier, and a voltage signal at a connection node of the sixth resistor and the seventh resistor is the voltage output signal.
[0029] Optionally, the slope error correction module comprises:
[0030] a fifth operational amplifier comprising a non-inverting input end, an inverting input end and an output end, the non-inverting input end of the fifth operational amplifier being connected to the slope error sampling module for receiving the slope error signal, the inverting input end of the fifth operational amplifier being connected to the output end of the fifth operational amplifier; and
[0031] an eighth resistor connected between the output end of the fifth operational amplifier and the inverting input end of the fourth operational amplifier.
[0032] In one aspect, the present application provides a switching converter, which comprises the above-mentioned embedded slope compensation circuit.
[0033] The embedded slope compensation circuit provided by the present application has a slope error sampling module, which can sample and hold and filter the maximum value of the slope signal to generate a slope error signal, and has a slope error correction module, which is used for correcting the slope compensation for the voltage input signal by using the slope error signal, so that the static operating point of the voltage output signal relative to the voltage input signal is unchanged. The embedded slope compensation circuit can be directly embedded in the circuit system for use, and can be used in both closed-loop systems and open-loop systems, without affecting the static operating point in the system, without significantly increasing the design difficulty and complexity of the system, and can simplify the design and facilitate use.
[0034] The switching converter provided by the present application comprises the above-mentioned embedded slope compensation circuit, and the reference voltage signal or the detection voltage signal in the switching converter can be compensated by using the embedded slope compensation circuit. Since the slope compensation process does not affect the static operating point in the switching converter, the design difficulty and complexity of the circuit system of the switching converter will not be significantly increased. BRIEF DESCRIPTION OF DRAWINGS
[0035] Figure 1 is a structural schematic diagram of a prior art slope compensation circuit.
[0036] Figure 2 is a signal waveform diagram when the slope compensation circuit shown in Figure 1 is used for slope compensation.
[0037] Figure 3 is a structural schematic diagram of another prior art slope compensation circuit.
[0038] Figure 4 is a signal waveform diagram when the slope compensation circuit shown in Figure 3 is used for slope compensation.
[0039] Figure 5 is a structural schematic diagram of an embedded slope compensation circuit according to an embodiment of the present application.
[0040] Figure 6 is a structure diagram of an embedded ramp compensation circuit according to another embodiment of the present application.
[0041] Figure 7 is Figure 5 a circuit diagram of the embedded ramp compensation circuit shown in FIG. 4.
[0042] Figure 8 is Figure 7 a signal waveform diagram of the embedded ramp compensation circuit shown in FIG. 4.
[0043] Figure 9 is Figure 6 a circuit diagram of the embedded ramp compensation circuit shown in FIG. 5.
[0044] Figure 10 is Figure 9 a signal waveform diagram of the embedded ramp compensation circuit shown in FIG. 5.
[0045] BRIEF DESCRIPTION OF DRAWINGS
[0046] 10 - ramp signal generating part; 11 - ramp compensation part; 110 - ramp generating module; 120 - ramp error sampling module; 130 - ramp compensation module; 140 - ramp error correction module; 20, 43 - input terminal; 21, 32 - inverter; 22 - ramp current source; 23 - input terminal of the ramp current source; 24 - PMOS transistor; 25 - NMOS transistor; 26 - ground; 28 - ramp capacitor; 29 - sample-and-hold capacitor; 30 - ramp error filter capacitor; 31 - first switching element; 33 - second switching element; 34 - first operational amplifier; 38 - second operational amplifier; 35 - third operational amplifier; 44 - output terminal of the ramp compensation module; 37 - fourth operational amplifier; 36 - fifth operational amplifier. DETAILED DESCRIPTION
[0047] The embedded ramp compensation circuit and the switching converter according to the present application will be further described in detail below in combination with the drawings and specific embodiments. The advantages and features of the present application will be more apparent according to the following description. It should be noted that the drawings are all in a very simplified form and all use non-precise proportions, only for the purpose of conveniently and clearly assisting the description of the embodiments of the present application.
[0048] In order to more clearly illustrate the technical solutions of the embodiments of the present application, two ramp compensation methods which are easy to affect the static working point of the system are introduced below.
[0049] Referring to Figure 1 and Figure 2An existing slope compensation circuit includes a slope signal generation section 10 and a slope compensation section 11; wherein, the slope signal generation section 10 receives a control signal t_on and periodically generates a slope signal Vslope; the voltage signal to be slope compensated is, for example, the reference voltage signal in the system, denoted as the reference voltage input signal Vref_cs_in; the slope compensation section 11 receives the slope signal Vslope and the reference voltage input signal Vref_cs_in, performs differential calculation on the two to achieve slope compensation, and forms a reference voltage output signal Vref_cs_out. This slope compensation method satisfies the relation (1):
[0050] Vref_cs_out=Vref_cs_in-Vslope (1)
[0051] like Figure 2 As shown, during the period when the control signal t_on is high (t_on=1), the reference voltage output signal Vref_cs_out slopes downward relative to the reference voltage input signal Vref_cs_in. At the end of each slope compensation (i.e., the falling edge of Ton), the values of the reference voltage output signal Vref_cs_out and the reference voltage input signal Vref_cs_in are different, resulting in an error between them equal to the maximum value (i.e., peak value) of the slope signal Vslope in that period. This error causes the static operating point of the system to be changed.
[0052] Reference Figure 3 and Figure 4 Another existing slope compensation circuit includes a slope signal generation section 10 and a slope compensation section 11; wherein, the slope signal generation section 10 receives a control signal t_on and periodically generates a slope signal Vslope; the voltage signal to be slope compensated is, for example, the detection voltage signal in the system, denoted as the detection voltage input signal Vcs_in; the slope compensation section 11 receives the slope signal Vslope and the detection voltage input signal Vcs_in, and superimposes the two to achieve slope compensation, forming the detection voltage output signal Vcs_out. This slope compensation method satisfies the relation (2):
[0053] Vcs_out=Vcs_in+Vslope (2)
[0054] like Figure 4As shown, during the period t_on=1, the slope of the detected voltage output signal Vcs_out relative to the detected voltage input signal Vcs_in increases. At the end of each slope compensation (i.e., the falling edge of Ton), the values of the detected voltage output signal Vcs_out and the detected voltage input signal Vcs_in are different, resulting in an error between them equal to the maximum value (i.e., peak value) of the slope signal Vslope in that period. This error will cause the static operating point of the system to be changed.
[0055] In the case of Figure 1 and Figure 3 When the slope compensation circuit shown is applied to a specific circuit system (such as a switching converter) for slope compensation, in order to counteract its influence on the system's static operating point, it is often necessary to set up an EA (error amplifier) module with a certain amplification factor β in the system to form a closed-loop system. This will have a significant impact on the applicability of the slope compensation circuit. Moreover, the design of the EA module needs to consider the system error introduced by the slope compensation circuit and the impact of this system error on the dynamic range of the EA module. It also needs to ensure the impact on the stability of the system loop, the loop bandwidth, and the dynamic response, which increases the design difficulty and complexity of the system.
[0056] The embedded slope compensation circuit of this invention embodiment is compared to Figures 1 to 4 The slope compensation circuit shown can be directly embedded into the circuit system to be used, without changing the original static operating point of the circuit system. The working principle of the embedded slope compensation circuit in this embodiment of the invention is to correct the slope error generated during the slope compensation process, so that the voltage input signal and the static operating point of the circuit system remain unchanged before and after slope compensation. Here, "static operating point unchanged" means that at the end of the effective working time of slope compensation, the voltage output signal after slope compensation has the same value as the voltage input signal, and has not changed. Detailed explanation follows.
[0057] Figure 5 and Figure 6 Both are schematic diagrams of the embedded slope compensation circuit according to embodiments of the present invention. The main difference between them lies in the object of slope compensation and the slope compensation method. See also Figure 5 and Figure 6In the embodiment of the present application, the embedded slope compensation circuit comprises a slope generation module 110, a slope error sampling module 120, a slope compensation module 130 and a slope error correction module 140. The slope generation module 110 is configured to receive a control signal t_on and generate a slope signal Vslope according to the control signal t_on, wherein the slope signal Vslope can be a sawtooth wave. The slope error sampling module 120 is connected to the slope generation module 110 and configured to receive the control signal t_on, sample and hold the maximum value of the slope signal Vslope according to the control signal t_on and the slope signal Vslope, and filter the maximum value of the slope signal Vslope to obtain a slope error signal Vslope_err. The slope compensation module 130 is connected to the slope generation module 110 and configured to receive the slope signal Vslope and perform slope compensation on a voltage input signal using the slope signal Vslope to form a voltage output signal. The slope error correction module 140 is connected to the slope error sampling module 120 and the slope compensation module 130 and configured to correct the slope compensation using the slope error signal Vslope_err, so that the voltage output signal has an unchanged static operating point relative to the voltage input signal.
[0058] Specifically, referring to Figure 5 In the embedded slope compensation circuit of the embodiment of the present application, the voltage input signal is an example of a reference voltage input signal Vref_cs_in in a circuit system (such as a switching converter), and correspondingly, the voltage output signal is a reference voltage output signal Vref_cs_out. The slope compensation module 130 performs slope compensation by differentially calculating the reference voltage input signal Vref_cs_in and the slope signal Vslope. When correcting the slope compensation, the slope error correction module 140 superimposes the signal of the differential calculation and the slope error signal Vslope_err to form the reference voltage output signal Vref_cs_out. The slope compensation method of the embedded slope compensation circuit satisfies the relationship (3):
[0059] Vref_cs_out = Vref_cs_in - Vslope + Vslope_err (3)
[0060] Figure 7 is Figure 5 the circuit schematic diagram of the embedded slope compensation circuit. Referring to Figure 7In the embedded slope compensation circuit, the slope generation module 110 includes a sawtooth wave generator. The sawtooth wave generator receives a periodically changing control signal t_on through the input terminal 20. As an example, the sawtooth wave generator includes an inverter 21, a slope current source 22, a PMOS transistor 24, an NMOS transistor 25, and a slope capacitor 28. The input terminal 23 of the slope current source 22 is connected to the power supply VDD, which can be an internal power supply or an external power supply. The output terminal of the slope current source 22 is connected to the source terminal of the PMOS transistor 24. The drain terminal of the PMOS transistor 24 is connected to the drain terminal of the NMOS transistor 25. The source terminal of the NMOS transistor 25 is grounded 26. The slope capacitor 28 is connected between the drain terminal of the PMOS transistor 24 and ground. The input terminal of the inverter 21 is connected to the input terminal 20 of the sawtooth wave generator. The output terminal of the inverter 21 is connected to the gate terminal of the PMOS transistor 24 and the gate terminal of the NMOS transistor 25, respectively. During the period when the control signal t_on is high (t_on=1), PMOS transistor 24 is turned on and NMOS transistor 25 is turned off, and ramp current source 22 charges ramp capacitor 28 through PMOS transistor 24; during the period when the control signal t_on is low (t_on=0), PMOS transistor 24 is turned off and NMOS transistor 25 is turned on, and ramp capacitor 28 discharges through NMOS transistor 25 to generate a ramp signal Vslope, which is the ramp signal Vslope output by the sawtooth wave generator.
[0061] Continue to refer to Figure 7 The ramp error sampling module 120 includes a first switching element 31, a sample-and-hold capacitor 29, a second switching element 33, and a ramp error filtering capacitor 30. Specifically, the first terminal of the first switching element 31 is connected to the output terminal of the ramp generation module 110 to receive the ramp signal Vslope; the control terminal of the first switching element 31 receives the control signal t_on; the sample-and-hold capacitor 29 is connected between the second terminal of the first switching element 31 and ground; the first terminal of the second switching element 33 is connected to the second terminal of the first switching element 31, and the control terminal of the second switching element 33 is connected to the control terminal of the first switching element 31. The first switching element 31 and the second switching element 33 are complementaryly turned on according to the control signal t_on, for example, one switching element is turned on while the other switching element is turned off. In this embodiment, both the first switching element 31 and the second switching element 33 are NMOS transistors. The control terminal of the first switching element 31 receives a control signal t_on. The control terminal of the first switching element 31 is inverted by an inverter 32 and then connected to the control terminal of the second switching element 33. That is, when the control terminal of the first switching element 31 receives a control signal, the control terminal of the second switching element 33 receives the inverted signal of that control signal. The ramp error filter capacitor 30 is connected between the second terminal of the second switching element 33 and ground.
[0062] The working process of the slope error sampling module 120 is as follows: during the period when the control signal t_on is high (t_on = 1), the slope generation module 110 outputs the slope signal Vslope, the first switching element 31 is turned on, the second switching element 33 is turned off, and the sampling and holding capacitor 29 samples the slope signal Vslope, that is, the sampling and holding capacitor 29 is charged with the slope signal Vslope; at the falling edge (t_on jumps from high to low) of t_on, the sampling and holding capacitor 29 is charged to the maximum value of the slope signal Vslope, that is, the voltage of the sampling and holding capacitor 29 is kept as the maximum value of the slope signal Vslope; during the period when the control signal t_on is low (t_on = 0), the first switching element 31 is turned off and the second switching element 33 is turned on, the sampling and holding capacitor 29 is electrically connected with the slope error filter capacitor 30, and the slope error filter capacitor 30 filters the voltage of the sampling and holding capacitor 29 to generate the slope error signal Vslope_err, wherein the capacitance of the slope error filter capacitor 30 is set to be much larger than that of the sampling and holding capacitor 29, that is, C30 >> C29, which is conducive to realizing the filtering function. The positive signal of the slope error filter capacitor C30 is the slope error signal Vslope_err output by the slope error sampling module 120, and the ripple of the slope error signal Vslope_err relative to the slope signal Vslope can be ignored. In a short time, the slope error signal Vslope_err can be a straight line (as shown in Figure 8 In a long time, the slope error signal Vslope_err can be the average value of the maximum value of the slope signal Vslope.
[0063] Continuing to refer to Figure 7In this embodiment, the slope compensation module 130 comprises a first operational amplifier 34, a second operational amplifier 38, a first resistor R1, a second resistor R2, a third resistor R3 and a fourth resistor R4. Specifically, the non-inverting input terminal of the first operational amplifier 34 is connected to the output terminal of the slope generation module 110 to receive the slope signal Vslope, and the inverting input terminal of the first operational amplifier 34 is connected to the output terminal; the non-inverting input terminal of the second operational amplifier 38 is connected to the input terminal 43 to receive the voltage input signal (for example, the reference voltage input signal Vref cs in) to be compensated, and the inverting input terminal of the second operational amplifier 38 is connected to the output terminal; the first resistor R1, the second resistor R2, the third resistor R3 and the fourth resistor R4 are connected in series between the output terminal of the first operational amplifier 34 and the output terminal of the second operational amplifier 38. The slope error correction module 140 comprises a third operational amplifier 35, the non-inverting input terminal of the third operational amplifier 35 is connected to the output terminal of the slope error sampling module 120 to receive the slope error signal Vslope err, the inverting input terminal of the third operational amplifier 35 is connected to the connection node O of the first resistor R1 and the second resistor R2, and the output terminal is connected to the connection node P of the second resistor R2 and the third resistor R3. The voltage signal at the connection node Q of the third resistor R3 and the fourth resistor R4 is the signal output by the slope compensation module 130 after slope compensation and correction of the slope compensation, i.e. the voltage output signal, for example, the reference voltage output signal Vref cs out, which is output by the output terminal 44 of the slope compensation module 130.
[0064] Figure 8 is Figure 7 The signal waveform diagram of the embedded slope compensation circuit is shown in FIG. 4. Referring to FIG. 4, Figure 7 and Figure 8When the control signal T_on is low (t_on = 0), the NMOS transistor 25 is on, the PMOS transistor 24 is off, the ramp signal Vslope generated by the ramp generation module 110 is 0, the system is in steady state, the voltage at the output of the first operational amplifier 34 is 0, the voltage at the connection node P of the second resistor R2 and the third resistor R3 is the voltage at the output of the third operational amplifier 35, i.e. ((R2 / R1)+1)*Vslope_err, the current flowing through the first resistor R1 and the second resistor R2 is from the output of the third operational amplifier 35 to the output of the first operational amplifier 34, and the reference voltage output signal Vref_cs_out is equal to the reference voltage input signal Vref_cs_in plus the ramp error signal Vslope_err. When the control signal T_on is high (t_on = 1), the NMOS transistor 25 is off, the PMOS transistor 24 is on, the ramp capacitor 28 is charged by the ramp current source 22 to form a triangular waveform ramp signal Vslope, the ramp signal Vslope is operated through the subsequent operational amplifier and resistors, the voltage at the connection node Q of the third resistor R3 and the fourth resistor R4 is pulled low, and the reference voltage output signal Vref_cs_out is equal to the reference voltage input signal Vref_cs_in plus the ramp error signal Vslope_err minus the ramp signal Vslope, as shown in the relationship (3). At the moment of the falling edge of t_on (i.e. the position of the static working point), Vslope = Vslope_err, the current flowing through the first resistor R1 and the second resistor R2 is 0, and the reference voltage output signal Vref_cs_out is equal to the value of the reference voltage input signal Vref_cs_in, i.e. the static working point is not affected, as shown in the waveform of Figure 8 .
[0065] In this embodiment, the first operational amplifier 34 has a buffer function to output the voltage of the ramp signal Vslope, reduce the output impedance, and increase the driving capability. The third operational amplifier 35, the first resistor R1, and the second resistor R2 constitute an adder. The second operational amplifier 38 has a buffer function to output the voltage of the reference voltage input signal Vref_cs_in, reduce the output impedance, and increase the driving capability. The third resistor R3 and the fourth resistor R4 are used for operation. When setting the resistance values of R1, R2, R3, and R4, the driving current, the dynamic range of the operational amplifier, and the slope and slope compensation percentage of the ramp signal Vslope can be specifically determined. In an embodiment, the resistance values of R1, R2, R3, and R4 are equal.
[0066] Reference Figure 6In another embodiment of the embedded slope compensation circuit, the voltage input signal is a detection voltage input signal Vcs_in in a circuit system (e.g., a switching converter), such as a detection voltage formed by a current flowing through a detection resistor. Correspondingly, the voltage output signal after the slope compensation and the correction of the slope compensation is a detection voltage output signal Vcs_out. In this embodiment, the slope compensation module 130 performs the slope compensation by superimposing the detection voltage input signal Vcs_in and the slope signal Vslope; when correcting the slope compensation, the slope error correction module 140 subtracts the slope error signal Vslope_err from the superimposed signal to form the detection voltage output signal Vcs_out. The slope compensation manner of the embedded slope compensation circuit in this embodiment satisfies the relationship (4):
[0067] Vcs_out = Vcs_in + Vslope - Vslope_err (4)
[0068] Figure 9 is Figure 6 the circuit schematic diagram of the embedded slope compensation circuit. Referring to Figure 9 , the slope generation module 110 and the slope error sampling module 120 in this embodiment have the same circuit structure as those in the embodiment shown in Figure 7 . Referring to Figure 9 , in this embodiment, the slope compensation module 130 includes a fourth operational amplifier 37, a fifth resistor R5, a sixth resistor R6, and a seventh resistor R7. Specifically, the non-inverting input terminal of the fourth operational amplifier 37 is connected to the output terminal of the slope generation module 110 to receive the slope signal Vslope, and the inverting input terminal is connected to the output terminal of the fourth operational amplifier 37 through the fifth resistor R5; the sixth resistor R6 and the seventh resistor R7 are connected in series between the output terminal of the fourth operational amplifier 37 and the voltage input signal Vcs_in to be slope compensated. Specifically, the first end of the seventh resistor R7 receives the voltage input signal Vcs_in, the second end of the seventh resistor R7 is connected to the first end of the sixth resistor R6, the second end of the sixth resistor R6 is connected to the output terminal of the fourth operational amplifier 37, and the voltage signal at the connection node M of the sixth resistor R6 and the seventh resistor R7 is the detection voltage output signal Vcs_out after the slope compensation and the correction of the slope compensation. The slope error correction module 140 includes a fifth operational amplifier 36 and an eighth resistor R8, the non-inverting input terminal of the fifth operational amplifier 36 is connected to the output terminal of the slope error sampling module 120, and the inverting input terminal of the fifth operational amplifier 36 is connected to the output terminal. The eighth resistor R8 is connected to the output terminal of the fifth operational amplifier 36 and the inverting input terminal of the fourth operational amplifier 37.
[0069] Figure 10 isFigure 9 The signal waveform diagram of the embedded slope compensation circuit is shown. Referring to Figure 9 and Figure 10 When the control signal T_on is low (t_on=0), the slope signal generated by the slope generation module 110 is 0. When the control signal T_on is high (t_on=1) and Vslope<Vslope_err, the current flowing through the eighth resistor R8 and the fifth resistor R5 is from top to bottom, and the detection voltage output signal Vcs_out is equal to the detection voltage input signal Vcs_in superimposed with the slope signal Vslope and then subtracted by the slope error signal Vslope_err, as shown in the relationship (4). At the moment of the falling edge of t_on (i.e. the position of the static operating point), when Vslope=Vslope_err, there is no current on R5, R6, R7 and R8, and the value of the detection voltage output signal Vcs_out is equal to that of the detection voltage input signal Vcs_in, i.e. the static operating point is not affected. In this embodiment, when the slope compensation is performed on the switching converter, the slope compensation can be performed when the duty cycle of the switching converter is greater than a set value (such as 50%). That is, if the duty cycle of the switching converter is 70% when it is working, the slope compensation can be started only when the duty cycle is 50%. Figure 10 The time period of t_on=1 shown represents the effective working time of the slope compensation. Before t_on=1, the duty cycle of the switching converter has reached the set value for a period of time, so the voltage input signal Vcs_in also has a slope greater than 0 before t_on=1. The present application is not limited to this, and in other embodiments, when the slope compensation is performed on the switching converter, the slope compensation can also be performed during the entire duty cycle of the switching converter.
[0070] The embedded slope compensation circuit of the embodiment of the present application can sample and hold the maximum value of the slope signal Vslope in each period, filter to obtain the slope error signal Vslope_err, and use the slope error signal Vslope_err to correct the slope compensation for the voltage input signal, so that the static operating point of the voltage output signal relative to the voltage input signal does not change. The embedded slope compensation circuit can be directly embedded in the circuit system for use, and can be used in both closed-loop systems and open-loop systems, has little effect on the system, does not affect the static operating point in the system, does not significantly increase the design difficulty and complexity of the system, can simplify the design, and is convenient to use.
[0071] The embodiments of the present application also include a switching converter comprising the embedded slope compensation circuit described in the above embodiments. The switching converter converts a voltage input signal (Vin) from a direct current (DC) or an alternating current (AC) to a voltage output signal (Vout) from a direct current (DC). The switching converter can utilize the embedded slope compensation circuit to suppress sub-harmonic oscillation when the duty cycle is greater than 50% and the switching converter is operating in CCM (continuous current mode), and improve the noise immunity. As an example, the switching converter can comprise a constant voltage loop that tends to equalize a detected voltage based on feedback of the output voltage of the switching converter and a reference voltage, and the embedded slope compensation circuit can be used to slope compensate the detected voltage or the reference voltage. Since the slope compensation process does not affect the static operating point in the system, it does not significantly increase the design difficulty and complexity of the circuit system of the switching converter, and can simplify the system design, and is beneficial to improve the overall performance of the switching converter.
[0072] It should be noted that the various embodiments described in the specification are presented in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same and similar parts between the embodiments can be referred to each other.
[0073] The above description is only a description of the preferred embodiments of the present application, and is not any limitation on the scope of the present application. Any person skilled in the art can make possible changes and modifications to the technical solutions of the present application without departing from the spirit and scope of the present application. Therefore, any simple modification, equivalent change and modification made according to the technical essence of the present application to the above embodiments, which does not deviate from the technical solutions of the present application, shall fall within the protection scope of the present application.
Claims
1. An embedded ramp compensation circuit, characterized by, The application relates to a slope compensation circuit, comprising: a slope generation module for receiving a control signal and generating a slope signal according to the control signal; a slope error sampling module connected to the slope generation module for receiving the control signal and the slope signal and sampling and filtering a maximum value of the slope signal according to the control signal to generate a slope error signal; a slope compensation module connected to the slope generation module for receiving the slope signal and performing slope compensation on a voltage input signal by using the slope signal to form a voltage output signal; and a slope error correction module connected to the slope error sampling module and the slope compensation module for correcting the slope compensation by using the slope error signal so that the voltage output signal is equal to the voltage input signal at a falling edge of the slope signal, thereby keeping a static working point unchanged. The slope generation module comprises a sawtooth wave generator.
2. The embedded slope compensation circuit of claim 1, wherein, The slope error sampling module comprises:
3. The embedded slope compensation circuit of claim 1, wherein, a first switch element having a first end connected to the slope generation module for receiving the slope signal, a control end for receiving the control signal and a second end; a sample-and-hold capacitor connected between the second end of the first switch element and the ground; a second switch element having a first end connected to the second end of the first switch element and a control end connected to the control end of the first switch element, wherein the first switch element and the second switch element are respectively used for being complementarily turned on according to the control signal; and a slope error filter capacitor connected between the second end of the second switch element and the ground. When the control signal is at a high level, the first switch element is turned on, the second switch element is turned off and the sample-and-hold capacitor samples the slope signal; when the control signal jumps from the high level to a low level, the voltage of the sample-and-hold capacitor keeps the maximum value of the slope signal; when the control signal is at the low level, the first switch element is turned off and the second switch element is turned on, and the slope error filter capacitor filters the maximum value of the slope signal to generate the slope error signal.
4. The embedded slope compensation circuit of claim 3, wherein, The slope compensation module performs the slope compensation by performing a difference calculation on the voltage input signal and the slope signal; when correcting the slope compensation, the slope error correction module superimposes the slope error signal on a signal of the difference calculation to form the voltage output signal.
5. The embedded slope compensation circuit of claim 1, wherein, The slope compensation module comprises:
6. The embedded slope compensation circuit of claim 5, wherein, a first operational amplifier comprising a non-inverting input end, an inverting input end and an output end; the non-inverting input end of the first operational amplifier is connected to the slope generation module for receiving the slope signal, and the inverting input end and the output end of the first operational amplifier are connected; a second operational amplifier comprising a non-inverting input end, an inverting input end and an output end; the non-inverting input end of the second operational amplifier is used for receiving the voltage input signal, and the inverting input end and the output end of the second operational amplifier are connected; and a third operational amplifier comprising a non-inverting input end, an inverting input end and an output end; the non-inverting input end of the third operational amplifier is connected to the slope error correction module for receiving the slope error signal, and the inverting input end and the output end of the third operational amplifier are connected. a first resistor, a second resistor, a third resistor and a fourth resistor are connected in series between the output terminal of the first operational amplifier and the output terminal of the second operational amplifier, and a voltage signal at a connection node of the third resistor and the fourth resistor is the voltage output signal.
7. The embedded slope compensation circuit of claim 6, wherein, The slope error correction module comprises: a third operational amplifier comprising a non-inverting input terminal, an inverting input terminal and an output terminal, the non-inverting input terminal of the third operational amplifier being connected to the slope error sampling module for receiving the slope error signal, the inverting input terminal of the third operational amplifier being connected to the connection node of the first resistor and the second resistor, and the output terminal of the third operational amplifier being connected to the connection node of the second resistor and the third resistor.
8. The embedded slope compensation circuit of claim 1, wherein, The slope compensation module performs the slope compensation by superimposing the voltage input signal and the slope signal, and the slope error correction module subtracts the slope error signal from the superimposed signal to form the voltage output signal when correcting the slope compensation.
9. The embedded slope compensation circuit of claim 8, wherein, The slope compensation module comprises: a fourth operational amplifier comprising a non-inverting input terminal, an inverting input terminal and an output terminal, the non-inverting input terminal of the fourth operational amplifier being connected to the slope generation module for receiving the slope signal, the inverting input terminal of the fourth operational amplifier being connected to the output terminal of the fourth operational amplifier through a fifth resistor, and a sixth resistor and a seventh resistor, a first end of the seventh resistor being configured to receive the voltage input signal, a second end of the seventh resistor being connected to a first end of the sixth resistor, a second end of the sixth resistor being connected to the output terminal of the fourth operational amplifier, and a voltage signal at a connection node of the sixth resistor and the seventh resistor being the voltage output signal.
10. The embedded slope compensation circuit of claim 9, wherein, The slope error correction module comprises: a fifth operational amplifier comprising a non-inverting input terminal, an inverting input terminal and an output terminal, the non-inverting input terminal of the fifth operational amplifier being connected to the slope error sampling module for receiving the slope error signal, the inverting input terminal of the fifth operational amplifier being connected to the output terminal of the fifth operational amplifier, and an eighth resistor connected between the output terminal of the fifth operational amplifier and the inverting input terminal of the fourth operational amplifier.
11. A switching converter, characterized by An embedded slope compensation circuit comprising any one of claims 1 to 10.
Citation Information
Patent Citations
Self-adaptive slope compensation BOOST circuit
CN114552987A
Switching converter and control circuit thereof
CN203722465U