A method for eliminating the residual step metal layer in the photosensitive area of ​​a linear array CCD

Abstract

The invention belongs to the field of manufacturing linear array CCD, and specifically relates to a method for eliminating step metal layer residues in a photosensitive area of ​​a linear array CCD; the method comprises firstly photolithography of the step metal layer, then wet etching the step metal layer, and in order to prevent metal edge corrosion, an overlay method is adopted, the step metal layer is overlaid for the first time, the remaining metal is continuously wet-etched, and then the step metal layer is overlaid for the second time, and finally the step metal layer is dry-etched and silicon slag particles on the surface are eliminated. The process of the invention is stable, reliable and repeatable, the manufacturing quality of the product is improved, and user requirements are met. The scheme is feasible and reliable, and the production of the product realizes stability, repeatability and consistency within a chip, between chips and between batches, can provide users with satisfactory products, and has potential economic and social benefits.

Description

Technical Field

[0001] The invention belongs to the field of manufacturing linear array CCDs, relates to the problem of metal residues in a light-shielding metal layer in a photosensitive area of ​​a linear array CCD etched step metal layer, and specifically relates to a method for eliminating the step metal layer residues in a photosensitive area of ​​a linear array CCD. Background Art

[0002] The structure of the photosensitive area of ​​the traditional linear array charge coupled device (CCD) is as follows: Figure 1 As shown, it can be divided into seven layers, the first layer is the gate oxide layer, the second layer is the silicon nitride layer, the third layer is the phosphorus silicon glass layer, the fourth layer is the light-shielding metal layer, the fifth layer is the low-temperature silicon dioxide layer, the sixth layer is the step metal layer, and the seventh layer is the low-temperature silicon dioxide passivation layer. The light-shielding metal layer has a photosensitive area between the steps, which is the incident area of ​​the light signal. A layer of low-temperature silicon dioxide insulating medium is deposited on the light-shielding metal layer, and then the step metal layer is sputtered. The unnecessary step metal layer is exposed by photolithography, and the exposed step metal layer is removed by dry etching.

[0003] However, dry etching may cause the problem of residual metal layer particles at the step position of the light-shielding metal layer, such as Figure 2 and Figure 3 As shown in the figure, the distribution and density of residual particles at the step metal layer are uneven, and the size of residual metal particles is uneven, ranging from 1 micron to 0.5 micron. The residues between the die, chips and batches within the chip are random. Since metal has the ability to block light incidence, it will cause different light receiving areas between pixels. Assuming that the steps of a CCD pixel are covered with particles on both sides, and the size is 0.5 microns, and the other pixel has no residual particles, if the design width of the photosensitive area is 6.3 microns, the maximum deviation of the light receiving area between the two pixels can reach 15.8% (±7.9%), which has a very obvious impact on the uniformity of the pixel light response background image. Therefore, when metal residues are generated at the step position, the light receiving area of ​​the pixel will be affected, thereby causing the charge storage amount of a single pixel to change, which will cause the uniformity of the light response background pattern to deteriorate. In order to meet the user's aerospace-grade requirements for products, the metal residual particles at the step position of the light-shielding metal layer must be eliminated.

[0004] At present, the existing technology mainly attempts to solve the problem of residual step position of the light-shielding metal layer in the photosensitive area after etching the step metal layer by the following three methods:

[0005] (1) Optimize the etching menu of the etching equipment, and eliminate the step position residue of the photosensitive area introduced by etching by optimizing the etching gas flow / ratio, chamber vacuum, frequency and power. However, from the results of the optimized menu, it can be seen that the etching residue of the step metal layer at the step position cannot be eliminated by menu optimization.

[0006] (2) The planarization process is used to eliminate the steps of the light-shielding metal layer in the photosensitive area. After planarization, the metal at the step position is eliminated, thereby ensuring that there are no residual metal particles at the step position during etching. However, since the planarization process is in the development stage and the process maturity is lacking, the production of aerospace-grade products must pass relevant procedures and verification and identification before production can proceed.

[0007] (3) Dry etching and wet etching processes are used to eliminate the metal residue at the step metal layer position. The exposed step metal layer is removed by dry etching, and the residual metal particles are removed by wet etching. However, its disadvantage is that the residual thickness of dry etching is uneven, which makes the wet etching time too long, causing the etching liquid to penetrate into the loose lower layer medium and destroy the structure of the linear array CCD photosensitive area, and cause new technical problems. Summary of the invention

[0008] Based on the dry etching step metal layer process adopted in the prior art, there is a problem that etching residues cannot be eliminated at the step position of the light-shielding metal layer in the photosensitive area. The present invention adopts a wet + dry integrated process to eliminate the metal residues at the step position of the light-shielding metal layer, and discloses a method for eliminating the step metal layer residues in the photosensitive area of ​​a linear array CCD, the method comprising:

[0009] S1, after coating a photoresist adhesion promoter on the silicon wafer of the linear array CCD, coating photoresist, exposing the step metal layer pattern on a photolithography machine, and developing the exposed photoresist to complete the first photolithography;

[0010] S2, sending the silicon wafer after the first photolithography into an oven for hardening, using a wet metal etching solution to etch the step metal layer, after the etching is completed, removing the photoresist, and performing organic cleaning;

[0011] S3, after coating the photoresist adhesion promoter on the silicon wafer cleaned in step S2, coating the photoresist, overlaying and exposing the same step metal layer pattern on a photolithography machine, and developing the exposed photoresist by overlaying to complete the second photolithography;

[0012] S4, sending the silicon wafer after the second photolithography into an oven for hardening, using a wet metal etching solution to etch the step metal layer, after the etching is completed, removing the photoresist, and performing organic cleaning;

[0013] S5, coating a photoresist adhesion promoter on the silicon wafer cleaned in step S4, coating photoresist, overlaying and exposing the same step metal layer pattern on a photolithography machine, and developing the exposed photoresist by overlaying to complete the third photolithography;

[0014] S6. Dry-etching the step metal layer residue on the silicon wafer after the third photolithography on an etcher. After the etching is completed, remove the photoresist and perform organic cleaning.

[0015] Furthermore, in step S3, during the first overlay process, the same step metal layer pattern on the lithography machine needs to be exposed twice, once on the upper surface and once on the lower surface. This exposure method can eliminate the base film generated on the lower surface, which is beneficial for eliminating residual metal particles from the wet process.

[0016] Furthermore, the method also includes microscopic observation of the developed silicon wafer. If the observed pattern exceeds the error variation range of the preset pattern, the photoresist is removed, organic cleaning is performed, and a photoresist adhesion promoter is re-coated on the silicon wafer to complete the corresponding photolithography process.

[0017] Furthermore, the conditions for sending the silicon wafer into the oven for hardening include a hardening temperature of 130° C. to 150° C. and a hardening time of 25 minutes to 35 minutes.

[0018] Furthermore, the etching of the step metal layer with a wet metal etching solution includes, in step S2, stopping the etching when the etching time reaches a first time length; in step S4, microscopically observing the silicon wafer after etching when the etching time reaches the first time length, and stopping the etching if it is observed that no metal residue is left in the step metal layer; if the etching time reaches a second time length, microscopically observing the silicon wafer after etching, and stopping the etching if it is observed that no metal residue is left in the step metal layer; if it is observed that metal residue is still left in the step metal layer, removing the photoresist, performing organic cleaning, and re-executing steps S3 to S4, wherein the second time length is twice the first time length, the first time length is 2 minutes to 4 minutes, and the second time length is 4 minutes to 8 minutes.

[0019] Beneficial effects of the present invention:

[0020] The present invention adopts wet etching of the step metal layer, which can make the step metal layer after etching reach the metal thickness of a flat position; at the same time, in order to prevent metal edge corrosion, the present invention also adopts an overlay method, overlays the first metal, continues to wet-etch the remaining metal, and then overlays the second metal, and adopts dry etching to eliminate surface metal residues. This overlay method can remove metal particles remaining from edge corrosion. The process of the present invention is stable, reliable and has good repeatability, which improves the manufacturing quality of the product and meets user requirements. The solution is feasible and reliable. The production of this product achieves stability, repeatability and consistency within a chip, between chips and between batches, can provide users with satisfactory products, and has potential economic and social benefits. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 It is a schematic diagram of the structure of the photosensitive area of ​​the linear array CCD;

[0022] Figure 2 1. It is a schematic diagram of residual particles in the step metal layer at the step position of the light-blocking metal layer in the photosensitive area;

[0023] Figure 3 1. It is a schematic diagram of residual particles in the step metal layer at the step position of the light-blocking metal layer in the photosensitive area;

[0024] Figure 4 It is a schematic diagram of a method for eliminating the step metal layer residue in the photosensitive area of ​​a linear array CCD according to the present invention;

[0025] Figure 5 It is a schematic diagram of the manufacturing process of a method for eliminating step metal layer residues in a photosensitive area of ​​a linear array CCD according to an embodiment of the present invention;

[0026] Figure 6 2 is a schematic diagram of the step metal layer residue at the step position of the light-blocking metal layer in an embodiment of the present invention;

[0027] Figure 7 It is a schematic diagram of the manufacturing process of the linear array CCD photosensitive area according to an embodiment of the present invention. DETAILED DESCRIPTION

[0028] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0029] Considering that the dry etching performed by the original menu or the optimized menu cannot solve the problem of the step metal layer being etched at the step position of the light-shielding metal layer in the photosensitive area. In order to eliminate the step metal layer particles remaining at the step position of the light-shielding metal layer in the photosensitive area, the present invention adopts a wet + dry process to eliminate the step metal layer particles remaining at the step position of the light-shielding metal layer in the photosensitive area. Figure 4 As shown, the step metal layer is first photolithographically processed, and then the step metal layer is wet-etched. In order to prevent metal edge corrosion, an overlay method is adopted. The step metal layer is overlaid for the first time, and the remaining metal is wet-etched. Then, the step metal layer is overlaid for the second time, and finally, the step metal layer is dry-etched to eliminate the surface silicon slag particles. The new method is stable, reliable and has good repeatability, which improves the manufacturing quality of the product and meets user requirements.

[0030] Figure 5 1 is a schematic diagram of a manufacturing process for eliminating the step metal layer residue in the photosensitive area of ​​a linear array CCD according to an embodiment of the present invention; Figure 5 As shown, the method includes:

[0031] S1, after coating a photoresist adhesion promoter on the silicon wafer of the linear array CCD, coating photoresist, exposing the step metal layer pattern on a photolithography machine, and developing the exposed photoresist to complete the first photolithography;

[0032] In the embodiment of the present invention, the silicon wafer of the linear array CCD used refers to a silicon wafer on which a silicon dioxide layer has been deposited on the light-shielding metal layer and a step metal layer has been sputtered; the purpose of the present invention is to expose the unnecessary step metal layer through photolithography, remove the exposed step metal layer, and achieve the effect of no metal residue on the steps of the light-shielding metal layer.

[0033] Therefore, after sputtering the step metal layer, a photoresist adhesion promoter (HMDS) is directly coated on the step metal layer of the silicon wafer. Due to the adhesion promoting effect of the adhesion promoter, photoresist can be coated on the adhesion promoter to make the photoresist contact with the silicon wafer, which is convenient for the subsequent photolithography process. The step metal layer pattern that needs to be removed is exposed on the photolithography machine, and the exposed photoresist is developed to complete the first photolithography.

[0034] Among them, in order to ensure the effect of photolithography, the present invention also needs to pre-bake the photoresist after coating the photoresist, post-bake the exposed photoresist, and then develop the photoresist after post-bake; at the same time, after development, the developed silicon wafer combined with the layout can also be inspected with a microscope to check whether the pattern is not much different from the preset pattern, that is, whether the observed pattern exceeds the error variation range of the preset pattern; for example, when the size of the observed pattern and the preset pattern differs by only 1%, it is considered normal, otherwise it is considered abnormal; if abnormality occurs, rework is required, that is, removing the photoresist, performing organic cleaning, and re-coating the photoresist adhesion agent on the silicon wafer to complete the corresponding photolithography process.

[0035] S2, sending the silicon wafer after the first photolithography into an oven for hardening, using a wet metal etching solution to etch the step metal layer, after the etching is completed, removing the photoresist, and performing organic cleaning;

[0036] In an embodiment of the present invention, the silicon wafer after the first photolithography is sent to an oven for hardening, the hardening temperature is 130°C to 150°C, and the hardening time is 25 minutes to 35 minutes; the hardening temperature here can be 140°C, and the hardening time is 30 minutes. After the hardening is completed, a wet metal etching solution is used, and the etching time is a first time length, and the first time length is 2 minutes to 4 minutes. If the thickness of the step metal layer to be corroded is high or other dimensions are large, then a higher etching time needs to be selected. The specific etching time is determined by the material and size of the linear array CCD. Those skilled in the art can set the corresponding etching time according to actual conditions. The first time length here can be 3 minutes. After the etching is completed, acetone and ethanol are used for degumming. After the degumming is completed, it is observed through a microscope whether the photoresist is removed. If not, continue organic degumming until the photoresist is removed, and then use acetone and ethanol for organic cleaning and flushing, spin drying, and send it to the photolithography for overlay process.

[0037] S3, after coating the photoresist adhesion promoter on the silicon wafer cleaned in step S2, coating the photoresist, overlaying and exposing the step metal layer pattern on a photolithography machine, and developing the exposed photoresist by overlaying to complete the second photolithography;

[0038] In an embodiment of the present invention, similar to step S1, a photoresist adhesion promoter (HMDS) is directly coated on the step metal layer of the silicon wafer after wet etching and cleaning. Due to the adhesion promoting effect of the adhesion promoter, photoresist can be coated on the adhesion promoter so that the photoresist is in contact with the silicon wafer, which is convenient for the subsequent photolithography process. The step metal layer pattern to be removed is exposed on the photolithography machine, and the exposed photoresist is developed to complete the second photolithography.

[0039] Among them, in order to ensure the effect of photolithography, the present invention also needs to pre-bake the photoresist after coating the photoresist, post-bake the exposed photoresist, and then develop the photoresist after post-bake; at the same time, after development, the developed silicon wafer combined with the layout can also be inspected with a microscope to check whether the pattern is not much different from the preset pattern, that is, whether the observed pattern exceeds the error variation range of the preset pattern; for example, when the size of the observed pattern and the preset pattern differs by only 1%, it is considered normal, otherwise it is considered abnormal; if abnormality occurs, rework is required, that is, removing the photoresist, performing organic cleaning, and re-coating the photoresist adhesion agent on the silicon wafer to complete the corresponding photolithography process.

[0040] It can be understood that overlay refers to exposing all fields on the silicon wafer one by one, that is, step by step, and then replacing the silicon wafer until all the silicon wafers are exposed; after the process of the silicon wafer is completed, the mask is replaced, and then the second layer of patterns is exposed on the silicon wafer, that is, repeated exposure. Among them, the pattern exposed by the second layer of mask must be accurately overlapped with the first layer of mask exposure, so it is called overlay; therefore, the second and third photolithography of the present invention and the patterns used in the first photolithography are all overlapped together, and this multiple overlay method can prevent metal edge corrosion, so that the final elimination of metal residues is more thorough.

[0041] In a preferred embodiment of the present invention, in step S3, during the first overlay process, it is necessary to expose the same step metal layer pattern on the lithography machine twice, once for the upper surface and once for the lower surface. This exposure method can eliminate the base film generated on the lower surface, which is beneficial to eliminating residual metal particles from the wet process.

[0042] S4, sending the silicon wafer after the second photolithography into an oven for hardening, using a wet metal etching solution to etch the step metal layer, after the etching is completed, removing the photoresist, and performing organic cleaning;

[0043] In an embodiment of the present invention, similar to step S2, the silicon wafer after the second photolithography is sent to an oven for hardening, the hardening temperature is 130°C to 150°C, and the hardening time is 25 minutes to 35 minutes; the hardening temperature here can be 140°C, and the hardening time is 30 minutes. After the hardening is completed, a wet metal etching solution is used, and the etching time is a first time length, and the first time length is 2 minutes to 4 minutes. If the thickness of the step metal layer to be corroded is high or other dimensions are large, then a higher etching time needs to be selected. The specific etching time is determined by the material and size of the linear array CCD. Those skilled in the art can set the corresponding etching time according to actual conditions. The first time length here can be 3 minutes. After the etching is completed, acetone and ethanol are used for degumming. After the degumming is completed, it is observed through a microscope whether the photoresist is removed. If not, continue organic degumming until the photoresist is removed, and then use acetone and ethanol for organic cleaning and flushing, spin drying, and send it to the photolithography for overlay process.

[0044] S5, coating a photoresist adhesion promoter on the silicon wafer cleaned in step S4, coating photoresist, overlaying and exposing a step metal layer pattern on a photolithography machine, and developing the exposed photoresist by overlaying to complete the third photolithography;

[0045] In the embodiment of the present invention, similar to step S3, a photoresist adhesion promoter (HMDS) is directly coated on the step metal layer of the silicon wafer after wet etching and cleaning in step S4. Due to the adhesion promoting effect of the adhesion promoter, photoresist can be coated on the adhesion promoter to make the photoresist contact with the silicon wafer, which is convenient for the subsequent photolithography process. The step metal layer pattern to be removed is exposed on the photolithography machine, and the exposed photoresist is developed to complete the third photolithography.

[0046] Among them, in order to ensure the effect of photolithography, the present invention also needs to pre-bake the photoresist after coating the photoresist, post-bake the exposed photoresist, and then develop the photoresist after post-bake; at the same time, after development, the developed silicon wafer combined with the layout can also be inspected with a microscope to check whether the pattern is not much different from the preset pattern, that is, whether the observed pattern exceeds the error variation range of the preset pattern; for example, when the size of the observed pattern and the preset pattern differs by only 1%, it is considered normal, otherwise it is considered abnormal; if abnormality occurs, rework is required, that is, removing the photoresist, performing organic cleaning, and re-coating the photoresist adhesion agent on the silicon wafer to complete the corresponding photolithography process.

[0047] S6. Dry-etching the step metal layer residue on the silicon wafer after the third photolithography on an etcher. After the etching is completed, remove the photoresist and perform organic cleaning.

[0048] In the embodiment of the present invention, the silicon slag can be dry-etched on the etcher for 12 seconds. After the etching is completed, observe whether there are bright spots on the surface of the silicon wafer under the dark field of the microscope. Usually, there are no bright spots on the surface of the silicon wafer. If more bright spots are found, there must be a process abnormality. The process and equipment conditions should be checked, and then the etching process should be repeated. The silicon wafer after dry etching is debonded with acetone and ethanol. After debonding is completed, observe whether the photoresist has been removed under a microscope. If not, continue organic debonding until the photoresist is removed, and then use acetone and ethanol for organic cleaning and flushing, and spin dry.

[0049] Figure 6 This is a scanning electron microscope image of an embodiment of the present invention. The step metal layer residues at the step position of the photosensitive area are eliminated through integration of the method for eliminating the step metal layer residues in the photosensitive area of ​​the linear array CCD of the present invention. Through the production of three consecutive batches, it is verified that the process is stable and reliable, indicating that it has producibility, ensuring repeatable production within a chip, between chips and between batches.

[0050] It can be understood that the embodiment of the present invention adopts process integration to achieve the elimination of the step metal layer residue. Since the wet method is isotropic and the longitudinal and lateral etching rates are basically the same, one exposure will cause etching, making the line width and edge of the pattern incomplete. In addition, the step metal layer material in the present invention is an aluminum silicon target, that is, the metal layer contains 2% silicon. When the aluminum is wet-etched, the metal etching liquid does not corrode silicon. Therefore, dry etching is required to remove the residue, thereby eliminating the influence of the residue on the illumination and other problems that cause product performance. Furthermore, after the metal wet etching is completed, silicon slag particles will be left on the surface. These silicon slag particles in the illuminated area will cause light scattering and reflection, affect the uniformity of illumination, and affect the photoelectric parameters of the device. The embodiment of the present invention adopts a non-destructive chemical dry etching process, eliminates silicon slag particles, has no loss to the underlying medium, that is, a high selectivity to the underlying medium, and improves the user's requirements for the uniformity of the device's light response. The stability, consistency and reliability of product manufacturing have been significantly improved, and the product yield rate has reached more than 90%.

[0051] Figure 7 FIG. 1 is a schematic diagram of the manufacturing process of the linear array CCD photosensitive area according to an embodiment of the present invention. Figure 7 As shown, the manufacturing process of the method for eliminating the step metal layer residue in the photosensitive area of ​​the linear array CCD is different in that this embodiment also includes a pre-process and a subsequent process; the details are as follows:

[0052] (I) Pre-process

[0053] In the previous process, the gate oxide layer, silicon nitride layer, phosphosilicate glass layer, light-shielding metal layer, and low-temperature silicon dioxide layer are firstly produced. In this process, technicians in this field can implement it according to the actual conventional linear CCD production process, and the present invention does not make any specific limitation on this.

[0054] (II) Photolithography step metal layer

[0055] After the step metal layer is sputtered, the photolithography process begins. The photoresist adhesion promoter (HMDS) is coated on the silicon wafer, and then the photoresist is coated, the photoresist is pre-baked, and the photolithography machine is sent to be exposed with the step metal layer plate. The exposed photoresist is post-baked, and then the photoresist is developed. The silicon wafer after development is combined with the layout and observed under a microscope to see if the pattern is normal. If not, it is reworked (eight) and the subsequent process is continued normally.

[0056] (III) Wet etching of step metal layer

[0057] The silicon wafer after photolithography in step (ii) is sent to an oven for hardening at a temperature of 140°C for 30 minutes. After the hardening is completed, a wet metal etching solution is used to etch for 3 minutes. After the etching is completed, acetone and ethanol are used for degumming. After the degumming is completed, it is observed under a microscope to see if the photoresist has been removed. If not, organic degumming is continued until the photoresist is removed. Then, acetone and ethanol are used for organic cleaning and flushing, and the wafer is dried and sent to the photolithography for overlay process.

[0058] (IV) Overlaying step metal layer

[0059] Coat the photoresist adhesion promoter (HMDS) on the silicon wafer, then coat the photoresist, pre-bake the photoresist, send it to the photolithography machine for exposure with the step metal layer plate, post-bake the exposed photoresist, and then develop the photoresist. Observe the developed silicon wafer in combination with the layout under a microscope to see if the pattern is normal. If not, rework and connect it again (VIII) and continue the subsequent process normally.

[0060] (V) Wet etching of step metal layer

[0061] After photolithography, the silicon wafer is sent to the oven for hardening. The hardening temperature is 140℃ and the hardening time is 30 minutes. After the hardening is completed, a wet metal etching solution is used to etch for 3 minutes. After the etching is completed, the metal at the step position is observed under a microscope to see if there is any metal residue. Usually, after 6 minutes of etching, there is no metal residue at the step position. Then acetone and ethanol are used for degumming. After the degumming is completed, it is observed under a microscope to see if the photoresist has been removed. If not, continue with organic degumming until the photoresist is removed. Then acetone and ethanol are used for organic cleaning and flushing, spin drying, and send to the photolithography for overlay process. If there is still a step metal layer residue after 6 minutes of wet etching, it is an abnormal situation. Conclusion of abnormal situation handling (VIII)

[0062] (VI) Overlaying step metal layer

[0063] Coat the photoresist adhesion promoter (HMDS) on the silicon wafer, then coat the photoresist, pre-bake the photoresist, send it to the photolithography machine for exposure with the step metal layer plate, post-bake the exposed photoresist, and then develop the photoresist. Observe the developed silicon wafer in combination with the layout under a microscope to see if the pattern is normal. If not, rework and connect it again (VIII) and continue the subsequent process normally.

[0064] (VII) Dry Etching of Step Metal Layer

[0065] Dry-etch silicon slag on the etcher for 12 seconds. After etching, observe whether there are bright spots on the surface of the silicon wafer under the dark field of the microscope. Usually, there are no bright spots on the surface of the silicon wafer. If more bright spots are found, there must be a process abnormality. The process and equipment should be checked, and then the etching process should be repeated. After the silicon wafer is dry-etched, use acetone and ethanol to remove the glue. After the glue removal is completed, observe whether the photoresist has been removed by microscopy. If not, continue organic glue removal until the photoresist is removed, then use acetone and ethanol for organic cleaning and flushing, spin dry, and send to the subsequent process.

[0066] (VIII) Rework

[0067] If the pattern is abnormal during the photolithography inspection, follow the rework process. Use acetone and ethanol to remove the photoresist. After the removal is completed, check whether the photoresist has been removed. If not, continue with organic stripping until the photoresist is removed. Then use acetone and ethanol for organic cleaning and flushing, spin dry, and send it to the photolithography process.

[0068] (IX) Handling of abnormal situations

[0069] After 6 minutes of wet etching, there are still remnants of the step metal layer. The distribution is different from the step position, but in different areas of the entire photosensitive area. First, find out the cause and confirm whether it is the equipment that causes the photolithography bottom film. After finding out the cause, rework (seven) and then (four) until the remnants of the step metal layer are eliminated.

[0070] (X) Subsequent Process

[0071] In the subsequent process, after the metal residues of the step metal layer are eliminated, a low-temperature silicon dioxide passivation layer is plated on the surface of the silicon wafer. The surface here includes the surface of the photosensitive area, the side of the light-shielding metal layer, the surface and side of the step metal layer, and the surface of the low-temperature silicon dioxide layer. In this process, technicians in this field can also implement it according to the actual conventional linear CCD manufacturing process, and the present invention does not make specific limitations on this.

[0072] In the description of the present invention, it is necessary to understand that the terms "coaxial", "bottom", "one end", "top", "middle", "the other end", "upper", "one side", "top", "inside", "outside", "front", "center", "both ends" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention.

[0073] In the present invention, unless otherwise clearly stipulated and limited, the terms such as "installation", "setting", "connection", "fixation" and "rotation" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral one; it can be a mechanical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediate medium; it can be the internal connection of two elements or the interaction relationship between two elements. Unless otherwise clearly defined, ordinary technicians in this field can understand the specific meanings of the above terms in the present invention according to the specific circumstances.

[0074] Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. A method for eliminating the residual metal layer of the step in the photosensitive area of ​​a linear array CCD, characterized in that: The method comprises: S1, after coating a photoresist adhesion promoter on the silicon wafer of the linear array CCD, coating photoresist, exposing the step metal layer pattern on a photolithography machine, and developing the exposed photoresist to complete the first photolithography; S2, sending the silicon wafer after the first photolithography into an oven for hardening, using a wet metal etching solution to etch the step metal layer, after the etching is completed, removing the photoresist, and performing organic cleaning; S3, after coating the photoresist adhesion promoter on the silicon wafer cleaned in step S2, coating the photoresist, overlaying and exposing the same step metal layer pattern on a photolithography machine, and developing the exposed photoresist by overlaying to complete the second photolithography; S4, sending the silicon wafer after the second photolithography into an oven for hardening, using a wet metal etching solution to etch the step metal layer, after the etching is completed, removing the photoresist, and performing organic cleaning; S5, coating a photoresist adhesion promoter on the silicon wafer cleaned in step S4, coating photoresist, overlaying and exposing the same step metal layer pattern on a photolithography machine, and developing the exposed photoresist by overlaying to complete the third photolithography; S6. Dry-etching the step metal layer residue on the silicon wafer after the third photolithography on an etcher. After the etching is completed, remove the photoresist and perform organic cleaning.

2. The method for eliminating the step metal layer residue in the photosensitive area of ​​a linear array CCD according to claim 1, characterized in that: In step S3, the same step metal layer pattern on the lithography machine is exposed twice, once on the upper surface and once on the lower surface.

3. The method for eliminating the step metal layer residue in the photosensitive area of ​​a linear array CCD according to claim 1, characterized in that: The method also includes microscopically observing the developed silicon wafer. If the observed pattern exceeds the error variation range of the preset pattern, the photoresist is removed, organic cleaning is performed, and a photoresist adhesion promoter is re-coated on the silicon wafer to complete the corresponding photolithography process.

4. The method for eliminating the step metal layer residue in the photosensitive area of ​​a linear array CCD according to claim 1, characterized in that: The conditions for sending the silicon wafer into the oven for hardening include a hardening temperature of 130° C. to 150° C. and a hardening time of 25 minutes to 35 minutes.

5. The method for eliminating the step metal layer residue in the photosensitive area of ​​a linear array CCD according to claim 1, characterized in that: The method of using a wet metal etching solution to corrode the step metal layer includes, in step S2, stopping the corrosion when the corrosion time reaches a first time length; in step S4, microscopically observing the corroded silicon wafer when the corrosion time reaches the first time length, and stopping the corrosion if it is observed that no metal residue exists in the step metal layer; if the corrosion time reaches a second time length, microscopically observing the corroded silicon wafer, and stopping the corrosion if it is observed that no metal residue exists in the step metal layer; if it is observed that metal residue still exists in the step metal layer, removing the photoresist, performing organic cleaning, and re-executing steps S3 to S4, wherein the second time length is twice the first time length, the first time length is 2 minutes to 4 minutes, and the second time length is 4 minutes to 8 minutes.

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