A system and method for realizing linear adjustment of memristor electrical conduction

Abstract

The present invention provides a system and method for achieving linear regulation of the electrical conductivity of a memristor, comprising: a mode configuration module, a control management module, a voltage conversion module, a voltage drive module, a memristor device to be tested, a test vehicle, and a current acquisition module. The control management module is configured to obtain the current equivalent conductance information of the memristor based on the voltage information and feedback current information in a timing template file at the time of the current action, and to store the information in chronological order, thereby obtaining a conductance change curve of the memristor device to be tested, arranged in chronological order. This simplifies the research work on the linear regulation mechanism and ensures the accuracy of the test results.

Description

Technical Field

[0001] The present invention belongs to the field of circuit design and testing, and in particular relates to a system and method for realizing linear regulation of a memristor electrical conductor. Background Art

[0002] Memristors are novel components with variable resistance and non-volatile properties during power-off. During development, it was discovered that, after initializing to a high-impedance state, current memristor devices exhibit an increase in conductance when stimulated by an external voltage above a certain threshold; when stimulated by a reverse voltage, the conductance decreases. However, the increase and decrease curves are asymmetric (draw an auxiliary line perpendicular to the x-axis at the highest impedance position and observe the curve trends on both sides of the auxiliary line), indicating a lack of linear adjustment. Specifically, while the resistance change caused by a memristor SET can be achieved with 100 pulses, the RESET process requires 500 pulses.

[0003] The engineering field hopes that memristors will have adjustable linearity so that they can be widely used in the fields of artificial intelligence matrix computing and brain-inspired computing. The research team discovered five methods for adjusting the linearity of memristors: (1) adjusting the pulse width, (2) adjusting the number of pulses, (3) adjusting the pulse amplitude on the drain and source of the storage unit, (4) adjusting the transistor gate voltage, and (5) adjusting the transistor gate voltage, drain voltage, and source voltage.

[0004] During the aforementioned research, the laboratory generally used semiconductor testers to adjust relevant parameters. Semiconductor testers test general semiconductor devices. When testing memristors, the configuration of parameters such as the number of pulses, pulse interval, and pulse width is complex, and voltage adjustment is inconvenient.

[0005] When using the aforementioned instruments to test memristors, since there are no pulse voltage or pulse width adjustment functions specifically tailored to memristor characteristics, manual adjustment is required every time the voltage at the test point is changed. Furthermore, during a single adjustment, the voltage amplitude and pulse width may change simultaneously with the pulse output, resulting in hundreds to thousands of pulse outputs after a single adjustment. Manual adjustment and manual control of output can slow down testing, interrupt the test program, or result in missing test data, seriously impacting the accuracy of test results.

[0006] Therefore, there is an urgent need for specialized testing instruments specifically for testing the characteristics of memristor devices to solve the above-mentioned difficulties encountered when manually testing the characteristics of memristor devices under laboratory conditions. Summary of the Invention

[0007] In view of the above-mentioned defects or deficiencies in the prior art, the present invention aims to provide a system and method for achieving electrical linearity adjustment of a memristor.

[0008] In order to achieve the above objectives, the embodiments of the present invention adopt the following technical solutions:

[0009] In a first aspect, a system for implementing electrical linear regulation of a memristor is provided, comprising: a mode configuration module for generating and configuring a timing template file for voltage action and current acquisition timing; a control management module, whose input end is connected to the mode configuration module and is used to perform corresponding operations on detection points of a memristor device to be tested according to the voltage action configured in the timing template control file; a voltage conversion module, whose input end is connected to the output end of the control management module and is used to output an analog voltage signal according to an operation instruction of the control management module; a voltage drive module, whose input end is connected to the output end of the voltage conversion module and is used to enhance or reduce circuit drive capability and control the opening of the voltage signal; the memristor device to be tested comprises at least one memristor structure; the position where the voltage is connected on the memristor structure is set as the detection point, and the The detection point is connected to the output end of the voltage driving module; the test carrier is used to place the resistive memristor to be tested; a plurality of test points are provided on it, each of the test points is connected to the output end of the voltage driving module; the test point is used to be connected to the detection point, and then the detection point is connected to the output end of the voltage driving module; the current acquisition module, whose input end is connected to the test point and whose output end is connected to the control management module, is used to collect the current of the test point according to the instruction of the timing template file and feed it back to the control management module; the control management module is also used to obtain the equivalent conductance information of the current memristor according to the voltage information in the timing template file and the feedback current information when the current action occurs, and store it in chronological order, thereby obtaining the conductance change curve of the resistive memristor to be tested arranged in chronological order.

[0010] According to the technical solution provided in the embodiments of the present application, each of the memristor structures includes a transistor and a memristor, the memristor T2 end is connected to the transistor drain, the transistor gate is set as the first detection point, the transistor source is the second detection point, the transistor drain is the third detection point, the memristor T1 end is the fourth detection point, and the memristor T2 end is the fifth detection point; the test points of the test vehicle are divided into multiple groups, each group has five test points, and are connected to the five detection points accordingly; the voltage conversion module is divided into multiple paths, each path has five voltage conversion modules, and is connected to the five detection points accordingly.

[0011] According to the technical solution provided in the embodiment of the present application, the voltage driving module includes an electronic switch and a driving circuit; the electronic switch is located at the output of the voltage driving circuit, including a pulse end, a ground end and a floating end, and is used to realize the switching of the driving test point between the pulse, ground and floating states, thereby controlling the on and off of the voltage signal; the driving circuit is divided into a boost circuit and a buck circuit, which are used to enhance the voltage signal.

[0012] In a second aspect, a method for realizing linear adjustment of the electrical conductivity of a memristor is provided, which is realized by the system described above and includes the following steps: placing the memristor device to be tested on a test vehicle, connecting the detection points of the memristor structure to be tested with the test points of the test vehicle; numbering the test points; writing a timing template file according to the number of the test points; importing the timing template file into a control management module; starting to configure and realize the specified voltage output operation in sequence according to the voltage parameters and actions configured in the timing template file; collecting the current of the corresponding test point at the same time; obtaining the equivalent conductance information of the current memristor according to the voltage information in the timing template file and the feedback current information when the current action occurs; storing the equivalent conductance information in chronological order, and then obtaining the conductance change curve of the memristor device to be tested arranged in chronological order.

[0013] According to the technical solution provided in the embodiment of the present application, writing a timing template file includes the following steps: writing a memristor initialization operation mode to form an initialization atomic operation file; writing a memristor SET operation mode to form a SET atomic operation file; writing a memristor RESET operation mode to form a RESET atomic operation file; writing a current reading operation mode to form a reading atomic operation file; specifying the operation combination, operation sequence and number of operations of the initialization atomic operation file, SET atomic operation file, RESET atomic operation file and reading atomic operation file, completing the editing of a memristor test plan, and forming a test timing template file.

[0014] According to the technical solution provided in the embodiment of the present application, a memristor initialization operation mode is written, including the following steps: applying a voltage signal to the first test point, applying a voltage signal to the third or fifth test point, and setting the pulse amplitude and pulse width of the applied voltage signal; setting the second test point and the fourth test point to be grounded; setting the second test point as a current collection point to collect the current value; processing the collected current value and the applied voltage amplitude to obtain the current conductance value G=I / U; judging whether G is greater than a preset threshold; if it is less than or equal to the preset threshold, continuing the current action; if it is greater than the preset threshold, the initialization action is completed.

[0015] According to the technical solution provided in the embodiment of the present application, the SET operation mode of the memristor is programmed, including the following steps: setting the first test point and the second test point to be suspended; setting the third test point or the fifth test point to be grounded; applying a voltage signal to the fourth test point, and setting the pulse amplitude, pulse width and number of pulses of the applied voltage signal; when the number of pulses of the voltage signal reaches the set number, the SET action is completed.

[0016] According to the technical solution provided in the embodiment of the present application, the memristor RESET operation mode is programmed, including the following steps: setting the first test point and the second test point to be suspended; setting the fourth test point to be grounded; applying a voltage signal to the third test point or the fifth test point, and setting the pulse amplitude, pulse width and number of pulses of the applied voltage signal; when the number of pulses of the voltage signal reaches the set number, the RESET action is completed.

[0017] According to the technical solution provided in the embodiment of the present application, a current reading operation mode is written, including the following steps: setting the pulse voltage amplitude, pulse width and number of pulses for reading the current; when the pulse voltage amplitude, pulse width and number of pulses reach the preset reading values, the current reading action is completed.

[0018] The present invention has the following beneficial effects:

[0019] Since this application edits the timing template file of voltage action, the upper computer software sends the timing template file to the control management module through the network or serial port. The control management module starts to configure the specified output operation of the specified detection point in the timing template file in sequence through the operation steps imported by the timing template file, generates corresponding voltage signals, and then controls the access voltage, grounding or short circuit status of each test point. At the same time, the current acquisition module collects the current signal and processes it to obtain the conductivity change curve of the resistive resistor to be tested arranged in time sequence, thereby simplifying the research work of the linear regulation mechanism. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Other features, objects and advantages of the present invention will become more apparent upon reading the detailed description of non-limiting embodiments made with reference to the following drawings:

[0021] Figure 1 This is a schematic structural diagram of the memristor electrical linearity adjustment system described in this application;

[0022] Figure 2 This is a schematic diagram of the memristor structure described in this application;

[0023] Figure 3 Schematic diagram of the side view point and electronic switch distribution of the side view vehicle described in this application.

[0024] Description of reference numerals:

[0025] 201, first detection point; 202, second detection point; 203, third detection point; 204, fourth detection point; 205, fifth detection point;

[0026] 301, first test point; 302, second test point; 303, third test point; 304, fourth test point; 305, fifth test point. DETAILED DESCRIPTION

[0027] The present invention will be further described in detail below with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are intended only to illustrate the relevant invention and are not intended to limit the invention. It should also be noted that, for ease of description, only portions relevant to the invention are shown in the accompanying drawings.

[0028] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, it does not need to be further defined or explained in subsequent drawings.

[0029] In the description of the present disclosure, it should be noted that the terms "center", "up", "down", "left", "right", "vertical", "horizontal", "inside", "outside", "clockwise", "counterclockwise", "front end", "rear end", "side", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the accompanying drawings, or are the orientation or positional relationship in which the disclosed product is usually placed when in use. They are only for the convenience of describing the present disclosure and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operate in a specific orientation, and therefore should not be understood as limiting the present disclosure. In addition, the terms "first", "second", "third", etc. are only used to distinguish the description and should not be understood as indicating or implying relative importance.

[0030] Furthermore, terms such as "horizontal," "vertical," and "overhanging" do not necessarily imply that a component must be absolutely horizontal or overhanging, but rather that it can be slightly tilted. For example, "horizontal" simply means that its direction is more horizontal than "vertical," and does not mean that the structure must be completely horizontal, but rather that it can be slightly tilted.

[0031] It should also be noted that, in the description of this disclosure, unless otherwise expressly specified or limited, the terms "disposed," "installed," "connected," "connected," and "docking" should be understood broadly. For example, they may refer to fixed connections, detachable connections, or integral connections; they may refer to mechanical connections or electrical connections; they may refer to direct connections or indirect connections through an intermediate medium; and they may refer to internal connections between two components. Those skilled in the art will understand the specific meanings of the above terms in this disclosure based on the specific circumstances.

[0032] It should be noted that, in the absence of conflict, the embodiments and features of the embodiments of the present invention can be combined with each other. The present invention will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0033] Example 1

[0034] A system for implementing linear regulation of a memristor's electrical conductivity comprises: a mode configuration module for generating and configuring a timing template file for voltage action and current acquisition timing; a control management module, whose input end is connected to the mode configuration module and is used to perform corresponding operations on detection points of a memristor device to be tested according to the voltage action configured in the timing template control file; a voltage conversion module, whose input end is connected to the output end of the control management module and is used to output an analog voltage signal according to an operation instruction of the control management module; a voltage drive module, whose input end is connected to the output end of the voltage conversion module and is used to enhance or reduce circuit drive capability and control the onset of the voltage signal; the memristor device to be tested comprises at least one memristor structure; the position where the voltage is connected on the memristor structure is set as a detection point, and the detection point connected to the output end of the voltage driving module; a test carrier for placing the memristor device to be tested; a plurality of test points are provided on it, each of the test points is connected to the output end of the voltage driving module; the test point is used to be connected to the detection point, and then the detection point is connected to the output end of the voltage driving module; a current acquisition module, whose input end is connected to the test point and whose output end is connected to the control management module, is used to collect the current of the test point according to the instruction of the timing template file and feed it back to the control management module; the control management module is also used to obtain the equivalent conductance information of the current memristor according to the voltage information in the timing template file and the feedback current information when the current action occurs, and store it in chronological order, thereby obtaining the conductance change curve of the memristor device to be tested arranged in chronological order.

[0035] Specifically, the memristor structure typically consists of a 1T1R or 2T2R structure composed of a transistor and a memristor. The transistor is typically a CMOS transistor, which controls the memristor. To achieve linear regulation of the memristor's electrical conductivity, the device can apply voltage or ground to detection points, typically the transistor gate, source, drain, and both sides of the memristor.

[0036] Specifically, the mode configuration module is connected to the control management module through a configuration input module; the configuration input module is a network port or a serial port for sending or receiving files.

[0037] File transfer can be completed through UDP, TCP / IP or other customized network or serial interface protocols; or through removable storage media.

[0038] The test carrier is used to place the memristor device to be tested. The test carrier is provided with a test point, which is used to connect to the detection point of the memristor structure. The test point and the detection point are connected by a fastening carrier, which can be a wire, screw or socket.

[0039] It is understandable that there are multiple test points so as to be connected to a larger number of detection points of memristor structures or detection points of memristor structures with different structures.

[0040] Since this application edits the timing template file of voltage action, the upper computer software sends the timing template file to the control management module through the network or serial port. The control management module starts to configure the specified output operation of the specified detection point in the timing template file in sequence through the operation steps imported by the timing template file, generates corresponding voltage signals, and then controls the access voltage, grounding or short circuit status of each test point. At the same time, the current acquisition module collects the current signal and processes it to obtain the conductivity change curve of the resistive resistor to be tested arranged in time sequence, thereby simplifying the research work of the linear regulation mechanism.

[0041] In one embodiment of the present application, each of the memristor structures includes a transistor and a memristor, the memristor T2 end is connected to the transistor drain, the transistor gate is set as the first detection point (201), the transistor source is set as the second detection point (202), the transistor drain is set as the third detection point (203), the memristor T1 end is set as the fourth detection point (204), and the memristor T2 end is set as the fifth detection point (205); the test points of the test vehicle are divided into multiple groups, each group has five test points, and are correspondingly connected to the five detection points; the voltage conversion module is divided into multiple paths, each path has five voltage conversion modules, and is correspondingly connected to the five detection points.

[0042] Among them, such as Figure 2 The memristor structure used in this embodiment has good versatility.

[0043] Among them, such as Figure 3 As shown, each group of test points on the test vehicle is respectively set as a first test point (301), a second test point (302), a third test point (303), a fourth test point (304) and a fifth test point (305).

[0044] The first test point (301) is connected to the first test point (201), the second test point (302) is connected to the second test point (202), the third test point (303) is connected to the third test point (203), the fourth test point (304) is connected to the fourth test point (204), and the fifth test point (305) is connected to the fifth test point (205). Specifically, they can be fastened and bound to each other by wires.

[0045] Numbering the detection and test points facilitates both connecting them and editing the timing template file. Although the transistor drain and the memristor T2 terminal are essentially the same point, they are named and drawn separately for ease of testing.

[0046] In one embodiment of the present application, the voltage driving module includes an electronic switch and a driving circuit; the electronic switch is located at the output of the voltage driving circuit, including a pulse end, a ground end and a floating end, and is used to realize the switching of the driving test point between the pulse, ground and floating states, thereby controlling the on and off of the voltage signal; the driving circuit is divided into a boost circuit and a buck circuit, and is used to enhance the voltage signal.

[0047] Specifically, the voltage driver module controls the operation of the electronic switch according to the voltage action configured in the timing template file, connecting the test point to the pulse terminal or the ground terminal, thereby applying the set voltage signal to the corresponding test point. The test vehicle includes an expandable number of test points, each of which is independently configured with positive voltage, negative voltage, and ground mode. The electronic switch is activated to apply positive and negative voltage or ground to the test point.

[0048] Example 2

[0049] A method for achieving linear regulation of a memristor's electrical conductivity is implemented using the system described above, and includes the following steps: placing a memristor device to be tested on a test vehicle, connecting detection points of the memristor structure to be tested with test points of the test vehicle; numbering the test points; compiling a timing template file based on the test point numbers; importing the timing template file into a control management module; sequentially starting to configure and implement specified voltage output operations according to the voltage parameters and actions configured in the timing template file; simultaneously collecting currents at corresponding test points; obtaining equivalent conductance information of the current memristor based on the voltage information in the timing template file and the feedback current information when the current action occurs; and storing the equivalent conductance information in chronological order to obtain a conductance change curve of the memristor device to be tested arranged in chronological order.

[0050] Specifically, the voltage parameters include pulse amplitude, pulse width, and pulse number. Depending on the material of the memristor, the required pulse amplitude varies; depending on the linear regulation strategy, the required pulse width and pulse number also vary.

[0051] The timing template file applies voltages with preset parameters to corresponding test points in a preset order, so that the control management module can perform actions on the corresponding test points according to the configuration of the timing template file.

[0052] Specifically, the host computer software edits various operation test points, as well as the voltage parameters of the test point voltage signal and the grounding test point to ensure that the test process is continuous, reduce the impact on the test speed, and ensure the accuracy of the test results.

[0053] In one embodiment of the present application, writing a timing template file includes the following steps:

[0054] Write the memristor initialization operation mode to form the initialization atomic operation file;

[0055] Write the memristor SET operation mode to form a SET atomic operation file;

[0056] Write the memristor RESET operation mode to form the RESET atomic operation file;

[0057] Write the current reading operation mode to form the reading atomic operation file;

[0058] Specify the operation combination, operation sequence and operation times of the initialization atomic operation file, SET atomic operation file, RESET atomic operation file and read atomic operation file, complete the editing of a memristor test plan, and form a test timing template file.

[0059] Specifically, the applied voltage signal and the test point number of the grounding for the memristor initialization operation, the pulse amplitude, pulse width and number of pulses of the voltage signal are edited through the host computer software; the applied voltage signal and the test point number of the grounding for the memristor SET operation, the pulse amplitude, pulse width and number of pulses of the voltage signal are edited through the host computer software; the applied voltage signal and the test point number of the grounding for the memristor RESET operation, the pulse amplitude, pulse width and number of pulses of the voltage signal are edited through the host computer software.

[0060] The SET operation is the process of setting the resistance of the memristor to the required resistance, and a positive voltage is generally applied. The RESET operation generally applies a negative voltage, and the initialization operation generally also applies a positive voltage.

[0061] The timing template file uses the atomic operation file of the defined memristor test and is combined and written in chronological order to complete the compilation of a memristor test plan. The timing template file must specify the number of repeated operations of the atomic operation.

[0062] The host computer software sends the timing template control file to the pattern configuration input module via the network or serial port. The control management module, based on the operation steps imported by the pattern configuration input module, controls the state of each configuration point through electronic switches, connecting voltage, grounding, and disconnecting circuits, and sequentially initiates the output operations specified in the configuration file in a chronological order. The logic in the control perfusion module is responsible for generating digital signals indicating the voltage and the pulse duration described in the file.

[0063] The voltage conversion module outputs analog voltage according to the voltage indication signal of the mode control management module. The module supports multi-channel output.

[0064] The voltage driver module is located after the voltage conversion module and enhances the circuit's driving capability. The voltage driver module also contains an electronic switch. Depending on the configuration file, the electronic switch and its contacts can be connected to a voltage pulse, grounded, or left floating.

[0065] The current acquisition module is responsible for collecting current values ​​between designated test points. This acquisition is initiated by the timing template file. The current acquisition results are fed back to the value mode control management module. Based on the voltage value in the timing template control file and the formula G = i / V, the current equivalent conductance of the memristor is calculated and recorded in chronological order in the test result file.

[0066] According to the above test steps, researchers can obtain the conductance change curve of the memristor to be tested arranged in chronological order, thereby simplifying the research work on the linear regulation mechanism.

[0067] In one embodiment of the present application, a memristor initialization operation mode is programmed, including the following steps: applying a voltage signal to the first test point 301, applying a voltage signal to the third or fifth test point 305, and setting the pulse amplitude and pulse width of the applied voltage signal; setting the second test point 302 and the fourth test point 304 to be grounded; setting the second test point 302 as a current collection point to collect the current value; processing the collected current value and the applied voltage amplitude to obtain a current conductance value G=I / U; judging whether G is greater than a preset threshold; if it is less than or equal to the preset threshold, continuing the current action; if it is greater than the preset threshold, completing the initialization action.

[0068] In one embodiment of the present application, programming a memristor SET operation mode includes the following steps: setting the first test point 301 and the second test point 302 to be suspended; setting the third test point 303 or the fifth test point 305 to be grounded; applying a voltage signal to the fourth test point 304, and setting the pulse amplitude, pulse width and number of pulses of the applied voltage signal; when the number of pulses of the voltage signal reaches the set number, the SET action is completed.

[0069] In one embodiment of the present application, programming a memristor RESET operation mode includes the following steps: setting the first test point 301 and the second test point 302 to be suspended; setting the fourth test point 304 to be grounded; applying a voltage signal to the third test point 303 or the fifth test point 305, and setting the pulse amplitude, pulse width and number of pulses of the applied voltage signal; when the number of pulses of the voltage signal reaches the set number, the RESET action is completed.

[0070] In one embodiment of the present application, a current reading operation mode is programmed, including the following steps: setting the pulse voltage amplitude, pulse width and pulse number of the reading current; when the pulse voltage amplitude, pulse width and pulse number reach the preset reading values, the current reading action is completed.

[0071] Specifically, Figure 2 This section takes an example to illustrate how to configure a timing template file for a test.

[0072] In this example, a host computer (PC) is used to edit the test template. For the memristor device tested in this example, the voltage pulse amplitude is set to 0.6V, and the pulse width is set to 10us and 100us.

[0073] Complete the initialization action definition for this example. Connect a bias voltage to the memristor T2 terminal and the transistor gate, setting the applied voltage signal to a pulse amplitude of 0.6V and a pulse width of 10µs. Read the transistor drain current Is. Define the threshold conductance Gforming. Let G = Is / 0.6V. When G > Gforming, the initialization action is complete. Otherwise, continue with the current template definition action.

[0074] Complete the SET action definition in this example. Input voltage to memristor T1, ground memristor T2, set the voltage pulse amplitude to 0.6V, pulse width to 10µs, and pulse impulse times to 200.

[0075] Complete the definition of the RESET action in this example. Input voltage to the memristor T2 terminal, ground the memristor T1 terminal, set the voltage pulse amplitude to -0.6V, the pulse width to 10us, and the number of pulse impacts to 200 times.

[0076] Complete the read action definition in this example, setting the read voltage pulse amplitude to 0.2V, pulse width to 100us, and pulse impact times to 10 times.

[0077] By completing the combination of the above basic actions, such as initialization action once, SET action once, and RESET action once, a test file template for the overall test solution is created. The file allocates the connection method of the electronic switch according to the specific pin distribution of the memristor in this embodiment.

[0078] The current test module reads the current and controls the management module to complete the conductance conversion. The configuration file's control steps implement initialization, conductance incremental linearity testing, conductance decrement linearity testing, and current readback.

[0079] The above description is merely a preferred embodiment of the present invention and an illustration of the technical principles employed. Those skilled in the art should understand that the scope of the invention is not limited to the technical solutions formed by the specific combination of the above-mentioned technical features, but also encompasses other technical solutions formed by any combination of the above-mentioned technical features or their equivalents without departing from the inventive concept. For example, a technical solution formed by replacing the above-mentioned features with (but not limited to) technical features with similar functions disclosed in the present invention.

Claims

1. A system for realizing linear regulation of a memristor, characterized in that: include: Mode configuration module, used to generate and configure the timing template file for voltage action and current acquisition timing; A control management module, whose input terminal is connected to the mode configuration module, is used to control the voltage action configured in the timing template and perform corresponding operations on the detection points of the memristor device to be tested; a voltage conversion module, whose input end is connected to the output end of the control management module, and is used to output an analog voltage signal according to the operation instruction of the control management module; A voltage driving module, whose input end is connected to the output end of the voltage conversion module, is used to enhance or reduce the circuit driving capability and control the start of the voltage signal; The memristor device to be tested includes at least one memristor structure; the position where the voltage is connected on the memristor structure is set as a detection point, and the detection point is connected to the output end of the voltage driving module; A test carrier for placing the memristor device to be tested; A plurality of test points are provided on it, each of which is connected to the output end of the voltage driving module; the test point is used to be connected to the detection point, and the detection point is then connected to the output end of the voltage driving module; A current acquisition module, whose input end is connected to the test point and whose output end is connected to the control management module, is used to collect the current of the test point according to the instruction of the timing template file and feed it back to the control management module; The control management module is further configured to obtain the current equivalent conductance information of the memristor based on the voltage information and the feedback current information in the timing template file when the current action occurs, and store the information in chronological order, thereby obtaining a conductance change curve of the memristor device to be tested arranged in chronological order; The mode configuration module is used to generate a timing template file. The timing template file is composed of atomic operation files and includes: Initialize the atomic operation file: configure the pulse voltage of the first detection point and the third / fifth detection point, ground the second and fourth detection points, dynamically collect current and calculate the conductance value G, and continue to apply pulses until G> the preset threshold; SET atomic operation file: configure the first and second detection points to be suspended, the third / fifth detection points to be grounded, and the fourth detection point to apply a voltage with the set pulse number and parameters; RESET atomic operation file: configure the first and second detection points to be suspended, the fourth detection point to be grounded, and the third / fifth detection points to apply a voltage with a set number of pulses and parameters; Read atomic operation file: configure pulse parameters for reading current; Each of the memristor structures includes a transistor and a memristor, the memristor T2 end is connected to the transistor drain, the transistor gate is set as the first detection point (201), the transistor source is set as the second detection point (202), the transistor drain is set as the third detection point (203), the memristor T1 end is set as the fourth detection point (204), and the memristor T2 end is set as the fifth detection point (205); The test points of the test vehicle are divided into multiple groups, each group has five test points, which are connected to the five detection points; The voltage conversion modules are divided into multiple paths, and the number of voltage conversion modules in each path is five, which are connected to five detection points accordingly.

2. A system for implementing electrical linear adjustment of a memristor according to claim 1, characterized in that: The voltage driving module includes an electronic switch and a driving circuit; The electronic switch is located at the output of the voltage driving circuit, including a pulse terminal, a ground terminal and a floating terminal, and is used to switch the driving test point between the pulse receiving, grounding and floating states, thereby controlling the on and off of the voltage signal; The driving circuit is divided into a boost circuit and a buck circuit, and is used to enhance the voltage signal.

3. A method for realizing linear adjustment of a memristor, characterized in that: The system according to any one of claims 1 to 2 is implemented, comprising the following steps: Placing the memristor device to be tested on a test vehicle, and connecting the detection point of the memristor structure to be tested to the test point of the test vehicle; Number the test points; Write the timing template file according to the test point number; Import the timing template file into the control management module; According to the voltage parameters and actions configured in the timing template file, the configuration is started in sequence and the specified voltage output operation is realized; At the same time, the current of the corresponding test point is collected; According to the voltage information in the timing template file and the feedback current information when the current action occurs, the equivalent conductance information of the current memristor is obtained; The equivalent conductance information is stored in chronological order, and then the conductance change curve of the memristor device to be tested arranged in chronological order is obtained.

4. The method for realizing linear adjustment of a memristor electrical conductor according to claim 3, characterized in that: Writing a timing template file includes the following steps: Write the memristor initialization operation mode to form the initialization atomic operation file; Write the memristor SET operation mode to form a SET atomic operation file; Write the memristor RESET operation mode to form the RESET atomic operation file; Write the current reading operation mode to form the reading atomic operation file; Specify the operation combination, operation sequence and operation times of the initialization atomic operation file, SET atomic operation file, RESET atomic operation file and read atomic operation file, complete the editing of a memristor test plan, and form a test timing template file.

5. The method for implementing electrical linearity adjustment of a memristor according to claim 4, characterized in that: Programming the memristor initialization operation mode includes the following steps: Applying a voltage signal to the first test point (301), applying a voltage signal to the third or fifth test point (305), and setting the pulse amplitude and pulse width of the applied voltage signal; Setting the second test point (302) and the fourth test point (304) to ground; Setting the second test point (302) as a current collection point to collect the current value; The collected current value and applied voltage amplitude are processed to obtain the current conductance value G=I / U; Determine whether G is greater than a preset threshold; If it is less than or equal to the preset threshold, continue the current action; If it is greater than the preset threshold, the initialization action is completed.

6. The method for implementing electrical linearity adjustment of a memristor according to claim 4, characterized in that: Programming the memristor SET operation mode includes the following steps: Setting the first test point (301) and the second test point (302) to be suspended; Setting the third test point (303) or the fifth test point (305) to ground; Applying a voltage signal to the fourth test point (304), and setting the pulse amplitude, pulse width and pulse number of the applied voltage signal; When the pulse number of the voltage signal reaches the set number, the SET action is completed.

7. The method for realizing linear adjustment of a memristor electrical conductor according to claim 4, characterized in that: Programming the memristor RESET operation mode includes the following steps: Setting the first test point (301) and the second test point (302) to be suspended; Setting the fourth test point (304) to ground; Applying a voltage signal to the third test point (303) or the fifth test point (305), and setting the pulse amplitude, pulse width and pulse number of the applied voltage signal; When the pulse number of the voltage signal reaches the set number, the RESET action is completed.

8. The method for implementing electrical linearity adjustment of a memristor according to claim 4, characterized in that: Programming the current reading operation mode includes the following steps: Set the pulse voltage amplitude, pulse width and pulse number of the reading current; When the pulse voltage amplitude, pulse width and pulse number reach the preset reading values, the current reading action is completed.

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