A power device protection circuit

Abstract

The application relates to a power device protection circuit, which comprises an MCU circuit for generating a motor driving signal; a driving buffer circuit for driving control and buffer processing of the motor driving signal according to an overcurrent protection signal; a power inverter circuit for inverting processing of the motor driving signal after the buffer processing and current limiting protection processing; an overcurrent protection circuit for generating the overcurrent protection signal according to an overcurrent sampling signal; a current sampling circuit for current sampling of the power inverter circuit and generating the current limiting sampling signal and the overcurrent sampling signal; a DA output circuit for digital-analog conversion output of the motor driving signal; and a current limiting protection circuit for generating a current limiting protection signal according to the motor driving signal after the digital-analog conversion and the current limiting sampling signal. The application can reduce motor faults caused by excessive current through the current limiting protection and the overcurrent protection, realizes protection of power devices in a server, and prolongs the service life of the power devices.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of servo drive protection, and in particular to a power device protection circuit. BACKGROUND

[0002] In the prior art, as shown in Figure 1 , it is a whole block diagram of a three-phase or single-phase servo (frequency converter) driver, which mainly functions to rectify alternating current into direct current, and then inversely convert the direct current into alternating current required by a motor to control the motor. Since a large number of semiconductor devices, such as rectifier bridge modules, IGBT (MOS), etc., are used in the whole driver, the driver needs to work stably for a long time, and therefore it is necessary to ensure that various devices work in their safe working conditions, and an alarm or stop working is needed when the working conditions are exceeded, and the device can work again after the abnormal conditions are eliminated. If the protection fails or the working conditions are delayed, the device will appear an unrecoverable failure. In some occasions requiring a high level, when an abnormality occurs or the working conditions are exceeded, for example, when an electric vehicle (electric forklift truck) equipped with the driver encounters a bump or a pit while climbing a slope - the most serious situation is equivalent to a blocked rotation, the driver needs to output torque and speed within its range continuously without an alarm, or it can try to output the maximum torque and speed for several times continuously, and at this time, an accurate protection circuit is needed to ensure the reliability of the driver.

[0003] In order to solve the above problems, the prior art adopts a servo driver with a driving buffer function as shown in Figure 2 , A is an MCU part, which is responsible for collecting current and outputting driving pulses to B driving buffer unit according to the state, and after processing by the driving buffer unit, driving power inverter unit C, and driving motor D at the same time. In this way, the output current can be made more gentle under the action of the driving buffer unit, thereby enhancing the reliability of the driver.

[0004] However, Figure 2 , the overall technical solution can protect most of the fields, but in some occasions, it may cause false alarms or damage to the power device, because the CPU control unit samples the output current and the overcurrent signal. Generally, the overcurrent signal is a pure hardware signal, for example, the nominal current of the power device is 80A, and the overcurrent is generally 160A. According to the characteristics of the power device, the time above 160A can only be 1uS~10uS. When blocked, the output current may oscillate beyond the overcurrent setting value, and an overcurrent alarm will be generated. If the value is not exceeded and the duration is relatively long, it may cause device failure (generally, a low-speed CPU calculates the current according to the carrier, for example, the carrier is 8K - the sampling calculation time of the PWM current is 125uS, which is much longer than 10uS, and may cause adjustment errors or cause device failure). Based on this, the driver in the prior art is not enough to protect the power device, such as IGBT tube, and is prone to cause failure of the power device, and further aging of the device. SUMMARY

[0005] Therefore, it is necessary to provide a power device protection circuit to solve the technical problem that the power device is prone to failure due to excessive current when the motor is locked at a preset value or the current sampling time is too long.

[0006] To solve the above problems, the present application provides a power device protection circuit, comprising:

[0007] The MCU circuit is configured to generate a motor drive signal.

[0008] The drive buffer circuit is electrically connected to the MCU circuit and configured to drive and control the motor drive signal according to an overcurrent protection signal and to buffer process the motor drive signal.

[0009] The power inverter circuit is electrically connected to the drive buffer circuit and configured to invert process the buffered motor drive signal and to limit current protection process the inverted motor drive signal according to a current limit protection signal.

[0010] The overcurrent protection circuit is electrically connected to the MCU circuit and the drive buffer circuit and configured to generate the overcurrent protection signal according to an overcurrent sampling signal.

[0011] The current sampling circuit is electrically connected to the power inverter circuit and the overcurrent protection circuit and configured to sample the current of the power inverter circuit and the overcurrent protection circuit and to generate a current limit sampling signal and the overcurrent sampling signal according to the sampling result.

[0012] The DA output circuit is electrically connected to the MCU circuit, the overcurrent protection circuit, and the current sampling circuit and configured to output the motor drive signal after digital-analog conversion.

[0013] The current limit protection circuit is electrically connected to the current sampling circuit and the DA output circuit and configured to generate the current limit protection signal according to the motor drive signal after digital-analog conversion and the current limit sampling signal.

[0014] Preferably, the drive buffer circuit comprises a signal drive chip UL1, a buffer chip U1, a capacitor C1, a resistor R1, and a diode D1.

[0015] The A3-A8 pins of the signal drive chip UL1 are connected to the motor drive signal, and the A1-A2 pins are grounded. The pins are connected to the overcurrent protection signal. The common terminal of the first terminal of the capacitor C1, the first terminal of the resistor R1, and the negative terminal of the diode D1 is connected; the second terminal of the capacitor C1 is connected to a 3.3V voltage; and the second terminal of the resistor R1 and the positive terminal of the diode D1 are both grounded.

[0016] The 1Y and 2Y pins of the buffer chip U1 are connected to the Y4 and Y3 pins of the signal driver chip UL1, respectively. The 1A and 2A pins are connected to the DC+ and DC- terminals, respectively. The 1OE and 2OE pins are connected to the current limiting protection signal. The VCC pin is connected to a 3.3V voltage, and the GND pin is grounded.

[0017] Preferably, the power inverter circuit includes six IGBT transistors; the current sampling circuit includes an overcurrent sampling circuit, and the overcurrent sampling circuit includes an operational amplifier OP1C and a coupling inductor L;

[0018] The collectors of the three upper IGBT transistors are all connected to the DC+ terminal, and the emitters of the three lower IGBT transistors are all connected to the DC- terminal. The three common terminals of the emitters of the three upper IGBT transistors and the collectors of the three lower IGBT transistors output three-phase current to the motor.

[0019] The coupling inductor L is used to couple the three-phase current and generate an overcurrent coupling current;

[0020] The operational amplifier OP1C is used to amplify the overcurrent coupling current to obtain the overcurrent sampling signal.

[0021] Preferably, the overcurrent protection circuit includes voltage comparators CP1C and CP1D, transistor Q1, resistors R4, R5, R6, R7, R9, R10, R12, R13, and R15, and capacitors C2, C3, C4, and C6.

[0022] One end of the resistor R9 is connected to the overcurrent sampling signal, and the other end is connected to the negative input terminal of the voltage comparator CP1D. One end of the capacitor C3 is connected to the negative input terminal of the voltage comparator CP1D, and the other end is grounded.

[0023] One end of the resistor R13 is connected to a 3.3V voltage, and the other end is connected to the positive input terminal of the voltage comparator CP1D. The resistor R12 and the capacitor C6 are connected in parallel, with their first common terminal connected to the positive input terminal of the voltage comparator CP1D and their second common terminal grounded.

[0024] One end of the resistor R4 is connected to a 3.3V voltage, and the other end is connected to the negative input terminal of the voltage comparator CP1C. The resistor R5 is connected in parallel with the capacitor C2, and the first common terminal is connected to the negative input terminal of the voltage comparator CP1C, while the second common terminal is grounded.

[0025] The positive input terminal of voltage comparator CP1C is connected to the negative input terminal of voltage comparator CP1D; the output terminal of voltage comparator CP1C is connected to the output terminal of voltage comparator CP1D; the common output terminal of voltage comparator CP1C and voltage comparator CP1D is connected to one end of resistor R15; the other end of resistor R15 is connected to one end of capacitor C7 and the MCU circuit; the other end of capacitor C7 is grounded.

[0026] The common output terminal of voltage comparator CP1C and voltage comparator CP1D is connected to one end of resistor R6. The other end of R6 is connected to the common terminal of resistor R7 and capacitor C4. The other end of capacitor C4 is grounded. The other end of resistor R7 is connected to the common terminal of resistor R2 and the base of transistor Q1. The other end of resistor R2 and the emitter of transistor Q1 are both connected to a 3.3V voltage. The collector of transistor Q1 is connected to one end of resistor R10 and the collector of transistor Q1 is connected to the G1 pin of signal driver chip UL1 to output the overcurrent protection signal. The other end of resistor R10 is grounded.

[0027] Preferably, the DA output circuit includes a multiplexer chip U2, operational amplifiers OP1A and OP1B, resistors R16, R17, R20, R23, R24, and R28, and capacitors C10 and C11.

[0028] The NC, NO, and IN terminals of the multiplexing chip U2 are connected to the MCU circuit, the G terminal is grounded, the V+ terminal is connected to a 3.3V voltage, and the COM terminal is connected to one end of the resistor R16.

[0029] The other end of resistor R16 is connected to the common terminal of resistor R17 and capacitor C10. The other end of capacitor C10 is grounded. The other end of resistor R17 and one end of capacitor C11 are both connected to the positive input terminal of operational amplifier OP1A. The other end of capacitor C11 is grounded.

[0030] The common terminal of resistors R20 and R23 is connected to the negative input terminal of operational amplifier OP1A. The other end of resistor R23 is grounded. The other end of resistor R20 is connected to the output terminal of operational amplifier OP1A. One end of resistor R24 ​​is also connected to the output terminal of operational amplifier OP1A.

[0031] The other end of resistor R24 ​​and one end of resistor R28 are both connected to the positive input terminal of operational amplifier OP1B. The other end of resistor R28 is grounded. The negative input terminal of operational amplifier OP1B is grounded. The output terminal of operational amplifier OP1B outputs a digital-to-analog converted drive motor signal.

[0032] Preferably, the current limiting protection circuit includes a CPU output signal conditioning circuit and the current limiting comparison protection circuit;

[0033] The CPU output signal conditioning circuit includes operational amplifiers OP2A and OP2B, resistors R18, R19, R21, R25, R26, R27, R30, R31, and R33, and capacitors C9, C12, C13, and C14.

[0034] The first common terminal of resistor R18 and capacitor C9 is connected to a reference voltage of 1.65V. The second common terminal of resistor R18 and capacitor C9 is connected to the positive input terminal of operational amplifier OP2A. Resistor R19 is also connected to the positive input terminal of operational amplifier OP2A. One end of resistor R25 is connected to the output terminal of operational amplifier OP1B, and the other end of resistor R25 is connected to the negative input terminal of operational amplifier OP2A. The first common terminal of resistor R21 and capacitor C12 is connected to the negative input terminal of operational amplifier OP2A, and the second common terminal of resistor R21 and capacitor C12 is connected to the output terminal of operational amplifier OP2A.

[0035] One end of resistor R26 is connected to the output terminal of operational amplifier OP1B, and the other end of resistor R26 is connected to the positive input terminal of operational amplifier OP2B. The first common terminal of resistor R27 and capacitor C13 is connected to the positive input terminal of operational amplifier OP2A. The second common terminal of resistor R27 and capacitor C13 is connected to a reference voltage of 1.65V. Resistor R30 is connected to the positive input terminal of operational amplifier OP2B. Resistor R33 is connected to the negative input terminal of operational amplifier OP2B. The first common terminal of resistor R31 and capacitor C14 is connected to the negative input terminal of operational amplifier OP2B. The second common terminal of resistor R31 and capacitor C14 is connected to the output terminal of operational amplifier OP2B.

[0036] Preferably, the current limiting comparison protection circuit includes voltage comparators CP1A and CP1B, resistors R3, R8, R11, R14, R22, and R32, and capacitors C15 and C16.

[0037] One end of resistor R22 is connected to the output terminal of operational amplifier OP2A, and the other end is grounded. One end of resistor R22 is also connected to the positive input terminal of voltage comparator CP1A. The negative input terminal of voltage comparator CP1A is connected to the negative input terminal of voltage comparator CP1D, and also to the positive input terminal of voltage comparator CP1B. The output terminal of voltage comparator CP1A is connected to the common terminal of resistors R3 and R8. The other end of resistor R3 is connected to a 3.3V voltage. The other end of resistor R8 is connected to the 1OE pin of buffer chip U1. One end of capacitor C16 is also connected to the 1OE pin of buffer chip U1, and the other end is grounded.

[0038] One end of resistor R32 is connected to the output terminal of operational amplifier OP2B, and the other end is grounded. One end of resistor R32 is also connected to the negative input terminal of voltage comparator CP1B. The output terminal of voltage comparator CP1A is connected to the common terminal of resistors R11 and R14. The other end of resistor R11 is connected to a 3.3V voltage. The other end of resistor R14 is connected to the 2OE pin of buffer chip U1. One end of capacitor C15 is also connected to the common terminal of OP2B, and the other end is grounded.

[0039] Preferably, the current sampling circuit further includes a current limiting sampling circuit, which includes diodes D2 and D3;

[0040] The negative terminal of diode D2 is connected to the 2OE pin of buffer chip U1, and the positive terminal is connected to the MCU circuit.

[0041] The negative terminal of diode D3 is connected to the 1OE pin of buffer chip U1, and the positive terminal is connected to the MCU circuit.

[0042] Preferably, it further includes a narrow pulse limiting unit, the input terminal of which is connected to the output terminal of the buffer chip U1, and the output terminal of which is connected to the input terminal of the power inverter circuit.

[0043] Preferably, the signal driver chip UL1 is model SN74LVC541, the buffer chip U1 is model SN74LVC2G126, and the multiplexing chip U2 is model TS5A3159.

[0044] The beneficial effects of this invention are:

[0045] This invention reduces motor failures caused by excessive current by adding current limiting and overcurrent protection, thus protecting the power devices in the servo and improving their lifespan.

[0046] Furthermore, by performing current limiting and overcurrent monitoring on the motor drive signal, and comparing the preset current limiting value and preset overcurrent value, the drive buffer circuit and power inverter circuit can be controlled in a timely manner to interrupt the current signal output, thereby stopping the motor in time and reducing the occurrence of power device (such as IGBT / MOS / PIM transistor) failures or even damage caused by current oscillations. Attached Figure Description

[0047] Figure 1 This is a circuit framework diagram of an embodiment of a single-phase or multi-phase servo based on IGBT power devices in the prior art;

[0048] Figure 2 A circuit diagram of an embodiment of a single-phase or multi-phase servo based on IGBT power devices with added drive buffering function to the prior art.

[0049] Figure 3 A circuit framework diagram of an embodiment of the power device protection circuit provided by the present invention;

[0050] Figure 4 and Figure 5 A circuit schematic diagram of an embodiment of the power device protection circuit provided by the present invention;

[0051] Figure 6 A circuit schematic diagram of an embodiment of the drive buffer circuit provided by the present invention;

[0052] Figure 7 A circuit schematic diagram of an embodiment of the overcurrent protection circuit provided by the present invention;

[0053] Figure 8 A circuit schematic diagram of an embodiment of the DA output circuit provided by the present invention;

[0054] Figure 9 A circuit schematic diagram of an embodiment of the current limiting protection circuit and current sampling circuit provided by the present invention;

[0055] Figure 10 A circuit schematic diagram of an embodiment of the narrow pulse limiting unit provided by the present invention. Detailed Implementation

[0056] Preferred embodiments of the present invention will now be described in detail with reference to the accompanying drawings, which form part of this application and are used together with the embodiments of the present invention to illustrate the principles of the present invention, but are not intended to limit the scope of the present invention.

[0057] like Figure 3 As shown, an embodiment of the present invention provides a power device protection circuit, including:

[0058] The MCU circuit 10 is used to generate a motor drive signal, wherein the motor drive signal can be a PWM drive signal;

[0059] The drive buffer circuit 20 is electrically connected to the MCU circuit 10 and is used to drive and control the motor drive signal according to the overcurrent protection signal, and also to buffer the motor drive signal.

[0060] The power inverter circuit 30 is electrically connected to the drive buffer circuit 20 and is used to invert the buffered motor drive signal and perform current limiting protection on the inverted motor drive signal according to the current limiting protection signal.

[0061] The overcurrent protection circuit 40 is electrically connected to the MCU circuit 10 and the drive buffer circuit 20, and is used to generate the overcurrent protection signal based on the overcurrent sampling signal.

[0062] The current sampling circuit 50 is electrically connected to the power inverter circuit 30 and the overcurrent protection circuit 40, and is used to sample the current of the power inverter circuit 30 and the overcurrent protection circuit 40, and generate a current limiting sampling signal and the overcurrent sampling signal based on the sampling results.

[0063] The DA output circuit 60 is electrically connected to the MCU circuit 10, the overcurrent protection circuit 40 and the current sampling circuit 50, and is used to convert the motor drive signal into a digital-to-analog conversion output.

[0064] The current limiting protection circuit 70 is electrically connected to the current sampling circuit 50 and the DA output circuit 60, and is used to generate the current limiting protection signal based on the motor drive signal after digital-to-analog conversion and the current limiting sampling signal.

[0065] It should be noted that this invention is based on existing technology. Figure 2 Based on the existing protection scheme, a current-limiting protection circuit, a DA output circuit, and a current-limiting protection circuit are added. This way, while the original protection scheme remains unchanged, the current-limiting protection circuit is added to protect against short-term overheating and abnormal load fluctuations. For example, if the driver output rated current is 30A and the power device short-circuit current is 200A, an overcurrent protection current of 150A is generally set.

[0066] More specifically, the power device protection concept of the present invention is as follows: the MCU circuit 10 sets torque limits according to different loads (as shown in Table 1 below), and then the MCU circuit 10 outputs a corresponding analog signal (which can be PWM). Then the DA output circuit 60 converts the signal into a comparison voltage and compares it with the motor output current. When the output current changes abruptly due to load or other sudden conditions, the current limiting protection circuit 70 outputs a signal to the MCU circuit 10. The MCU circuit 10 uses this signal to time and the sampled temperature signal to determine whether the temperature of the external power device is within the safe range. At the same time, the current limiting protection circuit will shut down the bridge arm that is currently exceeding the current (i.e., the IGBT in the power inverter circuit 30).

[0067] Table 1:

[0068]

[0069] To further explain the power device protection circuit of this invention, please refer to [the relevant documentation / reference needed]. Figures 4-5 , Figures 4-5 A circuit diagram of an embodiment of the power device protection circuit provided by the present invention.

[0070] It should be noted that, Figure 4 and Figure 5 It is actually a single circuit diagram, but for ease of reference, it has been divided into two ends, and the two diagrams are connected by a "J" line.

[0071] Specifically, in Figure 4 In this circuit, the power device protection circuit includes the MCU circuit, the drive buffer circuit, the overcurrent protection circuit, a portion of the current sampling circuit (i.e., the overcurrent sampling circuit), the DA output circuit, and the current limiting protection circuit. Figure 5 The power device protection circuit includes another part of the power inverter circuit and the current sampling circuit (i.e., the current limiting sampling circuit), and also includes a motor.

[0072] Compared with the prior art, the present invention reduces motor failures caused by excessive current by adding current limiting protection and overcurrent protection, thereby protecting the power devices in the servo and improving the service life of the power devices.

[0073] Furthermore, by performing current limiting and overcurrent monitoring on the motor drive signal, and comparing the preset current limiting value and preset overcurrent value, the drive buffer circuit and power inverter circuit can be controlled in a timely manner to interrupt the current signal output, thereby stopping the motor in time and reducing the occurrence of power device (such as IGBT / MOS / PIM transistor) failures or even damage caused by current oscillations.

[0074] To further explain the composition of each circuit structure in the power device protection circuit, please refer to [link / reference]. Figures 5-10 .

[0075] As a preferred embodiment, please refer to Figure 6 , Figure 6 The circuit diagram is a schematic diagram of an embodiment of the drive buffer circuit provided by the present invention. The drive buffer circuit includes a signal drive chip UL1, a buffer chip U1, a capacitor C1, a resistor R1, and a diode D1.

[0076] The motor drive signal is connected to pins A3-A8 of the signal driver chip UL1, and pins A1-A2 are grounded. The overcurrent protection signal is connected to the pin. The common terminal of the first terminal of the capacitor C1, the first terminal of the resistor R1, and the negative terminal of the diode D1 is connected; the second terminal of the capacitor C1 is connected to a 3.3V voltage; and the second terminal of the resistor R1 and the positive terminal of the diode D1 are both grounded.

[0077] The 1Y and 2Y pins of the buffer chip U1 are connected to the Y4 and Y3 pins of the signal driver chip UL1, respectively. The 1A and 2A pins are connected to the DC+ and DC- terminals, respectively. The 1OE and 2OE pins are connected to the current limiting protection signal. The VCC pin is connected to a 3.3V voltage, and the GND pin is grounded.

[0078] It should be noted that the signal driver chip UL1 is model number SN74LVC541 and the buffer chip U1 is model number SN74LVC2G126.

[0079] It should also be noted that the signal drives the UL1 chip. The overcurrent protection signal is connected to the pin, and the output of the motor drive signal is interrupted under the control of the overcurrent protection signal. The current limiting protection signal is connected to the OE and 2OE pins of the buffer chip U1, and the output of the motor drive signal is controlled by comparing the current of the current limiting protection signal.

[0080] As a preferred embodiment, please refer to Figure 5 , Figure 5 This is also a circuit schematic diagram of an embodiment of the power inverter circuit provided by the present invention. The power inverter circuit includes 6 IGBT transistors; the current sampling circuit includes an overcurrent sampling circuit, and the overcurrent sampling circuit includes an operational amplifier OP1C and a coupling inductor L.

[0081] The collectors of the three upper IGBT transistors are all connected to the DC+ terminal, and the emitters of the three lower IGBT transistors are all connected to the DC- terminal. The three common terminals of the emitters of the three upper IGBT transistors and the collectors of the three lower IGBT transistors output three-phase current to the motor.

[0082] The coupling inductor L is used to couple the three-phase current and generate an overcurrent coupling current;

[0083] The operational amplifier OP1C is used to amplify the overcurrent coupling current to obtain the overcurrent sampling signal.

[0084] It should be noted that overcurrent sampling is performed through the coupling inductor L and the operational amplifier OP1C, and then fed back to the MCU circuit and the overcurrent protection circuit, so that the overcurrent protection circuit outputs an overcurrent protection signal to control the motor drive signal at the end of the drive buffer circuit.

[0085] As a preferred embodiment, please refer to Figure 7 , Figure 7 The circuit diagram is a schematic diagram of an embodiment of the overcurrent protection circuit provided by the present invention. The overcurrent protection circuit includes voltage comparators CP1C and CP1D, transistor Q1, resistors R4, R5, R6, R7, R9, R10, R12, R13, and R15, and capacitors C2, C3, C4, and C6.

[0086] One end of the resistor R9 is connected to the overcurrent sampling signal, and the other end is connected to the negative input terminal of the voltage comparator CP1D. One end of the capacitor C3 is connected to the negative input terminal of the voltage comparator CP1D, and the other end is grounded.

[0087] One end of the resistor R13 is connected to a 3.3V voltage, and the other end is connected to the positive input terminal of the voltage comparator CP1D. The resistor R12 and the capacitor C6 are connected in parallel, with their first common terminal connected to the positive input terminal of the voltage comparator CP1D and their second common terminal grounded.

[0088] One end of the resistor R4 is connected to a 3.3V voltage, and the other end is connected to the negative input terminal of the voltage comparator CP1C. The resistor R5 is connected in parallel with the capacitor C2, and the first common terminal is connected to the negative input terminal of the voltage comparator CP1C, while the second common terminal is grounded.

[0089] The positive input terminal of voltage comparator CP1C is connected to the negative input terminal of voltage comparator CP1D; the output terminal of voltage comparator CP1C is connected to the output terminal of voltage comparator CP1D; the common output terminal of voltage comparator CP1C and voltage comparator CP1D is connected to one end of resistor R15; the other end of resistor R15 is connected to one end of capacitor C7 and the MCU circuit; the other end of capacitor C7 is grounded.

[0090] The common output terminal of voltage comparator CP1C and voltage comparator CP1D is connected to one end of resistor R6. The other end of R6 is connected to the common terminal of resistor R7 and capacitor C4. The other end of capacitor C4 is grounded. The other end of resistor R7 is connected to the common terminal of resistor R2 and the base of transistor Q1. The other end of resistor R2 and the emitter of transistor Q1 are both connected to a 3.3V voltage. The collector of transistor Q1 is connected to one end of resistor R10 and the collector of transistor Q1 is connected to the G1 pin of signal driver chip UL1 to output the overcurrent protection signal. The other end of resistor R10 is grounded.

[0091] It should be noted that after the overcurrent sampling signal is connected to one end of resistor R9, the voltage is compared with the voltage of the voltage comparator CP1D through voltage comparator CP1C, and a high level or low level (i.e., overcurrent protection signal) is output based on different voltage comparison results. When a high level is output, the signal is protected by... The pin controls the signal driver chip UL1 to present a high impedance state, thereby interrupting the motor drive signal output. When the output is low, it is controlled by... The pin controls the signal driver chip UL1 to present a valid input and output the motor drive signal normally.

[0092] As a preferred embodiment, please refer to Figure 8 , Figure 8 The circuit schematic diagram is provided for an embodiment of the DA output circuit provided by the present invention. The DA output circuit includes a multiplexer chip U2, operational amplifiers OP1A and OP1B, resistors R16, R17, R20, R23, R24 and R28, and capacitors C10 and C11.

[0093] The NC, NO, and IN terminals of the multiplexing chip U2 are connected to the MCU circuit, the G terminal is grounded, the V+ terminal is connected to a 3.3V voltage, and the COM terminal is connected to one end of the resistor R16.

[0094] The other end of resistor R16 is connected to the common terminal of resistor R17 and capacitor C10. The other end of capacitor C10 is grounded. The other end of resistor R17 and one end of capacitor C11 are both connected to the positive input terminal of operational amplifier OP1A. The other end of capacitor C11 is grounded.

[0095] The common terminal of resistors R20 and R23 is connected to the negative input terminal of operational amplifier OP1A. The other end of resistor R23 is grounded. The other end of resistor R20 is connected to the output terminal of operational amplifier OP1A. One end of resistor R24 ​​is also connected to the output terminal of operational amplifier OP1A.

[0096] The other end of resistor R24 ​​and one end of resistor R28 are both connected to the positive input terminal of operational amplifier OP1B. The other end of resistor R28 is grounded. The negative input terminal of operational amplifier OP1B is grounded. The output terminal of operational amplifier OP1B outputs a digital-to-analog converted drive motor signal.

[0097] It should be noted that the multiplexing chip U2 is model TS5A3159, and the NC terminal of the multiplexing chip U2 is connected to the PWM signal output in the locked shaft state, the NO terminal is connected to the PWM signal output in the normal state, and the IN terminal is connected to the MCU control signal. That is, it adds protection for the locked shaft (complete stall) under load conditions. When the MCU circuit detects that the output current is DC, it directly switches the control signal. At this time, only 100% torque is output. In the case of complete stall, it prevents slippage and prevents damage to the device.

[0098] It should be noted that the DA current conversion output (i.e., digital-to-analog signal conversion) is achieved through operational amplifiers OP1A and OP1B, resistors R16, R17, R20, R23, R24, R28, and capacitors C10 and C11.

[0099] As a preferred embodiment, please refer to Figure 9 , Figure 9 The circuit diagram is provided for an embodiment of the current limiting protection circuit and current sampling circuit provided by the present invention. The current limiting protection circuit includes a CPU output signal conditioning circuit and the current limiting comparison protection circuit.

[0100] The CPU output signal conditioning circuit includes operational amplifiers OP2A and OP2B, resistors R18, R19, R21, R25, R26, R27, R30, R31, and R33, and capacitors C9, C12, C13, and C14.

[0101] The first common terminal of resistor R18 and capacitor C9 is connected to a reference voltage of 1.65V. The second common terminal of resistor R18 and capacitor C9 is connected to the positive input terminal of operational amplifier OP2A. Resistor R19 is also connected to the positive input terminal of operational amplifier OP2A. One end of resistor R25 is connected to the output terminal of operational amplifier OP1B, and the other end of resistor R25 is connected to the negative input terminal of operational amplifier OP2A. The first common terminal of resistor R21 and capacitor C12 is connected to the negative input terminal of operational amplifier OP2A, and the second common terminal of resistor R21 and capacitor C12 is connected to the output terminal of operational amplifier OP2A.

[0102] One end of resistor R26 is connected to the output terminal of operational amplifier OP1B, and the other end of resistor R26 is connected to the positive input terminal of operational amplifier OP2B. The first common terminal of resistor R27 and capacitor C13 is connected to the positive input terminal of operational amplifier OP2A. The second common terminal of resistor R27 and capacitor C13 is connected to a reference voltage of 1.65V. Resistor R30 is connected to the positive input terminal of operational amplifier OP2B. Resistor R33 is connected to the negative input terminal of operational amplifier OP2B. The first common terminal of resistor R31 and capacitor C14 is connected to the negative input terminal of operational amplifier OP2B. The second common terminal of resistor R31 and capacitor C14 is connected to the output terminal of operational amplifier OP2B.

[0103] Furthermore, the current limiting comparison protection circuit includes voltage comparators CP1A and CP1B, resistors R3, R8, R11, R14, R22, and R32, and capacitors C15 and C16.

[0104] One end of resistor R22 is connected to the output terminal of operational amplifier OP2A, and the other end is grounded. One end of resistor R22 is also connected to the positive input terminal of voltage comparator CP1A. The negative input terminal of voltage comparator CP1A is connected to the negative input terminal of voltage comparator CP1D, and also to the positive input terminal of voltage comparator CP1B. The output terminal of voltage comparator CP1A is connected to the common terminal of resistors R3 and R8. The other end of resistor R3 is connected to a 3.3V voltage. The other end of resistor R8 is connected to the 1OE pin of buffer chip U1. One end of capacitor C16 is also connected to the 1OE pin of buffer chip U1, and the other end is grounded.

[0105] One end of resistor R32 is connected to the output terminal of operational amplifier OP2B, and the other end is grounded. One end of resistor R32 is also connected to the negative input terminal of voltage comparator CP1B. The output terminal of voltage comparator CP1A is connected to the common terminal of resistors R11 and R14. The other end of resistor R11 is connected to a 3.3V voltage. The other end of resistor R14 is connected to the 2OE pin of buffer chip U1. One end of capacitor C15 is also connected to the common terminal of OP2B, and the other end is grounded.

[0106] In a preferred embodiment, the current sampling circuit further includes a current-limiting sampling circuit, which includes diodes D2 and D3;

[0107] The negative terminal of diode D2 is connected to the 2OE pin of the buffer chip U1, and the positive terminal is connected to the MCU circuit; the negative terminal of diode D3 is connected to the 1OE pin of the buffer chip U1, and the positive terminal is connected to the MCU circuit.

[0108] It should be noted that the voltages of the buffer chip U1 are compared by voltage comparators CP1A and CP1B and then output to the 1OE and 2OE terminals respectively. The 1OE and 2OE terminals control the level of the buffer chip U1. When the output of the buffer chip U1 is at a low level, the output is disabled; when the output of the buffer chip U1 is at a high level, the output is normal.

[0109] As a preferred embodiment, please refer to Figure 10 , Figure 10 The circuit diagram is a schematic diagram of an embodiment of the narrow pulse limiting unit provided by the present invention. The power device protection circuit further includes a narrow pulse limiting unit. The input terminal of the narrow pulse limiting unit is connected to the output terminal of the buffer chip U1, and the output terminal of the narrow pulse limiting unit is connected to the input terminal of the power inverter circuit.

[0110] It should be noted that the current limiting protection circuit may generate narrow pulse PWM output (e.g., less than 1µs). In this case, the power device may not have enough time to fully turn on, resulting in overheating and damage. By adding a narrow pulse limiting unit, pulses smaller than the power device's turn-on condition can be filtered out, thereby protecting the power device.

[0111] In summary, by adding current limiting protection and overcurrent protection, this invention can reduce motor failures caused by excessive current, protect power devices in the servo, and improve the service life of power devices.

[0112] Furthermore, by performing current limiting and overcurrent monitoring on the motor drive signal, and comparing the preset current limiting value and preset overcurrent value, the drive buffer circuit and power inverter circuit can be controlled in a timely manner to interrupt the current signal output, thereby stopping the motor in time and reducing the occurrence of power device (such as IGBT / MOS / PIM transistor) failures or even damage caused by current oscillations.

[0113] In summary, the above are merely preferred embodiments of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in the present invention should be included within the scope of protection of the present invention.

Claims

1. A power device protection circuit, characterized in that, include: MCU circuit, used to generate motor drive signals; A drive buffer circuit, electrically connected to the MCU circuit, is used to drive and control the motor drive signal according to the overcurrent protection signal, and also to buffer the motor drive signal. The drive buffer circuit includes a signal driver chip UL1, a buffer chip U1, a capacitor C1, a resistor R1, and a diode D1. Pins A3-A8 of the signal driver chip UL1 are connected to the motor drive signal, and pins A1-A2 are grounded. The overcurrent protection signal is connected to the pin. The common terminal of the first end of the capacitor C1, the first end of the resistor R1, and the negative terminal of the diode D1 is connected. The second end of the capacitor C1 is connected to a 3.3V voltage. The second end of the resistor R1 and the positive terminal of the diode D1 are both grounded. The 1Y pin and 2Y pin of the buffer chip U1 are connected to the Y4 pin and Y3 pin of the signal driver chip UL1, respectively. The 1A pin and 2A pin are connected to the DC+ and DC- terminals, respectively. The 1OE pin and 2OE pin are connected to the current limiting protection signal. The VCC pin is connected to a 3.3V voltage. The GND pin is grounded. A power inverter circuit, electrically connected to the drive buffer circuit, is used to invert the buffered motor drive signal and perform current limiting protection on the inverted motor drive signal according to the current limiting protection signal. An overcurrent protection circuit, electrically connected to the MCU circuit and the drive buffer circuit, is used to generate the overcurrent protection signal based on the overcurrent sampling signal; A current sampling circuit, electrically connected to the power inverter circuit and the overcurrent protection circuit, is used to sample the current of the power inverter circuit and the overcurrent protection circuit, and generate a current limiting sampling signal and the overcurrent sampling signal based on the sampling results; The DA output circuit is electrically connected to the MCU circuit, the overcurrent protection circuit, and the current sampling circuit, and is used to convert the motor drive signal into a digital-to-analog converter and output it. A current limiting protection circuit, electrically connected to the current sampling circuit and the DA output circuit, is used to generate the current limiting protection signal based on the motor drive signal after digital-to-analog conversion and the current limiting sampling signal.

2. The power device protection circuit according to claim 1, characterized in that, The power inverter circuit includes six IGBT transistors; the current sampling circuit includes an overcurrent sampling circuit, and the overcurrent sampling circuit includes an operational amplifier OP1C and a coupling inductor L; The collectors of the three upper IGBT transistors are all connected to the DC+ terminal, and the emitters of the three lower IGBT transistors are all connected to the DC- terminal. The three common terminals of the emitters of the three upper IGBT transistors and the collectors of the three lower IGBT transistors output three-phase current to the motor. The coupling inductor L is used to couple the three-phase current and generate an overcurrent coupling current; The operational amplifier OP1C is used to amplify the overcurrent coupling current to obtain the overcurrent sampling signal.

3. The power device protection circuit according to claim 2, characterized in that, The overcurrent protection circuit includes voltage comparators CP1C and CP1D, transistor Q1, resistors R4, R5, R6, R7, R9, R10, R12, R13, and R15, and capacitors C2, C3, C4, and C6. One end of the resistor R9 is connected to the overcurrent sampling signal, and the other end is connected to the negative input terminal of the voltage comparator CP1D. One end of the capacitor C3 is connected to the negative input terminal of the voltage comparator CP1D, and the other end is grounded. One end of the resistor R13 is connected to a 3.3V voltage, and the other end is connected to the positive input terminal of the voltage comparator CP1D. The resistor R12 and the capacitor C6 are connected in parallel, with their first common terminal connected to the positive input terminal of the voltage comparator CP1D and their second common terminal grounded. One end of the resistor R4 is connected to a 3.3V voltage, and the other end is connected to the negative input terminal of the voltage comparator CP1C. The resistor R5 is connected in parallel with the capacitor C2, and the first common terminal is connected to the negative input terminal of the voltage comparator CP1C, while the second common terminal is grounded. The positive input terminal of voltage comparator CP1C is connected to the negative input terminal of voltage comparator CP1D; the output terminal of voltage comparator CP1C is connected to the output terminal of voltage comparator CP1D; the common output terminal of voltage comparator CP1C and voltage comparator CP1D is connected to one end of resistor R15; the other end of resistor R15 is connected to one end of capacitor C7 and the MCU circuit; the other end of capacitor C7 is grounded. The common output terminal of voltage comparator CP1C and voltage comparator CP1D is connected to one end of resistor R6. The other end of R6 is connected to the common terminal of resistor R7 and capacitor C4. The other end of capacitor C4 is grounded. The other end of resistor R7 is connected to the common terminal of resistor R2 and the base of transistor Q1. The other end of resistor R2 and the emitter of transistor Q1 are both connected to a 3.3V voltage. The collector of transistor Q1 is connected to one end of resistor R10 and the collector of transistor Q1 is connected to the G1 pin of signal driver chip UL1 to output the overcurrent protection signal. The other end of resistor R10 is grounded.

4. The power device protection circuit according to claim 3, characterized in that, The DA output circuit includes a multiplexer chip U2, operational amplifiers OP1A and OP1B, resistors R16, R17, R20, R23, R24, and R28, and capacitors C10 and C11. The NC, NO, and IN terminals of the multiplexing chip U2 are connected to the MCU circuit, the G terminal is grounded, the V+ terminal is connected to a 3.3V voltage, and the COM terminal is connected to one end of the resistor R16. The other end of resistor R16 is connected to the common terminal of resistor R17 and capacitor C10. The other end of capacitor C10 is grounded. The other end of resistor R17 and one end of capacitor C11 are both connected to the positive input terminal of operational amplifier OP1A. The other end of capacitor C11 is grounded. The common terminal of resistors R20 and R23 is connected to the negative input terminal of operational amplifier OP1A. The other end of resistor R23 is grounded. The other end of resistor R20 is connected to the output terminal of operational amplifier OP1A. One end of resistor R24 ​​is also connected to the output terminal of operational amplifier OP1A. The other end of resistor R24 ​​and one end of resistor R28 are both connected to the positive input terminal of operational amplifier OP1B. The other end of resistor R28 is grounded. The negative input terminal of operational amplifier OP1B is grounded. The output terminal of operational amplifier OP1B outputs a digital-to-analog converted drive motor signal.

5. The power device protection circuit according to claim 4, characterized in that, The current limiting protection circuit includes a CPU output signal conditioning circuit and a current limiting comparison protection circuit; The CPU output signal conditioning circuit includes operational amplifiers OP2A and OP2B, resistors R18, R19, R21, R25, R26, R27, R30, R31, and R33, and capacitors C9, C12, C13, and C14. The first common terminal of resistor R18 and capacitor C9 is connected to a reference voltage of 1.65V. The second common terminal of resistor R18 and capacitor C9 is connected to the positive input terminal of operational amplifier OP2A. Resistor R19 is also connected to the positive input terminal of operational amplifier OP2A. One end of resistor R25 is connected to the output terminal of operational amplifier OP1B, and the other end of resistor R25 is connected to the negative input terminal of operational amplifier OP2A. The first common terminal of resistor R21 and capacitor C12 is connected to the negative input terminal of operational amplifier OP2A, and the second common terminal of resistor R21 and capacitor C12 is connected to the output terminal of operational amplifier OP2A. One end of resistor R26 is connected to the output terminal of operational amplifier OP1B, and the other end of resistor R26 is connected to the positive input terminal of operational amplifier OP2B. The first common terminal of resistor R27 and capacitor C13 is connected to the positive input terminal of operational amplifier OP2A. The second common terminal of resistor R27 and capacitor C13 is connected to a reference voltage of 1.65V. Resistor R30 is connected to the positive input terminal of operational amplifier OP2B. Resistor R33 is connected to the negative input terminal of operational amplifier OP2B. The first common terminal of resistor R31 and capacitor C14 is connected to the negative input terminal of operational amplifier OP2B. The second common terminal of resistor R31 and capacitor C14 is connected to the output terminal of operational amplifier OP2B.

6. The power device protection circuit according to claim 5, characterized in that, The current limiting comparison protection circuit includes voltage comparators CP1A and CP1B, resistors R3, R8, R11, R14, R22, and R32, and capacitors C15 and C16. One end of resistor R22 is connected to the output terminal of operational amplifier OP2A, and the other end is grounded. One end of resistor R22 is also connected to the positive input terminal of voltage comparator CP1A. The negative input terminal of voltage comparator CP1A is connected to the negative input terminal of voltage comparator CP1D, and also to the positive input terminal of voltage comparator CP1B. The output terminal of voltage comparator CP1A is connected to the common terminal of resistors R3 and R8. The other end of resistor R3 is connected to a 3.3V voltage. The other end of resistor R8 is connected to the 1OE pin of buffer chip U1. One end of capacitor C16 is also connected to the 1OE pin of buffer chip U1, and the other end is grounded. One end of resistor R32 is connected to the output terminal of operational amplifier OP2B, and the other end is grounded. One end of resistor R32 is also connected to the negative input terminal of voltage comparator CP1B. The output terminal of voltage comparator CP1A is connected to the common terminal of resistors R11 and R14. The other end of resistor R11 is connected to a 3.3V voltage. The other end of resistor R14 is connected to the 2OE pin of buffer chip U1. One end of capacitor C15 is also connected to the common terminal of OP2B, and the other end is grounded.

7. The power device protection circuit according to claim 6, characterized in that, The current sampling circuit further includes a current limiting sampling circuit, which includes diodes D2 and D3. The negative terminal of diode D2 is connected to the 2OE pin of buffer chip U1, and the positive terminal is connected to the MCU circuit. The negative terminal of diode D3 is connected to the 1OE pin of buffer chip U1, and the positive terminal is connected to the MCU circuit.

8. The power device protection circuit according to claim 7, characterized in that, It also includes a narrow pulse limiting unit, the input of which is connected to the output of the buffer chip U1, and the output of which is connected to the input of the power inverter circuit.

9. The power device protection circuit according to claim 4, characterized in that, The signal driver chip UL1 is model number SN74LVC541, the buffer chip U1 is model number SN74LVC2G126, and the multiplexing chip U2 is model number TS5A3159.

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