Method, device, terminal and medium for suppressing subsequent commutation failure of DC system

Abstract

The present invention discloses a method for suppressing subsequent commutation of a high-voltage direct current system, and discloses a device, a terminal and a storage medium having the method for suppressing subsequent commutation failure of a high-voltage direct current system. The method for suppressing subsequent commutation failure of a high-voltage direct current system includes screening effective side measurement data by setting voltage thresholds and parameter constraints, and realizing real-time estimation of the Thevenin equivalent parameters based on the least squares method to obtain the maximum DC operating power under the constraints of the AC system after the fault. According to the characteristic that the power change near the maximum power point is less sensitive to the current change, the DC current corresponding to the maximum power after retaining a certain power margin is determined as the current control upper limit for suppressing subsequent commutation failure. Finally, after PSCAD simulation verification, the proposed estimation method can quickly track the Thevenin equivalent parameters, and the DC current limiting measures obtained based on the parameters can effectively avoid subsequent commutation failures caused by reduced system strength.

Description

Technical Field

[0001] The present invention relates to the field of power systems, and in particular to a method, device, terminal and storage medium for suppressing subsequent commutation failure of a direct current system. Background Art

[0002] With the development of large-scale AC and DC power grids, grid security and stability issues caused by DC disturbances are becoming increasingly prominent. Line commutated converter-based HVDC (LCC-HVDC) systems are widely used for high-power transmission between regions. However, their reliance on AC system voltage for commutation makes them susceptible to commutation failures after disturbances.

[0003] After the first commutation failure, improper DC system regulation may lead to a second or multiple commutation failures, or even DC lockout, which seriously threatens the safe and stable operation of the transmitting and receiving systems, especially when the system strength changes after the fault line is removed.

[0004] The prior art lacks a solution to the problem of subsequent commutation failure during the power recovery process after a commutation failure. Summary of the Invention

[0005] The present invention aims to solve at least one of the technical problems existing in the prior art. To this end, the present invention proposes a method for suppressing subsequent commutation failure in a DC system, which can avoid subsequent commutation failure to the greatest extent.

[0006] The present invention also provides a device, a terminal and a storage medium having the above method for suppressing subsequent commutation failure of a DC system.

[0007] A method for suppressing subsequent commutation failure in a high-voltage direct current system according to an embodiment of a first aspect of the present invention is characterized by comprising the following steps:

[0008] Based on the relationship between the maximum DC power and the Thevenin equivalent parameter on the AC side of the inverter, a calculation method for suppressing the current-limiting instruction for subsequent commutation failure is determined;

[0009] Based on the voltage threshold screening, the Thevenin equivalent parameter is estimated to obtain the maximum operating power;

[0010] A current limiting instruction for suppressing subsequent commutation failure is obtained based on the maximum operating power.

[0011] According to the method for suppressing subsequent commutation of a high-voltage DC system according to an embodiment of the present invention, there are at least the following beneficial effects: the present application filters effective side measurement data by setting voltage thresholds and parameter constraints, and realizes real-time estimation of the Thevenin equivalent parameters based on the least squares method, thereby obtaining the maximum DC operating power under the constraints of the AC system after the fault. According to the characteristic that the power change near the maximum power point is less sensitive to the current change, the DC current corresponding to the maximum power after retaining a certain power margin is determined as the current control upper limit for suppressing subsequent commutation failures. Finally, after PSCAD simulation verification, the proposed estimation method can quickly track the Thevenin equivalent parameters, and the DC current limiting measures obtained based on the parameters can effectively avoid subsequent commutation failures caused by reduced system strength.

[0012] According to some embodiments of the present invention, the step of determining a calculation method for suppressing subsequent commutation failure current limiting instructions based on the relationship between the maximum DC power and the Thevenin equivalent parameter on the AC side of the inverter specifically includes:

[0013] Based on the relationship between the DC voltage and current on the inverter side, the relationship between the DC current and the effective value of the AC bus line voltage at the converter station is derived;

[0014] Based on the inverter-side converter station power equation, the relationship between the effective value of the AC bus line voltage and the equivalent potential amplitude and equivalent reactance of the converter station is derived;

[0015] Based on the above two relationships, the relationship between the maximum DC power and the Thevenin equivalent parameter on the AC side of the inverter is calculated.

[0016] According to some embodiments of the present application, the relationship between the DC current and the effective value of the AC bus line voltage of the converter station is:

[0017]

[0018] Among them, S is the number of series bridges, N is the transformer ratio, β is the trigger lead angle, X d is the commutation reactance, γ is the arc extinction angle, E d is the effective value of the AC bus line voltage at the converter station.

[0019] According to some embodiments of the present application, the relationship between the effective value of the AC bus line voltage of the converter station and the equivalent potential amplitude and equivalent reactance is:

[0020]

[0021] Among them, the equivalent potential amplitude of the inverter side AC system is E, the equivalent reactance of the inverter side AC system is X, and the equivalent reactance of the filter is Xc.

[0022] According to some embodiments of the present application, the relationship between the maximum DC power and the Thevenin equivalent parameter on the inverter AC side is:

[0023]

[0024] Among them, S is the number of series bridges, N is the transformer ratio, β is the trigger lead angle, X d is the commutation reactance, γ is the arc extinction angle, E d is the effective value of the AC bus line voltage of the converter station, the equivalent potential amplitude of the AC system on the inverter side is E, the equivalent reactance of the AC system on the inverter side is X, and the equivalent reactance of the filter is Xc.

[0025] According to some embodiments of the present application, the step of estimating the Thevenin equivalent parameter based on voltage threshold screening includes:

[0026] Select measurement data within several sampling time windows;

[0027] A least squares estimation is performed based on the measurement data.

[0028] A high-voltage direct current system commutation device according to a second embodiment of the present invention is characterized by comprising:

[0029] The current limiting method determination module can determine the calculation method of the current limiting instruction to suppress subsequent commutation failure based on the relationship between the DC maximum power and the Thevenin equivalent parameter on the AC side of the inverter;

[0030] The Thevenin calculation module can estimate the Thevenin equivalent parameters based on voltage threshold screening to obtain the maximum operating power.

[0031] Furthermore, the current limiting method determination module also includes:

[0032] The first derivation element is capable of deducing the relationship between the DC current and the effective value of the AC bus line voltage of the converter station based on the relationship between the DC voltage and current on the inverter side;

[0033] The second derivation element can derive the relationship between the effective value of the AC bus line voltage of the converter station and the equivalent potential amplitude and equivalent reactance based on the power equation of the inverter side converter station;

[0034] The Thevenin equivalent relationship synthesis component can calculate the relationship between the maximum DC power and the Thevenin equivalent parameter on the inverter AC side based on the relationship between the results obtained by the first derivation element and the second derivation element.

[0035] Furthermore, the Thevenin calculation module further includes:

[0036] Sampling element, which can select measurement data within several sampling time windows;

[0037] The maximum power estimation component can perform least square estimation based on the measurement data.

[0038] According to a third aspect of the present application, a terminal is provided, comprising: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the above-mentioned method for suppressing subsequent commutation failure of a high-voltage direct current system.

[0039] According to a fourth aspect of the present application, a computer-readable storage medium is provided, wherein the medium stores computer-executable instructions for executing the above-mentioned method for suppressing subsequent commutation failure of a high-voltage direct current system.

[0040] Additional aspects and advantages of the present invention will be set forth in part in the description which follows and, in part, will be obvious from the description which follows, or may be learned by practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] The above and / or additional aspects and advantages of the present invention will become apparent and readily understood from the description of the embodiments with reference to the following drawings, in which:

[0042] Figure 1 A schematic diagram of the steps of a commutation method for a high-voltage direct current system according to an embodiment of the present invention;

[0043] Figure 2 for Figure 1 Schematic diagrams of steps corresponding to some preferred embodiments of the HVDC system commutation method are shown;

[0044] Figure 3 This is a schematic diagram of calculating a current control instruction for suppressing subsequent commutation failure in an embodiment of the present application;

[0045] Figure 4 This is a schematic diagram of the Thevenin equivalent value in the embodiment of this application;

[0046] Figure 5 A schematic diagram of the current limiting control strategy proposed in an embodiment of the present application;

[0047] Figure 6 This is a comparison chart of arc extinction angles of various schemes with an inductance of 50mH after a fault in the embodiment of the present application;

[0048] Figure 7 This is a comparison diagram of the current of each solution under the condition of 50mH inductance after a fault in the embodiment of the present application;

[0049] Figure 8 This is a comparison chart of arc extinction angles of various schemes with an inductance of 70mH after a fault in the embodiment of the present application;

[0050] Figure 9 This is a comparison diagram of the current of various schemes under the condition of 70mH inductance after a fault in the embodiment of the present application;

[0051] Figure 10This is a comparison chart of various current limiting schemes under different short-circuit ratios in the embodiments of this application;

[0052] Figure 11 Schematic diagram of β corresponding to the maximum power point under different short-circuit ratios when γ=15° in an embodiment of the present application;

[0053] Figure 12 This is a diagram of impedance estimation results in an embodiment of the present application;

[0054] Figure 13 Schematic diagram of the basic control strategy of the ABB inverter side proposed in the embodiment of the present application;

[0055] Figure 14 Schematic diagram of the basic control strategy for the SIMEMS inverter side proposed in the embodiment of this application;

[0056] Figure 15 This is a block diagram of a high-voltage direct current commutation device according to an embodiment of the present application. DETAILED DESCRIPTION

[0057] The following describes embodiments of the present invention in detail. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended only to explain the present invention and are not to be construed as limiting the present invention.

[0058] In the description of the present invention, "several" means one or more, "many" means more than two, "greater than," "less than," and "exceed" are understood to exclude the number itself, while "above," "below," and "within" are understood to include the number itself. The use of "first" and "second" in the description is solely for the purpose of distinguishing technical features and should not be construed as indicating or implying relative importance, implicitly specifying the number of the indicated technical features, or implicitly specifying the order of the indicated technical features.

[0059] Existing research in the field of high-voltage transmission lacks consideration of the changes in system strength caused by topology changes after a system fault, especially in terms of commutation failure suppression strategies. This application is aimed at a current control method to suppress subsequent commutation failures at different system strengths.

[0060] Example 1

[0061] Reference Figure 1 , in order to implement a control method for commutation failure of a high voltage direct current system, the method includes at least the following steps:

[0062] Step S100: Determine a calculation method for suppressing subsequent commutation failure current limiting instructions based on the relationship between the DC maximum power and the Thevenin equivalent parameter on the inverter AC side.

[0063] According to the operating status of the power system, the control instructions corresponding to the current operating status are analyzed.

[0064] Step S200: perform Thevenin equivalent parameter estimation based on voltage threshold screening to obtain the maximum operating power.

[0065] The Thevenin equivalent is used to estimate the maximum DC operating power under the constraints of the AC system after the fault by voltage threshold screening.

[0066] Step S300: obtaining a current limiting instruction for suppressing subsequent commutation failure based on the maximum operating power.

[0067] Current limiting based on the estimated maximum operating power can effectively avoid subsequent commutation failures.

[0068] Example 2

[0069] Preferably, a further description is given based on the first embodiment.

[0070] Reference Figure 2 , the method comprising:

[0071] Step S100: Determine a calculation method for suppressing subsequent commutation failure current limiting instructions based on the relationship between the DC maximum power and the Thevenin equivalent parameter on the inverter AC side.

[0072] Step S100 can be divided into:

[0073] Step S101: derive the relationship between the DC current and the effective value of the AC bus line voltage of the converter station based on the relationship between the DC voltage and current on the inverter side.

[0074] Inverter side DC voltage V di With DC current I d There are the following relationships:

[0075]

[0076]

[0077] Among them, S is the number of series bridges, N is the transformer ratio, β is the trigger lead angle, X d is the commutation reactance, γ is the arc extinction angle, E d is the effective value of the AC bus line voltage at the converter station.

[0078] According to formulas (1) and (2), we can get:

[0079]

[0080] When power system strength decreases, the maximum operating power of the DC converter decreases, forcing the DC converter to operate in a range where power increases and decreases. Excessive DC current not only reduces DC power but also increases the risk of commutation failure. Therefore, it is necessary to consider power characteristics when determining the current limit.

[0081] Step S102: Based on the inverter-side converter station power equation, derive the relationship between the effective value of the AC bus line voltage and the equivalent potential amplitude and equivalent reactance of the converter station.

[0082] Equations (4) and (5) are the power equations for the inverter-side converter station, where Pd is the DC active power delivered and Qd is the absorbed reactive power. G+jB is the DC equivalent admittance:

[0083]

[0084]

[0085] Assume that the equivalent potential amplitude and equivalent reactance of the inverter side AC system are E and X respectively, and the equivalent reactance of the filter is X C , then according to the circuit relationship:

[0086]

[0087] Step S103: Calculate the relationship between the maximum DC power and the Thevenin equivalent parameter on the AC side of the inverter.

[0088] According to (4) and (6), the relationship between DC power, system Thevenin parameters and control angle can be determined as follows:

[0089]

[0090] When the control target γ is known, increase β and the curve of Pd changing with Id in steady state can be obtained according to (3) and (7). Figure 3 As shown in Figure 1, as the current increases, the power first increases and then decreases. The power reaches its power limit at a certain current. The DC transmission system should operate at the maximum power increase (i.e., dP d / dI d >0) is beneficial to voltage stability. At the same time, for the same operating power, a lower current should obviously be selected as the control command. This results in lower current, higher system voltage, and a lower risk of commutation failure. Furthermore, near the power limit operating point, power is less sensitive to current. Simply reducing power by a small percentage can significantly reduce current, significantly lowering the risk of commutation failure. Therefore, this embodiment deducts a 5% power margin from the maximum operating power and determines the current command at this power value to suppress subsequent commutation failures.

[0091] Step S200: Based on voltage threshold screening, perform Thevenin equivalent parameter estimation to obtain the maximum operating power.

[0092] Refer to Figure 4 , which depicts the HVDC connected to the AC system, is the Thevenin equivalent electromotive force, is the Thevenin equivalent impedance, is the AC bus voltage at the HVDC connection point, is the current flowing into the AC system.

[0093] According to the real and imaginary part equations, we can obtain:

[0094]

[0095] By联立 the equations at two measurement times, we can get:

[0096]

[0097] Step S200 can be divided into the following steps:

[0098] Step S201: Select measurement data within several sampling time windows.

[0099] Select measurement data within m sampling time windows, and the data should satisfy the following two conditions simultaneously

[0100] A、||d U ||≥0.165;

[0101] B、Assume d E =0, calculate the equivalent electromotive force and impedance according to Equation (9), and the calculated values should satisfy reasonable constraints: X min <X<X max , R<X, E min <||E||<E max . Since faults generally accompany an increase in the system equivalent impedance, X min can be set as the impedance before the fault. And X max can be set as the equivalent impedance after several main lines of the system are disconnected; at the same time, in the high-voltage network, generally R<X; the range of the Thevenin electromotive force can be set between 0.7 pu and 1.5 pu.

[0102] Step S202: Based on the measurement data, perform least squares estimation to obtain the maximum operating power.

[0103] At time n, the impedance Z n can be estimated based on the least squares method using the data selected within the above window, and the estimated value is as follows:

[0104]

[0105] in,

[0106] Step S300: obtaining a current limiting instruction for suppressing subsequent commutation failure based on the maximum operating power.

[0107] like Figure 5 As shown in the figure, the existing control structure is supplemented with the following: the inverter station AC bus voltage and current measurement link, the Thevenin equivalent parameter estimation link, and the commutation failure command calculation link. The fundamental amplitude and phase of the inverter station AC bus voltage and current are measured in real time using the PMU. The collected data is input into the Thevenin equivalent impedance estimation link to estimate the inverter-side AC system equivalent impedance and potential in real time. Finally, the current limiting command is calculated using the system equivalent parameters and DC parameters, and the current control command is reduced by the difference between the current limit and the current control command to obtain the final current control command. This newly added control link is independent of the existing control and does not affect the conventional control characteristics. Impedance estimation is initiated based on the voltage change rate and impedance screening, and therefore only occurs when a large disturbance (including commutation failure) occurs. Furthermore, after the current limiting command is generated, the current limiting value can be activated after the first commutation failure is determined.

[0108] It can be understood that commutation is a common power system control method, and this application is also an estimation method based on avoiding commutation failure. The specific content belongs to the existing technology and will not be repeated here.

[0109] Example 3:

[0110] To verify the effectiveness of this application, Example 3 was tested on a CIGRE-standard DC-side system. The system base capacity was 1000MVA, the sending-end system base voltage was 345kV, and the receiving-end system base voltage was 230kV. The DC system rated voltage was 500kV, the rated current was 2kA, the DC initial power was 1000MW, and the DC adopted constant power control. The rectifier-side power supply voltage was 382.87kV, and the line inductance was 50mH. The inverter-side power supply voltage was 215.05kV (0.935pu), and the inductance of both circuits was 50mH.

[0111] To verify the effectiveness of the proposed measures to suppress subsequent commutation failure, the following four control schemes are compared:

[0112] Option 1: Use CIGRE standard side test model control.

[0113] Solution 2: Referring to the virtual resistance limiting method, it can represent an improved method for the low-voltage current limiting link.

[0114] Scheme 3: Based on the real-side converter station bus voltage and angle control constraints during the subsequent commutation failure, use Equation (3) to determine the DC current as the upper limit of the current control. The angle constraints (γ, β) given in the literature are (7°, 38°) and (15°, 40°), respectively.

[0115] Solution 4: The current limiting solution proposed in Example 2 is based on a 5% margin for the maximum DC operating power.

[0116] In 1s, one circuit on the inverter side is disconnected and the DC commutation fails. Figure 6 and Figure 7 The arc extinction angle and DC current curves for different control schemes are shown. Under Schemes 1 and 2, the DC circuit experiences subsequent commutation failure. With Schemes 3 and 4, a 1.08s current-limiting command is applied to the DC circuit, and subsequent commutation failure does not occur.

[0117] Continuing to consider the simulation results of different control schemes for post-fault inductances of 60, 70, 80, 90, and 100mH. Both Schemes 1 and 2 experience subsequent commutation failure at these inductances, so simulation curves are not presented here. For Scheme 3, subsequent DC commutation failure occurs when the post-fault inductance is 70mH or greater. However, Scheme 4, proposed in this article, suppresses subsequent commutation failure at all these inductances. Figure 8 and Figure 9 The arc extinction angle and DC current curves of Scheme 3 and Scheme 4 are given when the inductance is 70mH. No simulation curves are given for other inductances.

[0118] By trying different current-limiting instructions in simulation, we can further obtain the critical control current that suppresses subsequent commutation failure, as shown in Table 1. When the control current instruction is less than or equal to the corresponding critical current, subsequent commutation failure does not occur in the DC circuit; however, when the control current instruction is greater than the critical current, subsequent commutation failure occurs.

[0119] Table 1 also gives the current control command values ​​of Scheme 3 and Scheme 4. Compare Scheme 3 and Scheme 4 with the critical control current of the simulation, as shown in Figure 10 As shown in the figure, under different intensities, the control current instructions proposed in this paper are all below the critical control current, which can suppress subsequent commutation failures. However, when the system short-circuit ratio drops below 2.8, the current obtained by the method using converter station voltage and angle constraints is greater than the critical control current, and cannot suppress subsequent commutation failures. Moreover, the smaller the system short-circuit ratio, the greater the difference between its control value and the simulated critical current. Note: ① Before the second commutation failure, the per-unit values ​​of the real-side converter station voltage on the inverter side were 0.922pu, 0.907pu, 0.899pu, 0.888pu, 0.873pu, and 0.854pu, respectively, corresponding to 50-100mH in Table 1. ② In the example in this paper, no commutation failure occurred when the inductance was less than 50mH after the fault.

[0120] Table 1 Comparison of control current under different schemes

[0121]

[0122] Subsequent commutation failure is a nonlinear transient process, making it difficult to parse the critical control current. Traditional approaches attempt to calculate a conservative DC control command based on quasi-steady-state formulas by setting fixed γ and β angle constraints. However, simulation results show that this approach is not applicable to all system strength conditions. 38° and 40° are generally considered to be the inverter-side β angles when the system is operating at rated capacity. However, in weaker systems, the maximum operational DC power may not reach the rated power.

[0123] Figure 11 The β values ​​corresponding to the maximum DC power under different system strengths are given. When the system strength is low, β will be less than 38° or 40°. If β is still set to 38° or 40°, the corresponding DC current will be in the range where power decreases with current, and the corresponding current control value will be too large. The current calculated by the proposed method is based on the real-time maximum power of the system after the fault. The corresponding β and voltage support capacity are adjusted in real time according to the system status. Compared with previous methods, it can more reasonably assess the risk of commutation failure.

[0124] Table 2 Actual control power evaluation

[0125]

[0126] In actual operation, it is desirable for DC power to maintain high power while minimizing power reduction without commutation failure. While the current-limiting command of the proposed method can ensure that subsequent commutation failures do not occur, it significantly reduces the critical current. If this current reduction results in significant power loss, the control strategy is inappropriate. The impact of current reduction on power is further evaluated. Table 2 shows the DC power after current control, calculated using the proposed method, and the maximum operational power of the DC power obtained through simulation. As can be seen, as the intensity decreases, the power margin loss increases. Under different simulated short-circuit ratios, the power loss ratio remains within 10%. These results demonstrate that, despite the significant difference between the controlled current and the simulated critical current, the power loss is relatively small. This is because power is less sensitive to current near the power limit. Reducing the current can significantly reduce the risk of commutation failure without incurring significant power loss. Therefore, it is reasonable to use the current obtained by deducting a certain power margin from the maximum power point as the current-limiting command for subsequent commutation failures.

[0127] Example 4:

[0128] Example 3 verifies the effectiveness of determining the current limit based on the maximum power on the basis of known Thevenin equivalent parameters on the inverter side; Example 4 mainly analyzes the impact of the error of the Thevenin equivalent parameter estimation algorithm on the control command.

[0129] A line break occurred on the inverter side every 1s, causing DC commutation failure. Impedance estimation was performed using real-time collected voltage and current data with a sampling interval of 10ms. Three commonly used methods for obtaining the Thevenin equivalent parameters were selected for comparison: the windowed least squares method (LS), the recursive least squares method (RLS) with a forgetting factor, and a method based on the ratio of voltage and current changes at adjacent moments (-dV / dI). The voltage change curve and impedance identification results are shown in Figure 2. Figure 12 As shown in Figure 2. Using the proposed method, measurement data that exceeds the voltage threshold and satisfies the parameter constraints are used for estimation, and the system equivalent inductance is identified as 52.8 mH in 1.13 seconds. The equivalent voltage is calculated as 0.923 pu using equation (8). The windowed LS and RLS with forgetting factor can approach the true impedance value, but the error is larger than that of the proposed method. The curve obtained by the -dV / dI method oscillates around the true impedance value.

[0130] Table 3 shows the impedance estimation results obtained according to the proposed method under some inductances. The inductance estimation error under different working conditions is within 10.0%, and the potential estimation error is within 4.06%.

[0131] Table 3 Thevenin equivalent parameter estimation results

[0132]

[0133] Table 4 shows the impact of the Thevenin equivalent parameter estimation error on control power. After accounting for the estimation error, the power variation ranges from -0.88% to 6.08% relative to the control power obtained with the accurate Thevenin equivalent parameters. The resulting control current remains within the critical control current, and the current command calculated based on the estimated parameters also prevents subsequent commutation failures.

[0134] Table 4 Impact of impedance estimation error on control effect

[0135]

[0136] The control current command is generated on the inverter side, but there is a certain delay before the current command is transmitted to the rectifier side. There is a transition period before subsequent commutation failure. The proposed strategy provides an upper current limit. Therefore, it is sufficient for the rectifier side to receive the current command before the current rises to the control command. Table 5 shows the current transition under different intensities on the inverter side. Under different operating conditions, the DC current has not yet risen to the control command value at least by 1.08s. Therefore, it is sufficient for the rectifier side to receive the control command at 1.08s. The Thevenin impedance under different inductances can be estimated within 1.05s, leaving at least 30ms of control margin. Generally, the time it takes for the inverter-side current command to be transmitted to the rectifier side is less than 20ms. Even considering the delay, the control strategy proposed in this article is still effective.

[0137] Table 5 Effect of delay on control effect

[0138]

[0139] In actual projects, ABB or SIEMENS control systems are used, and their control characteristics are slightly different from CIGRE, mainly in the inverter side. ABB uses pre-side arc extinction angle control, and also has a commutation failure pre-side function, such as Figure 13 The constant voltage, constant current and constant arc extinction angle control links in the SIEMENS control system work together, as shown in the figure below. Figure 14 Table 6 shows the critical commutation failure currents of ABB and SIEMENS under different control structures. The current limits proposed in this paper are all below the critical commutation failure currents of the ABB and SIEMENS control systems. If the current limiting scheme of Scheme 3 is adopted (the more conservative angle case, γ = 15°, β = 40°), for the ABB control system, when the inductance after the accident is 80mH or above, subsequent commutation failure cannot be suppressed. For the SIEMENS control system, when the inductance after the accident is 90mH or above, subsequent commutation failure cannot be suppressed.

[0140] Table 6 Comparison of control effects under ABB and SIEMENS models

[0141]

[0142] Example 5

[0143] The fifth embodiment of the present application provides a high voltage DC system commutation device, such as Figure 15 As shown, the device 20 includes: a current limiting method determination module 201, a Thevenin calculation module 202, and a phase switching module 203.

[0144] The current limiting method determination module 201 can determine a calculation method for suppressing subsequent commutation failure current limiting instructions based on the relationship between the DC maximum power and the Thevenin equivalent parameter on the inverter AC side;

[0145] Thevenin calculation module 202 can perform Thevenin equivalent parameter estimation based on voltage threshold screening to obtain the maximum operating power;

[0146] The phase switching module 203 can perform phase switching based on the maximum operating power.

[0147] The embodiments of the present application use an LCC-HVDC commutation method based on real-time Thevenin equivalent parameter estimation to determine the current operating state of the power system using a current limiting method, and then estimate the maximum DC power value of the power system based on the current sampling results, thereby commutating the power system based on the maximum DC power value.

[0148] Furthermore, the current limiting method determination module 201 further includes:

[0149] The first derivation element is capable of deducing the relationship between the DC current and the effective value of the AC bus line voltage of the converter station based on the relationship between the DC voltage and current on the inverter side;

[0150] The second derivation element can derive the relationship between the effective value of the AC bus line voltage of the converter station and the equivalent potential amplitude and equivalent reactance based on the power equation of the inverter side converter station;

[0151] The Thevenin equivalent relationship synthesis component can calculate the relationship between the maximum DC power and the Thevenin equivalent parameter on the inverter AC side based on the relationship between the results obtained by the first derivation element and the second derivation element.

[0152] Furthermore, the Thevenin calculation module 202 further includes:

[0153] Sampling element, capable of selecting measurement data within several sampling time windows;

[0154] The maximum power estimation component can perform least square estimation based on the measurement data.

[0155] Another embodiment of the present application provides a terminal, comprising: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the above-mentioned high-voltage direct current system commutation method when executing the computer program.

[0156] Specifically, a processor may be a CPU, a general-purpose processor, a DSP, an ASIC, an FPGA, or other programmable logic device, a transistor logic device, a hardware component, or any combination thereof. It may implement or execute the various exemplary logic blocks, modules, and circuits described in conjunction with the disclosure of this application. A processor may also be a combination that implements computing functions, such as a combination of one or more microprocessors, a combination of a DSP and a microprocessor, and the like.

[0157] Specifically, the processor is connected to the memory via a bus. The bus may include a path for transmitting information. The bus may be a PCI bus or an EISA bus. The bus may be divided into an address bus, a data bus, a control bus, etc.

[0158] The memory may be a ROM or other type of static storage device that can store static information and instructions, a RAM or other type of dynamic storage device that can store information and instructions, or an EEPROM, CD-ROM or other optical disk storage, optical disc storage (including compact disc, laser disc, optical disc, digital versatile disc, Blu-ray disc, etc.), magnetic disk storage medium or other magnetic storage device, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and can be accessed by a computer, but is not limited to these.

[0159] Optionally, the memory is used to store computer program code for executing the solution of the present application, and the processor controls execution thereof. The processor is used to execute the application program code stored in the memory to implement the operation of the high-voltage direct current system commutation device provided in the embodiment shown in FIG. N.

[0160] This embodiment suppresses subsequent commutation failures in the high-voltage DC system, determines voltage thresholds and parameter constraints to screen effective measurement data, and implements real-time estimation of the Thevenin equivalent parameters based on the least squares method, thereby obtaining the maximum DC operating power under the constraints of the AC system after the fault. Based on the characteristic that power changes near the maximum power point are less sensitive to current changes, the DC current corresponding to the maximum power after retaining a certain power margin is determined as the current control upper limit for suppressing subsequent commutation failures. Finally, after PSCAD simulation verification, the proposed estimation method can quickly track the Thevenin equivalent parameters, and the high-voltage DC system commutation device obtained based on these parameters can effectively avoid subsequent commutation failures that reduce system strength.

[0161] Another embodiment of the present application provides a computer-readable storage medium storing computer-executable instructions for executing the above-mentioned Figure 1 The commutation method of the high voltage DC system is shown.

[0162] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate, i.e., they may be located in one place or distributed across multiple network units. Some or all of the modules may be selected based on actual needs to achieve the objectives of this embodiment.

[0163] Those skilled in the art will appreciate that all or some of the steps and systems in the method disclosed above can be implemented as software, firmware, hardware, and appropriate combinations thereof. Some physical components or all physical components can be implemented as software executed by a processor, such as a central processing unit, a digital signal processor, or a microprocessor, or implemented as hardware, or implemented as an integrated circuit, such as an application-specific integrated circuit. Such software can be distributed on a computer-readable medium, and the computer-readable medium can include computer storage media (or non-transitory media) and communication media (or temporary media). As known to those skilled in the art, the term computer storage media is included in any method or technology for storing information (such as computer-readable instructions, data structures, program modules, or other data) and is volatile and non-volatile, removable, and non-removable. Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory, or other memory technology, CD-ROM, digital versatile disks (DVD), or other optical disk storage, magnetic cassettes, magnetic tapes, disk storage, or other magnetic storage devices, or any other medium that can be used to store desired information and can be accessed by a computer. Furthermore, as is well known to those skilled in the art, communication media typically embodies computer-readable instructions, data structures, program modules, or other data in a modulated data signal such as a carrier wave or other transport mechanism, and may include any information delivery media.

[0164] The above is a specific description of the preferred implementation of the present application, but the present application is not limited to the above implementation mode. Technical personnel familiar with the field can also make various equivalent modifications or substitutions without violating the spirit of the present application. These equivalent modifications or substitutions are all included in the scope defined by the claims of the present application.

Claims

1. A method for suppressing subsequent commutation failure in a DC system, characterized in that: The following steps are involved: Based on the relationship between the maximum DC power and the Thevenin equivalent parameter on the AC side of the inverter, a calculation method for suppressing the current-limiting instruction for subsequent commutation failure is determined; including: Based on the relationship between the DC voltage and current on the inverter side, the relationship between the DC current and the effective value of the AC bus voltage at the converter station is derived. Based on the power equation of the converter station on the inverter side, the relationship between the effective value of the AC bus voltage at the converter station and the equivalent potential amplitude and equivalent reactance is derived. Based on these two relationships, the relationship between the maximum DC power and the Thevenin equivalent parameter on the AC side of the inverter station is calculated. Selecting measurement data within a plurality of sampling time windows; performing least squares estimation based on the measurement data to obtain the maximum operating power; A current limiting instruction for suppressing subsequent commutation failure is obtained based on the maximum operating power.

2. The method according to claim 1, characterized in that The relationship between the DC current and the effective value of the AC bus line voltage of the converter station is: Among them, S is the number of series bridges, N is the transformer ratio, β is the trigger lead angle, X d is the commutation reactance, γ is the arc extinction angle, E d is the effective value of the AC bus line voltage at the converter station.

3. The method according to claim 1, characterized in that The relationship between the effective value of the AC bus line voltage and the equivalent potential amplitude and equivalent reactance of the converter station is: Among them, the equivalent potential amplitude of the inverter side AC system is E, the equivalent reactance of the inverter side AC system is X, and the equivalent reactance of the filter is Xc.

4. The method according to claim 1, wherein The relationship between the maximum DC power and the Thevenin equivalent parameter on the inverter AC side is: Among them, S is the number of series bridges, N is the transformer ratio, β is the trigger lead angle, X d is the commutation reactance, γ is the arc extinction angle, E d is the effective value of the AC bus line voltage of the converter station, the equivalent potential amplitude of the AC system on the inverter side is E, the equivalent reactance of the AC system on the inverter side is X, and the equivalent reactance of the filter is Xc.

5. A device for suppressing subsequent commutation failure in a DC system, characterized in that: include: The current limiting method determination module can determine the calculation method for suppressing subsequent commutation failure current limiting instructions based on the relationship between the DC maximum power and the Thevenin equivalent parameter on the AC side of the inverter; it includes: Based on the relationship between the DC voltage and current on the inverter side, the relationship between the DC current and the effective value of the AC bus voltage at the converter station is derived. Based on the power equation of the converter station on the inverter side, the relationship between the effective value of the AC bus voltage at the converter station and the equivalent potential amplitude and equivalent reactance is derived. Based on these two relationships, the relationship between the maximum DC power and the Thevenin equivalent parameter on the AC side of the inverter station is calculated. The Thevenin calculation module is capable of selecting measurement data within a plurality of sampling time windows; performing least squares estimation based on the measurement data to obtain the maximum operating power.

6. A terminal comprising: A memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the method according to any one of claims 1 to 4. 7 . A computer-readable storage medium storing computer-executable instructions, wherein the computer-executable instructions are used to execute the method according to claim 1 .

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