Thin-film inductor, its manufacturing method, integrated circuit, and terminal device

Abstract

Embodiments of the present application provide a thin-film inductor, a manufacturing method thereof, an integrated circuit, and a terminal device, relating to the field of electronic technologies, and solving the problem of large inductor size in electronic products. The thin-film inductor includes: a magnetic core, which includes a first magnetic film and a second magnetic film. There is a receiving cavity between the first magnetic film and the second magnetic film. A conductor, located in the receiving cavity. Insulating spacer films are arranged on both sides of the conductor and are located between the first magnetic film and the second magnetic film. The insulating spacer films are in contact with the first magnetic film and the second magnetic film. Both the first magnetic film and the second magnetic film include multiple layers of magnetic sub-films and insulator films. In the first magnetic film, the magnetic sub-films and the insulator films are arranged alternately. In the second magnetic film, the magnetic sub-films and the insulator films are arranged alternately. The surface of the first magnetic film in contact with the insulating spacer film exposes multiple layers of magnetic sub-films and multiple layers of insulator films in the first magnetic film. And / or, the surface of the second magnetic film in contact with the insulating spacer film exposes multiple layers of magnetic sub-films and multiple layers of insulator films in the second magnetic film.

Description

[0001] This application is a divisional application. The application number of the original application is 201880099469.1, and the original application date is December 17, 2018. The entire content of the original application is incorporated herein by reference. Technical Field

[0002] This application relates to the field of electronic technologies, and particularly to thin-film inductors, methods for manufacturing the same, integrated circuits, and terminal devices. Background Art

[0003] The miniaturization of electronic components is a prerequisite for the miniaturization and micro-miniaturization of electronic products. In electronic products such as wearable devices like bracelets, smart watches, and Bluetooth headsets, or mobile display terminals such as mobile phones and tablet computers, or devices such as servers, AI processors, and network processors, common electronic components include inductors.

[0004] A voltage converter is usually provided in the above-mentioned electronic products. Taking the DC-DC buck circuit in the voltage converter as an example, as Figure 1 shown, an inductor L is provided in the DC-DC buck circuit. The above inductor L has the functions of energy storage and filtering. When the switching transistor Q is turned on, the inductor L is charged. When the switching transistor Q is turned off, the inductor L discharges. In the above buck circuit, when the switching frequency of the switching transistor Q is relatively low, for example, 1 KHz to 100 KHz, in order to reduce the ripple of the output current of the buck circuit, the inductance of the above inductor L needs to be several hundred μH to several hundred nH. In this case, the size of the inductor L is too large, which is not conducive to the miniaturization of electronic products. Summary of the Invention

[0005] Embodiments of this application provide thin-film inductors, methods for manufacturing the same, integrated circuits, and terminal devices, which solve the problem of the large size of inductors in electronic products.

[0006] To achieve the above object, this application adopts the following technical solutions:

[0007] In a first aspect, a thin-film inductor is provided, which includes: a magnetic core, the magnetic core includes a first magnetic film and a second magnetic film. There is a receiving cavity between the first magnetic film and the second magnetic film. A conductor is located in the receiving cavity; an insulating spacer film is disposed on both sides of the conductor and is located between the first magnetic film and the second magnetic film. The insulating spacer film is in contact with the first magnetic film and the second magnetic film. In addition, both the first magnetic film and the second magnetic film include multiple magnetic sub-films and insulator films. In the first magnetic film, the magnetic sub-films and the insulator films are alternately arranged. In the second magnetic film, the magnetic sub-films and the insulator films are alternately arranged. The surface of the first magnetic film in contact with the insulating spacer film exposes multiple magnetic sub-films and multiple insulator films in the first magnetic film. And / or, the surface of the second magnetic film in contact with the insulating spacer film exposes multiple magnetic sub-films and multiple insulator films in the second magnetic film. In this way, the eddy current at the insulating spacer film can intersect with the exposed multiple magnetic sub-films and multiple insulator films on the surface of the first magnetic film in contact with the insulating spacer film, and / or, on the surface of the second magnetic film in contact with the insulating spacer film. As a result, the eddy current at the insulating spacer film is separated into multiple sub-eddy currents by the multiple magnetic sub-films at the position where the plane where the eddy current is located intersects with each magnetic sub-film, and each sub-eddy current enters one magnetic sub-film. In this case, each sub-eddy current can be confined to one magnetic sub-film, achieving the purpose of reducing eddy current loss.

[0008] Optionally, the surface of the first magnetic film, and / or, the second magnetic film in contact with the insulating spacer film is an inclined surface. In addition, the multiple magnetic sub-films and multiple insulator films in the first magnetic film and the second magnetic film are parallel to the lower surface of the first magnetic film. The lower surface of the first magnetic film is the surface of the first magnetic film on the side away from the second magnetic film. In this way, the above-mentioned eddy current can be separated into multiple sub-eddy currents by the multiple magnetic sub-films at the position where the plane where the eddy current is located intersects with each magnetic sub-film. And, each sub-eddy current enters one magnetic sub-film, so that each sub-eddy current can be confined to each magnetic sub-film, achieving the purpose of reducing eddy current loss.

[0009] Optionally, the surfaces of the first magnetic film and the second magnetic film in contact with the insulating spacer film are inclined surfaces with the same slope. In this case, the thickness of the insulating spacer film located between the second magnetic film and the first magnetic film is the same everywhere.

[0010] Optionally, the first magnetic film is a frustum of a pyramid. The upper base of the frustum of the pyramid is close to the second magnetic film, and the lower base is far from the second magnetic film. In addition, the thin-film inductor further includes: a planarization dielectric layer covering the upper base of the frustum of the pyramid and a part of the side surface of the frustum of the pyramid; a magnetic through-hole formed in the planarization dielectric layer; an insulating spacer film located in the through-hole and covering the other part of the side surface of the frustum of the pyramid; an interlayer dielectric layer covering the upper surface of the planarization dielectric layer and the side wall of the magnetic through-hole; the interlayer dielectric layer and the insulating spacer film are made of the same material and are an integral structure. The above-mentioned planarization dielectric layer is used to make the surface of the bearing surface for carrying the conductor in the thin inductor flat. An insulating spacer film in contact with the first magnetic film and the second magnetic film is formed in the magnetic through-hole. The interlayer dielectric layer is used to form a part of the lower support layer under the conductor.

[0011] Optionally, the tail of the second magnetic film covers the side wall of the magnetic through-hole far from the accommodation cavity and the upper surface of the interlayer dielectric layer connected to the side wall, so that the tail of the second magnetic film has a corner. In addition, one end of the tail of the second magnetic film far from the accommodation cavity has a taper angle. The taper angle is 10° to 90°. In some embodiments of the present disclosure, the above-mentioned taper angle β can be 12°, 15°, 19°, 20°, 30°, 60° or 85°.

[0012] Optionally, the first magnetic film is a frustum of a pyramid; the upper base of the frustum of the pyramid is close to the second magnetic film, and the lower base is far from the second magnetic film. The side surface of the frustum of the pyramid is completely covered by the insulating spacer film. In addition, the thin-film inductor further includes: a planarization dielectric layer covering the upper base of the frustum of the pyramid; an interlayer dielectric layer covering the planarization dielectric layer. The interlayer dielectric layer and the insulating spacer film are made of the same material and are an integral structure. The technical effects of the above-mentioned planarization dielectric layer and interlayer dielectric layer are the same as those described above and will not be repeated here.

[0013] Optionally, in the part of the second magnetic film in contact with the insulating spacer film, one end far from the accommodation cavity has a taper angle. The taper angle is less than 90°. The taper angle is 10° to 90°. In some embodiments of the present disclosure, the above-mentioned taper angle β can be 12°, 15°, 19°, 20°, 30°, 60° or 85°. There is no need to set a corner at the tail of the second magnetic film.

[0014] Optionally, the surface of the first magnetic film and / or the second magnetic film in contact with the insulating spacer film is a curved surface. In addition, the multi-layer magnetic sub-films and multi-layer insulator films in the first magnetic film and the second magnetic film are parallel to the lower surface of the first magnetic film. Here, the lower surface of the first magnetic film is the surface of the first magnetic film on the side away from the second magnetic film. In this way, multiple magnetic force lines passing through the insulating spacer film are respectively perpendicular to the surface of the first magnetic film in contact with the insulating spacer film, that is, the tangent plane at the position of the intersection of the curved surface and each magnetic force line. At this time, an eddy current is induced in the cross-section perpendicular to the direction of a magnetic force line, that is, in the above-mentioned tangent plane. The planes where some of the eddy currents are located respectively intersect with the film layer surfaces of the multi-layer magnetic sub-films. Thus, the eddy current intersecting with the film layer surface of a magnetic sub-film can enter the magnetic sub-film. At this time, some of the eddy currents can be respectively confined in the multi-layer magnetic sub-films, achieving the purpose of reducing eddy current loss.

[0015] Optionally, the surfaces of the second magnetic film and the first magnetic film in contact with the insulating spacer film are curved surfaces with the same curvature. In this case, the thickness of the above-mentioned insulating spacer film located between the second magnetic film and the first magnetic film is the same everywhere.

[0016] Optionally, the thin-film inductor further includes a support pad. The support pad is located below the first magnetic film; below the first magnetic film is the side of the first magnetic film away from the second magnetic film. The upper surface of the support pad is in contact with the insulating spacer film. In addition, both sides of the upper surface of the support pad are covered with the first magnetic film. In the first magnetic film covering the support pad, the multi-layer magnetic sub-films and multi-layer insulator films are in contact with the insulating spacer film. The surface of the support pad in contact with the first magnetic film is a curved surface. In this case, multiple magnetic force lines of the alternating magnetic field at the position of the insulating spacer film, after passing through the insulating spacer film from the second magnetic film, will respectively enter the multi-layer curved magnetic sub-films of the first magnetic film covering the support pad, and then be transmitted along the laying direction of the magnetic sub-films. Since the multi-layer magnetic sub-films and multi-layer insulator films in the first magnetic film covering the support pad intersect with the surface where the insulating spacer film is located, and the paths of multiple magnetic force lines are respectively confined in each layer of curved magnetic sub-films, therefore, in the cross-section perpendicular to the direction of each magnetic force line of the alternating magnetic field, the plane where the eddy current is induced also intersects with the multi-layer magnetic sub-films covering the support pad. And, the above-mentioned eddy currents are also confined in each layer of magnetic sub-films. Thus, some of the eddy currents can be respectively confined in each layer of magnetic sub-films, achieving the purpose of reducing eddy current loss.

[0017] Optionally, in order to simplify the manufacturing process of the support pad, the surface of the support pad in contact with the first magnetic film is an arc surface. In order to improve the stability of the support pad in the thin-film inductor. The lower surface of the support pad is flush with the lower surface of the first magnetic film.

[0018] Optionally, the thin-film inductor further includes: a seed layer located in the accommodation cavity; the seed layer is in contact with the surface of the conductor close to the first magnetic film. The seed layer is used to dispose the conductor on the lower support layer. An upper support layer located in the accommodation cavity, except for the surface in contact with the seed layer, the remaining surfaces of the conductor are covered by the upper support layer. The upper support layer is used to support the second magnetic film and can adjust the overall thickness of the thin-film inductor. An adhesion layer is disposed on the surface of the second magnetic film close to the first magnetic film for fixing the second magnetic film.

[0019] Optionally, the thickness of the insulator film is 5 nm to 50 nm. When the thickness of the insulator film is less than 5 nm, at high switching frequencies in the circuit, the impedance of the capacitance formed between the magnetic sub-layers is small, making it easy for the sub-eddy currents in each magnetic sub-layer to pass through the insulator film and converge together, thus reducing the effect of reducing eddy current losses. In addition, when the thickness of the insulator film is greater than 50 nm, with a certain thickness of the first magnetic film or the second magnetic film, the proportion of the thickness of the magnetic sub-layer in the thickness of the first magnetic film or the second magnetic film will decrease, thereby reducing the effective magnetic permeability of the thin-film inductor. In addition, the thickness of the magnetic sub-layer is 100 nm to 500 nm. When the thickness of the magnetic sub-layer is greater than 500 nm, with a certain thickness of the first magnetic film or the second magnetic film, the proportion of the thickness of the insulator film in the thickness of the first magnetic film or the second magnetic film will decrease, making it easy for the sub-eddy currents in each magnetic sub-layer to pass through the insulator film and converge together, thus reducing the effect of reducing eddy current losses. In addition, when the thickness t of the magnetic sub-layer is greater than 500 nm, at high switching frequencies in the circuit, the impedance of the eddy current path of the thin-film inductor will decrease, which is not conducive to confining each sub-eddy current in the narrow loop of the magnetic sub-layer.

[0020] Optionally, since the second magnetic film covers a relatively thick upper support layer, in the case of the anisotropy of the first magnetic film and the second magnetic film, along the direction of the hard axis of the thin-film inductor, the length of the first magnetic film is less than the length of the second magnetic film.

[0021] Optionally, the conductor is at least one metal wire. The thin-film inductor includes at least two magnetic cores. Along the length direction of the metal wire, adjacent magnetic cores are arranged at intervals. By arranging adjacent magnetic cores at intervals, the eddy current loss of the thin-film inductor along the length direction of the metal wire can be reduced.

[0022] Optionally, the conductor is a coil. In addition, the thin-film inductor includes a first magnetic core and a second magnetic core. The coil includes a plurality of first line segments and a plurality of second line segments. The first line segments and the second line segments are arranged oppositely. A plurality of first line segments are located in the first magnetic core. A plurality of second line segments are located in the second magnetic core.

[0023] In a second aspect, an integrated circuit is provided, which includes a silicon substrate and any one of the thin-film inductors described above. The thin-film inductor is located on the silicon substrate. The integrated circuit has the same technical effects as the thin-film inductor provided in the foregoing embodiments, and details are not described herein again.

[0024] Optionally, the integrated circuit further includes a circuit structure disposed on the silicon substrate, a circuit inductance interconnection layer covering the circuit structure in sequence, and a chip packaging structure. The thin-film inductor is located between the circuit inductance interconnection layer and the chip packaging structure. The circuit inductance interconnection layer is used to electrically connect the thin-film inductor to the circuit structure. The first magnetic film in the thin-film inductor is closer to the silicon substrate than the second magnetic film. Or, the second magnetic film in the thin-film inductor is closer to the silicon substrate than the first magnetic film. The circuit inductance interconnection layer can realize signal interconnection between the thin-film inductor and the circuit structure.

[0025] In a third aspect, a terminal device is provided, which includes at least one integrated circuit of any one of the above. The terminal device further includes a power management chip and a power bus connected to the power management chip; the power management chip includes an integrated circuit. And / or, the terminal device further includes a processor and a data bus connected to the processor. The processor includes an integrated circuit. The mobile device has the same technical effects as the integrated circuit provided in the foregoing embodiments, and details are not described herein again.

[0026] In a fourth aspect, a method for manufacturing a thin-film inductor is provided. The method includes: First, on a substrate, a first magnetic film is formed through a patterning process. The first magnetic film is in the shape of a trapezoidal platform; the upper base of the trapezoidal platform is away from the substrate, and the lower base is close to the substrate. Among them, the first magnetic film includes multiple layers of alternately arranged magnetic sub-films and insulator films. The side surfaces of the trapezoidal platform expose multiple layers of magnetic sub-films and multiple layers of insulator films in the first magnetic film. Next, on the substrate on which the first magnetic film is formed, a first dielectric layer is deposited. Then, a planarization process is performed on the first dielectric layer, and a magnetic through-hole is fabricated on the first dielectric layer through a patterning process. The patterned first dielectric layer covers the upper base of the trapezoidal platform and a part of the side surface of the trapezoidal platform. Next, on the substrate having the above structure, a second dielectric layer is deposited. The second dielectric layer covers the upper surface of the first dielectric layer, the side walls of the magnetic through-holes, and is in contact with another part of the side surface of the trapezoidal platform through the magnetic through-holes. Among them, the part of the second dielectric layer in contact with the side surface of the trapezoidal platform serves as an insulating spacer film. Next, on the substrate having the insulating spacer film, a conductor is formed through a patterning process above the upper base of the trapezoidal platform. Next, on the substrate on which the conductor is formed, a second magnetic film is formed through a patterning process. The second magnetic film includes multiple layers of alternately arranged magnetic sub-films and insulator films; among them, a receiving cavity for receiving the conductor is formed between the first magnetic film and the second magnetic film. The method for manufacturing the thin-film inductor has the same technical effects as the thin-film inductor provided in the foregoing embodiments, and details are not described herein again.

[0027] Fifth aspect, a method for manufacturing a thin-film inductor is provided. The method includes: First, on a substrate, a first magnetic film is formed through a patterning process. The first magnetic film is in the shape of a trapezoidal platform. The upper base of the trapezoidal platform is away from the substrate, and the lower base is close to the substrate. Among them, the first magnetic film includes multiple layers of alternately arranged magnetic sub-films and insulator films. The side surfaces of the trapezoidal platform expose multiple layers of magnetic sub-films and multiple layers of insulator films in the first magnetic film. Next, on the substrate with the first magnetic film formed, a first dielectric layer is deposited. Then, a planarization process and a patterning process are performed on the first dielectric layer, and the patterned first dielectric layer covers the upper base of the trapezoidal platform. Next, on the substrate with the above structure formed, a second dielectric layer is deposited, and the second dielectric layer covers the patterned first dielectric layer. Among them, in the second dielectric layer, the part that completely covers the side surface of the trapezoidal platform serves as an insulating spacer film. Next, on the substrate with the insulating spacer film formed, a conductor is formed through a patterning process above the upper base of the trapezoidal platform. Next, on the substrate with the conductor formed, a second magnetic film is formed through a patterning process. The second magnetic film includes multiple layers of arranged magnetic sub-films and insulator films. Among them, an accommodation cavity for accommodating the conductor is formed between the first magnetic film and the second magnetic film. The manufacturing method of the thin-film inductor described above has the same technical effects as the thin-film inductor provided in the foregoing embodiments, and will not be elaborated here.

[0028] Sixth aspect, a method for manufacturing a thin-film inductor is provided. The method includes: First, on a substrate, two support pads arranged at intervals are formed through a patterning process. The surface of the support pad away from the substrate is a curved surface. Next, on the substrate with the support pads formed, a first magnetic film is formed through a patterning process; the first magnetic film includes multiple layers of alternately arranged magnetic sub-films and insulator films. Next, at the position where the support pads are located, a part of the material in the first magnetic film is removed through a patterning process to expose the upper surface of the support pads. Next, on the substrate with the above structure formed, a dielectric layer is deposited and patterned at the position where the support pads are located to form an insulating spacer film. Among them, the insulating spacer film is in contact with the upper surface of the support pads and multiple layers of magnetic sub-films and insulator films in the first magnetic film on both sides of the upper surface of the support pads. Next, on the substrate with the insulating spacer film formed, a conductor is formed. Next, on the substrate with the conductor formed, a second magnetic film is formed through a patterning process. The second magnetic film includes multiple layers of alternately arranged magnetic sub-films and insulator films. Among them, an accommodation cavity for accommodating the conductor is formed between the first magnetic film and the second magnetic film. The manufacturing method of the thin-film inductor described above has the same technical effects as the thin-film inductor provided in the foregoing embodiments, and will not be elaborated here. Description of the Drawings

[0029] Figure 1 It is a schematic structural diagram of a buck circuit provided by the prior art;

[0030] Figure 2For some embodiments of the present application, a schematic cross-sectional structure diagram of a thin-film inductor is provided;

[0031] Figure 3 For some embodiments of the present application, a schematic three-dimensional structure diagram of a thin-film inductor is provided;

[0032] Figure 4 For some embodiments of the present application, another schematic three-dimensional structure diagram of a thin-film inductor is provided;

[0033] Figure 5 For some embodiments of the present application, another schematic three-dimensional structure diagram of a thin-film inductor is provided;

[0034] Figure 6 is Figure 2 a specific structural schematic diagram of the second magnetic film and the first magnetic film in;

[0035] Figure 7a For some embodiments of the present application, a schematic diagram of the direction of magnetic field lines in an alternating magnetic field is provided;

[0036] Figure 7b For some embodiments of the present application, another schematic diagram of the direction of magnetic field lines in an alternating magnetic field is provided;

[0037] Figure 8 is Figure 7a or Figure 7b a schematic diagram of the longitudinal eddy current generated by the magnetic field lines in the horizontal direction in being separated;

[0038] Figure 9 is Figure 7a or Figure 7b a schematic diagram of the horizontal eddy current generated by the magnetic field lines in the vertical direction in;

[0039] Figure 10 For some embodiments of the present application, a schematic diagram of the structure of the multilayer magnetic sub-films and the multilayer insulator films exposed on the surfaces of the first magnetic film and / or the second magnetic film in contact with the insulating spacer film in a thin-film inductor is provided;

[0040] Figure 11a For some embodiments of the present application, a schematic diagram of the structure of a thin-film inductor is provided;

[0041] Figure 11b is Figure 11a a schematic three-dimensional structure diagram of the first magnetic film in;

[0042] Figure 11c is Figure 11a a schematic diagram of the structure of the remaining components in the thin-film inductor shown in;

[0043] Figure 11dFor some embodiments of the present application, a schematic structural diagram of another thin-film inductor is provided;

[0044] Figure 12 For some embodiments of the present application, a schematic structural diagram of another thin-film inductor is provided;

[0045] Figure 13 Figure 11a Schematic partial structure diagram of the first magnetic film in;

[0046] Figure 14 is Figure 13 Schematic diagram of eddy currents being separated in;

[0047] Figure 15 For some embodiments of the present application, a schematic partial structure diagram of a thin-film inductor is provided;

[0048] Figure 16a For some embodiments of the present application, a schematic partial structure diagram of another thin-film inductor is provided;

[0049] Figure 16b is Figure 16a Schematic partial structure diagram of the second magnetic film in;

[0050] Figure 16c is Figure 16b Schematic diagram of eddy currents being separated in;

[0051] Figure 17 For some embodiments of the present application, a schematic partial structure diagram of another thin-film inductor is provided;

[0052] Figure 18 is Figure 17 Schematic partial structure diagram of the first magnetic film in;

[0053] Figure 19 For some embodiments of the present application, a schematic structural diagram of another thin-film inductor is provided;

[0054] Figure 20 is Figure 18 Schematic partial structure diagram of the first magnetic film in;

[0055] Figure 21 For some embodiments of the present application, a schematic structural diagram of an integrated circuit is provided;

[0056] Figure 22 For some embodiments of the present application, a schematic internal structure diagram of a terminal device is provided;

[0057] Figure 23 For some embodiments of the present application, a flowchart of a manufacturing method of a thin-film inductor is provided;

[0058] Figure 24a, Figure 24b , Figure 24c , Figure 24d and Figure 24e are process flow diagrams for fabricating the first magnetic film;

[0059] Figure 25a , Figure 25b , Figure 25c , Figure 25d , Figure 25e and Figure 25f are process flow diagrams for fabricating a planar dielectric layer with magnetic vias;

[0060] Figure 26 is a process flow diagram for fabricating an insulating spacer film;

[0061] Figure 27a , Figure 27b , Figure 27c , Figure 27d is a process flow diagram for fabricating a conductor;

[0062] Figure 28a , Figure 28b , Figure 28c , Figure 28d , Figure 28e and Figure 28f is a process flow diagram for fabricating an upper support layer and a second magnetic film;

[0063] Figure 29a , Figure 29b , Figure 29c , Figure 29d and Figure 29e is a process flow diagram for fabricating a planar dielectric layer and an insulating spacer film;

[0064] Figure 30a , Figure 30b , Figure 30c and Figure 30d is a process flow diagram for fabricating a conductor;

[0065] Figure 31a , Figure 31b , Figure 31c , Figure 31d , Figure 31e and Figure 31f is a process flow diagram for an upper support layer and a second magnetic film;

[0066] Figure 32 For some embodiments of the present application, it provides another flowchart of a method for fabricating a thin-film inductor;

[0067] Figure 33a , Figure 33b , Figure 33c , Figure 33d ,Figure 33e and Figure 33f is Figure 32 a schematic diagram of the manufacturing process of the thin-film inductor corresponding to some steps in

[0068] Reference numerals:

[0069] 01 - thin-film inductor; 02 - integrated circuit; 03 - terminal device; 10 - magnetic core; 101 - first magnetic film; 120 - magnetic sub-film; 121 - insulator film; 102 - second magnetic film; 20 - conductor; 201 - first line segment; 202 - second line segment; 30 - insulating spacer film; 40 - support pad; 21 - accommodation cavity; 22 - planarization dielectric layer; 23 - magnetic through-hole; 24 - interlayer dielectric layer; 25 - tail of the second magnetic film; 26 - lower support layer; 27 - seed layer; 28 - upper support layer; 29 - adhesion layer; 50 - silicon substrate; 51 - circuit structure; 501 - transistor; 502 - metal interconnect layer; 52 - circuit inductor interconnect layer; 53 - chip package structure; 54 - chip package pin; 60 - power management chip; 61 - processor; 70 - photoresist; 71 - mask; 80 - first dielectric layer; 81 - second dielectric layer. Detailed implementation manners

[0070] Next, the technical solutions in the embodiments of the present application will be described with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments.

[0071] Hereinafter, terms such as "first" and "second" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, features defined with "first", "second", etc. may explicitly or implicitly include one or more of such features.

[0072] In addition, in the present application, orientation terms such as "upper" and "lower" are defined relative to the orientation of the components shown in the accompanying drawings. It should be understood that these directional terms are relative concepts, and they are used for relative description and clarification, and they may change accordingly with the change of the orientation of the components placed in the accompanying drawings.

[0073] The embodiments of the present application provide an integrated circuit, taking this integrated circuit as a voltage conversion circuit as an example. When increasing the switching frequency of the switching transistor in the voltage conversion circuit, for example, increasing its switching frequency to about 40 MHz to 200 MHz, an inductor with a very small inductance can be selected in the circuit, that is, the ripple of the output current of the voltage conversion circuit can be reduced.

[0074] In this case, the area of the above inductor is very small, thus being able to solve the problem of the large size of the inductor in electronic products.

[0075] Based on this, the above inductor can be integrated onto the silicon substrate of the integrated circuit and fabricated at a position in the integrated circuit close to the power ball grid array (BGA) to form an integrated voltage regulator (IVR). In this way, the power supply path of the above power supply can be reduced, and the impedance of the power delivery network (PDN) in the high-frequency switching circuit is lowered.

[0076] On this basis, in order to integrate an inductor with an inductance of 5 - 10 nH into the integrated circuit, the above integrated circuit provided by the embodiments of the present application includes a thin-film inductor.

[0077] As Figure 2 shown, the above thin-film inductor 01 includes at least one magnetic core 10 and a conductor 20 located within each magnetic core 10.

[0078] Each magnetic core 10 includes a first magnetic film 101 and a second magnetic film 102 which are oppositely arranged.

[0079] The second magnetic film 102 and the first magnetic film 101 are made of magnetic materials. Among them, in order to increase the inductance per unit area of the thin-film inductor, magnetic materials with relatively high magnetic permeability and good saturation characteristics can be used. For example, magnetic alloy materials: FeNi, CoZrTa, CoZrTaB, CZTB, FeCoB, FeHfO, and CoFeHfO alloys, etc.

[0080] In addition, there is a receiving cavity 21 between the first magnetic film 101 and the second magnetic film 102. The above conductor 20 is located within the receiving cavity 21.

[0081] In some embodiments of the present application, as Figure 3 or Figure 4 shown, the above conductor 20 can be at least one metal wire.

[0082] In this case, in order to reduce the eddy current loss of the thin-film inductor 01 along the length direction (Z direction) of the metal wire, the above thin-film inductor 01 can include at least two of the above magnetic cores. For example, a first magnetic core 10_a and a second magnetic core 10_b. And, along the length direction (Z direction) of the metal wire, two adjacent magnetic cores, namely the first magnetic core 10_a and the second magnetic core 10_b, are spaced apart and insulated.

[0083] In this case, the above first magnetic film 101 and second magnetic film 102 can be anisotropic. In this case, the length direction (Z direction) of the metal wire is the easy axis of the magnetic field of the first magnetic film 101 and the second magnetic film 102.

[0084] In addition, when the switching frequency in the circuit where the thin-film inductor 01 is located is above 40Mhz, the width direction (X direction) of the metal wire is the hard axis of the magnetic fields of the first magnetic film 101 and the second magnetic film 102.

[0085] It should be noted that Figure 4 In [description], two metal wires are provided in the same magnetic core 10. The magnetic flux generated by one metal wire is coupled with the magnetic flux generated by the other metal wire. In this case, the thin-film inductor 01 can be a coupled inductor. Among them, in order to make the thin-film inductor 01 with two metal wires be the above-mentioned coupled inductor, the above two metal wires need to be driven by two independent circuits respectively.

[0086] Or, in some other embodiments of the present application, as Figure 5 shown, the above conductor 20 is a coil. The thin-film inductor includes a first magnetic core 10_a and a second magnetic core 10_b.

[0087] The above coil includes a plurality of first line segments 201 and a plurality of second line segments 202. The first line segments 201 and the second line segments 202 are arranged oppositely. As Figure 5 shown, the plurality of first line segments 201 are the part of the above coil located above, while the plurality of second coils 202 are the part of the coil located below.

[0088] In this case, the plurality of first line segments 201 are located in the first magnetic core 10_a. The plurality of second line segments 201 are located in the second magnetic core 10_b.

[0089] It should be noted that the present application does not limit the number of turns of the coil formed by the wire 20. For the thin-film inductor 01 as Figure 5 shown, the number of turns of the coil formed by the wire 20 can be designed according to the inductance required by the thin-film inductor 01.

[0090] Among them, the more the number of turns of the above coil, the greater the inductance of the thin-film inductor 01, and vice versa.

[0091] In addition, when the above thin-film inductor 01 is applied to a power supply circuit, when the power supply circuit supplies a small current, the inductance of the above thin-film inductor 01 needs to be set larger, and when the power supply circuit supplies a large current, the inductance of the above thin-film inductor 01 needs to be set smaller. On this basis, the above thin-film inductor 01 as Figure 2As shown, it further includes an insulating spacer film 30. The insulating spacer film 30 is disposed on both sides of the above-mentioned conductor 20 and is located within the gap between the first magnetic film 101 and the second magnetic film 102. The lower surface and the upper surface of the insulating spacer film 30 are respectively in contact with the first magnetic film 101 and the second magnetic film 102.

[0092] It should be noted that both sides of the above-mentioned conductor 20 refer to both sides in the signal transmission direction of the conductor 20 (such as the Z direction in 3).

[0093] The insulating spacer film 30 separates the first magnetic film 101 from the second magnetic film 102, preventing the first magnetic film 101 from being electrically connected to the second magnetic film 102. In addition, the thickness of the insulating spacer film 30 is very thin. For example, the thickness can be about 0.5 μm. Thus, the magnetic field lines in the first magnetic film 101 can pass through the insulating spacer film 30 and enter the second magnetic film 102, or the magnetic field lines in the second magnetic film 102 can pass through the insulating spacer film 30 and enter the first magnetic film 101.

[0094] As can be seen from the above, in order to increase the inductance per unit area of the thin-film inductor 01, magnetic materials with relatively high magnetic permeability and good saturation characteristics can be used to form the first magnetic film 101 and the second magnetic film 102. However, in this case, the resistivity of the thin-film inductor 01 is relatively low. When the switching frequency of the switching transistor in the voltage conversion circuit is relatively high, large eddy current losses are likely to occur in the thin-film inductor 01. In this way, on the one hand, the inductance of the thin-film inductor 01 will be reduced. On the other hand, the large eddy current losses will cause the thin-film inductor 01 to heat up, thereby reducing the inductance Q value and lowering the conversion efficiency of the voltage conversion circuit.

[0095] To solve the above problems, as Figure 6 shown, the above-mentioned first magnetic film 101 and second magnetic film 102 both include multiple magnetic sub-films 120 and multiple insulator films 121.

[0096] The magnetic sub-films 120 and the insulator films 121 in the first magnetic film 101 are alternately arranged. The magnetic sub-films 120 and the insulator films 121 in the second magnetic film 102 are alternately arranged.

[0097] In this case, the above-mentioned first magnetic film 101 and second magnetic film 102 have a structure of multiple thin films stacked (laminated).

[0098] In this case, when the conductor 20 in the thin-film inductor 01 is energized, the direction of the magnetic field lines (represented by black arrows in the figure) of the alternating magnetic field generated by the thin-film inductor 01 can be as Figure 7a shown, which is clockwise.

[0099] Alternatively, when the direction of the current flowing through the conductor 20 is changed, the direction of the magnetic force lines of the alternating magnetic field generated by the thin-film inductor 01 is, as Figure 7b shown, counterclockwise.

[0100] In the first magnetic film 101 and the second magnetic film 102, a closed loop current, i.e., eddy current, is induced in the cross-section perpendicular to the direction of the magnetic force lines of the alternating magnetic field. The generation of the eddy current will result in additional losses and at the same time weaken the magnetic field.

[0101] Based on this, Figure 7a and Figure 7b in [reference documents], in the first magnetic film 101 and the second magnetic film 102, a loop current is induced in the cross-section perpendicular to the horizontal (X-direction) magnetic force lines of the alternating magnetic field. This loop current is a longitudinal eddy current.

[0102] As can be seen from the above, since the first magnetic film 101 and the second magnetic film 102 include multiple layers and the magnetic sub-films 120 are insulated. Therefore, as Figure 8 shown, the longitudinal eddy current formed in the cross-section perpendicular to the X-direction is separated into multiple sub-eddy currents M1 by the magnetic sub-films 120 in each layer of the first magnetic film 101 and the second magnetic film 102. Each sub-eddy current M1 is confined to the narrow loop of the magnetic sub-film 120. Thereby increasing the resistance in the eddy current path and achieving the purpose of reducing eddy current losses.

[0103] It should be noted that the magnetic field generated by the above eddy current hinders the change of the original magnetic field generated by the energization of the first magnetic film 101 and the second magnetic film 102.

[0104] For example, taking Figure 8 shown, when the direction H of the original magnetic field generated by the energization of the first magnetic film 101 and the second magnetic film 102 is from the inside to the outside and increases, the direction of the above eddy current is clockwise.

[0105] Or, when the direction H of the original magnetic field generated by the energization of the first magnetic film 101 and the second magnetic film 102 is from the inside to the outside and decreases, the direction of the above eddy current is counterclockwise.

[0106] In addition, when the switching frequency in the circuit is low, each of the above sub-eddy currents M1 is easily confined to each layer of the magnetic sub-films 120. However, when the switching frequency in the circuit is high, due to the capacitance effect between the layers of the magnetic sub-films 120, the higher the frequency, the smaller the impedance of the capacitance. Therefore, the sub-eddy currents M1 in each magnetic sub-film 120 are more likely to pass through the insulating sub-film 121 and converge together to form a large eddy current path. Thereby reducing the effect of reducing eddy current losses.

[0107] In this case, when the switching frequency in the circuit is high, in order to increase the impedance of the above capacitance, the thickness of the insulating sub-film 121 can be appropriately increased.

[0108] For example, the thickness d of each layer of insulator film 121 can be 5 nm to 50 nm. When the thickness d of the insulator film 121 is less than 5 nm, at high switching frequencies in the circuit, the impedance of the capacitance formed between the magnetic sub-layers 120 is small, making it easy for the sub-eddy currents M1 in each magnetic sub-layer 120 to pass through the insulator film 121 and converge together, thereby reducing the effect of reducing eddy current losses.

[0109] In addition, when the thickness d of the insulator film 121 is greater than 50 nm, given a certain thickness of the first magnetic film 101 or the second magnetic film 102, the proportion of the thickness of the magnetic sub-layer 120 in the thickness of the first magnetic film 101 or the second magnetic film 102 will decrease, thereby reducing the effective magnetic permeability of the thin film inductor 01.

[0110] In some embodiments of the present application, the thickness d of the above-mentioned insulator film 121 can be 5 nm, 10 nm, 15 nm, 25 nm, 50 nm.

[0111] Among them, the insulator film 121 is composed of insulating inorganic or organic materials.

[0112] In addition, the thickness t of each layer of magnetic sub-layer 120 can be 100 nm to 500 nm. When the thickness t of the magnetic sub-layer 120 is less than 100 nm, the thickness t of the above-mentioned magnetic sub-layer 120 is too small, which is not conducive to improving the effective magnetic permeability of the thin film inductor 01.

[0113] When the thickness t of the magnetic sub-layer 120 is greater than 500 nm, given a certain thickness of the first magnetic film 101 or the second magnetic film 102, the proportion of the thickness of the insulator film 121 in the thickness of the first magnetic film 101 or the second magnetic film 102 will decrease, making it easy for the sub-eddy currents M1 in each magnetic sub-layer 120 to pass through the insulator film 121 and converge together, thereby reducing the effect of reducing eddy current losses. In addition, when the thickness t of the magnetic sub-layer 120 is greater than 500 nm and the switching frequency in the circuit is high, the impedance of the eddy current path of the thin film inductor 01 will decrease, which is not conducive to confining each sub-eddy current M1 in the narrow loop of the magnetic sub-layer 120.

[0114] In some embodiments of the present application, the thickness t of the above-mentioned layer of magnetic sub-layer 120 can be 100 nm, 150 nm, 180 nm, 250 nm, 300 nm, 350 nm, 400 nm, 450 nm, 500 nm.

[0115] Among them, the magnetic sub-layer 120 is composed of the above-mentioned magnetic materials.

[0116] In addition, as Figure 7a or Figure 7bAs shown, at the insulating spacer film 30 of the thin-film inductor 01, the magnetic field lines are perpendicular to the magnetic film surface of the first magnetic film 101. At this time, within the first magnetic film 101 or the second magnetic film 102, an alternating magnetic field induces a circular current in a cross-section perpendicular to the vertical magnetic field lines (Y direction). This circular current is the horizontal eddy current M2 parallel to the film layer surface B of the first magnetic film 101 as shown in Figure 9 shown.

[0117] As described above, Figure 9 the direction of the eddy current in is related to the original magnetic field generated by the energization of the first magnetic film 101 and the second magnetic film 102, which will not be elaborated here.

[0118] Since the plane where the above-mentioned horizontal eddy current M2 is located is parallel to the magnetic sub-film 120 in the first magnetic film 101 or the second magnetic film 102. Therefore, the above-mentioned horizontal eddy current M2 cannot be separated by the multi-layer magnetic sub-films 120, resulting in the eddy current loss at the position of the insulating spacer film 30 not being effectively reduced.

[0119] To solve the above problems, in the thin-film inductor 01 provided by the embodiment of the present application, the surface of the first magnetic film 101 in contact with the insulating spacer film 30, as shown in Figure 10 shown, exposes the multi-layer magnetic sub-films 120 and multi-layer insulator films 121 in the first magnetic film 101.

[0120] And / or,

[0121] the surface of the second magnetic film 102 in contact with the insulating spacer film 30 exposes the multi-layer magnetic sub-films 120 and multi-layer insulator films 121 in the second magnetic film 102.

[0122] In this case, it can be made that the surface of the first magnetic film 101 in contact with the insulating spacer film 30, and / or, the surface of the second magnetic film 102 in contact with the insulating spacer film 30, the exposed multi-layer magnetic sub-films 120 and multi-layer insulator films 121 intersect with the plane where the eddy current generated by the magnetic field lines passing through the insulating spacer film 20 is located.

[0123] In this way, the magnetic field lines passing through the insulating spacer film 30 can enter the first magnetic film 101, and / or, the multi-layer magnetic sub-films 120 exposed on the surface in contact with the insulating spacer film 30. At this time, the eddy current generated in the plane perpendicular to the magnetic field lines is separated into multiple sub-eddy currents by each layer of magnetic sub-films 120, and as shown in Figure 8 shown, each sub-eddy current enters one layer of magnetic sub-film 120. In this case, each sub-eddy current can be confined to one layer of magnetic sub-film 120, achieving the purpose of reducing eddy current loss.

[0124] Hereinafter, an example of the structure of the magnetic core 10 that can achieve the intersection of the multi-layer magnetic sub-film 120 and the plane where eddy currents generated by the magnetic field lines passing through the insulating spacer film 20 are located will be described.

[0125] Example 1

[0126] In this example, as Figure 11a shown, the surfaces of the first magnetic film 101 and the second magnetic film 102 that are in contact with the insulating spacer film 30 are inclined surfaces C with equal slopes. In this case, the thickness of the insulating spacer film 30 is the same everywhere.

[0127] There is an angle α between the inclined surface C and the lower surface D of the first magnetic film 101. This angle α can be Figure 11a shown as an acute angle. Or, as Figure 12 shown, the angle α is an obtuse angle. This application does not make any limitations in this regard.

[0128] It should be noted that the lower surface D of the first magnetic film 101 is the surface of the first magnetic film 101 on the side away from the second magnetic film 102.

[0129] From Figure 11a and Figure 12 it can be seen that when the angle a is an acute angle, the average thickness of the first magnetic film 101 is thinner, which is beneficial to achieving the ultra-thin design requirements of electronic components. For the convenience of description, the following examples are all based on the above angle α being an acute angle.

[0130] In addition, as Figure 13 shown, the multi-layer magnetic sub-film 120 and the multi-layer insulator film 121 in the first magnetic film 101 are parallel to the lower surface D of the first magnetic film 101.

[0131] In this case, during the manufacturing process of the first magnetic film 101, first, physical vapor deposition (PVD) process is used to alternately sputter on the bearing surface of a substrate multiple times to respectively form alternating multi-layer magnetic sub-film 120 and multi-layer insulator film 121, and finally form the first magnetic film 101.

[0132] The magnetic sub-film 120 and the insulator film 121 formed through the above steps are parallel to the bearing surface of the substrate, so that the multi-layer magnetic sub-film 120 and the multi-layer insulator film 121 in the first magnetic film 101 can be parallel to the lower surface D of the first magnetic film 101 (i.e., the surface of the first magnetic film 101 in contact with the bearing surface of the substrate).

[0133] In this way, the multi-layer magnetic sub-film 120 and the multi-layer insulator film 121 in the first magnetic film 101 are parallel to the inclined surface C, so that the inclined surface C can expose the multi-layer magnetic sub-film 120 and the multi-layer insulator film 121 in the first magnetic film 101.

[0134] Among them, in some embodiments of the present application, the above-mentioned inclined surface C can be prepared by a lift-off process. The above-mentioned lift-off process will be described in detail later.

[0135] Next, an insulating spacer film 30 and a conductor 20 are fabricated. The multi-layer magnetic sub-film 120 and the multi-layer insulator film 121 in the second magnetic film 102 can be parallel to the lower surface D of the first magnetic film 101.

[0136] In addition, as Figure 11a shown, the surface of the second magnetic film 102 in contact with the insulating spacer film 30 can also form the above-mentioned inclined surface C. In this way, the surfaces of the first magnetic film 101 and the second magnetic film 102 in contact with the insulating spacer film 30 are both the above-mentioned inclined surface C.

[0137] Hereinafter, when the included angle α between the surfaces of the first magnetic film 101 and the second magnetic film 102 in contact with the insulating spacer film 30 and the lower surface D of the first magnetic film 101 is an acute angle, a specific structure of the above-mentioned thin-film inductor 01 will be exemplified.

[0138] For example, as Figure 11a shown, the first magnetic film 101 can be a frustum of a pyramid as Figure 11b shown.

[0139] Among them, the upper base E1 of the above-mentioned frustum of a pyramid is close to the second magnetic film 102, and the lower base E2 is far from the second magnetic film 102.

[0140] In addition, as Figure 11a shown, the above-mentioned thin-film inductor 01 further includes: a planarization dielectric layer 22, a magnetic through-hole 23, and an interlayer dielectric layer 24.

[0141] The planarization dielectric layer 22 covers the frustum of a pyramid, that is, the upper base of the above-mentioned first magnetic film 101, and a part of the side surface F of the frustum of a pyramid.

[0142] In some embodiments of the present application, when fabricating the above-mentioned planarization dielectric layer 22, a dielectric layer can be first deposited on the substrate on which the first magnetic film 101 is fabricated. The material of the dielectric layer can include at least one of Si 3 N 4 , SiO 2 . Then, a Chemical Mechanical Planarization (CMP) process is used to polish the upper surface (the surface far from the first magnetic film 101) of the above-mentioned dielectric layer so that the surface of the dielectric layer is flat to achieve the purpose of planarization.

[0143] Etch a part of the material of the planarized dielectric layer 22 to form the magnetic via 23. The insulating spacer film 30 is located within the via 23 and covers another part of the side surface F of the trapezoidal platform.

[0144] It can be seen from Figure 11a that a part of the side surface F of the trapezoidal platform, that is, a part of the first magnetic film 101, is covered by the insulating spacer film 30, while the other part is covered by the planarized dielectric layer 22.

[0145] The interlayer dielectric layer 24 covers the upper surface of the planarized dielectric layer 22 and the sidewalls of the magnetic via 23.

[0146] Among them, the interlayer dielectric layer 24 is made of the same material as the insulating spacer film 30. For example, it can be Si 3 N 4 , SiO 2 or at least one of them. In addition, the interlayer dielectric layer 24 and the insulating spacer film 30 can be an integral structure.

[0147] In this case, on the substrate with the planarized dielectric layer 22 and the magnetic via 23 fabricated, a dielectric layer can be deposited by the same deposition process. At this time, the part of the dielectric layer located within the magnetic via 23 and in contact with the side surface of the trapezoidal platform, that is, the first magnetic film 101, is the insulating spacer film 30. And the part of the dielectric layer covering the upper surface of the planarized dielectric layer 22 and the sidewalls of the magnetic via 23 is the interlayer dielectric layer 24.

[0148] Based on this, as Figure 11a shown, the part of the planarized dielectric layer 22 and the interlayer dielectric layer 24 covering the trapezoidal platform, that is, the upper base E1 of the first magnetic film 101, serves as the lower support layer 26 for carrying the conductor 20. It can be seen from the above that the lower support layer 26 is made of inorganic materials, such as mainly composed of Si 3 N 4 and / or SiO 2 constitutes.

[0149] In addition, as Figure 11a shown, the tail 25 of the second magnetic film 102 covers the sidewall of the magnetic via 23 far from the accommodation cavity 21 and turns to cover the upper surface of the interlayer dielectric layer 24 connected to the sidewall.

[0150] One end of the tail 25 of the second magnetic film 102 far from the accommodation cavity 21 has a taper angle β.

[0151] The taper angle β is 10° to 90°.

[0152] For example, in some embodiments of the present disclosure, the taper angle β can be 12°, 15°, 19°, 20°, 30°, 60° or 85°.

[0153] In addition, as Figure 11c shown, the thin-film inductor 01 further includes a seed layer 27, an upper support layer 28, and an adhesion layer 29.

[0154] The above-mentioned seed layer 27 is located within the above-mentioned accommodation cavity 21. The seed layer 21 is in contact with one surface of the conductor 20 close to the first magnetic film 101.

[0155] Among them, the material constituting the above-mentioned seed layer 27 includes at least one of titanium (Ti) and copper (Cu). When manufacturing the conductor 20 by electroplating, the conductor 20 can be disposed on the upper surface of the above-mentioned lower support layer 26 through the seed layer 27.

[0156] The upper support layer 28 is located within the above-mentioned accommodation cavity 21. Except for the surface in contact with the seed layer 27 of the conductor 20, the remaining surfaces are covered by the above-mentioned upper support layer 28.

[0157] Among them, the material constituting the upper support layer 28 can be an organic polymer. In this way, the upper support layer 28 has a relatively large thickness compared to the lower support layer 26 (as Figure 11a shown). Thus, the second magnetic film 102 can be supported, and by adjusting the thickness of the upper support layer 28, the purpose of adjusting the height of the entire thin-film inductor 01 can be achieved.

[0158] Based on this, since the thickness of the upper support layer 28 is relatively large, in the case of the anisotropy of the first magnetic film 101 and the second magnetic film 102, along the X direction ( Figure 11a , which is the hard axis of the thin-film inductor 01), the film length of the second magnetic film 102 covering the upper support layer 28 is greater than the film length of the first magnetic film 101 covering the substrate.

[0159] In addition, in this application, for the Z direction ( Figure 3 , which is the easy axis of the thin-film inductor 01), the film length of the second magnetic film 102 and the film length of the first magnetic film 101 are not limited. For example, the film length of the second magnetic film 102 can be greater than the film length of the first magnetic film 101. Or, the film length of the second magnetic film 102 can be less than the film length of the first magnetic film 101.

[0160] In addition, the adhesion layer 29 is disposed on one surface of the second magnetic film 102 close to the first magnetic film 101.

[0161] Among them, the material constituting the adhesion layer 29 includes at least one of tantalum (Ta), titanium (Ti), titanium nitride (TiN), tantalum nitride (TaN), etc. The adhesion layer 29 is used to bond the second magnetic film 102 to the upper support layer 28, the magnetic film air gap thin film layer 30, and the interlayer dielectric layer 24.

[0162] Alternatively, when the angle α between the surfaces of the first magnetic film 101 and the second magnetic film 102 in contact with the insulating spacer film 30 and the lower surface D of the first magnetic film 101 is an acute angle, the specific structure of the thin film inductor 01 is as Figure 11d shown, and the first magnetic film 101 is a trapezoidal platform as Figure 11b shown. The upper base E1 of the trapezoidal platform is close to the second magnetic film 102, and the lower base E2 is far from the second magnetic film 102.

[0163] Different from the structures shown in Figure 11a and Figure 11d is that the side surface F of the trapezoidal platform is completely covered by the insulating spacer film 30.

[0164] In this case, the thin film inductor 01 shown in Figure 11d also includes a planarization dielectric layer 22 and an interlayer dielectric layer 24.

[0165] Among them, the planarization dielectric layer 22 covers the upper base E1 of the trapezoidal platform. The material of the planarization dielectric layer 22 is the same as described above and will not be elaborated here.

[0166] In some embodiments of the present application, when manufacturing Figure 11d the planarization dielectric layer 22 shown, a dielectric layer can be first deposited on the substrate on which the first magnetic film 101 is fabricated. The material of the dielectric layer can include Si 3 N 4 and / or SiO 2 .

[0167] Then, a chemical mechanical planarization (CMP) process is used to polish the upper surface (the surface away from the first magnetic film 101) of the dielectric layer so that the surface of the dielectric layer is flat to achieve the purpose of planarization.

[0168] Next, through an etching process, the part of the dielectric layer except for the part covering the upper base E1 of the trapezoidal platform is removed, thereby obtaining Figure 11d the planarization dielectric layer 22 shown.

[0169] In addition, the interlayer dielectric layer 24 covers the planarization dielectric layer 22. The interlayer dielectric layer 24 has the same material as the insulating spacer film 30 and is an integral structure.

[0170] In this case, on the substrate with the planarized dielectric layer 22 fabricated, a dielectric layer can be deposited through the same deposition process. At this time, the part of the dielectric layer covering the trapezoidal platform, that is, the side surface of the first magnetic film 101, serves as the above-mentioned insulating spacer film 30. And the remaining part of the dielectric layer is the above-mentioned interlayer dielectric layer 24.

[0171] Based on this, as Figure 11d shown, the part of the above-mentioned planarized dielectric layer 22 and the interlayer dielectric layer 24 covering the trapezoidal platform, that is, the upper base E1 of the first magnetic film 101, serves as the lower support layer 26 for carrying the conductor 20. As can be seen from the above, the lower support layer 26 is made of an inorganic material, for example, mainly composed of Si 3 N 4 and / or SiO 2 constitutes.

[0172] In addition, in the part of the above-mentioned second magnetic film 102 in contact with the insulating spacer film 30, one end far from the accommodation cavity 21 has a taper angle β. The above-mentioned taper angle β is 10° to 90°. For example, in some embodiments of the present disclosure, the above-mentioned taper angle β can be 12°, 15°, 19°, 20°, 30°, 60° or 85°.

[0173] It should be noted that Figure 11d the thin-film inductor 01 shown also has the above-mentioned seed layer 27, upper support layer 28 and adhesion layer 29, and the setting methods of these thin-film layers are the same as those described above, which will not be elaborated here.

[0174] The following takes Figure 11a the structure shown as an example to illustrate the process in which when the surfaces of the first magnetic film 101 and the second magnetic film 102 in contact with the insulating spacer film 30 in the thin-film inductor 01 are inclined surfaces C, the inclined surface C can reduce the eddy current loss at the insulating spacer film 30.

[0175] Among them, in the following description, after the conductor 20 in the above-mentioned thin-film inductor 01 is energized, the direction of the magnetic force lines of the alternating magnetic field generated by the thin-film inductor 01, as Figure 7b shown, is counterclockwise. Taking Figure 7b or Figure 11a as an example, the first magnetic film 101 in contact with the insulating spacer film 30 on the left side is taken.

[0176] In this case, the magnetic force lines passing through the insulating spacer film 30, as Figure 13 shown, will be perpendicular to the surface of the first magnetic film 101 in contact with the insulating spacer film 30, that is, Figure 13 the inclined surface C shown. At this time, an eddy current M is induced in the cross-section perpendicular to the direction of the above-mentioned magnetic force lines of the alternating magnetic field, that is, in the cross-section parallel to the inclined surface C.

[0177] In addition, since the multi-layer magnetic sub-films 120 and the multi-layer insulating films 121 in the first magnetic film 101 are parallel to the lower surface D of the first magnetic film 101, therefore, through the surface of the first magnetic film 101 in contact with the insulating spacer film 30, that is Figure 13 the inclined surface C shown can be like Figure 10 shown, exposing the multi-layer magnetic sub-films 120 and the multi-layer insulating films 121 in the first magnetic film 101. At this time, the magnetic field lines passing through the insulating spacer film 30 can enter into the multi-layer magnetic sub-films 120 in the first magnetic film 101 as Figure 14 shown.

[0178] In this way, as Figure 14 shown, the above-mentioned eddy current M is separated into multiple sub-eddy currents M1 by each layer of magnetic sub-films 120. And each sub-eddy current M1 enters into one layer of magnetic sub-films 120, so that each sub-eddy current M1, as Figure 8 shown, can be confined in each layer of magnetic sub-films 120, achieving the purpose of reducing eddy current loss.

[0179] Example 2

[0180] In this example, in the above-mentioned magnetic core 10, as Figure 15 shown, only the surface of the first magnetic film 101 in contact with the insulating spacer film 30 is the above-mentioned inclined surface C.

[0181] Based on this, after the conductor 20 in the above-mentioned thin-film inductor 01 is energized, the direction of the magnetic field lines of the alternating magnetic field generated by the thin-film inductor 01, as Figure 7b shown, is counterclockwise. Taking the first magnetic film 101 in contact with the insulating spacer film 30 on the left side in Figure 7b as an example.

[0182] Same as Example 1, the magnetic field lines passing through the insulating spacer film 30 will be perpendicular to the surface of the first magnetic film 101 in contact with the insulating spacer film 30, that is Figure 13 the inclined surface C shown, so that the above-mentioned magnetic field lines can enter into the multi-layer magnetic sub-films 120 in the first magnetic film 101. At this time, an eddy current M is induced in the cross-section perpendicular to the direction of the above-mentioned magnetic field lines, that is, in the cross-section parallel to the inclined surface C.

[0183] In addition, as Figure 14 shown, the above-mentioned eddy current M is separated into multiple sub-eddy currents M1 by each layer of magnetic sub-films 120. And each sub-eddy current M1 enters into one layer of magnetic sub-films 120, so that each sub-eddy current M1, as Figure 8 shown, can be confined in each layer of magnetic sub-films 120, achieving the purpose of reducing eddy current loss.

[0184] Example 3

[0185] In this example, in the above magnetic core 10, as Figure 16a shown, only the surface of the second magnetic film 102 in contact with the insulating spacer film 30 is the inclined surface C.

[0186] In this case, when the conductor 20 in the above thin-film inductor 01 is energized, the direction of the magnetic force lines of the alternating magnetic field generated by the thin-film inductor 01, as Figure 7a shown, is clockwise. Taking the second magnetic film 102 in contact with the insulating spacer film 30 on the left as an example, in Figure 7a this case.

[0187] Similarly to the example, the magnetic force lines passing through the insulating spacer film 30 from the first magnetic film 101 will be perpendicular to the surface of the second magnetic film 102 in contact with the insulating spacer film 30, that is, Figure 16b the inclined surface C shown, so that the above magnetic force lines can enter each layer of magnetic sub-films 120 in the second magnetic film 102 as Figure 16c shown. At this time, eddy currents M are induced in the cross-section perpendicular to the direction of the above magnetic force lines, that is, in the cross-section parallel to the inclined surface C.

[0188] In addition, as Figure 16c shown, the above eddy currents M are separated into multiple sub-eddy currents M1 by each layer of magnetic sub-films 120. And each sub-eddy current M1 enters one layer of magnetic sub-film 120, so that each sub-eddy current M1, as Figure 8 shown, can be confined in each layer of magnetic sub-films 120, achieving the purpose of reducing eddy current loss.

[0189] Example 4

[0190] In this example, as Figure 17 shown, the surfaces of the above first magnetic film 101 and second magnetic film 102 in contact with the insulating spacer film 30 are curved surfaces S with the same curvature. In this case, the thickness of the insulating spacer film 30 is the same everywhere.

[0191] In addition, the multiple layers of magnetic sub-films 120 and multiple layers of insulating films 121 in the first magnetic film 101 and the second magnetic film 102 are parallel to the surface D under the first magnetic film 101.

[0192] In this case, as Figure 18 shown, the curved surface S of the first magnetic film 101 in contact with the insulating spacer film 30 can expose the multiple layers of magnetic sub-films 120 and multiple layers of insulating films 121 in the first magnetic film 101.

[0193] Based on this, when the conductor 20 in the above thin-film inductor 01 is energized, the direction of the magnetic force lines of the alternating magnetic field generated by the thin-film inductor 01, as Figure 7b shown, is counterclockwise. Taking Figure 7bAmong them, taking the first magnetic film 101 as an example, it is in contact with the insulating spacer film 30 located on the left side.

[0194] In this case, multiple magnetic lines of force passing through the insulating spacer film 30 enter each layer of magnetic sub-films 120 in the first magnetic film 101 as shown in Figure 18 the figure.

[0195] At this time, an alternating magnetic field induces a sub-eddy current M1 in a cross-section perpendicular to the direction of a magnetic line of force. Thus, the above-mentioned sub-eddy current M1 can be confined to the multiple layers of magnetic sub-films 120 respectively as shown in Figure 8 the figure, achieving the purpose of reducing eddy current loss.

[0196] It should be noted that when the thickness of the insulating spacer film 30 does not need to be the same everywhere, in the above magnetic core 10, only the surface of the second magnetic film 102 in contact with the insulating spacer film 30 can be set as the above-mentioned curved surface S. Or, only the surface of the first magnetic film 101 in contact with the insulating spacer film 30 can be set as the above-mentioned curved surface S. The process of reducing the eddy current loss at the position of the insulating spacer film 30 through the above-mentioned curved surface S can be obtained in the same way and will not be elaborated here.

[0197] It should be noted that Figure 17 the thin-film inductor 01 shown in the figure also has the above-mentioned planarization dielectric layer 22, interlayer dielectric layer 24, seed layer 27, upper support layer 28, and adhesion layer 29. The setting method of the above-mentioned thin film can be obtained in the same way and will not be elaborated here.

[0198] Example 5

[0199] In this example, as shown in Figure 19 the figure, the thin-film inductor 01 further includes a support pad 40. The support pad 40 is located below the first magnetic film 101 and corresponds to the position of the insulating spacer film 30. The material forming the support pad 40 can be a non-magnetic material.

[0200] It should be noted that the lower part of the first magnetic film 101 is the side of the first magnetic film 101 away from the second magnetic film 102.

[0201] As shown in Figure 20 the figure, the upper surface G of the support pad 40 is in contact with the insulating spacer film 30. In addition, both sides of the upper surface G of the support pad 40 are covered with the first magnetic film 101. Among them, in the first magnetic film 101 covering the support pad 40, the multiple layers of magnetic sub-films 120 and the multiple layers of insulating sub-films 121 are in contact with the insulating spacer film 30.

[0202] In addition, the surface of the support pad 40 in contact with the first magnetic film 101 is a curved surface. In this way, the multi-layer magnetic sub-films 120 and multi-layer insulator films 121 in the first magnetic film 101 alternately cover the curved surface of the support pad 40 in sequence. In this way, the multi-layer magnetic sub-films 120 and multi-layer insulator films 121 in the first magnetic film 101 are also in a curved state, and the curvature is the same as or approximately the same as the curvature of the curved surface of the support pad 40 they cover.

[0203] As can be seen from the above, the multi-layer magnetic sub-films 120 and multi-layer insulator films 121 in the first magnetic film 101 are in a curved state. Therefore, in the first magnetic film 101, the multi-layer magnetic sub-films 120 and multi-layer insulator films 121 covering the support pad 40 intersect with the surface where the insulating spacer film 30 is located. Thus, the contact surface between the first magnetic film 101 and the insulating spacer film 30 can be exposed, and the multi-layer magnetic sub-films 120 and multi-layer insulator films 121 in the first magnetic film 101 can be exposed.

[0204] In order to simplify the manufacturing process of the support pad 40, in some embodiments of the present application, the surface of the support pad 40 in contact with the first magnetic film 101 is an arc surface. And, in order to improve the stability of the support pad 40 in the thin film inductor 01. The lower surface of the support pad 40 is flush with the lower surface of the first magnetic film 101.

[0205] Based on this, after the conductor 20 in the above thin film inductor 01 is energized, the direction of the magnetic force lines of the alternating magnetic field generated by the thin film inductor 01, as Figure 7b shown, is counterclockwise. Taking the partial structure of the thin film inductor 01 at the position of the insulating spacer film 30 located on the left side in Figure 7b as an example.

[0206] In this case, multiple magnetic force lines of the alternating magnetic field at the position of the insulating spacer film 30, as Figure 20 shown, after passing through the insulating spacer film 30 from the second magnetic film 102, will respectively enter the multi-layer curved magnetic sub-films 120 in the first magnetic film 101 covering the support pad 40, and then be transmitted along the laying direction of the magnetic sub-films 120.

[0207] Since the multi-layer magnetic sub-films 120 and multi-layer insulator films 121 in the first magnetic film 101 covering the support pad 40 intersect with the surface where the insulating spacer film 30 is located, multiple magnetic force lines passing through the insulating spacer film 30 can enter each layer of magnetic sub-films 120 in the first magnetic film 101. Therefore, in the cross-section perpendicular to the direction of each magnetic force line, a sub-eddy current M1 is induced in the alternating magnetic field, as Figure 8 shown, and is also confined to each layer of magnetic sub-films 120, achieving the purpose of reducing eddy current loss.

[0208] It should be noted that, Figure 19The thin-film inductor 01 shown also has the above-mentioned planarization dielectric layer 22, interlayer dielectric layer 24, seed layer 27, upper support layer 28, and adhesion layer 29. The setting method of the above thin film can be obtained by the same token and will not be elaborated here.

[0209] An embodiment of the present application provides an integrated circuit 02, and the integrated circuit is as Figure 21 shown, including a silicon substrate 50, and any one of the thin-film inductors 01 as described above provided on the silicon substrate 50. The above integrated circuit 02 has the same technical effects as the thin-film inductor 01 provided in the foregoing embodiment and will not be elaborated here.

[0210] Among them, the material constituting the above silicon substrate 50 includes Si and polymer.

[0211] It should be noted that the above integrated circuit 02 can be a system on chip (SoC), a central processing unit (CPU), a graphics processing unit (GPU), or a power management integrated circuit (PMIC).

[0212] In addition, as Figure 21 shown, the integrated circuit 02 further includes a circuit structure 51 provided on the silicon substrate 50, a circuit inductance interconnect layer 52 covering the circuit structure 51 in sequence, and a chip packaging structure 53.

[0213] The above circuit structure 51 includes a plurality of transistors 501, and a metal interconnect layer 502 for connecting the plurality of transistors 501 together to form a circuit.

[0214] In the embodiment of the present application, the type of the above transistor 501 is not limited. The transistor 501 can be a transistor prepared by using a complementary metal oxide semiconductor (CMOS) process, or a transistor prepared by using a silicon germanium (SiGe) process, or a gallium nitride (GaN) process.

[0215] In addition, the above metal interconnect layer 502 includes multiple dielectric layers or passivation layers, and metal wires embedded in the dielectric layers or passivation layers. Among them, the material constituting the dielectric layers or passivation layers in the metal interconnect layer 502 includes any one of silicon dioxide (SiO2), silicon nitride (Si 3 N 4 ) and polyimide.

[0216] On this basis, as Figure 21 shown, the above thin-film inductor 01 is located between the circuit inductor interconnection layer 52 and the chip package structure 53. The circuit inductor interconnection layer 52 is used to electrically connect the thin-film inductor 01 to the circuit structure 51 located below it.

[0217] Among them, the setting method of the above thin-film inductor 01 in the integrated circuit 02 can be that the first magnetic film 101 is closer to the silicon substrate 50 relative to the second magnetic film 102 (the thin-film inductor 01 on the left).

[0218] Or, the second magnetic film 102 in the thin-film inductor 01 is closer to the silicon substrate 50 relative to the first magnetic film 101 (the thin-film inductor 01 on the right).

[0219] The above circuit inductor interconnection layer 52 is provided with a package assembly structure for realizing the interconnection of circuit and inductor signals, such as interconnection channels (Via), solder pillars, copper pillars, microbumps, solder bumps, etc.

[0220] In addition, the above chip package structure 53 can be prepared by using the wafer level packaging (WLP) process. The chip package structure includes a package substrate and package traces provided inside the package substrate.

[0221] On this basis, a chip package pin 54 is provided above the chip package structure 53, so that the entire integrated circuit 02 can be connected to a printed circuit board (PCB).

[0222] An embodiment of the present application provides a terminal device, including at least one integrated circuit 02 as described above.

[0223] Based on this, as Figure 22 shown, the above terminal device 03 further includes a power management chip 60 and a power supply bus or a power supply network connected to the power management chip 60.

[0224] In this case, the above power management chip 60 includes the above integrated circuit 02, and the thin-film inductor 01 is integrated in the integrated circuit 02.

[0225] In this case, the power management chip 60 can supply operating voltages to the remaining components in the terminal device 03 via a power bus, such as a radio frequency transceiver, a memory, a hard disk, a camera, an imaging processing module, an input / output (I / O) interface, a human interactive device, etc.

[0226] In addition, in some embodiments of the present disclosure, the above terminal device 03 further includes a processor 61 and a data bus connected to the processor 61. The processor 61 includes an integrated circuit 02. When the integrated circuit 02 is an integrated power unit, a thin-film inductor 01 is integrated in the integrated power unit.

[0227] In this case, the processor 61 can supply operating voltages to the remaining components in the terminal device 03 via the data bus, such as the above radio frequency transceiver, memory, hard disk, camera, imaging processing module, input / output interface, human interactive device, etc.

[0228] It should be noted that the above processor 61 can be any one of an SoC, a CPU, and a GPU.

[0229] In addition, the above terminal device 03 has the same technical effects as the integrated circuit 02 provided in the foregoing embodiments, and will not be elaborated herein.

[0230] An embodiment of the present application provides a method for manufacturing Figure 11a as shown, a thin-film inductor 02. As Figure 23 shown, the above method includes S101 to S105.

[0231] S101. Form a first magnetic film 101 on a substrate through a patterning process.

[0232] The first magnetic film 101 is in the shape of a trapezoidal platform. The upper base E1 of the trapezoidal platform is away from the above substrate, and the lower base E2 is close to the substrate. The side surface F of the trapezoidal platform exposes multiple magnetic sub-films 120 and multiple insulator films 121 in the first magnetic film 101.

[0233] It should be noted that the patterning process in the embodiments of the present application refers to a process including a photolithography process, or including a photolithography process and an etching step, or including other processes for forming a predetermined pattern, such as printing and inkjet.

[0234] Among them, the photolithography process refers to a process for forming a pattern using a photoresist, a mask, an exposure machine, etc., including processes such as film formation, exposure, and development.

[0235] Based on this, in some embodiments of the present application, the manufacturing process of the above-mentioned first magnetic film 101 using the above-mentioned stripping process is as follows:

[0236] First, as Figure 24a shown, a photoresist 70 is coated on the substrate.

[0237] It should be noted that the photoresist 70 in the embodiments of the present application can be a positive photoresist or a negative photoresist, and the present invention does not limit this.

[0238] Next, as Figure 24b shown, a mask plate 71 is used to perform mask exposure on the photoresist 70.

[0239] Then, as Figure 24c shown, a developing process is performed on the photoresist after mask exposure. Among them, the photoresist blocked by the mask plate 71 is not irradiated by light and is dissolved in the developer.

[0240] Then, on the substrate having the above structure, a bonding layer ( Figure 24d the black film layer in) is deposited. Next, physical vapor deposition process is used for multiple times to alternately sputter to respectively form alternating and alternately arranged multiple magnetic sub-layers 120 and multiple insulator sub-layers 121.

[0241] Finally, as Figure 24e shown, the photoresist 70 is peeled off, so as to form a trapezoidal first magnetic film 101 on the substrate.

[0242] S102. On the substrate having the above-mentioned first magnetic film 101, a planarizing dielectric layer 22 is fabricated.

[0243] First, as Figure 25a shown, a first dielectric layer 80 is deposited. A CPM process is performed on the first dielectric layer 80 so that the upper surface of the first dielectric layer 80 has a certain flatness as Figure 25b shown.

[0244] Then, as Figure 25c shown, the above-mentioned first dielectric layer 80 is exposed using the mask plate 71 and the photoresist 70.

[0245] Next, the above-mentioned photoresist 70 is developed. As Figure 25d shown, the part of the photoresist 70 irradiated by light is dissolved in the developer.

[0246] Then, a dry etching process is used to etch away the first dielectric layer 80 not covered by the photoresist 70, so as to form as Figure 25eThe magnetic through-hole 23 shown. A part of the side surface F of the trapezoidal first magnetic film 101 is exposed at the bottom of the magnetic through-hole 23.

[0247] Among them, by controlling the size of the opening of the magnetic through-hole 23, the first dielectric layer 80 can cover a part of the side surface of the trapezoidal platform. In this way, a part of the side surface F of the trapezoidal first magnetic film 101 is exposed in the magnetic through-hole 23, and the other part is covered by the first dielectric layer 80.

[0248] In addition, as Figure 25e shown, the first dielectric layer 80 also covers the upper base of the trapezoidal platform.

[0249] Next, as Figure 25f shown, when the photoresist 70 on the first dielectric layer 80 is peeled off, the patterned first dielectric layer 80 can be used as the planarization dielectric layer 22.

[0250] S103. Form an insulating spacer film 30 on the substrate having the above structure.

[0251] As Figure 26 shown, deposit a second dielectric layer 81. The second dielectric layer 81 covers the upper surface of the first dielectric layer 80, the side walls of the magnetic through-hole 23, and contacts another part of the side surface of the trapezoidal platform through the magnetic through-hole 23.

[0252] Among them, the part of the second dielectric layer 81 that contacts the side surface of the trapezoidal platform serves as the insulating spacer film 30.

[0253] S104. Form a conductor 20 on the substrate having the above structure.

[0254] First, as Figure 27a shown, form a photoresist 70 above the upper base E1 of the trapezoidal platform, that is, the first magnetic film 101, through a patterning process, and expose the photoresist using a mask 71.

[0255] Next, as Figure 27b shown, perform a developing process on the exposed photoresist 70 to develop the photoresist 70 irradiated with light.

[0256] Next, as Figure 27c shown, form a conductor 20 on the substrate having the above structure. Then, as Figure 27d shown, peel off the photoresist 70 around the conductor 20. Among them, the material constituting the conductor 20 can be at least one of copper (Cu), titanium (Ti), nickel (Ni), or gold (Au).

[0257] S105. Form a second magnetic film 102 on the substrate having the above structure.

[0258] Among them, a receiving cavity 21 for receiving a conductor 20 is formed between a first magnetic film 101 and a second magnetic film 102.

[0259] Exemplarily, as Figure 28a shown, first, a photoresist 70 is coated on the Figure 27d structure. Since the photoresist 70 is used to form the upper support layer 28, the thickness of the photoresist 70 is relatively large. Then, the photoresist 70 is exposed using a mask 71.

[0260] Next, as Figure 28b shown, the exposed photoresist 70 is developed, and a thermal reflow process is performed on the developed photoresist 70, thereby forming an upper support layer 28 as Figure 28c shown.

[0261] Next, as Figure 28d shown, a photoresist 70 is coated on the Figure 28c structure shown, and the photoresist 70 is exposed using a mask 71.

[0262] Then, as Figure 28e shown, the exposed photoresist 70 is developed.

[0263] Next, as Figure 28f shown, a physical vapor deposition process is repeatedly used for alternate sputtering to respectively form alternate and alternately arranged multiple magnetic sub - films 120 and multiple insulator films 121.

[0264] Finally, the remaining photoresist 70 is peeled off, thereby forming a second magnetic film 102 as Figure 11a shown.

[0265] It should be noted that in the above manufacturing method, since the opening size of the magnetic through - hole 23 is small, as Figure 28f shown, at the tail of the second magnetic film 102 manufactured, it will cover the side wall of the magnetic through - hole 23 on the side far from the receiving cavity 21, and after turning, it will cover the upper surface of the inter - layer dielectric layer 24 connected to the side wall.

[0266] In addition, one end of the tail 25 of the second magnetic film 102 far from the receiving cavity 21 has a taper angle β. The taper angle β is less than 90°.

[0267] The manufacturing method of the above - mentioned thin - film inductor 01 has the same technical effects as the magnetic - film inductor 01 provided in the foregoing embodiment, and will not be elaborated here.

[0268] An embodiment of the present application provides a method for Figure 11dAs shown, a method for manufacturing a thin-film inductor 02. The above method still includes the above S101 to S105. Among them, the structure of the thin-film inductor 02 is different from Figure 11a the structure shown, so the specific processes of some steps in the above S101 to S105 are also different. The specific processes of each step are described below.

[0269] First, perform the above S101. The manufacturing process of the first magnetic film 101 is the same as described above and will not be elaborated here.

[0270] During the process of performing the above S102, first, execute Figure 25a and Figure 25b steps. Deposit a first dielectric layer 80 on the substrate on which the first magnetic film 101 is formed, and perform a planarization process on the first dielectric layer 80.

[0271] Then, as Figure 29a shown, coat a photoresist 70 on the substrate on which the above structure is formed, and expose the photoresist 70 using a mask 71. Next, as Figure 29b shown, develop the exposed photoresist 70.

[0272] Then, as Figure 29c shown, etch away the first dielectric layer 80 that is not covered by the photoresist 70 to form a planar dielectric layer 22. The patterned first dielectric layer 80, that is, the above planar dielectric layer 22, covers the upper base E1 of the trapezoidal platform. Next, as Figure 29d shown, remove the photoresist on the surface of the planar dielectric layer 22.

[0273] During the process of performing the above S103, as Figure 29e shown, deposit a second dielectric layer 81 on the substrate on which the above structure is formed.

[0274] Among them, the second dielectric layer 81 covers the above planar dielectric layer 22. In addition, in the second dielectric layer 81, the part that completely covers the trapezoidal platform, that is, the side surface of the first magnetic film 101, serves as an insulating spacer film 30.

[0275] During the process of performing the above S104, on the substrate on which the insulating spacer film 30 is formed, as Figure 30a shown, apply a photoresist 70, and expose the photoresist 70 through a mask 71. Next, as Figure 30b shown, develop the exposed photoresist 70 to remove part of the photoresist 70. Then, as Figure 30c shown, form a conductor 20 above the upper base E1 of the trapezoidal platform through a patterning process. Finally, as Figure 30d shown, strip the photoresist 70 on the surface of the conductor 20.

[0276] In the process of performing the above S105, as described above, as Figure 31a shown, first, on the structure of Figure 30d , a photoresist 70 is coated. Since this photoresist 70 is used to form the upper support layer 28, the thickness of this photoresist 70 is relatively large. Then, the photoresist 70 is exposed using a mask 71.

[0277] Next, as Figure 31b shown, the exposed photoresist 70 is developed, and a thermal reflow process is performed on the developed photoresist 70, thereby forming the upper support layer 28 as Figure 31c shown.

[0278] Next, as Figure 31d shown, on the structure of Figure 31c shown, a photoresist 70 is coated, and the photoresist 70 is exposed using a mask 71.

[0279] Then, as Figure 31e shown, the exposed photoresist 70 is developed.

[0280] Next, as Figure 31f , the physical vapor deposition process is repeatedly used for alternate sputtering to respectively form stacked and alternately arranged multiple magnetic sub-layers 120 and multiple insulator sub-layers 121.

[0281] Finally, the remaining photoresist 70 is peeled off, thereby forming the second magnetic film 102 as Figure 11d shown.

[0282] It should be noted that in the above manufacturing method, since there is no need to fabricate a magnetic through-hole 23 on the first dielectric layer 80, as Figure 31f shown, the tail of the fabricated second magnetic film 102 gently covers the upper surface of the insulating spacer film 30. In addition, one end of the tail 25 of the above second magnetic film 102 away from the accommodation cavity 21 has a taper angle β. The above taper angle β is less than 90°.

[0283] The manufacturing method of the above thin-film inductor 01 has the same technical effects as the magnetic-film inductor 01 provided in the foregoing embodiments, and will not be elaborated here.

[0284] The present application provides a manufacturing method of a thin-film inductor 01, as Figure 32 shown, the above method includes S201 to S207.

[0285] S201, as Figure 33a shown, on a substrate 02, two support pads 40 are formed at intervals. The surface of the support pad 40 away from the substrate 02 is a curved surface.

[0286] Among them, the material constituting the above support pad 40 can be a non-magnetic material.

[0287] It should be noted that when the above thin film inductor 01 is integrated into an integrated circuit, the above substrate 02 can be a silicon substrate.

[0288] In addition, in order to simplify the manufacturing process of the support pad 40. In the above S101, the surface of the support pad 40 away from the substrate 02 is an arc surface.

[0289] S202, as Figure 33b shown, on the substrate 02 formed with the support pad 40, a first magnetic film 101 is formed through a patterning process.

[0290] Among them, the first magnetic film 101 includes multiple layers of alternately arranged magnetic sub - films 121 and insulator films 120. The manufacturing method of the first magnetic film 101 is the same as described above and will not be elaborated here.

[0291] S203, as Figure 33c shown, at the position where the support pad 40 is located, a part of the material in the first magnetic film 101 is removed to expose the upper surface G of the support pad 40.

[0292] S204, on the substrate 02 formed with the above structure, as Figure 33d shown, at the position where the support pad 40 is located, a patterning process is performed on the dielectric layer, for example, a dielectric layer having the same material as the above second dielectric layer 81, to form an insulating spacer film 30.

[0293] Among them, as Figure 20 shown, the formed insulating spacer film 30 covers the upper surface of the support pad 40 and the sides of the multiple layers of magnetic sub - films 120 and insulator films 121 in the first magnetic film 101 located on both sides of the upper surface of the support pad 40.

[0294] It should be noted that the part of the above second dielectric layer 81 other than the insulating spacer film 30 can be used as the lower support layer 26.

[0295] S205, on the substrate 02 formed with the above structure, as Figure 33e shown, a conductor 20 is formed on the lower support layer 26. The manufacturing process of the conductor 20 is the same as described above and will not be elaborated here.

[0296] S206, on the substrate 02 formed with the above structure, as Figure 33f shown, an upper support layer 28 is formed. The manufacturing process of the upper support layer 28 is the same as described above and will not be elaborated here.

[0297] S207, on the substrate 02 formed with the above structure, as Figure 19 shown, a second magnetic film 102 is formed through a patterning process.

[0298] The second magnetic film 102 includes a plurality of alternately arranged magnetic sub-films 120 and insulator films 121. The manufacturing process of the second magnetic film 102 is the same as described above and will not be elaborated here.

[0299] The manufacturing method of the thin-film inductor 01 described above has the same technical effects as the thin-film inductor 01 provided in the foregoing embodiments and will not be elaborated here.

[0300] As described above, the above are only specific embodiments of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present invention can easily think of changes or substitutions, which should be covered within the protection scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.

Claims

1. A thin-film inductor, characterized in that, it includes: a magnetic core including a first magnetic film and a second magnetic film, with a receiving cavity between the first magnetic film and the second magnetic film; a conductor located in the receiving cavity; an insulating spacer film disposed on both sides of the conductor and between the first magnetic film and the second magnetic film; the insulating spacer film is in contact with the first magnetic film and the second magnetic film, and the surfaces of the first magnetic film and the second magnetic film in contact with the insulating spacer film are inclined surfaces with the same slope or curved surfaces with the same curvature; both the first magnetic film and the second magnetic film include multiple magnetic sub-layers and multiple insulator layers, the magnetic sub-layers and the insulator layers in the first magnetic film are alternately arranged, and the magnetic sub-layers and the insulator layers in the second magnetic film are alternately arranged; the multiple magnetic sub-layers and multiple insulator layers in the first magnetic film and the second magnetic film are parallel to the lower surface of the first magnetic film; the lower surface of the first magnetic film is the surface of the first magnetic film on the side away from the second magnetic film; wherein, the surface of the first magnetic film in contact with the insulating spacer film exposes the multiple magnetic sub-layers and multiple insulator layers in the first magnetic film; and / or, the surface of the second magnetic film in contact with the insulating spacer film exposes the multiple magnetic sub-layers and multiple insulator layers in the second magnetic film.

2. The thin-film inductor according to claim 1, characterized in that, the first magnetic film is a trapezoidal frustum; the upper base of the trapezoidal frustum is close to the second magnetic film, and the lower base is away from the second magnetic film; the thin-film inductor further includes: a planarization dielectric layer covering the upper base of the trapezoidal frustum and a part of the side surface of the trapezoidal frustum; a magnetic through-hole fabricated on the planarization dielectric layer; wherein, the insulating spacer film is located in the through-hole and covers the other part of the side surface of the trapezoidal frustum; an interlayer dielectric layer covering the upper surface of the planarization dielectric layer and the sidewall of the magnetic through-hole; the interlayer dielectric layer has the same material as the insulating spacer film and is an integral structure.

3. The thin-film inductor according to claim 2, characterized in that, the tail of the second magnetic film covers the sidewall of the magnetic through-hole away from the receiving cavity and the upper surface of the interlayer dielectric layer connected to the sidewall; the end of the tail of the second magnetic film away from the receiving cavity has a taper angle; the taper angle is 10° to 90°.

4. The thin-film inductor according to claim 1, characterized in that, the first magnetic film is a trapezoidal frustum; the upper base of the trapezoidal frustum is close to the second magnetic film, and the lower base is away from the second magnetic film; the side surface of the trapezoidal frustum is completely covered by the insulating spacer film; the thin-film inductor further includes: a planarization dielectric layer covering the upper base of the trapezoidal frustum; an interlayer dielectric layer covering the planarization dielectric layer; wherein, the interlayer dielectric layer has the same material as the insulating spacer film and is an integral structure.

5. The thin-film inductor according to claim 4, characterized in that, the end of the part of the second magnetic film in contact with the insulating spacer film away from the receiving cavity has a taper angle; the taper angle is 10° to 90°.

6. The thin-film inductor according to claim 1, characterized in that, The thin film inductor further includes a support pad; the support pad is located below the first magnetic film; below the first magnetic film is the side of the first magnetic film away from the second magnetic film; The upper surface of the support pad is in contact with the insulating spacer film; Both sides of the upper surface of the support pad are covered with the first magnetic film; The surface of the support pad in contact with the first magnetic film is a curved surface.

7. The thin film inductor according to claim 6, wherein, The surface of the support pad in contact with the first magnetic film is an arc surface; The lower surface of the support pad is flush with the lower surface of the first magnetic film.

8. The thin film inductor according to claim 1, wherein, The thin film inductor further includes: A seed layer, located in the accommodation cavity; the seed layer is in contact with the surface of the conductor close to the first magnetic film; An upper support layer, located in the accommodation cavity; except for the surface of the conductor in contact with the seed layer, the remaining surfaces of the conductor are covered by the upper support layer; An adhesion layer, provided on the surface of the second magnetic film close to the first magnetic film.

9. The thin film inductor according to claim 1, wherein, The thickness of the magnetic sub-film is 100 nm to 500 nm; The thickness of the insulator film is 5 nm to 50 nm.

10. The thin film inductor according to claim 1, wherein, The first magnetic film and the second magnetic film are anisotropic; Along the direction of the hard axis of the thin film inductor, the length of the first magnetic film is less than the length of the second magnetic film.

11. The thin film inductor according to claim 1, wherein, The conductor is at least one metal wire; the thin film inductor includes at least two of the magnetic cores; along the length direction of the metal wire, adjacent two of the magnetic cores are spaced apart.

12. The thin film inductor according to claim 1, wherein, The conductor is a coil; the thin film inductor includes a first magnetic core and a second magnetic core; The coil includes a plurality of first line segments and a plurality of second line segments; the first line segments and the second line segments are arranged oppositely; A plurality of the first line segments are located in the first magnetic core; A plurality of the second line segments are located in the second magnetic core.

13. An integrated circuit, wherein, It includes a silicon substrate, and the thin film inductor as described in claim 1 provided on the silicon substrate.

14. The integrated circuit according to claim 13, wherein, The integrated circuit further includes a circuit structure provided on the silicon substrate, a circuit inductance interconnection layer covering the circuit structure in sequence, and a chip packaging structure; The thin film inductor is located between the circuit inductance interconnection layer and the chip packaging structure, and the circuit inductance interconnection layer is used to electrically connect the thin film inductor to the circuit structure; The first magnetic film in the thin film inductor is closer to the silicon substrate than the second magnetic film; Or, the second magnetic film in the thin film inductor is closer to the silicon substrate than the first magnetic film.

15. A terminal device, wherein, It includes at least one integrated circuit as described in claim 13 or 14; The terminal device further includes a power management chip and a power bus connected to the power management chip; the power management chip includes the integrated circuit; and / or, The terminal device further includes a processor and a data bus connected to the processor; the processor includes the integrated circuit.

16. A thin film inductor, characterized in that, it includes: A magnetic core, including a first magnetic film and a second magnetic film, with a receiving cavity between the first magnetic film and the second magnetic film; A conductor located within the receiving cavity; Insulating spacer films disposed on both sides of the conductor and between the first magnetic film and the second magnetic film; the insulating spacer films are in contact with the first magnetic film and the second magnetic film, The first magnetic film is a trapezoidal platform; The upper base of the trapezoidal platform is close to the second magnetic film, and the lower base is far from the second magnetic film; The thin film inductor further includes: A planarization dielectric layer covering the upper base of the trapezoidal platform and a part of the side surface of the trapezoidal platform; Magnetic vias fabricated on the planarization dielectric layer; wherein, the insulating spacer films are located within the magnetic vias and cover the other part of the side surface of the trapezoidal platform; An interlayer dielectric layer covering the upper surface of the planarization dielectric layer and the side walls of the magnetic vias; the interlayer dielectric layer is made of the same material as the insulating spacer films and is an integral structure.

17. The thin film inductor according to claim 16, characterized in that, The tail of the second magnetic film covers the side wall of the magnetic via far from the receiving cavity and the upper surface of the interlayer dielectric layer connected to the side wall; The end of the tail of the second magnetic film far from the receiving cavity has a taper angle; the taper angle is 10° to 90°.

18. A thin film inductor, characterized in that, it includes: A magnetic core, including a first magnetic film and a second magnetic film, with a receiving cavity between the first magnetic film and the second magnetic film; A conductor located within the receiving cavity; Insulating spacer films disposed on both sides of the conductor and between the first magnetic film and the second magnetic film; the insulating spacer films are in contact with the first magnetic film and the second magnetic film, The first magnetic film is a trapezoidal platform; the upper base of the trapezoidal platform is close to the second magnetic film, and the lower base is far from the second magnetic film; The side surface of the trapezoidal platform is completely covered by the insulating spacer films; The thin film inductor further includes: A planarization dielectric layer covering the upper base of the trapezoidal platform; An interlayer dielectric layer covering the planarization dielectric layer; wherein, the interlayer dielectric layer is made of the same material as the insulating spacer films and is an integral structure.

19. The thin film inductor according to claim 18, characterized in that, The end of the part of the second magnetic film in contact with the insulating spacer film far from the receiving cavity has a taper angle; the taper angle is 10° to 90°.

20. A thin film inductor, characterized in that, it includes: A magnetic core, including a first magnetic film and a second magnetic film, with a receiving cavity between the first magnetic film and the second magnetic film; A conductor located within the receiving cavity; Insulating spacer films disposed on both sides of the conductor and between the first magnetic film and the second magnetic film; the insulating spacer films are in contact with the first magnetic film and the second magnetic film, The thin-film inductor further includes a support pad; the support pad is located below the first magnetic film; the lower side of the first magnetic film is the side of the first magnetic film away from the second magnetic film; The upper surface of the support pad is in contact with the insulating spacer film; Both sides of the upper surface of the support pad are covered with the first magnetic film; The surface of the support pad in contact with the first magnetic film is a curved surface.

21. The thin-film inductor according to claim 20, wherein, The surface of the support pad in contact with the first magnetic film is an arc surface; The lower surface of the support pad is flush with the lower surface of the first magnetic film.

22. A thin-film inductor, wherein, comprises: A magnetic core, including a first magnetic film and a second magnetic film, with a receiving cavity between the first magnetic film and the second magnetic film; A conductor, located within the receiving cavity; An insulating spacer film, disposed on both sides of the conductor and located between the first magnetic film and the second magnetic film; the insulating spacer film is in contact with the first magnetic film and the second magnetic film, and the surfaces of the first magnetic film and the second magnetic film in contact with the insulating spacer film are inclined surfaces with the same slope or curved surfaces with the same curvature; both the first magnetic film and the second magnetic film include multiple magnetic sub-layers and multiple insulating sub-layers, the magnetic sub-layers and the insulating sub-layers in the first magnetic film are alternately arranged, and the magnetic sub-layers and the insulating sub-layers in the second magnetic film are alternately arranged; the multiple magnetic sub-layers and multiple insulating sub-layers in the first magnetic film and the second magnetic film are parallel to the lower surface of the first magnetic film; the lower surface of the first magnetic film is the surface of the first magnetic film on the side away from the second magnetic film; wherein, the surface of the first magnetic film in contact with the insulating spacer film exposes the multiple magnetic sub-layers and multiple insulating sub-layers in the first magnetic film; and / or, the surface of the second magnetic film in contact with the insulating spacer film exposes the multiple magnetic sub-layers and multiple insulating sub-layers in the second magnetic film; The thin-film inductor further includes: A seed layer, located within the receiving cavity; the seed layer is in contact with the surface of the conductor close to the first magnetic film; An upper support layer, located within the receiving cavity; except for the surface of the conductor in contact with the seed layer, the remaining surfaces of the conductor are covered by the upper support layer; An adhesion layer, disposed on the surface of the second magnetic film close to the first magnetic film.

23. A thin-film inductor, wherein, comprises: A magnetic core, including a first magnetic film and a second magnetic film, with a receiving cavity between the first magnetic film and the second magnetic film; A conductor, located within the receiving cavity; An insulating spacer film is disposed on both sides of the conductor and is located between the first magnetic film and the second magnetic film; the insulating spacer film is in contact with the first magnetic film and the second magnetic film, and the surfaces of the first magnetic film and the second magnetic film in contact with the insulating spacer film are inclined surfaces with the same slope or curved surfaces with the same curvature; both the first magnetic film and the second magnetic film include multiple magnetic sub-layers and multiple insulator layers, the magnetic sub-layers and the insulator layers in the first magnetic film are alternately arranged, and the magnetic sub-layers and the insulator layers in the second magnetic film are alternately arranged; the multiple magnetic sub-layers and multiple insulator layers in the first magnetic film and the second magnetic film are parallel to the lower surface of the first magnetic film; the lower surface of the first magnetic film is the surface of the first magnetic film on the side away from the second magnetic film. Wherein, the surface of the first magnetic film in contact with the insulating spacer film exposes the multiple magnetic sub-layers and multiple insulator layers in the first magnetic film; and / or, the surface of the second magnetic film in contact with the insulating spacer film exposes the multiple magnetic sub-layers and multiple insulator layers in the second magnetic film; the first magnetic film and the second magnetic film are anisotropic; along the direction of the hard axis of the thin film inductor, the length of the first magnetic film is less than the length of the second magnetic film.

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