Nldmos power transistor and method of manufacturing the same
By using multiple metal structures arranged at an oblique angle in the NLDMOS power tube and connecting them through through holes, the problem of metal de-biasing effect is solved, and the current uniformity and reliability are improved.
Patent Information
- Application Number
- CN202211055969.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-08-31
- Publication Date
- 2025-10-17
- Estimated Expiration
- 2042-08-31
AI Technical Summary
The metal structure connection method of conventional NLDMOS power tubes leads to increased current density, metal de-bias effect, and reliability risks.
Multiple first metal strips and multiple second metal strips are arranged at an oblique angle and connected through through holes, thereby increasing the number of parallel fingers and the overlapping area, and improving current uniformity.
The current uniformity and reliability are improved, the on-resistance is reduced, and the stability of the NLDMOS power tube is enhanced.
Smart Images

Figure CN115347050B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The application belongs to the technical field of power tubes, and particularly relates to an NLDMOS power tube and a preparation method thereof. BACKGROUND
[0002] The NLDMOS (N-type lateral double diffusion metal oxide semiconductor) power tube is usually used as a final output driver in a switching tube application.
[0003] The conventional NLDMOS power tube adopts a two-layer metal structure to connect the source region and the drain region of the NLDMOS power tube, as shown in FIG. 1. Figure 1 The two-layer metal structure includes a first metal layer 106 and a second metal layer 107, each of the first metal layers corresponds to the source region and the drain region, respectively, and the second metal layer is connected to the first metal layer through a via. The first metal layer and the second metal layer are vertically distributed. Since the width and the thickness of the first metal layer are reduced after a good contact transition from the second metal layer, the current density of the first metal layer is increased, and the metal debiasing effect occurs, which has a reliability risk. SUMMARY
[0004] The application aims to provide an NLDMOS power tube, and aims to improve the current uniformity of the NLDMOS power tube and solve the metal debiasing effect.
[0005] A first aspect of the application provides an NLDMOS power tube, which comprises:
[0006] a drift region and a P-well formed on a semiconductor substrate, the drift region and the P-well are arranged at intervals;
[0007] a source region and a drain region formed on the drift region and the P-well, respectively;
[0008] a first metal layer connected to the source region and the drain region, respectively, the first metal layer includes a plurality of first metals arranged at equal intervals along a first direction, and the plurality of first metals are connected to the source region and the drain region at equal intervals according to a preset number;
[0009] a second metal layer stacked on the first metal layer, the second metal layer includes a plurality of second metals arranged at equal intervals along a second direction, and the plurality of second metals are connected to the plurality of first metals through a via, wherein the first direction and the second direction are arranged at an oblique angle.
[0010] Optionally, the first direction and the second direction are arranged at an oblique angle of 45 degrees.
[0011] Optionally, the plurality of first metals are connected to the source region and the drain region in turn and staggered.
[0012] Optionally, the 2i-1th second metal is connected with the 2j-1th first metal through the via hole respectively, and the 2ith second metal is connected with the 2jth first metal through the via hole respectively, wherein i and j are positive integers greater than or equal to 1.
[0013] Or the 2i-1th second metal is connected with the 2jth first metal through the via hole respectively, and the 2ith second metal is connected with the 2j-1th first metal through the via hole respectively, wherein i and j are positive integers greater than or equal to 1.
[0014] Optionally, the via hole at the overlapping position of the first metal and the second metal comprises a plurality of via holes, and the plurality of via holes are distributed in a matrix along the first direction.
[0015] Optionally, a plurality of contact holes connected with the drift region or the P well are further arranged on the first metal.
[0016] Optionally, the plurality of contact holes are arranged in sequence along the center line of the first metal.
[0017] Optionally, the plurality of second metals are connected in sequence and end to end.
[0018] Optionally, each of the first metals is arranged with equal width and equal thickness, each of the second metals is arranged with equal width and equal thickness, the width of the second metal is greater than the width of the first metal, and the thickness of the second metal is greater than the thickness of the first metal.
[0019] The second aspect of the embodiment of the present application proposes a preparation method of the NLDMOS power tube, comprising:
[0020] forming a drift region and a P well in a P-type semiconductor substrate, wherein the drift region and the P well are arranged in sequence;
[0021] forming a source region and a drain region on the drift region and the P well respectively;
[0022] arranging a first metal layer, wherein the first metal layer is connected with the source region and the drain region respectively, the first metal layer comprises a plurality of first metals arranged in parallel with equal intervals along a first direction, and the plurality of first metals are connected to the source region and the drain region in sequence according to equal division with a preset number of intervals;
[0023] arranging a second metal layer, wherein the second metal layer comprises a plurality of second metals arranged in parallel with equal intervals along a second direction on the first metal, and the plurality of second metals are stacked on the plurality of first metals and connected through a via hole, wherein the first direction and the second direction are arranged at an oblique angle.
[0024] Compared with the prior art, the NLDMOS power tube has the beneficial effects that: the NLDMOS power tube is provided with the plurality of first metals and the plurality of second metals arranged at an oblique angle and connected through the through holes, the plurality of first metals arranged at the oblique angle increases the number of the plurality of first metals arranged at the oblique angle, the overlapping area of the plurality of first metals and the plurality of second metals is increased, the plurality of through holes between the plurality of first metals and the plurality of second metals can be arranged more, the plurality of through holes between the source region and the drain region can be arranged more, the metal paths between the source region and the drain region are increased, the current between the source region and the drain region is parallel, the current congestion is improved, the current uniformity and the reliability of the NLDMOS power tube are improved. BRIEF DESCRIPTION OF DRAWINGS
[0025] Figure 1 A structure diagram of a two-layer metal structure of a traditional NLDMOS power tube;
[0026] Figure 2 A structure diagram of a NLDMOS power tube provided by the embodiment of the present application;
[0027] Figure 3 A structure diagram of a first metal layer of a NLDMOS power tube provided by the embodiment of the present application;
[0028] Figure 4 A structure diagram of a second metal layer of a NLDMOS power tube provided by the embodiment of the present application;
[0029] Figure 5 A structure diagram of two metal layers of a NLDMOS power tube provided by the embodiment of the present application;
[0030] Figure 6 An enlarged structure diagram of two metal layers of a NLDMOS power tube provided by the embodiment of the present application;
[0031] Figure 7 A flowchart of a preparation method of a NLDMOS power tube provided by the embodiment of the present application.
[0032] In the drawings, various reference signs are as follows:
[0033] 101, substrate; 102, P well; 103, drift region; 104, source region; 105, drain region; 106, first metal; 107, second metal; 108, through hole; 109, contact hole. DETAILED DESCRIPTION
[0034] In order to make the technical problems to be solved by the present application, the technical solutions and the beneficial effects more clearly, the present application will be further described in detail below with reference to the drawings and the embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application, and are not used to limit the present application.
[0035] It is to be noted that when an element is referred to as being "fixed" or "disposed" on another element, it can be directly on the other element or indirectly on the other element. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or indirectly connected to the other element.
[0036] It is to be understood that the terms "length", "width", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer" and the like, indicate directions or positions based on the directions or positions shown in the drawings, and are used for convenience of description and simplification of description only, and do not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be construed as limiting the present application.
[0037] In addition, the terms "first", "second", "third", etc. are used only for descriptive purposes and cannot be construed as indicating or implying relative importance or an implied indication of the number of technical features indicated. Therefore, the features defined with "first", "second" can explicitly or implicitly include one or more of the features. In the description of the present application, the meaning of "a plurality of" is two or more, unless otherwise specifically limited.
[0038] A first aspect of the embodiments of the present application proposes a NLDMOS power tube.
[0039] As shown in Figures 2 to 6 The NLDMOS power tube comprises:
[0040] A drift region 103 and a P-well 102 formed in a semiconductor substrate 101, the drift region 103 and the P-well 102 being spaced apart;
[0041] A source region 104 and a drain region 105 formed on the drift region 103 and the P-well 102, respectively;
[0042] A first metal layer connected to the source region 104 and the drain region 105, respectively, the first metal layer comprising a plurality of first metals 106 arranged in parallel at equal intervals along a first direction, the plurality of first metals 106 being connected to the source region 104 and the drain region 105 at equal intervals according to a preset number;
[0043] A second metal layer laminated on the first metal layer, the second metal layer comprising a plurality of second metals 107 arranged in parallel at equal intervals along a second direction, the plurality of second metals 107 being connected to the plurality of first metals 106 through a via 108, wherein the first direction and the second direction are arranged at an oblique angle.
[0044] In this embodiment, the semiconductor substrate 101 is a P-type substrate 101, the semiconductor substrate 101 can be a silicon substrate 101 with a bulk or a silicon-on-insulator (SOI) structure, the drift region 103 is an N-type drift region 103, the P-well 102 forms a source region 104 on the surface, the drift region 103 forms a drain region 105 on the surface, and the NLDMOS power tube further includes a gate electrode between the source region 104 and the drain region 105, forming a NLDMOS power tube.
[0045] In this embodiment, the source region 104 and the drain region 105 are in the form of a strip, and the first metal layer 106 further includes a plurality of contact holes 109 connected to the drift region 103 or the P-well 102, and the source region 104 and the drain region 105 are connected to the source, drain and gate of the NLDMOS power tube through the contact holes 109 and the first metal layer 106, and the source, drain and gate are used to connect the corresponding signals outside, including power signals and control signals, etc. In order to ensure the current uniformity of the source region 104, the drain region 105 and the first metal layer 106 and simplify the process, the plurality of contact holes 109 are optionally arranged along the center line of the first metal layer 106.
[0046] The first metal layer includes a plurality of first metals 106 arranged side by side at equal intervals, and the plurality of first metals 106 are equally divided by a predetermined number of intervals and connected to the source region 104 and the drain region 105 through the contact holes 109. For example, the odd-numbered first metals 106 are connected to the source region 104, and the even-numbered first metals 106 are connected to the drain region 105, or the first first metal 106 and the second first metal 106 are connected to the source region 104, the third first metal 106 and the fourth first metal 106 are connected to the drain region 105, and the fifth first metal 106 and the sixth first metal 106 are connected to the source region 104, and so on. Optionally, as shown in the figure, in order to further improve the current uniformity, the plurality of first metals 106 are sequentially and alternately connected to the source region 104 and the drain region 105, i.e. the odd-numbered first metals 106 are connected to the source region 104, and the even-numbered first metals 106 are connected to the drain region 105, or the even-numbered first metals 106 are connected to the source region 104, and the odd-numbered first metals 106 are connected to the drain region 105. Figure 6
[0047] At the same time, a second metal layer is arranged on the first metal layer for cross-connection of the same type of first metal 106, wherein the same type of first metal 106 refers to a plurality of first metals 106 connected to the same source region 104 or drain region 105, and the second metal layer includes a plurality of second metals 107 arranged in a second direction, and the first metal 106 is arranged in a first direction, wherein the first direction and the second direction are arranged at an oblique angle, i.e. non-parallel and perpendicular, and the oblique angle can be a corresponding angle between 0-90 degrees.
[0048] The plurality of second metals 107 are correspondingly divided into two groups, and the two groups of second metals 107 are arranged alternately, wherein one group of second metals 107 is connected to the same type of plurality of first metals 106 through the via hole 108, and the other group of second metals 107 is connected to the other type of plurality of first metals 106 through the via hole 108, and meanwhile, the second metals 107 are correspondingly arranged according to the arrangement mode of the first metals 106, and adjacent second metals 107 can be respectively connected to the same type of first metals 106 or connected to different types of first metals 106, and the specific type is not limited.
[0049] As shown in FIG. 1, corresponding to the staggered connection mode of the first metals 106, the 2i-1th second metal 107 is connected to the 2j-1th first metal 106 through the via hole 108, and the 2i th second metal 107 is connected to the 2jth first metal 106 through the via hole 108. Figure 6 Or the 2i-1th second metal 107 is connected to the 2jth first metal 106 through the via hole 108, and the 2i th second metal 107 is connected to the 2j-1th first metal 106 through the via hole 108, wherein i and j are positive integers greater than or equal to 1.
[0050] For example, the first metals 106 include 12 first metals 106, wherein from left to right, the odd-numbered first metals 106 are connected to the source region 104 through the contact hole 109, and the even-numbered first metals 106 are connected to the drain region 105 through the contact hole 109. Similarly, from the lower oblique corner to the upper oblique corner, the first second metal 107 to the fourth second metal 107 are included in sequence, the first second metal 107 and the third second metal 107 are connected to the odd-numbered first metals 106 through the via hole 108 and cross the even-numbered first metals 106, so as to be connected to the same source region 104, and the second second metal 107 and the fourth second metal 107 are connected to the even-numbered first metals 106 through the via hole 108 and cross the odd-numbered first metals 106, so as to be connected to the drain region 105.
[0051] Figure 6 For example, the first metals 106 include 12 first metals 106, wherein from left to right, the odd-numbered first metals 106 are connected to the source region 104 through the contact hole 109, and the even-numbered first metals 106 are connected to the drain region 105 through the contact hole 109. Similarly, from the lower oblique corner to the upper oblique corner, the first second metal 107 to the fourth second metal 107 are included in sequence, the first second metal 107 and the third second metal 107 are connected to the odd-numbered first metals 106 through the via hole 108 and cross the even-numbered first metals 106, so as to be connected to the same source region 104, and the second second metal 107 and the fourth second metal 107 are connected to the even-numbered first metals 106 through the via hole 108 and cross the odd-numbered first metals 106, so as to be connected to the drain region 105.
[0052] Wherein, the expression of the on-resistance RDS(on) of the NLDMOS power tube:
[0053] RDS(on)≈1 / k(VGS–Vth)+RM;
[0054] Wherein, k is the proportional coefficient, VGS represents the terminal voltage of the drain and source, Vth represents the threshold opening voltage of the NLDMOS power tube, and RM represents the total resistance of the source and drain metal connection. When the on-resistance of the NLDMOS power tube is less than 1 ohm, the metal connection resistance cannot be ignored.
[0055] wherein the resistance of the metal wire can be estimated by the following expression:
[0056] RM= (B 2 R S1 / 2WN D L)+(AR S12 / 2WN D )+HR S2 / 2B;
[0057] wherein N D is equal to the number of the drain fingers 105 (or half of the total number of the source / drain fingers), R S1 is equal to the sheet resistance of the first metal 106, R S2 is equal to the sheet resistance of the second metal 107, and R S12 represents the sheet resistance of the first metal 106 and the second metal 107 in parallel.
[0058] By arranging the first metal 106 and the second metal 107 side by side and at an oblique angle, N D is greater than the N D value of the original vertical direction wiring, according to the formula, the metal wire resistance becomes smaller, thereby reducing the on-resistance of the NLDMOS power tube.
[0059] At the same time, by increasing the number of ND (the second metal 107), it means that the number of parallel connections of the second metal 107 fingers between the source and the drain of the same area NLDMOS power tube increases, and the through hole 108 between the source and the drain is more, which improves the connectivity from the source to the drain, greatly increases the metal path from the drain bus to the source bus.
[0060] Similarly, by arranging the first metal 106 and the second metal 107 side by side and at an oblique angle, it can be understood that the NLDMOS power tube is divided into N parallel sub-NLDMOS power tubes, and the paths between the source and the drain of the N sub-NLDMOS power tubes are the same, which causes the current to pass in parallel, improves the congestion, improves the uniform distribution of current, reduces RM, reduces the on-resistance of the entire NLDMOS power tube, and improves the current uniformity and thermal uniformity of the NLDMOS power tube, and improves the reliability of the NLDMOS power tube.
[0061] wherein, in order to simplify the semiconductor process, the first direction and the second direction are arranged at an oblique angle of 45 degrees.
[0062] In order to connect adjacent first metals 106, thereby connecting the source and the drain of each sub-NLDMOS power tube and improving current uniformity, optionally, as shown in Figure 5 , a plurality of second metals 107 are connected in sequence.
[0063] Similarly, as the first metal 106 and the second metal 107 are arranged at an oblique angle, the overlapping area of the first metal 106 and the second metal 107 is increased, and the through holes 108 between the first metal 106 and the second metal 107 can be arranged more, and optionally, as shown in the figure, the through holes 108 at the overlapping position of the first metal 106 and the second metal 107 include a plurality of through holes 108, and the plurality of through holes 108 are arranged in a matrix along the first direction. By arranging the plurality of through holes 108 in a matrix, the metal paths between the source region 104 and the drain region 105 are increased, the current between the source region 104 and the drain region 105 flows in parallel, the current congestion is improved, and the current uniformity is improved. Figure 6
[0064] Further, in order to ensure that each metal path has the same current uniformity, the number of through holes 108 at each overlapping position is equal.
[0065] In order to further increase the overlapping area of the first metal 106 and the second metal 107, increase the number of through holes 108, and improve the current uniformity, the overlapping area of the first metal 106 and the second metal 107 is optionally arranged to have equal width and equal thickness, and the second metal 107 is arranged to have equal width and equal thickness. The width of the second metal 107 is greater than the width of the first metal 106, and the thickness of the second metal 107 is greater than the thickness of the first metal 106. By increasing the width and thickness of the second metal 107, the overlapping area of the first metal 106 and the second metal 107 is further increased, the number of through holes 108 at the overlapping area is further increased, and the current uniformity is improved.
[0066] The beneficial effects of the embodiment of the present application compared with the prior art are: the above-mentioned NLDMOS power tube arranges a plurality of first metals 106 and a plurality of second metals 107 at an oblique angle and connects them through the through holes 108. When arranged at an oblique angle, on the one hand, the number of parallel interdigital connections of the first metal 106 connecting the source region 104 and the drain region 105 is increased, and on the other hand, the overlapping area of the first metal 106 and the second metal 107 is increased, and the through holes 108 between the first metal 106 and the second metal 107 can be arranged more, i.e. the through holes 108 between the source region 104 and the drain region 105 can be arranged more, the metal paths between the source region 104 and the drain region 105 are increased, the current between the source region 104 and the drain region 105 flows in parallel, the current congestion is improved, the current uniformity is improved, and the reliability of the NLDMOS power tube is improved.
[0067] The second aspect of the embodiment of the present application proposes a preparation method of an NLDMOS power tube, including the following steps:
[0068] S10, forming a drift region and a P-well in a P-type semiconductor substrate, and the drift region and the P-well are arranged at intervals;
[0069] S20, forming a source region and a drain region on the drift region and the P-well, respectively.
[0070] In this embodiment, the semiconductor substrate 101 is a P-type substrate 101, the semiconductor substrate 101 can be a silicon substrate 101 with a bulk or a silicon-on-insulator (SOI) structure, the drift region 103 is an N-type drift region 103, the P-well 102 forms a source region 104 on the surface, the drift region 103 forms a drain region 105 on the surface, and the NLDMOS power tube further includes a gate electrode between the source region 104 and the drain region 105, forming a NLDMOS power tube.
[0071] S30, a first metal layer is provided, the first metal layer is connected to the source region and the drain region, respectively, the first metal layer includes a plurality of first metals arranged in parallel at equal intervals along a first direction, and the plurality of first metals are connected to the source region and the drain region at equal intervals according to a preset number of intervals;
[0072] S40, a second metal layer is provided, the second metal layer includes a plurality of second metals arranged in parallel at equal intervals along a second direction on the first metal, and the plurality of second metals are stacked on the plurality of first metals and connected through a via, wherein the first direction and the second direction are arranged at an oblique angle.
[0073] The source region 104 and the drain region 105 are in a strip shape, and the first metal 106 further includes a plurality of contact holes 109 connected to the drift region 103 or the P-well 102, the source region 104 and the drain region 105 are connected to the source electrode, the drain electrode and the gate electrode of the NLDMOS power tube through the contact hole 109 and the first metal layer, and the source electrode, the drain electrode and the gate electrode are used to connect the corresponding signals outside, including power signals and control signals, etc., wherein, in order to ensure the current uniformity of the source region 104, the drain region 105 and the first metal 106 and simplify the process, the plurality of contact holes 109 are arranged at equal intervals along the center line of the first metal 106.
[0074] The first metal layer includes a plurality of first metals 106 arranged side by side at equal intervals, the plurality of first metals 106 are equally divided according to a preset number of intervals, and are connected to the source region 104 and the drain region 105 through the contact hole 109, for example, an odd number of first metals 106 are connected to the source region 104, an even number of first metals 106 are connected to the drain region 105, or a first first metal 106 and a second first metal 106 are connected to the source region 104, a third first metal 106 and a fourth first metal 106 are connected to the drain region 105, and a fifth first metal 106 and a sixth first metal 106 are connected to the source region 104, and so on, and optionally, as shown in FIG. 1C, the plurality of first metals 106 are arranged in a staggered manner. Figure 6As shown, in order to further improve the current uniformity, the plurality of first metals 106 are connected to the source region 104 and the drain region 105 in turn and staggered, that is, the odd-numbered first metals 106 are connected to the source region 104, and the even-numbered first metals 106 are connected to the drain region 105, or the even-numbered first metals 106 are connected to the source region 104, and the odd-numbered first metals 106 are connected to the drain region 105.
[0075] Meanwhile, a second metal layer is arranged on the first metal layer, and is used to cross-connect the same type of first metals 106, wherein the same type of first metals 106 refers to the plurality of first metals 106 connected to the same source region 104 or drain region 105, and the second metal layer is provided with a plurality of second metals 107, the second metals 107 are arranged along a second direction, and the first metals 106 are arranged along a first direction, wherein the first direction and the second direction are arranged at an oblique angle, that is, non-parallel and perpendicular, and the oblique angle can be a corresponding angle between 0-90 degrees.
[0076] The plurality of second metals 107 are correspondingly divided into two groups, and the two groups of second metals 107 are arranged in a staggered manner, wherein one group of second metals 107 is connected to the same type of plurality of first metals 106 through the via hole 108, and the other group of second metals 107 is connected to the other type of plurality of first metals 106 through the via hole 108, and meanwhile, the second metals 107 are arranged according to the arrangement mode of the first metals 106, and adjacent second metals 107 can be connected to the same type of first metals 106 or connected to different types of first metals 106, and the specific type is not limited.
[0077] As shown, Figure 6 corresponding to the staggered connection mode of the first metals 106, the 2i-1th second metal 107 is connected to the 2j-1th first metal 106 through the via hole 108, and the 2i second metal 107 is connected to the 2j first metal 106 through the via hole 108;
[0078] or the 2i-1th second metal 107 is connected to the 2j first metal 106 through the via hole 108, and the 2i second metal 107 is connected to the 2j-1th first metal 106 through the via hole 108, wherein i and j are positive integers greater than or equal to 1.
[0079] As shown, Figure 6For example, the first metal 106 includes 12 pieces of the first metal 106, wherein, from left to right, odd pieces of the first metal 106 are connected to the source region 104 through the contact hole 109, even pieces of the first metal 106 are connected to the drain region 105 through the contact hole 109, and from the lower oblique corner to the upper oblique corner, the first piece of the second metal 107 to the fourth piece of the second metal 107 are included in turn, the first piece of the second metal 107 and the third piece of the second metal 107 are connected to the same source region 104 through the via hole 108 and across the even pieces of the first metal 106 respectively, and the second piece of the second metal 107 and the fourth piece of the second metal 107 are connected to the drain region 105 through the via hole 108 and across the odd pieces of the first metal 106 respectively.
[0080] wherein, the expression of the on-resistance RDS (on) of the NLDMOS power tube:
[0081] RDS (on) ≈1 / k (VGS-Vth) +RM;
[0082] wherein, k is a proportional coefficient, VGS represents the terminal voltage of the drain-source, Vth represents the threshold opening voltage of the NLDMOS power tube, and RM represents the total resistance of the metal connection of the source and the drain, when the on-resistance of the NLDMOS power tube is less than 1 ohm, the metal connection resistance cannot be ignored.
[0083] wherein, the resistance of the metal connection resistance can be estimated by the following expression:
[0084] RM=(B 2 R S1 / 2WN D L)+(AR S12 / 2WN D )+HR S2 / 2B;
[0085] wherein, N D is equal to the number of the drain region 105 interdigital (or half of the total number of the source / drain interdigital), R S1 is equal to the sheet resistance of the first metal 106, R S2 is equal to the sheet resistance of the second metal 107, and R S12 represents the sheet resistance of the parallel connection of the first metal 106 and the second metal 107.
[0086] By arranging the first metal 106 and the second metal 107 side by side and at an oblique angle respectively, N D is greater than the N D value of the original vertical direction wiring, according to the formula, the metal connection resistance becomes smaller, thereby reducing the on-resistance of the NLDMOS power tube.
[0087] Meanwhile, by increasing the number of ND (second metal 107), it means that the number of parallel connections of the second metal 107 interdigital of the source and drain of the same area NLDMOS power tube is increased, the through hole 108 between the source and the drain is more, the connectivity of the source to the drain is improved, and the metal path from the drain bus to the source bus is greatly increased.
[0088] Likewise, by arranging the first metal 106 and the second metal 107 side by side and at an oblique angle, respectively, it can be understood that the NLDMOS power tube is divided into N parallel sub-NLDMOS power tubes, and the paths between the source and the drain of the N sub-NLDMOS power tubes are the same, so that the current flows in parallel, improves the congestion, improves the uniform distribution of current, reduces RM, reduces the (on-resistance) of the entire NLDMOS power tube, improves the current uniformity and thermal uniformity of the NLDMOS power tube, and improves the reliability of the NLDMOS power tube.
[0089] Among them, in order to simplify the semiconductor process technology, the first direction and the second direction are arranged at an oblique angle of 45 degrees.
[0090] In order to connect adjacent first metals 106, thereby connecting the source and drain of each sub-NLDMOS power tube and improving current uniformity, optionally, as shown in Figure 5 , a plurality of second metals 107 are connected in sequence.
[0091] Likewise, due to the oblique arrangement of the first metal 106 and the second metal 107, the overlapping area of the first metal 106 and the second metal 107 is increased, and the through hole 108 between the first metal 106 and the second metal 107 can be arranged more, optionally, as shown in Figure 6 , the through hole 108 at the overlapping position of the first metal 106 and the second metal 107 includes a plurality of through holes 108, and the plurality of through holes 108 are arranged in a matrix along the first direction. By arranging a plurality of matrix distributed through holes 108, the metal path between the source region 104 and the drain region 105 is increased, the current between the source region 104 and the drain region 105 flows in parallel, improves the current congestion, and improves the current uniformity.
[0092] Further, in order to ensure that each metal path has the same current uniformity, the number of through holes 108 at each overlapping position is equal.
[0093] In order to further increase the overlapping area of the first metal 106 and the second metal 107, increase the number of the through holes 108, and improve the current uniformity, the first metal 106 and the second metal 107 are arranged with equal width and equal thickness, the second metal 107 is arranged with equal width and equal thickness, the width of the second metal 107 is greater than the width of the first metal 106, and the thickness of the second metal 107 is greater than the thickness of the first metal 106. By increasing the width and the thickness of the second metal 107, the overlapping area of the first metal 106 and the second metal 107 is further increased, the number of the through holes 108 at the overlapping area is further increased, and the current uniformity is improved.
[0094] The above-described embodiments are only used to illustrate the technical solutions of the present application, rather than limit them; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that they can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacements for some technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application, and should be included in the protection scope of the present application.
Claims
1. An NLDMOS power tube, characterized in that: include: A drift region and a P-well are formed in a semiconductor substrate, wherein the drift region and the P-well are spaced apart from each other; a source region and a drain region formed on the drift region and the P-well respectively; a first metal layer connected to the source region and the drain region, respectively, the first metal layer comprising a plurality of first metal strips arranged in parallel and at equal intervals along a first direction, the plurality of first metal strips being equally spaced and connected to the source region and the drain region at a predetermined number of intervals; A second metal layer is stacked on the first metal layer, the second metal layer includes a plurality of second metal strips arranged in parallel at equal intervals along a second direction, the plurality of second metal strips are correspondingly connected to the plurality of first metal strips through through holes, wherein the first direction and the second direction are arranged at an oblique angle.
2. The NLDMOS power tube according to claim 1, wherein: The first direction and the second direction are arranged at an oblique angle of 45 degrees.
3. The NLDMOS power tube according to claim 1, wherein: A plurality of first metal strips are sequentially and staggeredly connected to the source region and the drain region.
4. The NLDMOS power tube according to claim 1, wherein: The second metal of line 2i-1 is connected to the first metal of line 2j-1 through a through hole, and the second metal of line 2i is connected to the first metal of line 2j through a through hole; Or the 2i-1th second metal is connected to the 2jth first metal through a through hole, and the 2ith second metal is connected to the 2j-1th first metal through a through hole, wherein i and j are positive integers greater than or equal to 1.
5. The NLDMOS power tube according to claim 4, wherein: There are multiple through holes at the overlapping positions of the first metal and the second metal, and the multiple through holes are distributed in a matrix along the first direction.
6. The NLDMOS power tube according to claim 1, wherein: A plurality of contact holes connected to the drift region or the P-well are also provided on the first metal.
7. The NLDMOS power tube according to claim 6, wherein: A plurality of contact holes are sequentially spaced apart along a center line of the first metal.
8. The NLDMOS power tube according to claim 1, wherein: A plurality of strips of the second metal are connected end to end in sequence.
9. The NLDMOS power tube according to claim 1, wherein: The first metals are arranged with the same width and thickness, and the second metals are arranged with the same width and thickness. The width of the second metal is greater than the width of the first metal, and the thickness of the second metal is greater than the thickness of the first metal.
10. A method for preparing an NLDMOS power tube, characterized in that: include: forming a drift region and a P-well in a P-type semiconductor substrate, wherein the drift region and the P-well are spaced apart from each other; forming a source region and a drain region on the drift region and the P-well respectively; Providing a first metal layer, the first metal layer being connected to the source region and the drain region respectively, the first metal layer comprising a plurality of first metal strips arranged in parallel and at equal intervals along a first direction, the plurality of first metal strips being equally spaced and connected to the source region and the drain region at a predetermined number of intervals; A second metal layer is provided, the second metal layer comprising a plurality of second metal strips, the plurality of second metal strips being provided in parallel on the first metal strips at equal intervals along a second direction, the plurality of second metal strips being stacked on the plurality of first metal strips and connected through through holes, wherein the first direction and the second direction are provided at an oblique angle.
Citation Information
Patent Citations
NLDMOS power tube
CN218498074U