Black silicon microstructure assisted by polysilicon etching and preparation method thereof

Abstract

The invention discloses a black silicon microstructure assisted by polysilicon etching and a preparation method thereof, comprising the steps of growing a polysilicon layer on a silicon wafer surface, wherein the polysilicon layer forms an initial surface with a first roughness; performing doping and oxidation processes on the polysilicon layer to form a silicon dioxide layer with a second roughness on the silicon wafer surface to obtain an etching mask structure; utilizing the etching mask structure to synchronously etch the silicon dioxide layer and the substrate of the silicon wafer, transferring the etching mask structure to the substrate according to a preset ratio to form a black silicon microstructure, the process is simple, the cost is low, the preparation process has low hardware requirements for equipment, is conducive to mass production and has good compatibility with silicon photoelectric device processes, the prepared black silicon micro-nanostructure has a moderate degree of refinement and good near-infrared absorption effect.

Description

Technical Field

[0001] The invention relates to the technical field of photoelectric detectors, and in particular to a black silicon microstructure assisted by polysilicon etching and a preparation method thereof. Background Art

[0002] Silicon photodetectors (PIN / APD) have the advantages of low dark current, high sensitivity, and low cost, and have been widely used in the fields of fiber-optic communication, laser ranging, three-dimensional imaging, laser guidance, etc. In order to further improve system performance and expand the scope of application, silicon photodetectors are also required to have a high response rate in the near-infrared band (800-1100nm). Black silicon has both micro-nanostructure light trapping and internal photocurrent multiplication, and can maintain a high absorption rate (≥80%) in the 800-1700nm spectral range. It is the most important method for silicon photodetectors to improve the near-infrared response rate.

[0003] Black silicon is used in silicon photodetectors, mainly as a photosensitive absorption layer (such as Figure 1 As shown in Figure 1, a micro-nano light-trapping structure with a deeper depth and a larger aspect ratio (i.e., black silicon microstructure) is required to improve the absorption rate of near-infrared light. The manufacturing process needs to have the characteristics of low lattice damage, high uniformity, and good repeatability to obtain a photodetector with low dark current, low noise, and low cost. At the same time, in order to ensure the performance of the device and the process safety of the production line, the black silicon manufacturing process must also be compatible with the silicon photoelectric device process and must not introduce heavy metal contamination, otherwise it will cause a significant degradation or failure of the device performance.

[0004] Traditional methods for preparing black silicon include femtosecond laser scanning, metal ion-assisted wet chemical etching, maskless dry etching, nanoimprinting, etc. The femtosecond laser scanning method uses femtosecond laser pulses to act on the surface of the silicon wafer to obtain a needle-shaped or columnar black silicon structure, which has the advantages of good black silicon morphology and good infrared absorption enhancement effect, but this method also has the disadvantages of expensive equipment, extremely low black silicon production capacity, and large lattice damage; metal ion-assisted wet chemical etching uses Au+, Pt+, Mn+, Ni+, Cu+ plasma-assisted wet etching to form pyramid or hole-shaped black silicon, which has the advantages of simple equipment and low production cost, but it is easy to cause metal ion contamination, which greatly degrades device performance; maskless dry etching uses plasma The selective etching of the daughter body's own crystal orientation and the micro-mask effect form a columnar black silicon structure, which has the advantage of a simple process, but there are problems such as poor uniformity between / within wafers and poor process repeatability. The nanoimprint method generally uses nanoimprinting to first form a black silicon micro-nanostructure mask on the surface of the silicon wafer, and then uses dry etching to transfer the mask pattern to the silicon substrate to form a black silicon structure. This method has the advantages of good uniformity and designable structure, but it also has disadvantages such as high cost and poor near-infrared absorption enhancement effect (the nanoimprinted black silicon microstructure is shallow, otherwise the microstructure cannot be reversed during nanoimprinting). Summary of the invention

[0005] In view of this, the purpose of the present invention is to provide a black silicon microstructure assisted by polysilicon etching and a preparation method thereof, so as to solve the problems in the prior art such as infrared absorption effect, repeatability, heavy metal contamination and compatibility with other preparation processes of silicon optoelectronic devices that cannot be taken into account.

[0006] To achieve the above object, a first aspect of the present invention provides a method for preparing a black silicon microstructure by polysilicon-assisted etching, comprising the following steps:

[0007] Growing a polysilicon layer: growing a polysilicon layer on the surface of the silicon wafer, wherein the polysilicon layer is formed with an initial surface having a first roughness;

[0008] Pretreatment of the polysilicon layer: performing doping and oxidation processes on the polysilicon layer to form a silicon dioxide layer with a second surface roughness on the surface of the silicon wafer to obtain an etching mask structure;

[0009] Black silicon microstructure etching transfer molding: using the etching mask structure to simultaneously etch the silicon dioxide layer and the substrate of the silicon wafer, transferring the etching mask structure to the substrate according to a preset ratio to form a black silicon microstructure.

[0010] Furthermore, before the step of growing polysilicon, the method further includes the following steps:

[0011] Performing a first cleaning on the silicon wafer: providing a silicon wafer and performing a first cleaning on the surface of the silicon wafer.

[0012] Furthermore, in the step of first cleaning the silicon wafer, the surface of the silicon wafer is cleaned by an RCA cleaning method, and the specific method is as follows:

[0013] The surface of the silicon wafer is cleaned by SPH using a mixed solution of concentrated sulfuric acid and hydrogen peroxide, and the silicon wafer after SPH cleaning is rinsed with deionized water;

[0014] APM cleaning is performed on the SPH-cleaned silicon wafer using a mixed solution of ammonia, hydrogen peroxide and pure water, and the APM-cleaned silicon wafer is rinsed with deionized water;

[0015] The silicon wafer after APM cleaning is subjected to HPM cleaning using a mixed solution of hydrochloric acid, hydrogen peroxide and pure water, and the cleaned silicon wafer is rinsed with deionized water and the deionized water and water stains on the surface of the silicon wafer are dried.

[0016] Furthermore, in the step of growing polysilicon, a first roughness of a surface of the polysilicon layer is 50-200 nm.

[0017] Furthermore, the step of pre-treating the polysilicon layer includes the following sub-steps:

[0018] Polysilicon layer doping: using ion implantation or diffusion doping process to implant or dope a preset dose of impurities into the polysilicon layer;

[0019] Oxidation of the polysilicon layer: A dry oxidation process is used to oxidize the doped polysilicon layer, and a silicon dioxide layer having a second surface roughness is formed on the surface of the silicon wafer to obtain an etching mask structure.

[0020] Furthermore, in the step of doping the polysilicon layer, the doping dosage of the impurity is 10 18 cm -3 ~10 22 cm -3 The doping gas is N2 / POCl3 / O2, the doping gas pressure is 100mtorr~800mtorr, the doping temperature is 800℃~1100℃, and the doping time is 60min~80min.

[0021] Furthermore, in the step of oxidizing the polysilicon layer, after the polysilicon layer is oxidized, a second surface roughness of the layer is 50 nm to 300 nm.

[0022] Furthermore, in the step of etching and transferring the black silicon microstructure, the silicon dioxide layer with the second roughness is used as an etching mask structure, and the silicon dioxide layer and the substrate of the silicon wafer are synchronously etched using fluorine-based process gas and auxiliary etching gas, and the etching selectivity ratio is adjusted, and the surface morphology with the second roughness on the silicon dioxide layer is amplified and transferred to the substrate to form a columnar black silicon microstructure.

[0023] Furthermore, after the step of etching and transferring the black silicon microstructure, the following steps are also included:

[0024] Cleaning the silicon wafer for the second time: Cleaning the silicon wafer on which the black silicon microstructure is formed for the second time.

[0025] A second aspect of the present invention provides a black silicon microstructure, including a black silicon microstructure formed in a substrate of a silicon wafer using the black silicon microstructure preparation method using polysilicon assisted etching as described above.

[0026] The invention adopts a polysilicon assisted etching method. First, a polysilicon layer is grown on a silicon wafer to form a rough etching mask precursor, and the polysilicon layer is doped to increase the roughness of the polysilicon layer after oxidation to form an etching mask with a constant roughness. Finally, by adjusting the ratio of etching process gas, temperature, pressure, ICP power / magnetic field strength, radio frequency power and other parameters, the process conditions with a suitable selection ratio are debugged, and then the morphology of the silicon dioxide mask structure is magnified and transferred to the substrate of the silicon wafer to form a black silicon microstructure. Only polysilicon production equipment and dry etching equipment are required to achieve the process, the hardware requirements for the equipment are low, the production cost is low, and it is conducive to mass production. At the same time, the growth, doping, oxidation and dry etching processes of the polysilicon layer control the morphology of the black silicon microstructure, and the four cycles can be optimized separately, the process has high uniformity and good repeatability, the whole process does not introduce heavy metal ions, the process compatibility with silicon photoelectric devices is good, and the prepared black silicon microstructure has a moderate degree of refinement and good near-infrared absorption effect. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 Schematic diagram of the structure of a photodetector using black silicon microstructure.

[0028] Figure 2 The present invention is a flow chart of a method for preparing a black silicon microstructure by polysilicon-assisted etching.

[0029] Figure 3 for Figure 2 Schematic diagram of the structure of the silicon wafer corresponding to each step.

[0030] Figure 4 This is a microscopic top view of the black silicon microstructure prepared by the present invention.

[0031] Figure 5 This is a fiber cross-sectional view of the black silicon microstructure prepared by the present invention.

[0032] The meanings of the symbols in the accompanying drawings are:

[0033] Silicon wafer-1; polysilicon layer-2; etching mask structure-3; black silicon microstructure-4. DETAILED DESCRIPTION

[0034] The following is further described in detail through specific implementation methods:

[0035] Example

[0036] like Figure 2 and Figure 3 , which is a flow chart of a method for preparing a black silicon microstructure by polysilicon-assisted etching according to the present invention, i.e., a schematic diagram of the structure of a silicon wafer 1 in each corresponding step. Specifically, this embodiment includes the following steps:

[0037] S101: Clean the silicon wafer 1 for the first time.

[0038] Specifically, a silicon wafer 1 is provided, and the surface of the silicon wafer 1 is cleaned for the first time before being processed to remove organic matter, metal, particles, and other impurities on the surface of the silicon wafer 1, thereby ensuring the cleanliness of the surface of the silicon wafer 1. In this embodiment, a standard RCA cleaning process is used to clean the surface of the silicon wafer 1; the specific method is as follows:

[0039] First, the silicon wafer 1 is placed in a mixed solution of concentrated sulfuric acid H2SO4 and hydrogen peroxide H2O2, and the surface of the silicon wafer 1 is cleaned by SPH, and the silicon wafer 1 after SPH cleaning is rinsed with deionized water to remove organic matter, metal and other impurities attached to the surface of the silicon wafer 1. Since the mixed solution of concentrated sulfuric acid H2SO4 and hydrogen peroxide H2O2 has a high oxidation capacity, the metal attached to the surface of the silicon wafer 1 can be oxidized and dissolved in the mixed solution of concentrated sulfuric acid H2SO4 and hydrogen peroxide H2O2. At the same time, the organic matter attached to the surface of the silicon wafer 1 can also be oxidized into carbon dioxide and water, thereby achieving the purpose of removing organic matter, metal and other impurities attached to the surface of the silicon wafer 1. In this embodiment, the volume ratio of the concentrated sulfuric acid H2SO4 and hydrogen peroxide H2O2 is preferably 4:1, the time for SPH cleaning the surface of the silicon wafer 1 is preferably 10 minutes, and the time for rinsing the surface of the silicon wafer 1 with deionized water is preferably 15 minutes.

[0040] Then, the silicon wafer 1 after SPH cleaning is placed in a mixed solution of ammonia NH3·H2O, hydrogen peroxide H2O2 and pure water H2O, and the silicon wafer 1 is cleaned by APM, and the silicon wafer 1 after APM cleaning is rinsed with deionized water to remove impurities such as particles and granules attached to the surface of the silicon wafer 1. Since a layer of hydrophilic natural silicon dioxide oxide film is formed on the surface of the silicon wafer 1, under the action of hydrogen peroxide H2O2, the surface of the silicon wafer 1 and the particles or granular impurities attached to the silicon wafer 1 can be penetrated by the mixed solution of ammonia NH3·H2O, hydrogen peroxide H2O2 and pure water H2O, so that the impurities such as particles and granules attached to the surface of the silicon wafer 1 are corroded and fall off, thereby achieving the purpose of removing the particles and granules attached to the surface of the silicon wafer 1. In this example, the volume ratio of ammonia NH3·H2O, hydrogen peroxide H2O2 and pure water H2O is preferably 1:2:10, the time for APM cleaning the surface of the silicon wafer 1 is preferably 10 minutes, and the time for rinsing the surface of the silicon wafer 1 with deionized water is preferably 10 minutes.

[0041] Finally, the silicon wafer 1 after APM cleaning is placed in a mixed solution of hydrochloric acid HCl, hydrogen peroxide H2O2 and pure water H2O, and HPM cleaning is performed on the silicon wafer 1. The HPM-cleaned silicon wafer 1 is rinsed with deionized water and then dried to remove metal contamination (such as sodium, iron, magnesium and other metal contamination) attached to the surface of the silicon wafer 1 and deionized water and water stains attached to the surface of the silicon wafer 1 after cleaning. In this embodiment, the volume ratio of the hydrochloric acid HCl, hydrogen peroxide H2O2 and pure water H2O is preferably 1:4:10, the time for HPM cleaning the surface of the silicon wafer 1 is preferably 10 minutes, and the time for rinsing the surface of the silicon wafer 1 with deionized water is preferably 10 minutes.

[0042] It is understandable that in some other embodiments, other cleaning processes (such as organic cleaning processes, etc.) can be selected to clean the surface of the silicon wafer 1 according to specific process conditions, so as to achieve the purpose of removing impurities such as organic matter, metals, particles, and grains attached to the surface of the silicon wafer 1.

[0043] S102: growing a polysilicon layer 2.

[0044] A layer of polysilicon layer 2 is grown on the surface of the silicon wafer 1 after the first cleaning, and the surface of the polysilicon layer 2 has a first roughness to provide an initial surface condition for the subsequent etching mask of the black silicon microstructure 4. In this embodiment, the polysilicon layer 2 is grown on the surface of the silicon wafer 1 by a CVD process, and during the growth process, the polysilicon layer 2 with the first roughness is grown by adjusting the process conditions such as the flow rate, gas pressure, temperature and growth time of the introduced reaction gas. Specifically, the silicon wafer 1 is placed in a CVD device, and the reaction gas is introduced into the CVD device so that the reaction gas acts on the surface of the silicon wafer 1, and the flow rate, gas pressure and the reaction temperature in the CVD device are adjusted to form a layer of polysilicon layer 2 with a first roughness on the surface of the silicon wafer 1, forming a rough etching mask precursor.

[0045] In this embodiment, the reaction gas is preferably silane SiH4, the flow rate of the reaction gas into the CVD device is preferably 20sccm to 300sccm, the gas pressure of the reaction gas in the CVD device is preferably 100mtorr to 800mtorr, the reaction temperature is preferably 400℃ to 700℃, and the growth time is preferably 30min to 120min, so as to form a polysilicon layer 2 with a first roughness of 50nm to 200nm on the surface of the silicon wafer 1, and provide initial surface conditions for the subsequent etching mask of the black silicon microstructure 4. More preferably, in this embodiment, when growing the polysilicon layer 2, the flow rate is preferably 150sccm, the gas pressure of the reaction gas in the CVD device is preferably 400mtorr, the reaction temperature is preferably 500℃, and the growth time is preferably 60min, thereby forming a polysilicon layer 2 with a first surface roughness of 150nm.

[0046] It is understandable that in some other embodiments, a plasma enhanced chemical vapor deposition process or a PVD process can also be used to grow a polysilicon layer 2 on the surface of the silicon wafer 1 to form a rough etching mask precursor to obtain a pre-etched polysilicon layer 2 film with a rough surface.

[0047] S103: pre-treating the polysilicon layer 2.

[0048] The polysilicon layer 2 is doped and oxidized to form a silicon dioxide layer with a second surface roughness on the surface of the silicon wafer 1 to obtain an etching mask structure 3 for subsequent transfer molding of the black silicon microstructure 4 .

[0049] The pretreatment of the polysilicon layer 2 comprises the following sub-steps:

[0050] S1031: doping of polysilicon layer 2.

[0051] Specifically, an ion implantation or diffusion doping process is used to implant or dope a preset dose of impurities into the polysilicon layer 2 to increase the roughness of the surface of the polysilicon layer 2 after oxidation, so as to facilitate the subsequent production of the black silicon microstructure 4. In this embodiment, the doping dose is preferably 10 18 cm -3 ~10 22 cm -3The impurity boron B or impurity phosphorus P is diffused and doped in the polysilicon layer 2. When doping, a N2 / POCl3 / O2 mixed gas with a gas ratio of preferably 8 / 600 / 400 sccm is used as the doping gas, the doping gas pressure is preferably 100mtorr~800mtorr, the doping temperature is preferably 800℃~1100℃, and the doping time is preferably 60min~180min, so as to provide basic conditions for increasing the surface roughness of the subsequent polysilicon layer 2 after oxidation. More preferably, in this embodiment, when doping, the doping dose of the impurity boron B or impurity phosphorus P is preferably 10 21 cm -3 The doping gas pressure is preferably 200 mtorr, the doping temperature is preferably 1000° C., and the doping time is preferably 100 min.

[0052] S1032: The polysilicon layer 2 is oxidized.

[0053] Specifically, a dry oxidation process is used to oxidize the doped polysilicon layer 2, so that the polysilicon layer 2 forms a silicon dioxide layer with a second roughness attached to the surface of the silicon wafer 1, and obtains a silicon dioxide etching mask structure 3. When the polysilicon layer 2 is oxidized, the morphology of the silicon dioxide etching mask structure 3 can be controlled by adjusting the process parameters such as the process gas flow rate, oxidation temperature, oxidation pressure and oxidation time of the polysilicon layer 2 during oxidation; in this embodiment, the process gas flow rate is preferably 20sccm to 300sccm, the oxidation temperature is preferably 800°C to 1200°C, the oxidation time is preferably 10min to 150min, and the oxidation pressure is preferably 100mtorr to 800mtorr, so that the polysilicon layer 2 is oxidized to form a silicon dioxide etching mask structure 3, and the second roughness of the surface of the silicon dioxide etching mask structure 3 is preferably 50nm to 300nm. More preferably, in this embodiment, when oxidizing the polysilicon layer 2, the process gas flow rate is preferably 200 sccm, the oxidation temperature is preferably 1000°C, and the oxidation time is preferably 60 minutes, thereby forming a silicon dioxide etching mask structure 3 with a second surface roughness of 250 nm.

[0054] S104: Etching and transfer molding of black silicon microstructure 4.

[0055] Specifically, the silicon dioxide layer and the substrate of the silicon wafer 1 are simultaneously etched using the silicon dioxide etching mask structure 3 formed in step S103 , and the etching mask structure 3 is transferred to the substrate according to a preset ratio to form a black silicon microstructure 4 .

[0056] More specifically, the silicon dioxide with the second rough surface formed in step S103 is used as the etching mask structure 3, and a fluorine-based process gas (such as SF6, CF4, CHF3 and other gases) and an auxiliary etching gas (such as HBr, O2, Ar, He and other gases) are used to synchronously etch the silicon dioxide layer and the substrate of the silicon wafer 1. At the same time, the etching selectivity is adjusted to enlarge the morphology of the second rough surface on the silicon dioxide layer and transfer it to the substrate to form a columnar black silicon microstructure 4 (such as Figures 4-5 shown).

[0057] Since the etching process of the black silicon microstructure 4 requires good anisotropy during etching (that is, the ratio of the longitudinal etching rate to the lateral etching rate must be greater than 5), a higher selectivity ratio (usually 5 to 30), and the etching products must be discharged in a timely and good manner, it is necessary to reasonably adjust the process parameters such as etching gas pressure, etching temperature, gas flow, RF energy, and magnetic field strength during etching. In this embodiment, Applied Materials etching equipment is used to etch the black silicon microstructure 4, the etching pressure is preferably 30mtorr to 300mtorr, the DC power (i.e., radio frequency energy) during etching is preferably 60w to 500w, the magnetic field strength is preferably 20Gauss to 100Gauss, the etching temperature is preferably 0°C to 200°C, and when the etching gas composition of BCl3 / N2 / Cl2 is used, the gas flow of each part is preferably BCl3 / N2 / Cl2: 50 / 25 / 30sccm, so as to amplify the morphology of the silicon dioxide etching mask structure 3 and transfer it to the substrate of the silicon wafer 1 to form the black silicon microstructure 4. More preferably, in this embodiment, when etching the black silicon microstructure 4, the etching pressure is preferably 100mtorr, the DC power (i.e., radio frequency energy) during etching is preferably 300w, the magnetic field strength is preferably 50Gauss, and the etching temperature is preferably 30°C.

[0058] It is understandable that in some other embodiments, other equipment may be selected to etch the black silicon microstructure 4. However, when other etching equipment is selected for etching, the etching parameters need to be adaptively adjusted accordingly to achieve the amplified transfer of the morphology of the silicon dioxide etching mask structure 3 to the substrate of the silicon wafer 1 to form a black silicon microstructure 4.

[0059] S105: Clean the silicon wafer 1 for the second time.

[0060] Specifically, the silicon wafer 1 having integrated black silicon microstructures 4 is cleaned for the second time to remove impurities formed or attached to the surface of the silicon wafer 1 and the surface of the black silicon microstructures 4 and in the gaps between adjacent black silicon microstructures 4 during the growth, doping and oxidation of the polysilicon layer 2 and the silicon dioxide layer transfer etching process. In this embodiment, the method for cleaning the silicon wafer 1 for the second time is the same as the method for cleaning the silicon wafer 1 for the first time in step S101, and both use a standard RCA cleaning or organic cleaning process to clean the surface of the silicon wafer 1. For the specific method, refer to the relevant description of step S101 in this embodiment, and this step will not be repeated.

[0061] The method for preparing the black silicon microstructure by polysilicon-assisted etching of this embodiment adopts CVD thin film growth, doping, oxidation, and etching processes to form the black silicon microstructure 4. The process is simple, requiring only thin film growth equipment and etching equipment, and the cost is low. In addition, the preparation process has low hardware requirements for the equipment, which is conducive to mass production. At the same time, the four processes of growth, doping, oxidation, and etching of the polysilicon layer 2 control the morphology of the black silicon microstructure 4, and the four processes can be optimized separately, with high process uniformity and good repeatability. In addition, the entire process does not introduce heavy metal ions, has good compatibility with the silicon optoelectronic device process, and the prepared black silicon micro-nanostructure has a moderate degree of refinement and good near-infrared absorption effect.

[0062] As another optional embodiment of the present invention, a black silicon microstructure is also provided, including a black silicon microstructure formed on a substrate of a silicon wafer 1 using the black silicon microstructure preparation method using polysilicon assisted etching as described in the above embodiment; in this embodiment, the black silicon microstructure is a universal near-infrared absorption enhancement structure, which can be applied to various devices such as PIN, APD, CCD, CIS, etc. to improve the near-infrared sensitivity of devices such as PIN, APD, CCD, CIS, etc.

Claims

1. A method for preparing a black silicon microstructure by polysilicon-assisted etching, characterized in that: The following steps are involved: Growing a polysilicon layer: growing a polysilicon layer on the surface of the silicon wafer, wherein the polysilicon layer is formed with an initial surface having a first roughness; Pretreatment of the polysilicon layer: doping and oxidation of the polysilicon layer to form a silicon dioxide layer with a second surface roughness on the surface of the silicon wafer to obtain an etching mask structure; wherein a preset dose of impurities is injected or doped into the polysilicon layer, and the doping dose of the impurities is 10 18 cm -3 ~10 22 cm -3 , the doping gas is N2 / POCl3 / O2, the doping gas pressure is 100mtorr~800mtorr, the doping temperature is 800℃~1100℃, and the doping time is 60min~80min; Black silicon microstructure etching transfer molding: using the etching mask structure to simultaneously etch the silicon dioxide layer and the substrate of the silicon wafer, transferring the etching mask structure to the substrate according to a preset ratio to form a black silicon microstructure; wherein the etching gas pressure is 30mtorr~300mtorr, the DC power during etching is 60w~500w, the magnetic field strength is 20Gauss~100Gauss, and the etching temperature is 0℃~200℃.

2. The method for preparing black silicon microstructure by polysilicon-assisted etching according to claim 1, characterized in that: Before the step of growing polysilicon, the method further comprises the following steps: Performing a first cleaning on the silicon wafer: providing a silicon wafer and performing a first cleaning on the surface of the silicon wafer.

3. The method for preparing black silicon microstructure by polysilicon-assisted etching according to claim 2, characterized in that: In the step of first cleaning the silicon wafer, the surface of the silicon wafer is cleaned by using an RCA cleaning method, and the specific method is as follows: The surface of the silicon wafer is cleaned by SPH using a mixed solution of concentrated sulfuric acid and hydrogen peroxide, and the silicon wafer after SPH cleaning is rinsed with deionized water; APM cleaning is performed on the SPH-cleaned silicon wafer using a mixed solution of ammonia, hydrogen peroxide and pure water, and the APM-cleaned silicon wafer is rinsed with deionized water; The silicon wafer after APM cleaning is subjected to HPM cleaning using a mixed solution of hydrochloric acid, hydrogen peroxide and pure water, and the cleaned silicon wafer is rinsed with deionized water and the deionized water and water stains on the surface of the silicon wafer are dried.

4. The method for preparing black silicon microstructure by polysilicon-assisted etching according to claim 1, characterized in that: In the step of growing polysilicon, a first roughness of a surface of the polysilicon layer is 50-200 nm.

5. The method for preparing black silicon microstructure by polysilicon-assisted etching according to claim 1, characterized in that: The step of pre-treating the polysilicon layer includes the following sub-steps: Polysilicon layer doping: using ion implantation or diffusion doping process to implant or dope a preset dose of impurities into the polysilicon layer; Oxidation of the polysilicon layer: A dry oxidation process is used to oxidize the doped polysilicon layer, and a silicon dioxide layer having a second surface roughness is formed on the surface of the silicon wafer to obtain an etching mask structure.

6. The method for preparing black silicon microstructure by polysilicon-assisted etching according to claim 5, characterized in that: In the step of oxidizing the polysilicon layer, after the polysilicon layer is oxidized, a second surface roughness of the polysilicon layer is 50 nm to 300 nm.

7. The method for preparing black silicon microstructure by polysilicon-assisted etching according to claim 1, characterized in that: In the step of etching and transferring the black silicon microstructure, the silicon dioxide layer with the second roughness is used as an etching mask structure, and the silicon dioxide layer and the substrate of the silicon wafer are synchronously etched using a fluorine-based process gas and an auxiliary etching gas, and the etching selectivity ratio is adjusted, and the surface morphology with the second roughness on the silicon dioxide layer is amplified and transferred to the substrate to form a columnar black silicon microstructure.

8. The method for preparing black silicon microstructure by polysilicon-assisted etching according to claim 1, characterized in that: After the step of etching and transferring the black silicon microstructure, the following steps are also included: Cleaning the silicon wafer for the second time: Cleaning the silicon wafer on which the black silicon microstructure is formed for the second time.

9. A black silicon microstructure, characterized in that: The method comprises adopting the method for preparing a black silicon microstructure by polysilicon-assisted etching as claimed in any one of claims 1 to 8 to prepare the microstructure formed in the substrate of a silicon wafer.

Images