DC / DC switching power supply control systems, methods, chips, and electronic devices

Abstract

This application discloses a DC / DC switching power supply control system, method, chip, and electronic device, which enables the switching frequency of the DC / DC switching power supply to remain constant despite fluctuations in input and output voltages. The DC / DC switching power supply control system includes: a duty cycle signal generator and an adaptive turn-off time generator; wherein the duty cycle signal generator is used to generate a duty cycle signal D of the DC / DC switching power supply; the adaptive turn-off time generator is used to sample the input and output voltages of the DC / DC switching power supply in real time; when any parameter of the input or output voltage changes, the turn-off time T in the duty cycle signal D is dynamically adjusted accordingly. OFF This is to maintain a constant switching frequency of the DC / DC switching power supply.

Description

Technical Field

[0001] This invention relates to the field of switching power supply technology, and more specifically, to DC / DC switching power supply control systems, methods, chips, and electronic devices. Background Technology

[0002] DC / DC switching power supplies regulate output voltage by controlling the duty cycle of the switching transistors. One existing control method is fixed off-time control (the off-time remains unchanged once the circuit parameters of the DC / DC switching power supply are determined). However, this control method suffers from fluctuations in the switching frequency due to input and output voltage variations. The following example uses a Buck-Boost DC / DC switching power supply for illustration:

[0003] According to the volt-second law, the relationship between the switching cycle and the turn-off time of a Buck-Boost switching power supply is as follows:

[0004]

[0005] In the formula, D is the duty cycle, T is the switching period (i.e., the reciprocal of the switching frequency), VIN is the input voltage, VOUT is the output voltage, and T... OFF This refers to the shutdown time.

[0006] From equation (1), it can be seen that when the off time T OFF When the value is fixed, the switching frequency will change with the fluctuations of the input voltage VIN and the output voltage VOUT, making it impossible to achieve a constant switching frequency. Summary of the Invention

[0007] In view of this, the present invention provides a DC / DC switching power supply control system, method, chip, and electronic device to achieve a constant switching frequency of the DC / DC switching power supply under fluctuations in input and output voltage.

[0008] A DC / DC switching power supply control system includes: a duty cycle signal generator and an adaptive turn-off time generator;

[0009] The duty cycle signal generator is used to generate the duty cycle signal D of the DC / DC switching power supply.

[0010] The adaptive turn-off time generator is used to sample the input and output voltages of the DC / DC switching power supply in real time; when any parameter of the input and output voltages changes, the turn-off time T in the duty cycle signal D is dynamically adjusted accordingly. OFF This is to maintain a constant switching frequency of the DC / DC switching power supply.

[0011] Optionally, when the DC / DC switching power supply is a Buck-Boost switching power supply, the adaptive turn-off time generator adjusts the turn-off time T by... OFF and This is inversely proportional to maintain a constant switching frequency for the DC / DC switching power supply;

[0012] Wherein, VIN represents the input voltage of the DC / DC switching power supply, and VOUT represents the output voltage of the DC / DC switching power supply.

[0013] Optionally, the adaptive turn-off time generator includes: a turn-off time generating current source, a turn-off time generating voltage source, and a turn-off time generating circuit.

[0014] Wherein, the current source generated during the turn-off time is a current source whose output current is a preset value ItOFF;

[0015] The voltage source for generating the turn-off time includes: a controllable switch S1 and a capacitor CtOFF; the positive terminal of capacitor CtOFF is connected to the output terminal of the current source for generating the turn-off time, and the negative terminal of capacitor CtOFF is grounded; the controllable switch S1 is connected in parallel with capacitor CtOFF; the controllable switch S1 is closed under high-level drive and turned off under low-level drive; the period when the output of OR gate O1 is low-level is used as the corrected turn-off time T. OFF ;

[0016] The off-time generation circuit includes: a first PWM comparator U3 and an OR gate O1; one input terminal of the first PWM comparator U3 is connected to the positive terminal of capacitor CtOFF, and the other input terminal receives the reference voltage Vref; the output terminal of the first PWM comparator U3 is connected to one input terminal of the OR gate O1; the other input terminal of the OR gate O1 receives the duty cycle signal D; the output terminal of the OR gate O1 is simultaneously connected to the control terminal of the duty cycle signal generator and the controllable switch S1.

[0017] The preset value ItOFF and the reference voltage Vref are required to be: the off-time T OFF The input and output voltages of the DC / DC switching power supply vary, while the switching frequency of the DC / DC switching power supply remains constant.

[0018] Optionally, the reference voltage Vref and current ItOFF are respectively:

[0019]

[0020] ItOFF = I1 + I2,

[0021] In the formula, K IN R and k are both constants, and k+1 = K IN .

[0022] Optionally, the current source generating the turn-off time includes: a proportional current source and a mirror current source; the reference current of the proportional current source is... The ratio of the reference current to the output current of a proportional current source is 1:k; the reference current of a mirror current source is... The output terminals of the proportional current source and the mirror current source are connected together as the output terminal of the current source generated during the off-time.

[0023] Optionally, the proportional current source includes: a first PMOS transistor P1, a second PMOS transistor P2, a first resistor R1, a first error amplifier U1, and a first NMOS transistor N1;

[0024] The non-inverting input of the first error amplifier U1 receives the reference voltage.

[0025] The output of the first error amplifier U1 is connected to the gate of the first NMOS transistor N1;

[0026] The collector of the first NMOS transistor N1 is connected to the inverting input terminal of the first error amplifier U1, and is also grounded through the first resistor R1;

[0027] The drain of the first NMOS transistor N1 is simultaneously connected to the drain of the first PMOS transistor P1, the gate of the first PMOS transistor P1, and the gate of the second PMOS transistor P2.

[0028] The source of the first PMOS transistor P1 is connected to the source of the second PMOS transistor P2.

[0029] The drain of the second PMOS transistor P2 is the output terminal of the proportional current source;

[0030] The resistance of the first resistor R1 is R.

[0031] Optionally, the mirrored current source includes: a third PMOS transistor P3, a fourth PMOS transistor P4, a second resistor R2, a second error amplifier U2, and a second NMOS transistor N2;

[0032] The non-inverting input of the second error amplifier U2 receives the reference voltage.

[0033] The inverting input terminal of the second error amplifier U2 is connected to the source of the second NMOS transistor N2 and grounded through the second resistor R2; the output terminal of the second error amplifier U2 is connected to the gate of the second NMOS transistor N2; the drain of the second NMOS transistor N2 is connected to the drain of the fourth PMOS transistor P4, the gate of the third PMOS transistor P3, and the gate of the fourth PMOS transistor P4.

[0034] The source of the third PMOS transistor P3 is connected to the source of the fourth PMOS transistor P4.

[0035] The drain of the third PMOS transistor P3 is the output terminal of the mirror current source;

[0036] The resistance of the second resistor R2 is R.

[0037] Optionally, when the DC / DC switching power supply is a Buck-Boost switching power supply, the duty cycle signal generator includes: a feedback network, a third error amplifier, a second PWM comparator, a first RS flip-flop, and a current sampling circuit.

[0038] The feedback network samples the DC / DC switching power supply output voltage VOUT and feeds it back to the non-inverting input of the third error amplifier; the inverting input of the third error amplifier receives the reference voltage VREF; the output of the third error amplifier is connected to the inverting input of the second PWM comparator.

[0039] The current sampling circuit samples the current of the power stage of the Buck-Boost switching power supply and feeds it back to the non-inverting input of the second PWM comparator; the output of the second PWM comparator is connected to the R terminal of the first RS flip-flop; the Q terminal of the first RS flip-flop is used to send a duty cycle signal D to the adaptive turn-off time generator and the power stage, and the adaptive turn-off time generator is used to send a turn-off time adjustment signal D to the S terminal of the first RS flip-flop. OFF .

[0040] Optionally, the DC / DC switching power supply control system further includes: a minimum on-time generator;

[0041] The minimum on-time generator is used to delay the output of the adaptive off-time generator to the duty cycle signal generator after a certain delay during the overshoot time of the DC / DC switching power supply output voltage VOUT.

[0042] Optionally, when the DC / DC switching power supply is a Buck-Boost switching power supply, the duty cycle signal generator includes: a feedback network, a third error amplifier, a second PWM comparator, a first RS flip-flop, and a current sampling circuit.

[0043] The feedback network samples the DC / DC switching power supply output voltage VOUT and feeds it back to the non-inverting input of the third error amplifier; the inverting input of the third error amplifier receives the reference voltage VREF; the output of the third error amplifier is connected to the inverting input of the second PWM comparator.

[0044] The current sampling circuit samples the current of the power stage of the Buck-Boost switching power supply and feeds it back to the non-inverting input of the second PWM comparator; the output of the second PWM comparator is connected to the R terminal of the first RS flip-flop; the Q terminal of the first RS flip-flop is used to send a duty cycle signal D to the adaptive turn-off time generator and the power stage, and the adaptive turn-off time generator is used to send a turn-off time adjustment signal D to the S terminal of the first RS flip-flop. OFF ;

[0045] The input terminal of the minimum on-time generator is connected to the output terminal of the second PWM comparator and the output terminal of the adaptive off-time generator, and the output terminal of the minimum on-time generator is connected to the R terminal of the first RS flip-flop.

[0046] A DC / DC switching power supply control method, comprising:

[0047] Generates the duty cycle signal D of the DC / DC switching power supply;

[0048] The input and output voltages of the DC / DC switching power supply are sampled in real time; when any parameter of the input or output voltage changes, the off-time T in the duty cycle signal D is dynamically adjusted accordingly. OFF This is to maintain a constant switching frequency of the DC / DC switching power supply.

[0049] Optionally, when any parameter of the input or output voltage changes, the off-time T in the duty cycle signal D is dynamically adjusted accordingly. OFF To maintain a constant switching frequency in the DC / DC switching power supply, including:

[0050] Adjusting the charging time of capacitor CtOFF includes: acquiring the voltage across capacitor CtOFF; when the voltage across capacitor CtOFF drops below the reference voltage Vref, controlling capacitor CtOFF to discharge when the original duty cycle signal D of the DC / DC switching power supply is high and controlling capacitor CtOFF to charge when it is low, with the charging current being a preset value ItOFF; and controlling capacitor CtOFF to discharge when the voltage across capacitor CtOFF exceeds the reference voltage Vref.

[0051] The charging time of capacitor CtOFF is used as the corrected turn-off time T. OFF ;

[0052] The preset value ItOFF and the reference voltage Vref are required to have the following values: turn-off time T OFF The input and output voltages of the DC / DC switching power supply vary, while the switching frequency of the DC / DC switching power supply remains constant.

[0053] Optionally, during the overshoot time of the DC / DC switching power supply output voltage VOUT, the off-time T in the duty cycle signal D is dynamically adjusted according to the change of the parameter. OFF Replace with:

[0054] The off-time T in the duty cycle signal D is dynamically adjusted with a delay as the parameters change. OFF .

[0055] A DC / DC switching power supply chip includes: a substrate, and a power stage and control system of the DC / DC switching power supply disposed on the substrate; the control system is any of the DC / DC switching power supply control systems disclosed above.

[0056] An electronic device comprising: any of the DC / DC switching power supply control systems disclosed above.

[0057] As can be seen from the above technical solution, this invention adds an adaptive turn-off time generator to the duty cycle signal D generated by the fixed turn-off time control method. When any parameter in the input or output voltage of the DC / DC switching power supply changes, the adaptive turn-off time generator will sample the parameter change and dynamically adjust the turn-off time T accordingly. OFF This is to offset the change in switching frequency caused by the change in this parameter, thereby maintaining a constant switching frequency. Attached Figure Description

[0058] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0059] Figure 1 This is a schematic diagram of a DC / DC switching power supply control system disclosed in an embodiment of the present invention;

[0060] Figure 2 This is a schematic diagram of an adaptive turn-off time generator structure disclosed in an embodiment of the present invention;

[0061] Figure 3 for Figure 2 The diagram shows a specific circuit structure of an adaptive turn-off time generator.

[0062] Figure 4 This is a schematic diagram of a Buck-Boost switching power supply control system disclosed in an embodiment of the present invention;

[0063] Figure 5 This is a schematic diagram of another Buck-Boost switching power supply control system disclosed in an embodiment of the present invention;

[0064] Figure 6 Timing diagram of the output signal D of the adaptive turn-off time generator 20, the second PWM comparator 103, and the first RS flip-flop 104 before the introduction of the minimum on-time generator 107;

[0065] Figure 7 The timing diagram of the output signal D of the adaptive turn-off time generator 20, the second PWM comparator 103, the minimum turn-on time generator 107, and the first RS flip-flop 104 after the introduction of the minimum turn-on time generator 107.

[0066] Figure 8 This is a flowchart of a DC / DC switching power supply control method disclosed in an embodiment of the present invention. Detailed Implementation

[0067] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0068] See Figure 1 This invention discloses a DC / DC switching power supply control system, including: a duty cycle signal generator 10 and an adaptive turn-off time generator 20;

[0069] The duty cycle signal generator 10 is used to generate the duty cycle signal D of the DC / DC switching power supply. Specifically, the duty cycle signal generator 10 is used to generate the duty cycle signal D of the DC / DC switching power supply based on the input and output voltages and the inductor voltage signal SW of the DC / DC switching power supply, thereby realizing the regulation of the output voltage VOUT of the DC / DC switching power supply.

[0070] An adaptive turn-off time generator 20 is used to sample the input and output voltages of the DC / DC switching power supply in real time. When any parameter of the input and output voltages changes, the turn-off time in the duty cycle signal D, i.e., the turn-off time T of the DC / DC switching power supply, is dynamically adjusted accordingly. OFF (That is, the adaptive turn-off time generator 20 sends the turn-off time adjustment signal D to the duty cycle signal generator 10) OFF This is to maintain a constant switching frequency of the DC / DC switching power supply.

[0071] Figure 1The working principle of the scheme shown is as follows: For a DC / DC switching power supply, the output voltage VOUT can be controlled by controlling the duty cycle of the switching transistor. However, due to the off-time T... OFF When the switching frequency is kept constant, it will fluctuate with the input and output voltages, therefore Figure 1 The proposed solution no longer uses a fixed off-time control method to generate the duty cycle signal D via the duty cycle signal generator 10. Instead, it adds an adaptive off-time generator 20 to the duty cycle signal generator 10. When any parameter in the input or output voltage of the DC / DC switching power supply changes, the adaptive off-time generator 20 samples the parameter change and dynamically adjusts the off-time T accordingly. OFF This is to offset the change in switching frequency caused by the change in this parameter, thereby maintaining a constant switching frequency.

[0072] The DC / DC switching power supply can be a Buck-Boost switching power supply, a Buck switching power supply, or a Boost switching power supply, and is not limited thereto. The following explanation uses a Buck-Boost switching power supply as an example to illustrate the above working principle:

[0073] Equation (1) given in the "Background Art" section of this specification can be transformed into:

[0074]

[0075] As can be seen from equation (2), as long as the design turn-off time T OFF and Inversely proportional quantities ensure a constant switching frequency (1 / T) for the Buck-Boost power supply. The product of two inversely proportional quantities is a constant called the proportionality coefficient, and the reciprocal of this coefficient is the switching frequency of the Buck-Boost power supply.

[0076] Based on this, embodiments of the present invention no longer allow the shutdown time T OFF Instead of using a fixed value, the turn-off time T is achieved by designing an adaptive turn-off time generator 20. OFF The adaptive shutdown time generator 20 samples the change in either the input voltage VIN or the output voltage VOUT of the Buck-Boost switching power supply and dynamically adjusts the shutdown time T of the Buck-Boost switching power supply accordingly. OFF This makes the shutdown time T OFF and The switching frequency is inversely proportional to the switching frequency, thus offsetting the change in the switching frequency caused by the change in this parameter, thereby maintaining the constant switching frequency of the Buck-Boost power supply.

[0077] Optionally, based on any of the embodiments disclosed above, see [link to relevant documentation]. Figure 2 The adaptive turn-off time generator 20 includes: a turn-off time generating current source 110, a turn-off time generating voltage source 111, and a turn-off time generating circuit 112.

[0078] Among them, the current source 110 generated during the turn-off time is a current source whose output current is a preset value ItOFF;

[0079] The off-time voltage source 111 includes: a controllable switch S1 and a capacitor CtOFF; the positive terminal of the capacitor CtOFF is connected to the output terminal of the off-time current source 110, and the negative terminal of the capacitor CtOFF is grounded; the controllable switch S1 is connected in parallel with the capacitor CtOFF; the controllable switch S1 is closed under high-level drive and turned off under low-level drive.

[0080] The off-time generation circuit 112 includes: a first PWM comparator U3 and an OR gate O1; one input terminal of the first PWM comparator U3 is connected to the positive terminal of capacitor CtOFF, and the other input terminal receives a reference voltage Vref; the output terminal of the first PWM comparator U3 is connected to one input terminal of the OR gate O1; the other input terminal of the OR gate O1 receives the duty cycle signal D; the output terminal of the OR gate O1 is simultaneously connected to the control terminals of the duty cycle signal generator 10 and the controllable switch S1, that is, the OR gate O1 outputs the off-time adjustment signal D. OFF It is also reused as the switching control signal for controllable switch S1; the low-level output period of OR gate O1 is used as the corrected turn-off time T. OFF ;

[0081] The preset value ItOFF and the reference voltage Vref are required to be: the off-time T OFF The input and output voltages of the DC / DC switching power supply vary, while the switching frequency of the DC / DC switching power supply remains constant.

[0082] Taking Buck-Boost switching power supplies as an example, the above value requirement is: turn-off time T OFF and They are inversely proportional. For example, the reference voltage Vref and current ItOFF can be set as follows:

[0083]

[0084] ItOFF = I1 + I2 (Equation 4)

[0085] In the formula, K IN R and k are both constants, and k+1 = K IN .

[0086] The values ​​of ItOFF and Vref set in equations (2) and (3) can make the turn-off time T OFF and They are inversely proportional, as explained below:

[0087] Taking the inverting input of the first PWM comparator U3 receiving the reference voltage Vref as an example, when the controllable switch S1 is closed, the capacitor CtOFF discharges to ground through the controllable switch S1, and the voltage at the non-inverting input of the first PWM comparator U3 gradually decreases to the reference voltage of the first PWM comparator U3. At this point, the first PWM comparator U3 outputs a low level, and the OR gate O1 outputs the original duty cycle signal D of the DC / DC switching power supply. When S1 is open, the current ItOFF charges the capacitor CtOFF. As the charging time accumulates, the voltage at the non-inverting input of the first PWM comparator U3 gradually increases and exceeds the reference voltage of the first PWM comparator U3. At this time, the first PWM comparator U3 outputs a high level, and the OR gate O1 outputs a high level. The on / off state of S1 is controlled by the output signal of the OR gate O1. S1 is closed when the OR gate O1 outputs a high level and open when the OR gate O1 outputs a low level. Let the period when the OR gate O1 outputs a low level be used as the corrected turn-off time T. OFF During this time, capacitor CtOFF charges; the period when OR gate O1 outputs a high level is used as the corrected turn-on time T. ON During this time, capacitor CtOFF discharges.

[0088] Due to the corrected shutdown time T OFF Internally, capacitor CtOFF is charged to the reference voltage using current ItOFF. According to Coulomb's law, the charge Q on capacitor CtOFF satisfies:

[0089]

[0090] Combining equations (4) to (5), we can obtain

[0091]

[0092] Combining equations (2) and (6), we can obtain

[0093]

[0094] Let (k+1) = K IN =n, then we have

[0095]

[0096] From equation (8), we can see that by letting k+1 = K INThis allows the switching period T to be a constant value, which means that the switching frequency of the DC / DC switching power supply is constant. In practical applications, the value of the switching period T can be limited by setting the values ​​of n, R, and CtOFF in advance. For example, n = 3, R = 3MΩ, CtOFF = 1pF, and the corresponding T = 1µs can be set.

[0097] Optionally, when the value of ItOFF is as shown in equation (4), such as Figure 3 As shown, the turn-off time current source 110 includes: a proportional current source 1 and a mirror current source 2; the reference current of the proportional current source 1 is... The ratio of the reference current to the output current of proportional current source 1 is 1:k; the reference current of mirror current source 2 is... The output terminals of proportional current source 1 and mirror current source 2 are connected together as the output terminal of current source 110 generated during the turn-off time.

[0098] Optional, see also Figure 3 The proportional current source 1 can adopt the following topology:

[0099] The proportional current source 1 includes: a first PMOS transistor P1, a second PMOS transistor P2, a first resistor R1, a first error amplifier U1, and a first NMOS transistor N1;

[0100] The non-inverting input of the first error amplifier U1 receives the reference voltage.

[0101] The output of the first error amplifier U1 is connected to the gate of the first NMOS transistor N1;

[0102] The collector of the first NMOS transistor N1 is connected to the inverting input terminal of the first error amplifier U1, and is also grounded through the first resistor R1;

[0103] The drain of the first NMOS transistor N1 is simultaneously connected to the drain of the first PMOS transistor P1, the gate of the first PMOS transistor P1, and the gate of the second PMOS transistor P2.

[0104] The source of the first PMOS transistor P1 is connected to the source of the second PMOS transistor P2.

[0105] The drain of the second PMOS transistor P2 is the output terminal of the proportional current source 1;

[0106] The resistance of the first resistor R1 is R.

[0107] The working principle of the proportional current source 1 with the above topology is as follows:

[0108] Since the source voltage of the first NMOS transistor N1 is fed back to the inverting input of the first error amplifier U1, a deep negative feedback is formed. Therefore, the "virtual short" characteristic of the error amplifier can be used for circuit analysis. "Virtual short" means that the voltages at the non-inverting and inverting inputs of the error amplifier are equal. Under this deep negative feedback, the source voltage of the first NMOS transistor N1 is equal to the reference voltage. The first resistor R1, the first NMOS transistor N1, and the first PMOS transistor P1 are connected in series in the same branch. The current in this branch is equal to... The first PMOS transistor P1 and the second PMOS transistor P2 together constitute the core part of the proportional current source 1. The current flowing through the first PMOS transistor P1 and the current flowing through the second PMOS transistor P2 are in a fixed ratio of 1:k.

[0109] Optional, see also Figure 3 The current mirror source 2 can adopt the following topology:

[0110] The mirror current source 2 includes: a third PMOS transistor P3, a fourth PMOS transistor P4, a second resistor R2, a second error amplifier U2, and a second NMOS transistor N2;

[0111] The non-inverting input of the second error amplifier U2 receives the reference voltage.

[0112] The inverting input terminal of the second error amplifier U2 is connected to the source of the second NMOS transistor N2 and grounded through the second resistor R2; the output terminal of the second error amplifier U2 is connected to the gate of the second NMOS transistor N2; the drain of the second NMOS transistor N2 is connected to the drain of the fourth PMOS transistor P4, the gate of the third PMOS transistor P3, and the gate of the fourth PMOS transistor P4.

[0113] The source of the third PMOS transistor P3 is connected to the source of the fourth PMOS transistor P4.

[0114] The drain of the third PMOS transistor P3 is the output terminal of the current mirror 2;

[0115] The resistance of the second resistor R2 is R.

[0116] The working principle of the mirror current source 2 with the above topology is as follows:

[0117] Since the source voltage of the second NMOS transistor N2 is fed back to the inverting input of the second error amplifier U2, a deep negative feedback is formed. Therefore, the "virtual short" characteristic of the error amplifier can be used for circuit analysis. Under this deep negative feedback, the source voltage of the second NMOS transistor N2 is equal to the reference voltage. The second resistor R2, the second NMOS transistor N2, and the fourth PMOS transistor P4 are connected in series in the same branch. The current in this branch is equal to... The third PMOS transistor P3 and the fourth PMOS transistor P4 together form the core of the mirror current source 2. The current flowing through the third PMOS transistor P3 and the current flowing through the fourth PMOS transistor P4 are in a fixed ratio of 1:1.

[0118] Optional, reference voltage This can be achieved using a voltage divider circuit, specifically: a third resistor R3 and a fourth resistor R4 are connected in series between the input voltage VIN and ground, with the resistance ratio of the third resistor R3 to the fourth resistor R4 being (K... IN -1):1, The connection point of the third resistor R3 and the fourth resistor R4 outputs the reference voltage.

[0119] Optionally, in any of the above-disclosed embodiments employing a controllable switch S1, the controllable switch S1 may be, for example, an IGBT or a transistor, but is not limited thereto.

[0120] In any of the Buck-Boost switching power supply embodiments disclosed above, the duty cycle signal generator 10 may employ, as follows: Figure 4 The structure is shown below. A detailed description follows:

[0121] The power stage 100 of the Buck-Boost switching power supply includes a third N-type switch N3, a diode, and an inductor L1. The power input terminal of the third N-type switch N3 receives the input voltage VIN. The power output terminal of the third N-type switch N3 is grounded through the inductor L1 and connected to the cathode of the diode, with the anode of the diode outputting a voltage VOUT. The third N-type switch N3 can be an IGBT, an NMOS transistor, or a bipolar transistor, and is not limited to any particular type.

[0122] The duty cycle signal generator 10 includes: a feedback network 101, a third error amplifier 102, a second PWM comparator 103, a first RS flip-flop 104, and a current sampling circuit 108.

[0123] Feedback network 101 samples the output voltage VOUT and feeds it back to the non-inverting input of the third error amplifier 102; the inverting input of the third error amplifier 102 receives the reference voltage VREF; the output of the third error amplifier 102 is connected to the inverting input of the second PWM comparator 103.

[0124] The current sampling circuit 108 samples the current of the power stage 100 and feeds it back to the non-inverting input of the second PWM comparator 103; the output of the second PWM comparator 103 is connected to the R terminal of the first RS flip-flop 104; the Q terminal of the first RS flip-flop 104 is used to send a duty cycle signal D to the adaptive turn-off time generator 20 and the power stage 100, and the adaptive turn-off time generator 20 is used to send a turn-off time adjustment signal D to the S terminal of the first RS flip-flop 104. OFF .

[0125] Figure 4 The working principle is as follows:

[0126] Feedback network 101 generates feedback voltage FB, which is connected to the non-inverting input of the third error amplifier 102. The inverting input of the third error amplifier 102 is the reference voltage VREF. The output signal of the third error amplifier 102 and the output signal of the current sampling circuit 108 are respectively connected to the inverting input and the non-inverting input of the second PWM comparator 103. The output signal of the second PWM comparator 103 is connected to the R terminal of the first RS flip-flop 104, which determines the turn-on time D*T of the switching transistor N3 in the power stage 100. The adaptive turn-off time generator 20 is connected to the S terminal of the first RS flip-flop 106, which determines the turn-off time (1-D)*T of the freewheeling transistor N3 in the power stage 100.

[0127] When the peak inductor current sampled by the current sampling circuit 108 (which has been converted into a voltage signal internally) exceeds the output voltage of the third error amplifier 102, the output of the second PWM comparator 103 goes high, the output signal D of the first RS flip-flop 104 goes low, the switching transistor N3 turns off, and the adaptive turn-off time generator 20 starts timing to count the turn-off time T. OFF Afterwards, switch N3 turns on again, the inductor current continues to rise, reaches its peak, and then turns off again. The turn-off time T is calculated. OFF Then turn it on again until the system reaches a stable state, that is, the output voltage equals the set value.

[0128] Optionally, the diodes in the power stage 100 of the Buck-Boost switching power supply can also be replaced with a fourth N-type switching transistor N4, such as... Figure 5 As shown: The power input terminal of the third N-type switch N3 receives the input voltage VIN; the power output terminal of the third N-type switch N3 is grounded through inductor L1, and is also connected to the power input terminal of the fourth N-type switch N4. The power output terminal of the fourth N-type switch N4 outputs voltage VOUT. The third N-type switch N3 and the fourth N-type switch N4 can be IGBTs, NMOS transistors, or bipolar transistors, and are not limited thereto. The turn-on time of the fourth N-type switch N4 is (1-D)*T.

[0129] Optional, Figure 4 and Figure 5 A minimum on-time generator 107 is also introduced to... Figure 5 For example: the input terminal of the minimum on-time generator 107 is connected to the output terminal of the second PWM comparator 103 and the output terminal of the adaptive off-time generator 20, and the output terminal of the minimum on-time generator 107 is connected to the R terminal of the first RS flip-flop 104. The principle is as follows: When the output voltage VOUT remains high (overshoot during load or power supply voltage regulation), the output of the third error amplifier 102 remains low, and the output of the second PWM comparator 103 remains high. Without the minimum on-time generator 107, the duty cycle signal D remains low until the overshoot ends, the switch N3 remains off, and VOUT requires a long adjustment period, resulting in over-regulation. To solve this problem, the minimum on-time generator 107 is introduced. The output of the minimum on-time generator 107 is a signal generated after a certain delay from the output of the adaptive off-time generator 20. This delay time (minimum on-time) is generally set between 50ns and 200ns. Under these conditions, the switch operates according to the minimum on-time in each cycle, resulting in a shorter VOUT adjustment time and preventing over-regulation. See the corresponding timing diagram. Figure 6 and Figure 7 ; Figure 6 The diagram shows the timing of the output signal D of the adaptive turn-off time generator 20, the second PWM comparator 103, and the first RS flip-flop 104 before the introduction of the minimum on-time generator 107. Figure 7 The diagram shows the timing of the output signal D of the adaptive turn-off time generator 20, the second PWM comparator 103, the minimum turn-on time generator 107, and the first RS flip-flop 104 after the introduction of the minimum turn-on time generator 107.

[0130] It should be noted that the minimum on-time generator is not limited to Buck-Boost switching power supplies; it is applicable to all DC / DC switching power supplies. The minimum on-time generator is used to delay the output of the adaptive off-time generator before outputting it to the duty cycle signal generator when an overshoot occurs in the output voltage VOUT of the DC / DC switching power supply.

[0131] Corresponding to the above-described control system embodiments, this invention also discloses a DC / DC switching power supply control method, such as... Figure 8 As shown, it includes:

[0132] Step S01: Generate the duty cycle signal D of the DC / DC switching power supply;

[0133] Step S02: Sample the input and output voltages of the DC / DC switching power supply in real time; when any parameter of the input and output voltages changes, dynamically adjust the off-time T in the duty cycle signal D accordingly. OFF This is to maintain a constant switching frequency of the DC / DC switching power supply.

[0134] Optionally, when any parameter of the input or output voltage changes, the off-time T in the duty cycle signal D is dynamically adjusted accordingly. OFF To maintain a constant switching frequency in the DC / DC switching power supply, including:

[0135] Adjusting the charging time of capacitor CtOFF includes: acquiring the voltage across capacitor CtOFF; when the voltage across capacitor CtOFF drops below the reference voltage Vref, controlling capacitor CtOFF to discharge when the original duty cycle signal D of the DC / DC switching power supply is high and controlling capacitor CtOFF to charge when it is low, with the charging current being a preset value ItOFF; and controlling capacitor CtOFF to discharge when the voltage across capacitor CtOFF exceeds the reference voltage Vref.

[0136] The charging time of capacitor CtOFF is used as the corrected turn-off time T. OFF ;

[0137] The preset value ItOFF and the reference voltage Vref are required to have the following values: turn-off time T OFF The input and output voltages of the DC / DC switching power supply vary, while the switching frequency of the DC / DC switching power supply remains constant.

[0138] Optionally, in any of the DC / DC switching power supply control methods disclosed above, during the overshoot time of the DC / DC switching power supply output voltage VOUT, the off-time T in the duty cycle signal D is dynamically adjusted according to the change of the parameter. OFF Replaced with: dynamically adjusting the off-time T in the duty cycle signal D according to the change of the parameters. OFF .

[0139] Furthermore, embodiments of the present invention also disclose a DC / DC switching power supply chip, comprising: a substrate, and a power stage and control system of the DC / DC switching power supply disposed on the substrate; the control system is any of the DC / DC switching power supply control systems disclosed above.

[0140] Furthermore, embodiments of the present invention also disclose an electronic device, including any of the DC / DC switching power supply control systems disclosed above.

[0141] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. The methods, chips, and electronic devices disclosed in the embodiments are described simply because they correspond to the control systems disclosed in the embodiments; relevant details can be found in the control system section.

[0142] The terms "first," "second," etc., used in the specification, claims, and accompanying drawings of this invention are used to distinguish similar but different objects and are not necessarily used to describe a specific order or sequence. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one" does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

[0143] The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the embodiments of the invention. Therefore, the embodiments of the invention are not to be limited to the embodiments shown herein, but are to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A DC / DC switching power supply control system, characterized by comprising: The DC / DC switching power supply control system comprises: a duty cycle signal generator and an adaptive off-time generator; the duty cycle signal generator is configured to generate a duty cycle signal D of the DC / DC switching power supply; The adaptive off-time generator is used to sample the input and output voltages of the DC / DC switching power supply in real time; when any parameter in the input and output voltages changes, the off-time T in the duty cycle signal D is dynamically adjusted according to the change of the parameter, so as to maintain the constant of the switching frequency of the DC / DC switching power supply OFF . the adaptive off-time generator comprises an off-time generation current source, an off-time generation voltage source and an off-time generation circuit; The turn-off time generating circuit receives a reference voltage Vref, and adjusts the turn-off time T according to the voltage outputted by the turn-off time generating voltage source and the reference voltage OFF ; The preset value ItOFF and the reference voltage Vref require the value requirement: the off time T OFF With the input and output voltage of the DC / DC switching power supply changing, and the switching frequency of the DC / DC switching power supply being constant; the reference voltage Vref and the preset value ItOFF are respectively: ItOFF = I1 + I2, wherein K IN , R and k are constants, k + 1 = K IN ; wherein VIN represents an input voltage of the DC / DC switching power supply, and VOUT represents an output voltage of the DC / DC switching power supply.

2. The DC / DC switching power supply control system according to claim 1, characterized by When the DC / DC switching power supply is a Buck-Boost switching power supply, the adaptive off-time generator maintains a constant switching frequency of the DC / DC switching power supply by making the off-time T OFF inversely proportional to the input voltage Vin.

3. The DC / DC switching power supply control system according to claim 1 or 2, characterized in that: The turn-off time generating voltage source comprises a controllable switch S1 and a capacitor CtOFF; the positive pole of the capacitor CtOFF is connected to the output terminal of the turn-off time generating current source, and the negative pole of the capacitor CtOFF is connected to the ground; the controllable switch S1 is connected in parallel to the capacitor CtOFF; the controllable switch S1 is closed under high-level driving and is turned off under low-level driving; and the low-level period of the output of the OR gate O1 is the corrected turn-off time T OFF ​ the off-time generation circuit comprises a first PWM comparator U3 and an OR gate O1; one input end of the first PWM comparator U3 is connected to a positive pole of a capacitor CtOFF, and the other input end receives the reference voltage Vref; an output end of the first PWM comparator U3 is connected to one input end of the OR gate O1; the other input end of the OR gate O1 receives the duty cycle signal D; and an output end of the OR gate O1 is connected to the duty cycle signal generator and a control end of a controllable switch S1.

4. The DC / DC switching power supply control system according to claim 3, characterized by The turn-off time generating current source comprises: a proportional current source and a mirror current source; the reference current of the proportional current source is The ratio of the reference current of the proportional current source to the output current is 1:k; the reference current of the mirror current source is The output ends of the proportional current source and the mirror current source are connected together as the output end of the turn-off time generating current source.

5. The DC / DC switching power supply control system according to claim 4, characterized by the proportional current source comprises a first PMOS tube P1, a second PMOS tube P2, a first resistor R1, a first error amplifier U1 and a first NMOS tube N1; wherein the non-inverting input of the first error amplifier U1 receives a reference voltage an output end of the first error amplifier U1 is connected to a gate of the first NMOS tube N1; a collector of the first NMOS tube N1 is connected to an inverting input end of the first error amplifier U1 and grounded through the first resistor R1; a drain of the first NMOS tube N1 is connected to a drain of the first PMOS tube P1, a gate of the first PMOS tube P1 and a gate of the second PMOS tube P2; a source of the first PMOS tube P1 is connected to a source of the second PMOS tube P2; the drain of the second PMOS tube P2 is an output end of the proportional current source; a resistance value of the first resistor R1 is R.

6. The DC / DC switching power supply control system according to claim 4 or 5, characterized by the mirror current source comprises a third PMOS tube P3, a fourth PMOS tube P4, a second resistor R2, a second error amplifier U2 and a second NMOS tube N2; The non-inverting input of the second error amplifier U2 receives a reference voltage an inverting input end of the second error amplifier U2 is connected to a source of the second NMOS tube N2 and grounded through the second resistor R2; an output end of the second error amplifier U2 is connected to a gate of the second NMOS tube N2; and a drain of the second NMOS tube N2 is connected to a drain of the fourth PMOS tube P4, a gate of the third PMOS tube P3 and a gate of the fourth PMOS tube P4; a source of the third PMOS tube P3 is connected to a source of the fourth PMOS tube P4; the drain of the third PMOS tube P3 is an output end of the mirror current source; a resistance value of the second resistor R2 is R.

7. The DC / DC switching power supply control system according to claim 1 or 2, characterized by when the DC / DC switching power supply is a Buck-Boost switching power supply, the duty cycle signal generator comprises a feedback network, a third error amplifier, a second PWM comparator, a first RS flip-flop and a current sampling circuit; The feedback network samples the output voltage VOUT of the DC / DC switching power supply and feeds back to the non-inverting input terminal of the third error amplifier; the inverting input terminal of the third error amplifier receives a reference voltage VREF; the output terminal of the third error amplifier is connected to the inverting input terminal of the second PWM comparator; The current sampling circuit samples the current of the power stage of the Buck-Boost switching power supply and feeds back to the non-inverting input terminal of the second PWM comparator; the output terminal of the second PWM comparator is connected to the R terminal of the first RS flip-flop; the Q terminal of the first RS flip-flop is used for sending a duty cycle signal D to the adaptive turn-off time generator and the power stage, and the adaptive turn-off time generator is used for sending a turn-off time adjustment signal D to the S terminal of the first RS flip-flop OFF .

8. The DC / DC switching power supply control system according to claim 1 or 2, characterized by, The DC / DC switching power supply control system further comprises a minimum on-time generator; The minimum on-time generator is configured to, during the overshoot time of the output voltage VOUT of the DC / DC switching power supply, output the output of the adaptive off-time generator to the duty cycle signal generator after a certain delay time.

9. The DC / DC switching power supply control system according to claim 8, characterized by When the DC / DC switching power supply is a Buck-Boost switching power supply, the duty cycle signal generator comprises a feedback network, a third error amplifier, a second PWM comparator, a first RS flip-flop and a current sampling circuit; The feedback network samples the output voltage VOUT of the DC / DC switching power supply and feeds back to the non-inverting input terminal of the third error amplifier; the inverting input terminal of the third error amplifier receives a reference voltage VREF; the output terminal of the third error amplifier is connected to the inverting input terminal of the second PWM comparator; The current sampling circuit samples the current of the power stage of the Buck-Boost switching power supply and feeds back to the non-inverting input terminal of the second PWM comparator; the output terminal of the second PWM comparator is connected to the R terminal of the first RS flip-flop; the Q terminal of the first RS flip-flop is used for sending a duty cycle signal D to the adaptive turn-off time generator and the power stage, and the adaptive turn-off time generator is used for sending a turn-off time adjustment signal D to the S terminal of the first RS flip-flop OFF . The output terminal of the minimum on-time generator is connected to the R terminal of the first RS flip-flop.

10. A DC / DC switching power supply control method, characterized by, It comprises: generating a duty cycle signal D of a DC / DC switching power supply; real-time sampling of input and output voltages of the DC / DC switching power supply; dynamically adjusting the off time T in the duty cycle signal D as a parameter in the input / output voltage changes OFF to maintain a constant switching frequency of the DC / DC switching power supply; said duty cycle signal D is dynamically adjusted in off time T as a parameter in said input / output voltage changes when any one of said parameters changes OFF to maintain a constant switching frequency of a DC / DC switching power supply, comprising: charging the capacitor CtOFF through the current control of the preset value ItOFF, and discharging the capacitor CtOFF when the voltage across the capacitor CtOFF exceeds the reference voltage Vref, so as to adjust the charging time of the capacitor CtOFF; Wherein, the preset value ItOFF and the value of the reference voltage Vref requirement is: turn-off time T OFF With the input and output voltage of the DC / DC switching power supply changes, and the switching frequency of the DC / DC switching power supply is constant; The reference voltage Vref and the preset value ItOFF are respectively: ItOFF=I1+I2, wherein K IN , R and k are constants, k + 1 = K IN ; wherein VIN represents the input voltage of the DC / DC switching power supply, and VOUT represents the output voltage of the DC / DC switching power supply.

11. The DC / DC switching power supply control method according to claim 10, wherein The adjustment of the charging time of the capacitor CtOFF comprises: obtaining the voltage across the capacitor CtOFF, and when the voltage across the capacitor CtOFF is lower than the reference voltage Vref, discharging the capacitor CtOFF when the original duty cycle signal D of the DC / DC switching power supply is high, and charging the capacitor CtOFF when the original duty cycle signal D of the DC / DC switching power supply is low, the charging current being the preset value ItOFF; discharging the capacitor CtOFF when the voltage across the capacitor CtOFF exceeds the reference voltage Vref. The capacitor CtOFF charging time is used as the corrected turn-off time T OFF .

12. The DC / DC switching power supply control method according to claim 10, wherein In the overshoot time of the DC / DC switching power supply output voltage VOUT, the off time T in the duty cycle signal D is dynamically adjusted according to the change of the parameter OFF , replaced with: dynamically adjusting the off-time T in the duty cycle signal D as a function of the parameter OFF .

13. A DC / DC switching power supply chip, characterized by, It comprises: a substrate, and a power stage and a control system of a DC / DC switching power supply arranged on the substrate; The control system is the DC / DC switching power supply control system according to any one of claims 1 to 9.

14. An electronic device, comprising: It comprises: the DC / DC switching power supply control system according to any one of claims 1 to 9.

Images