Infrared detector, preparation method thereof and electronic equipment

Abstract

The application provides an infrared detector and a preparation method thereof. The preparation method comprises the following steps: arranging at least two groups of convex points on one side of a monolithic readout circuit at intervals, wherein the heights of the different groups of convex points in the height direction perpendicular to the plane where the monolithic readout circuit is located are different; and arranging at least two infrared chips at the end of the corresponding group of convex points away from the monolithic readout circuit. The infrared detector prepared based on the embodiment of the application has a certain height difference after hybrid interconnection of each infrared chip, and the mutual interference in the hybrid interconnection process of infrared chips of different spectral ranges can be effectively avoided.

Description

Technical Field

[0001] This invention relates to the field of infrared detection technology, and in particular to an infrared detector, its preparation method, and electronic equipment. Background Technology

[0002] Currently, infrared detectors are widely used in related fields. Among them, multi-band integrated infrared detectors have many advantages such as low load, high resolution, wide spectral coverage, and selectable bandwidth for each spectral band, and are widely used in aerospace fields such as satellite remote sensing, ecological monitoring, and early warning reconnaissance. There are many technologies for integrating and coupling multi-band infrared detectors. Among them, the technology route of mixing and interconnecting infrared chips of different spectral bands into a single-chip readout circuit has the advantages of simplified process flow and low load, and is one of the important technological development routes for multi-band integrated infrared detectors.

[0003] However, the more infrared chips of different spectral bands are hybridized and interconnected, the more significant the technical problems will become, such as different array specifications, high interconnection difficulty, and mutual interference between infrared chips of different spectral bands, leading to greater development difficulty for this technology route. Summary of the Invention

[0004] In view of this, the present invention provides an infrared detector, a method for preparing the same, and an electronic device thereof.

[0005] The technical solution adopted in this invention is a method for fabricating an infrared detector, comprising: arranging at least two sets of bumps at intervals on one side of a single-chip readout circuit, wherein the different sets of bumps have different heights in the height direction perpendicular to the plane where the single-chip readout circuit is located; and setting at least two infrared chips at the end of the corresponding set of bumps away from the single-chip readout circuit.

[0006] In one embodiment, the step of correspondingly disposing at least two infrared chips at the end of the bump away from the single-chip readout circuit includes: sequentially disposing at least two infrared chips at the end of the bump away from the single-chip readout circuit in ascending order in the height direction perpendicular to the plane where the single-chip readout circuit is located, according to at least two sets of bumps.

[0007] In one embodiment, the step of sequentially distributing at least two infrared chips, according to the order of low to high in the height direction perpendicular to the plane where the single-chip readout circuit is located, at least two sets of bumps are arranged at the end of the bumps away from the single-chip readout circuit. This includes: sequentially connecting at least two infrared chips to at least two sets of bumps in order of high to low tolerance to temperature and heating time, and in order of low to high in the height direction perpendicular to the plane where the single-chip readout circuit is located.

[0008] In one embodiment, the method for fabricating the infrared detector further includes: after each infrared chip is connected to a corresponding set of bumps, performing a thermal reflow process on the current infrared detector.

[0009] In one embodiment, the method for manufacturing the infrared detector further includes: determining the size of each of the bumps in a set of bumps connected to the infrared chip, based on the size of the infrared chip.

[0010] Another aspect of the present invention provides an infrared detector, comprising: a single-chip readout circuit; at least two sets of bumps, spaced apart on one side of the single-chip readout circuit, wherein the at least two sets of bumps have different heights in a height direction perpendicular to the plane where the single-chip readout circuit is located; at least two infrared chips, the at least two infrared chips being correspondingly connected to the ends of the at least two sets of bumps away from the single-chip readout circuit.

[0011] In one implementation, at least two of the infrared chips represent different spectral bands.

[0012] In one embodiment, at least two of the infrared chips, arranged from low to high in a height direction perpendicular to the plane where the monolithic readout circuit is located, are arranged from high to low in terms of their tolerance to temperature and heating time.

[0013] In one embodiment, at least two sets of the bumps are indium bumps.

[0014] Another aspect of the present invention provides an electronic device including an infrared detector as described in any of the preceding claims.

[0015] By adopting the above technical solution, the present invention has at least the following advantages:

[0016] The infrared detector fabricated by the method described in this invention has a certain height difference between each interconnected infrared chip, which can effectively avoid mutual interference during the interconnection process of infrared chips of different spectral bands. In some embodiments of this invention, the connection sequence of the bumps and infrared chips is performed according to the infrared chips' tolerance to temperature and heating time from high to low. Furthermore, a reflow heat treatment is performed immediately after each interconnection of infrared chips, so that infrared chips with lower temperature tolerance undergo fewer reflow heat treatments and for less time. This not only ensures the reliability of the connection between each interconnected infrared chip and the readout circuit throughout the process, but also ensures a good electrical and mechanical connection between the infrared chips of each spectral band and the readout circuit, without affecting the performance of the infrared chips of each spectral band. Attached Figure Description

[0017] Figure 1This is a flowchart of an infrared detector fabrication method according to an embodiment of the present invention;

[0018] Figure 2 This is a schematic diagram of the infrared detector structure according to an embodiment of the present invention;

[0019] Figure 3 This is a schematic diagram of an electronic device structure according to an embodiment of the present invention.

[0020] Figure Labels

[0021] Single-chip readout circuit 1, bump 2, first infrared chip 3, second infrared chip 4, third infrared chip 5, fourth infrared chip 6. Detailed Implementation

[0022] To further illustrate the technical means and effects of the present invention in achieving its intended purpose, the present invention will be described in detail below with reference to the accompanying drawings and preferred embodiments.

[0023] The steps described in the specification and the flowcharts in the accompanying drawings of this invention are not necessarily to be strictly followed according to the step numbers; the execution order of the steps can be changed. Furthermore, certain steps can be omitted, multiple steps can be combined into one step, and / or one step can be broken down into multiple steps.

[0024] The first embodiment of the present invention provides a method for preparing an infrared detector, as follows: Figure 1 As shown, the specific steps include the following:

[0025] Step S1: Arrange at least two sets of bumps at intervals on one side of the single-chip readout circuit, wherein the different sets of bumps have different heights in the height direction perpendicular to the plane where the single-chip readout circuit is located.

[0026] Step S2: Place at least two infrared chips at the end of the corresponding group of bumps that is away from the single-chip readout circuit.

[0027] Each step will now be described in detail according to the process of this embodiment.

[0028] Step S1: Arrange at least two sets of bumps at intervals on one side of the single-chip readout circuit, wherein the different sets of bumps have different heights in the height direction perpendicular to the plane where the single-chip readout circuit is located.

[0029] In this embodiment, each of the at least two groups of bumps may include multiple bumps. The number of bumps in different groups may be the same or different, and this will not be limited in this document.

[0030] In this embodiment, the bump can be an indium bump.

[0031] In this embodiment, at least two sets of bumps are arranged at different height intervals in the height direction perpendicular to the plane where the single-chip readout circuit is located. The heights of the bumps in different sets are different, and the heights of multiple bumps in the same set can be the same or approximately the same.

[0032] Step S2: Place at least two infrared chips at the end of the corresponding group of bumps that is away from the single-chip readout circuit.

[0033] In this embodiment, the frequency bands represented by at least two infrared chips can be different.

[0034] After the above processing, each infrared chip has a certain height difference after being hybridized and interconnected, which can avoid mutual interference during the hybridization and interconnection process of infrared chips of different spectral bands.

[0035] In this embodiment, the infrared chips are connected sequentially to at least two sets of bumps in descending order of their tolerance to temperature and heating time, and in ascending order of height along the plane perpendicular to the single-chip readout circuit. Specifically, based on the tolerance of the infrared chips to temperature and heating time, the bump set corresponding to the infrared chip with the highest tolerance is the set with the lowest height among the two sets of bumps. That is, the infrared chip with the highest tolerance is connected to the set with the lowest height, the second highest tolerance is connected to the set with the second lowest height, and so on, until all infrared chips are connected to the bump sets.

[0036] Furthermore, after each infrared chip is connected to a set of bumps, a hot reflow process can be performed on the current infrared detector (including the single-chip readout circuit, bumps, and connected infrared chips).

[0037] Typically, infrared chips in different spectral bands have different critical values ​​for temperature and heating time that can affect their performance. Therefore, the hybrid interconnect process is carried out in order of decreasing tolerance to temperature and heating time of the infrared chips. After each hybrid interconnect of infrared chips is completed, a thermal reflow process is performed immediately. This not only improves the reliability of the connection between each interconnected infrared chip and the monolithic readout circuit during the entire hybrid interconnect process, but also effectively ensures that the infrared chips in each spectral band achieve a good electrical and mechanical connection with the readout circuit. At the same time, for infrared detectors processed according to the above connection order, the infrared chips with lower temperature tolerance undergo fewer reflow thermal treatments and for less time, so it will not affect the performance of infrared chips in each spectral band.

[0038] In this embodiment, the preparation method may further include: after completing the connection between the monolithic readout circuit and the infrared chip and the corresponding thermal reflow process, the size of each bump in a set of bumps connected to the infrared chip can be determined according to the size of the infrared chip.

[0039] In other words, for an infrared chip and its corresponding set of bumps, the size of the bumps can be fine-tuned according to the actual needs, based on the array specifications and interconnection pressure of the infrared chip, to better achieve hybrid interconnection between the single infrared chip and the single-chip readout circuit. Specifically, the size of the bumps in the height direction can be adjusted, or the size of the bumps in the width direction, that is, the size in the plane parallel to the single-chip readout circuit, can be adjusted according to the actual situation.

[0040] A second embodiment of the present invention provides an infrared detector, such as... Figure 2 As shown, the infrared detector can be manufactured using the above-described method for preparing an infrared detector, including:

[0041] Single-chip readout circuit;

[0042] At least two sets of bumps are arranged at intervals on one side of the monolithic readout circuit, wherein the heights of the at least two sets of bumps are different in the height direction perpendicular to the plane where the monolithic readout circuit is located.

[0043] At least two infrared chips are connected to at least two sets of the bumps at the ends away from the single-chip readout circuit.

[0044] In embodiments of the present invention, at least two infrared chips represent different spectral bands.

[0045] In embodiments of the present invention, at least two infrared chips arranged from low to high in the height direction perpendicular to the plane where the single-chip readout circuit is located are arranged from high to low in terms of their tolerance to temperature and heating time.

[0046] In embodiments of the present invention, at least two sets of the bumps are indium bumps.

[0047] A third embodiment of the present invention provides an electronic device, such as... Figure 3 As shown, an infrared detector as described above is included. It is based on the same concept as the infrared detector provided in the above embodiments, and its effect is similar to the technical effect provided in the above embodiments. Therefore, it will not be described in detail here.

[0048] The fourth embodiment of the present invention is based on the above embodiments and combines with... Figure 2 Here is an application example of the present invention.

[0049] This invention relates to a hybrid interconnection method for a multi-band integrated infrared detector. Examples include... Figure 2 As shown, it includes a single-chip readout circuit 1, a bump 2, a first infrared chip 3, a second infrared chip 4, a third infrared chip 5, and a fourth infrared chip 6. It should be noted that only four infrared chips are shown in the figure as an example. In actual applications, the number of infrared chips may be more or less depending on the actual application requirements.

[0050] The bump 2 fabricated on the monolithic readout circuit is an indium bump. Different sizes are designed depending on the order of hybrid interconnection. Generally speaking, the size of bump 2 used in the infrared chip that is hybrid interconnected first is relatively small. Then, according to the interconnection order, the size of the indium bump increases sequentially, so that there is a certain height difference after each infrared chip is hybrid interconnected, so as to avoid mutual interference during the hybrid interconnection process of infrared chips of different spectral bands. The size of the indium bump of a single infrared chip is finely adjusted according to the array specifications and interconnection pressure of the chip to better complete the hybrid interconnection of the single chip.

[0051] Typically, infrared chips in different spectral bands have different critical values ​​for temperature and heating time that can affect their performance. Based on the order of temperature and heating time tolerance of the first infrared chip 3, second infrared chip 4, third infrared chip 5, and fourth infrared chip 6 from highest to lowest, the hybrid interconnection sequence is designed as follows: first infrared chip 3, second infrared chip 4, third infrared chip 5, and fourth infrared chip 6. After each hybrid interconnection of the infrared chips is completed, a reflow heat treatment is performed immediately. Ultimately, the number of reflows for each infrared chip is: first infrared chip 3, 4 times; second infrared chip 4, 3 times; third infrared chip 5, 2 times; and fourth infrared chip 6, 1 time.

[0052] The process flow of the hybrid interconnection method for the above-mentioned multi-band integrated infrared detector is as follows:

[0053] S1, fabrication of bumps in a single-chip readout circuit.

[0054] S2, the first infrared chip hybrid interconnect;

[0055] S3, first reflux heat treatment;

[0056] S4, the second infrared chip hybrid interconnect;

[0057] S5, second reflux heat treatment;

[0058] ...

[0059] The entire hybrid interconnection process of the multi-band integrated infrared detector is completed only after the fourth reflow heat treatment.

[0060] Compared with existing technologies, the embodiments of the present invention have at least the following technical advantages:

[0061] 1) By using bump arrays of different sizes and corresponding hybrid interconnect sequences, mutual interference during the hybrid interconnect process of infrared chips in different spectral bands can be avoided.

[0062] 2) By performing a reflow heat treatment immediately after each hybrid interconnection of the infrared chip, the reliability of the connection between the interconnected infrared chip and the readout circuit is enhanced, and the impact of subsequent hybrid interconnection processes on the interconnected chip is avoided.

[0063] 3) By using a reasonable sequence of hybrid interconnection and reflow heat treatment, we can ensure that after all processes are completed, the infrared chips of each spectrum band and the readout circuit achieve good electrical and mechanical connection, without affecting the performance of the infrared chips of each spectrum band.

[0064] Through the description of specific embodiments, a more in-depth and specific understanding should be gained of the technical means and effects adopted by the present invention to achieve the intended purpose. However, the accompanying drawings are only provided for reference and illustration and are not intended to limit the present invention.

Claims

1. A method of fabricating an infrared detector, comprising: The infrared detector comprises: ​ at least two groups of protrusions are arranged at intervals on one side of the monolithic readout circuit, wherein the heights of different groups of the protrusions in the height direction perpendicular to the plane where the monolithic readout circuit is located are different; at least two infrared chips are arranged at the ends of the corresponding groups of the protrusions away from the monolithic readout circuit; the arrangement of the at least two infrared chips at the ends of the corresponding groups of the protrusions away from the monolithic readout circuit comprises: in the order from high to low of the temperature tolerance and the warming time tolerance of the at least two infrared chips and in the order from low to high of the heights of the at least two groups of the protrusions in the height direction perpendicular to the plane where the monolithic readout circuit is located, the at least two infrared chips are sequentially connected with the at least two groups of the protrusions, including connecting the infrared chip with the highest tolerance with the group of the protrusions with the lowest height, connecting the infrared chip with the second highest tolerance with the group of the protrusions with the second lowest height, and so on until the connection of all the infrared chips with the groups of the protrusions is completed; the preparation method of the infrared detector further comprises: according to the size of the infrared chip, the size of each protrusion in the group of the protrusions connected with the infrared chip is determined, and the size of the protrusion is fine-tuned according to the array specification of the infrared chip and the interconnection pressure; the preparation method of the infrared detector further comprises: after each infrared chip is connected with the corresponding group of the protrusions, the current infrared detector is subjected to a heat reflow treatment.

2. An infrared detector, characterized by The infrared detector is prepared by the preparation method of the infrared detector according to claim 1, comprising: a monolithic readout circuit; at least two groups of protrusions arranged at intervals on one side of the monolithic readout circuit, wherein the heights of the at least two groups of the protrusions in the height direction perpendicular to the plane where the monolithic readout circuit is located are different; at least two infrared chips, and the at least two infrared chips are connected with the at least two groups of the protrusions at the ends away from the monolithic readout circuit.

3. The infrared detector of claim 2, wherein, The spectral ranges represented by the at least two infrared chips are different.

4. The infrared detector of claim 2, wherein, The at least two groups of the protrusions are indium protrusions.

5. An electronic device, comprising: The infrared detector according to any one of claims 2 to 4 is included.

Images