Power converter with negative current detection mechanism

Abstract

This invention discloses a power converter with a negative current detection mechanism. The negative current detection circuit includes a first operational amplifier, a first transistor, and a second transistor. The non-inverting input terminal of the first operational amplifier is connected to the second terminal of a sensing resistor. The inverting input terminal of the first operational amplifier is connected to the first terminal of a first capacitor. The control terminals of the first transistor and the second transistor are connected to the output terminal of the first operational amplifier. The first terminal of the first transistor is connected to the second terminal of the sensing resistor. The second terminal of the first transistor is grounded. The first terminal of the second transistor is connected to both the non-inverting input terminal of the first operational amplifier and the first terminal of the first transistor. The second terminal of the second transistor is grounded.

Description

Technical Field

[0001] This invention relates to a power converter, and more particularly to a power converter with a negative current detection mechanism. Background Technology

[0002] For electronic devices, voltage converters are indispensable components, used to convert voltage and supply the converted voltage to the electronic devices. The traditional detection circuit of a voltage converter detects the current of the lower bridge switch and calculates the voltage value based on the detected current and the on-resistance value of the lower bridge switch. The control circuit of the voltage converter then controls the drive circuit to switch the upper and lower bridge switches according to the calculated voltage value. However, when the original lower bridge switch of the voltage converter is replaced with another lower bridge switch with a different on-resistance value, the on-resistance value of the replaced lower bridge switch must be obtained again to properly switch the upper and lower bridge switches. Summary of the Invention

[0003] The technical problem to be solved by this invention is to provide a power converter with a negative current detection mechanism, addressing the shortcomings of existing technologies. The converter includes an upper bridge switch, a lower bridge switch, an inductor, an output capacitor, a first resistor, a first capacitor, a sensing resistor, and a negative current detection circuit. The first terminal of the upper bridge switch is connected to the input voltage, and the control terminal of the upper bridge switch is connected to a trigger circuit. The first terminal of the lower bridge switch is connected to the second terminal of the upper bridge switch. The second terminal of the lower bridge switch is grounded. The control terminal of the lower bridge switch is connected to the trigger circuit. The first terminal of the inductor is connected to the node between the second terminal of the upper bridge switch and the first terminal of the lower bridge switch. The first terminal of the output capacitor is connected to the second terminal of the inductor. The second terminal of the output capacitor is grounded. The first terminal of the first resistor is connected to the first terminal of the inductor. The first terminal of the first capacitor is connected to the second terminal of the first resistor. The second terminal of the first capacitor is connected to the second terminal of the inductor. The first terminal of the sensing resistor is connected to the second terminal of the inductor. The negative current detection circuit includes a first operational amplifier, a first transistor, and a second transistor. The non-inverting input terminal of the first operational amplifier is connected to the second terminal of the sensing resistor. The inverting input terminal of the first operational amplifier is connected to the first terminal of the first capacitor. The control terminal of the first transistor is connected to the output terminal of the first operational amplifier. The first terminal of the first transistor is connected to the non-inverting input terminal of the first operational amplifier, and the second terminal of the first transistor is grounded. The control terminal of the second transistor is connected to the output terminal of the first operational amplifier. The first terminal of the second transistor is coupled to a shared voltage and connected to both the non-inverting input terminal of the first operational amplifier and the first terminal of the first transistor. The second terminal of the second transistor is grounded.

[0004] In one embodiment, the negative current detection circuit further includes a first current mirror circuit. The input terminal of the first current mirror circuit is connected to the first terminal of the second transistor. The output terminal of the first current mirror circuit is the first output terminal of the power converter with the negative current detection mechanism.

[0005] In one embodiment, the first current mirror circuit includes a third transistor and a fourth transistor. The first terminals of the third transistor and the fourth transistor are coupled to a shared voltage. The second terminal of the third transistor is connected to the first terminal of the second transistor, the control terminal of the third transistor, and the control terminal of the fourth transistor. The second terminal of the fourth transistor is the first output terminal of the power converter with a negative current detection mechanism.

[0006] In one embodiment, the power converter with negative current detection mechanism further includes a clamping circuit. The clamping circuit is connected to the non-inverting input of the first operational amplifier, the first terminal of the first transistor, the first terminal of the second transistor, and the second terminal of the third transistor.

[0007] In one embodiment, the clamping circuit includes an operational amplifier and a transistor. A first terminal of the transistor is connected to a second terminal of a third transistor. The non-inverting input of the operational amplifier is connected to both a first terminal of the first transistor and a non-inverting input of the first operational amplifier. The inverting input of the operational amplifier is connected to both a first terminal of the second transistor and a second terminal of the first transistor. The output of the operational amplifier is connected to the control terminal of the transistor.

[0008] In one embodiment, the power converter with a negative current detection mechanism further includes a negative current limiting circuit. The negative current limiting circuit includes a negative current determining circuit. The negative current determining circuit is connected to the second terminal of the fourth transistor and the input terminal of the trigger circuit. The negative current determining circuit is configured to output a current limiting signal to the trigger circuit based on the current at the second terminal of the fourth transistor, thereby controlling the trigger circuit to turn the upper bridge switch and the lower bridge switch on or off.

[0009] In one embodiment, the negative current limiting circuit further includes a second operational amplifier. The non-inverting input of the second operational amplifier is connected to the second terminal of the fourth transistor. The inverting input of the second operational amplifier is coupled to a reference voltage. The output of the second operational amplifier is connected to the input of the negative current detection circuit.

[0010] In one embodiment, the negative current limiting circuit further includes a resistor. A first terminal of the resistor is connected to the non-inverting input of the second operational amplifier. The second terminal of the resistor is grounded.

[0011] In one embodiment, the power converter with a negative current detection mechanism further includes a positive current detection circuit. The positive current detection circuit includes a third operational amplifier and a fifth transistor. The non-inverting input of the third operational amplifier is connected to a first terminal of a first capacitor. The inverting input of the third operational amplifier is connected to a second terminal of a sensing resistor. The output of the third operational amplifier is connected to the control terminal of the fifth transistor. The first terminal of the fifth transistor is coupled to a shared voltage. The second terminal of the fifth transistor is connected to the inverting input of the third operational amplifier.

[0012] In one embodiment, the positive current detection circuit further includes a second current mirror circuit. The input terminal of the second current mirror circuit is connected to the first terminal of the fifth transistor. The output terminal of the second current mirror circuit is the second output terminal with the negative current detection mechanism.

[0013] In one embodiment, the second current mirror circuit includes a sixth transistor and a seventh transistor. The first terminals of the sixth and seventh transistors are coupled to a shared voltage. The second terminal of the sixth transistor is connected to the first terminal of the fifth transistor, the control terminal of the sixth transistor, and the control terminal of the seventh transistor. The second terminal of the seventh transistor is the second output terminal of the power converter with a negative current detection mechanism.

[0014] As described above, this invention provides a power converter with a negative current detection mechanism. It includes a negative current detection circuit that can detect the negative current of the inductor in real time without adding extra pins or obtaining the on-resistance value of the lower bridge switch (i.e., after arbitrarily replacing the lower bridge switch), especially when the power converter outputs a low voltage. When the negative current of the inductor reaches the current threshold, the negative current limiting circuit can instruct the trigger circuit to appropriately switch the upper and lower bridge switches in real time to limit the negative current of the inductor to remain below the current threshold.

[0015] To further understand the features and technical content of the present invention, please refer to the following detailed description and drawings of the present invention. However, the drawings provided are for reference and illustration only and are not intended to limit the present invention. Attached Figure Description

[0016] Figure 1 This is a circuit layout diagram of a power converter with a negative current detection mechanism according to the first embodiment of the present invention.

[0017] Figure 2 This is a circuit layout diagram of the negative current detection circuit of a power converter with a negative current detection mechanism according to the second embodiment of the present invention.

[0018] Figure 3 This is a circuit layout diagram of a power converter with a negative current detection mechanism according to the third embodiment of the present invention.

[0019] Figure 4 This is a circuit layout diagram of a power converter with a negative current detection mechanism according to the fourth embodiment of the present invention.

[0020] Figure 5 This is a circuit layout diagram of a power converter with a negative current detection mechanism according to the fifth embodiment of the present invention.

[0021] Figure 6The waveform diagram shows the signal of the power converter circuit with negative current detection mechanism according to the fifth embodiment of the present invention. Detailed Implementation

[0022] The following specific embodiments illustrate the implementation of the present invention. Those skilled in the art can understand the advantages and effects of the present invention from the content disclosed in this specification. The present invention can be implemented or applied through other different specific embodiments, and various details in this specification can also be modified and changed based on different viewpoints and applications without departing from the concept of the present invention. Furthermore, the accompanying drawings of the present invention are for simple illustrative purposes only and are not depictions of actual dimensions, as stated in advance. The following embodiments will further describe the relevant technical content of the present invention in detail, but the disclosed content is not intended to limit the scope of protection of the present invention. In addition, the term "or" as used herein may, depending on the actual situation, include any combination of any one or more of the associated listed items.

[0023] [First Embodiment]

[0024] Please see Figure 1 This is a circuit layout diagram of a power converter with a negative current detection mechanism according to the first embodiment of the present invention.

[0025] The power converter in this embodiment may include an upper bridge switch UG, a lower bridge switch LG, an inductor L, an output capacitor Cout, a first resistor R1, a first capacitor C1, a sensing resistor RSEN, and a negative current detection circuit NCS.

[0026] The first terminal of the upper bridge switch UG can be connected to the input voltage VIN. The second terminal of the upper bridge switch UG can be connected to the first terminal of the lower bridge switch LG. The second terminal of the lower bridge switch LG is grounded.

[0027] The control terminals of the upper bridge switch UG and the lower bridge switch LG can be connected to a trigger circuit or directly coupled to a reference potential. For example, the trigger circuit may include an inverter N1, a control circuit, and a drive circuit, but the present invention is not limited thereto. The output terminal of the control circuit can be connected to the input terminal of the drive circuit. The output terminal of the drive circuit can be connected to the input terminal of the inverter N1 and the control terminal of the upper bridge switch UG. The output terminal of the inverter N1 can be connected to the control terminal of the lower bridge switch LG. The control circuit can output a control signal to the drive circuit. The drive circuit can output an upper bridge conduction signal Ton to the upper bridge switch UG to control the upper bridge switch UG, and can also output the upper bridge conduction signal Ton to the inverter N1 to form an inverted signal after inversion and output it to the lower bridge switch LG to control the lower bridge switch LG.

[0028] The inductor L may have a resistance value DCR. The first terminal of inductor L can be connected to the node between the second terminal of the upper bridge switch UG and the first terminal of the lower bridge switch LG. The second terminal of inductor L can be connected to the first terminal of the output capacitor Cout. The second terminal of the output capacitor Cout is grounded.

[0029] The first terminal of the first resistor R1 can be connected to the first terminal of the inductor L. The second terminal of the first resistor R1 can be connected to the first terminal of the first capacitor C1. The second terminal of the first capacitor C1 can be connected to the second terminal of the inductor L. The first terminal of the sensing resistor RSEN can be connected to the node between the second terminal of the inductor L and the first terminal of the output capacitor Cout.

[0030] It is worth noting that the negative current detection circuit NCS may include a first operational amplifier P1, a first transistor M1, and a second transistor M2.

[0031] The non-inverting input of the first operational amplifier P1 can be connected to the second terminal of the sensing resistor RSEN. The inverting input of the first operational amplifier P1 can be connected to the node between the first terminal of the first capacitor C1 and the second terminal of the first resistor R1. If necessary, the other input of the first operational amplifier P1 can receive a bias current OFS to prevent the first transistor M1 (and such transistors) from overshooting when the current in the inductor L is zero due to the bias of the first operational amplifier P1. Figure 4 , Figure 5 The fifth transistor M5 shown is turned on, forming a leakage path.

[0032] The control terminal of the first transistor M1 can be connected to the output terminal of the first operational amplifier P1. The first terminal of the first transistor M1 can be connected to the non-inverting input terminal of the first operational amplifier P1. The second terminal of the first transistor M1 can be grounded.

[0033] The control terminal of the second transistor M2 can be connected to the output terminal of the first operational amplifier P1. The first terminal of the second transistor M2 can be coupled to a shared voltage (not shown) and can be connected to the non-inverting input terminal of the first operational amplifier P1 and the first terminal of the first transistor M1. The second terminal of the second transistor M2 can be grounded. The current at the first terminal of the second transistor M2 can be used as the current detected by the negative current detection circuit NCS of the power converter in this embodiment.

[0034] If necessary, the power converter in this embodiment may further include a first current mirror circuit MR1. The circuit components and configuration of the first current mirror circuit MR1 are as exemplified in this embodiment, but the invention is not limited thereto. The input terminal of the first current mirror circuit MR1 may be connected to the first terminal of the second transistor M2. The output terminal of the first current mirror circuit MR1 may be the first output terminal of the power converter. The output current of the first current mirror circuit MR1 may be the current detected by the negative current detection circuit NCS of the power converter.

[0035] In detail, the first current mirror circuit MR1 may include a third transistor M3 and a fourth transistor M4. The first terminal of the third transistor M3 and the first terminal of the fourth transistor M4 may be coupled to a shared voltage (not shown). The second terminal of the third transistor M3 may be connected to the first terminal of the second transistor M2, the control terminal of the third transistor M3, and the control terminal of the fourth transistor M4.

[0036] The second terminal of the fourth transistor M4 can be the first output terminal of the power converter. The current at the second terminal of the fourth transistor M4 can be the current detected by the negative current detection circuit NCS of the power converter.

[0037] The ratio of the input current at the input terminal of the first current mirror circuit MR1 (i.e., the second terminal of the third transistor M3) to the output current at the output terminal of the first current mirror circuit MR1 (i.e., the second terminal of the fourth transistor M4) can be 1:K, where K is a proportionality coefficient and can be any appropriate value.

[0038] The first operational amplifier P1 is configured to multiply the difference between the voltage CSN at the non-inverting input terminal of the first operational amplifier P1 and the voltage CSP at the inverting input terminal of the first operational amplifier P1 by a gain value, so as to output a first operational amplified signal to the control terminal of the first transistor M1 and the control terminal of the second transistor M2.

[0039] The difference between voltage CSP and voltage CSN is a voltage value positively correlated with the negative current ILn of inductor L. Therefore, when the negative current ILn flows through inductor L, the negative current Isn flows through sensing resistor RSEN. The negative current detection circuit NCS of the power converter detects a current that is K times the negative current ILn, where the value of K depends on the scaling factor of the first current mirror circuit MR1. It should be understood that when the scaling factor K of the first current mirror circuit MR1 is 1, the current detected by the negative current detection circuit NCS is equal to the negative current ILn of inductor L.

[0040] If necessary, the power converter in this embodiment may include a clamping circuit CLA. The clamping circuit CLA may be connected to the non-inverting input terminal of the first operational amplifier P1 and the first terminal of the first transistor M1, and may be connected between the first terminal of the second transistor M2 and the second terminal of the third transistor M3.

[0041] The clamping circuit CLA can be configured to clamp the first terminal of the first transistor M1 and the first terminal of the second transistor M2 to the same target voltage, so that the current detected by the negative current detection circuit NCS can be reliably K times the negative current ILn.

[0042] [Second Embodiment]

[0043] Please see Figure 2This is a circuit layout diagram of the negative current detection circuit of the power converter with a negative current detection mechanism according to the second embodiment of the present invention. The similarities to the first embodiment are not repeated here.

[0044] For example, the clamping circuit CLA of the negative current detection circuit NCS of the power converter may include an operational amplifier Pa and a transistor Ma, but the present invention is not limited thereto.

[0045] The first terminal of transistor Ma can be connected to the second terminal of the third transistor M3 (i.e., the input terminal of the first current mirror circuit MR1). The second terminal of transistor Ma can be connected to the first terminal of the second transistor M2.

[0046] The non-inverting input of operational amplifier Pa can be connected to the first terminal of the first transistor M1 and the non-inverting input of the first operational amplifier P1. The inverting input of operational amplifier Pa can be connected to the node between the first terminal of the second transistor M2 and the second terminal of transistor Ma. The output of operational amplifier Pa can be connected to the control terminal of transistor Ma.

[0047] [Third Embodiment]

[0048] Please see Figure 3 This is a circuit layout diagram of a power converter with a negative current detection mechanism according to the third embodiment of the present invention. The similarities to the first embodiment are not repeated here.

[0049] In this embodiment, the power converter may further include a negative current limiting circuit (NCLS).

[0050] The negative current limiting circuit NCLS may include a negative current detection circuit NEU. The negative current detection circuit NEU can be directly connected to the second terminal of the fourth transistor M4 and the input terminal of the control circuit included in the trigger circuit. Based on the current magnitude at the second terminal of the fourth transistor M4, the negative current detection circuit NEU outputs a current limiting signal to the trigger circuit, thereby controlling the control circuit included in the trigger circuit to control the drive circuit to turn the upper bridge switch UG and the lower bridge switch LG on or off.

[0051] If necessary, the negative current limiting circuit NCLS may also include a second operational amplifier P2. The non-inverting input of the second operational amplifier P2 can be connected to the second terminal of the fourth transistor M4. The inverting input of the second operational amplifier P2 can be coupled to the reference voltage OCTH. The output of the second operational amplifier P2 can be connected to the input of the negative current detection circuit NEU.

[0052] The second operational amplifier P2 is configured to multiply the difference between the voltage VSEN at the second terminal of the fourth transistor M4 and the reference voltage OCTH by a gain value to output a second operational amplifier signal. The negative current detection circuit NEU, based on the second operational amplifier signal, outputs a current limiting signal to the trigger circuit to control the control circuit contained within the trigger circuit to control the drive circuit to turn the upper bridge switch UG and the lower bridge switch LG on or off.

[0053] If needed, the negative current limiting circuit NCLS may also include a resistor RNCL. The first terminal of resistor RNCL can be connected to the non-inverting input of the second operational amplifier P2. The second terminal of resistor RNCL can be grounded.

[0054] [Fourth Embodiment]

[0055] Please see Figure 4 This is a circuit layout diagram of a power converter with a negative current detection mechanism according to the fourth embodiment of the present invention.

[0056] The power converter in this embodiment may include both a negative current detection circuit (NCS) and a positive current detection circuit (PCS), but the present invention is not limited thereto. In practice, depending on actual needs, only the negative current detection circuit (NCS) can be set in the power converter to detect the negative current ILn of the inductor L, or only the positive current detection circuit (PCS) can be set to detect the positive current ILp of the inductor L.

[0057] The negative current detection circuit NCS in this embodiment can be the same as the negative current detection circuit NCS in the first or second embodiment, and will not be described in detail here. The positive current detection circuit PCS will be described below.

[0058] The positive current detection circuit PCS may include a third operational amplifier P3 and a fifth transistor M5.

[0059] The non-inverting input of the third operational amplifier P3 can be connected to the node between the first terminal of the first capacitor C1 and the second terminal of the first resistor R1. The inverting input of the third operational amplifier P3 is connected to the second terminal of the sensing resistor RSEN. The output of the third operational amplifier P3 can be connected to the control terminal of the fifth transistor M5. The first terminal of the fifth transistor M5 can be coupled to a shared voltage (not shown). The second terminal of the fifth transistor M5 is connected to the inverting input of the third operational amplifier P3. The current ISEN flowing through the first terminal of the fifth transistor M5 can be the current detected by the positive current detection circuit PCS of the power converter.

[0060] If necessary, the positive current detection circuit PCS may also include a second current mirror circuit MR2. The input terminal of the second current mirror circuit MR2 can be connected to the first terminal of the fifth transistor M5. The output terminal of the second current mirror circuit MR2 can serve as the second output terminal of the power converter. The output current of the second current mirror circuit MR2 can be the current detected by the positive current detection circuit PCS of the power converter.

[0061] In detail, the second current mirror circuit MR2 may include a sixth transistor M6 and a seventh transistor M7. The first terminals of the sixth transistor M6 and the seventh transistor M7 may be coupled to a shared voltage (not shown). The second terminal of the sixth transistor M6 may be connected to the first terminal of the fifth transistor M5, the control terminal of the sixth transistor M6, and the control terminal of the seventh transistor M7. The second terminal of the seventh transistor M7 may be the second output terminal of the power converter. The output current of the seventh transistor M7 may be the current detected by the positive current detection circuit PCS of the power converter.

[0062] The ratio of the input current at the input terminal of the second current mirror circuit MR2 (i.e., the second terminal of the sixth transistor M6) to the output current at the output terminal of the second current mirror circuit MR2 (i.e., the second terminal of the seventh transistor M7) can be 1:K, where K is a proportionality coefficient and can be any appropriate value.

[0063] The difference between voltage CSP and voltage CSN is a voltage value related to the positive current ILp of inductor L. Therefore, when the positive current ILp flows through inductor L, the positive current Isp flows through sensing resistor RSEN, and the current detected by the positive current detection circuit PCS is K times the positive current ILp, where the value of K depends on the scaling factor of the second current mirror circuit MR2. It should be understood that when the scaling factor K of the second current mirror circuit MR2 is 1, the current detected by the positive current detection circuit PCS is equal to the positive current ILp of inductor L.

[0064] [Fifth Embodiment]

[0065] Please see Figure 5 and Figure 6 ,in Figure 5 This is a circuit layout diagram of a power converter with a negative current detection mechanism according to the fifth embodiment of the present invention. Figure 6 The waveform diagram shows the signal of the power converter circuit with negative current detection mechanism according to the fifth embodiment of the present invention.

[0066] like Figure 5As shown, the power converter in this embodiment may include an upper bridge switch UG, a lower bridge switch LG, an inductor L, an output capacitor Cout, a first resistor R1, a first capacitor C1, a sensing resistor RSEN, a positive current detection circuit PCS, a negative current detection circuit NCS, and a negative current limiting circuit NCLS. The configuration of these circuit components is the same as described above and will not be repeated here.

[0067] It is worth noting that when the output voltage Vout of the power converter is too small, the positive current detection circuit PCS cannot be used to detect currents less than zero due to the margin voltage of the second current mirror circuit MR2. Therefore, the embodiments of the present invention improve the circuit configuration of the positive current detection circuit PCS to form a negative current limiting circuit NCLS, which is suitable for detecting the negative current ILn of inductor L.

[0068] When the output voltage Vout at the output terminal of the power converter gradually decreases, the negative current detection circuit NEU, based on the frequency pulse width modulation signal FPWMS received from the external circuit, instructs the trigger circuit to open the lower bridge switch LG to discharge the output voltage Vout. At this time, the current IL of the inductor L is negative, and the current ILn flows from the output terminal of the power converter to the lower bridge switch LG and finally to ground.

[0069] When the current IL in inductor L drops to the current threshold, the voltage VSEN at the first input terminal (e.g., the non-inverting input terminal) of the second operational amplifier P2 reaches the reference voltage OCTH. At this time, the negative current detection circuit NEU can output a lower bridge shutdown indication signal NCLPL based on the high-level second operational amplifier signal output by the second operational amplifier P2. The trigger circuit, based on the lower bridge shutdown indication signal NCLPL, outputs an upper bridge turn-on signal Ton to the upper bridge switch UG to turn on the upper bridge switch UG, and outputs an upper bridge turn-on signal Ton to the inverter N1. The upper bridge turn-on signal Ton is inverted to form an inverted signal to the lower bridge switch LG to turn off the lower bridge switch LG.

[0070] After the conduction time of the upper bridge turn-on signal Ton ends, the lower bridge switch LG is turned on, and the upper bridge switch UG is turned off. By alternately switching the upper bridge switch UG and the lower bridge switch LG on for only a short period of time, the current IL of the inductor L is limited to prevent it from dropping below the current threshold, thus preventing the lower bridge switch LG of the power converter from burning out. Figure 6 The switch switching signal CTS shown is high, indicating that the upper bridge switch UG and the lower bridge switch LG are switched.

[0071] In summary, this invention provides a power converter with a negative current detection mechanism. It includes a negative current detection circuit that can detect the negative current of the inductor in real time without adding extra pins or obtaining the on-resistance value of the (replaced) lower bridge switch—that is, even after arbitrarily replacing the lower bridge switch—especially when the power converter outputs a low voltage. When the negative current of the inductor reaches the current threshold, the negative current limiting circuit can instruct the trigger circuit to appropriately switch the upper and lower bridge switches in real time to limit the negative current of the inductor to not exceed the current threshold.

[0072] The above-disclosed content is only a preferred embodiment of the present invention and is not intended to limit the claims of the present invention. Therefore, all equivalent technical changes made based on the description and drawings of the present invention are included in the claims of the present invention.

Claims

1. A power converter with a negative current detection mechanism, characterized in that, The power converter with negative current detection mechanism includes: An upper bridge switch, wherein the first terminal of the upper bridge switch is connected to the input voltage, and the control terminal of the upper bridge switch is connected to a trigger circuit; A lower bridge switch, the first terminal of which is connected to the second terminal of the upper bridge switch, the second terminal of which is grounded, and the control terminal of which is connected to the trigger circuit; An inductor, wherein the first end of the inductor is connected to the node between the second end of the upper bridge switch and the first end of the lower bridge switch; An output capacitor, wherein the first terminal of the output capacitor is connected to the second terminal of the inductor, and the second terminal of the output capacitor is grounded; A first resistor, the first end of which is connected to the first end of the inductor; A first capacitor, wherein a first terminal of the first capacitor is connected to a second terminal of the first resistor, and a second terminal of the first capacitor is connected to a second terminal of the inductor; A sensing resistor, wherein a first terminal of the sensing resistor is connected to a second terminal of the inductor; and Negative current detection circuit, including: A first operational amplifier, wherein the non-inverting input terminal of the first operational amplifier is connected to the second terminal of the sensing resistor, and the inverting input terminal of the first operational amplifier is connected to the first terminal of the first capacitor; The first transistor has its control terminal connected to the output terminal of the first operational amplifier, its first terminal connected to the non-inverting input terminal of the first operational amplifier, and its second terminal grounded. as well as The second transistor has its control terminal connected to the output terminal of the first operational amplifier, its first terminal coupled to a shared voltage and connected to the non-inverting input terminal of the first operational amplifier and the first terminal of the first transistor, and its second terminal grounded.

2. The power converter with negative current detection mechanism according to claim 1, characterized in that, The negative current detection circuit further includes a first current mirror circuit, the input terminal of which is connected to the first terminal of the second transistor, and the output terminal of the first current mirror circuit is the first output terminal of the power converter with negative current detection mechanism.

3. The power converter with negative current detection mechanism according to claim 2, characterized in that, The first current mirror circuit includes a third transistor and a fourth transistor. The first terminal of the third transistor and the first terminal of the fourth transistor are coupled to the shared voltage. The second terminal of the third transistor is connected to the first terminal of the second transistor, the control terminal of the third transistor, and the control terminal of the fourth transistor. The second terminal of the fourth transistor is the first output terminal of the power converter with negative current detection mechanism.

4. The power converter with negative current detection mechanism according to claim 3, characterized in that, The power converter with negative current detection mechanism also includes a clamping circuit connected to the non-inverting input of the first operational amplifier, the first terminal of the first transistor, the first terminal of the second transistor, and the second terminal of the third transistor.

5. The power converter with negative current detection mechanism according to claim 4, characterized in that, The clamping circuit includes an operational amplifier and a transistor. The first terminal of the transistor is connected to the second terminal of the third transistor. The non-inverting input terminal of the operational amplifier is connected to the first terminal of the first transistor and the non-inverting input terminal of the first operational amplifier. The inverting input terminal of the operational amplifier is connected to the first terminal of the second transistor and the second terminal of the third transistor. The output terminal of the operational amplifier is connected to the control terminal of the transistor.

6. The power converter with a negative current detection mechanism according to any one of claims 3 to 5, characterized in that, The power converter with negative current detection mechanism also includes a negative current limiting circuit, which includes a negative current judging circuit. The negative current judging circuit is connected to the second terminal of the fourth transistor and the input terminal of the trigger circuit. The negative current judging circuit is configured to output a current limiting signal to the trigger circuit based on the current at the second terminal of the fourth transistor, so as to control the trigger circuit to turn the upper bridge switch and the lower bridge switch on or off.

7. The power converter with negative current detection mechanism according to claim 6, characterized in that, The negative current limiting circuit further includes a second operational amplifier, the non-inverting input of which is connected to the second terminal of the fourth transistor, the inverting input of which is coupled to a reference voltage, and the output of which is connected to the input of the negative current detection circuit.

8. The power converter with negative current detection mechanism according to claim 7, characterized in that, The negative current limiting circuit also includes a resistor, the first end of which is connected to the non-inverting input of the second operational amplifier, and the second end of which is grounded.

9. The power converter with negative current detection mechanism according to claim 1, characterized in that, The power converter with negative current detection mechanism also includes a positive current detection circuit, which includes a third operational amplifier and a fifth transistor. The non-inverting input of the third operational amplifier is connected to the first terminal of the first capacitor, the inverting input of the third operational amplifier is connected to the second terminal of the sensing resistor, the output of the third operational amplifier is connected to the control terminal of the fifth transistor, the first terminal of the fifth transistor is coupled to the shared voltage, and the second terminal of the fifth transistor is connected to the inverting input of the third operational amplifier.

10. The power converter with a negative current detection mechanism according to claim 9, characterized in that, The positive current detection circuit also includes a second current mirror circuit. The input terminal of the second current mirror circuit is connected to the first terminal of the fifth transistor, and the output terminal of the second current mirror circuit is the second output terminal of the power converter with negative current detection mechanism.

11. The power converter with a negative current detection mechanism according to claim 10, characterized in that, The second current mirror circuit includes a sixth transistor and a seventh transistor. The first terminal of the sixth transistor and the first terminal of the seventh transistor are coupled to the shared voltage. The second terminal of the sixth transistor is connected to the first terminal of the fifth transistor, the control terminal of the sixth transistor, and the control terminal of the seventh transistor. The second terminal of the seventh transistor is the second output terminal of the power converter with negative current detection mechanism.

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