A method, device and storage medium for determining a memory fault repair mode

Abstract

The embodiment of the application provides a method, device and storage medium for determining a memory fault repair mode, relates to the technical field of computers, and can improve memory reliability. The method comprises the following steps: obtaining information of a plurality of row faults, wherein the information of the row faults comprises a sequence of the row faults and a severity of the row faults; the sequence of the row faults is a number of the row faults occurring in a target time period; the target time period is from a time of a previous restart of a server where the memory is located to a time of occurrence of the row faults; determining a first target row fault from the plurality of row faults according to the severity of each of the plurality of row faults; and determining a repair mode of the first target row fault according to the sequence of occurrence of the first target row fault and the severity of the first target row fault.

Description

TECHNICAL FIELD

[0001] Embodiments of the present application relate to the technical field of computer, and in particular, to a method and device for determining a memory fault repair mode and a storage medium. BACKGROUND

[0002] With the wide application of Internet technology, the reliability of memory has become the focus of major enterprises. According to data statistics, Row fault in memory is one of the factors that reduce the reliability of memory and cause server downtime. The traditional way to handle Row fault is the post-package repair (PPR) based way.

[0003] As is known to all, the above-mentioned PPR way divides the memory into a redundant storage area and a storage area; wherein the storage area is used to store data, and the redundant storage area is used to replace the area that has failed in the storage area. The PPR way includes a soft post-package repair (sPPR) way and a hardware post-package repair (hPPR) way; wherein the sPPR way uses the free storage area in the redundant storage area to replace the area that has failed within a predetermined time; the predetermined time includes the time from when the server where the memory is located is triggered to perform sPPR to the next time when the server is restarted. The hPPR way uses the free storage area in the redundant storage area to permanently replace the area that has failed, wherein the triggering time of the sPPR and hPPR ways is the first time when the server where the memory is located is restarted after the fault occurs.

[0004] The specific process of the traditional PPR based way to handle Row fault includes: when the baseboard management controller (BMC) receives the first Row fault information, it records the address of the first Row fault; when it receives the second Row fault information, it records the address of the second Row fault and deletes the address of the first Row fault recorded before. This goes back and forth until the server where the BMC is located is restarted, and the BMC repairs the Row fault recorded last time before the server is restarted according to the preset sPPR or hPPR.

[0005] The above-mentioned BMC handles the target Row fault according to the preset sPPR or hPPR, which will cause the waste of storage resources in the redundant storage area and the reduction of memory reliability. SUMMARY

[0006] Embodiments of the present application provide a method and device for determining a memory fault repair mode and a storage medium, which can improve the reliability of memory.

[0007] To achieve the above object, the embodiments of the present application adopt the following technical solutions:

[0008] In a first aspect, the embodiments of the present application provide a method for determining a memory fault repair mode, the method comprising: obtaining information of a plurality of row faults, wherein the information of the row faults comprises: an order of the row faults and a severity of the row faults; the order of the row faults is a number of row faults occurring in a target time period, and the target time period is from a time of a last restart of a server where the memory is located to a time of occurrence of the row faults; determining a first target row fault from the plurality of row faults according to the severity of each of the plurality of row faults; and determining a repair mode of the first target row fault according to the order of occurrence of the first target row fault and the severity of the first target row fault.

[0009] The method for determining a memory fault repair mode provided by the embodiments of the present application determines the repair mode of the first target row fault according to the order of occurrence of the first target row fault and the severity of the first target row fault; compared with a traditional repair mode of the first target row fault according to a preset sPPR or hPPR (referred to as a preset mode), the scheme of the embodiments of the present application can adaptively select a repair mode of PPR according to the order of occurrence of the first target row fault and the severity of the first target row fault, and therefore, solves the problems of resource waste of a redundant storage area in the memory and reduction of memory reliability caused by inconsistency between an actual repair mode required by the row fault and the preset repair mode in the traditional preset mode.

[0010] In a possible implementation manner, the determination of the repair mode of the first target row fault according to the order of occurrence of the first target row fault and the severity of the first target row fault comprises: when the order of occurrence of the first target row fault is greater than a number threshold, and the severity of the first target row fault is higher than a second severity, or the order of occurrence of the first target row fault is equal to the number threshold, and the severity of the first target row fault is higher than the second severity, or the order of occurrence of the first target row fault is greater than the number threshold, and the severity of the first target row fault is higher than or equal to the second severity, the repair mode of the first target row fault is a hardware row replacement method; or when the order of occurrence of the first target row fault is equal to the number threshold, and the severity of the first target row fault is equal to the second severity, the repair mode of the first target row fault is one of the hardware row replacement method or a software row replacement method; otherwise, the repair mode of the first target row fault is the software row replacement method.

[0011] In a possible implementation manner, the information of the row faults specifically comprises: the order of the row faults and a health score of the row faults, and the health score is used to identify the severity of the row faults.

[0012] In a possible implementation, the information of the plurality of row faults further includes address information and a quantity of Bit faults and / or Cell faults in the row faults, and the address information and the quantity of the Bit faults and / or the Cell faults in the row faults are input into a scoring model to obtain the severity of the plurality of row faults; and the scoring model is configured to evaluate the severity of the row faults.

[0013] In a possible implementation, determining the first target row fault from the plurality of row faults includes: determining the first target row fault from the plurality of row faults according to the severity of each row fault in the plurality of row faults; the plurality of row faults are row faults occurring in the memory in a same restart time interval; the restart time interval indicates a time period from a time of a previous restart of the server to a time of a current restart of the server; and the severity of the first target row fault is greater than or equal to a first severity.

[0014] Compared with a conventional manner of repairing a last row fault occurring in a restart time interval, the embodiments of the present application determine a row fault with a higher severity from at least two row faults according to health scores of the at least two row faults, and then repair the row fault with the higher severity, thereby avoiding repairing a row fault with a lower severity and ignoring a row fault with a higher severity, and thus improving stability of the memory and reducing a probability of service interruption.

[0015] In a possible implementation, when there is a free row in a redundant storage area in the memory, a second target row fault is determined from at least one non-target row fault according to the severity of each non-target row fault in the at least one non-target row fault; the at least one non-target row fault is a non-target row fault occurring in the memory in a same restart time interval; the severity of the second target row fault is higher than or equal to a third severity, and a repair manner of the second target row fault is a software row replacement manner; and the second target row fault is repaired according to the repair manner of the second target row fault.

[0016] Compared with a conventional manner of repairing only the first target row fault, the method for determining a memory fault repair manner provided in the embodiments of the present application, after repairing the first target row fault, if there is a free row in a redundant storage area in the memory, determines a second target row fault with a higher severity and a repair manner of sPPR from at least one non-target row fault, and repairs the second target row fault, thereby improving not only utilization of the redundant storage area but also reliability of the memory.

[0017] In a second aspect, an embodiment of the present application provides a determination apparatus, comprising: an obtaining module and a determination module; the obtaining module is configured to obtain a plurality of row fault information, wherein the row fault information comprises a row fault order and a row fault severity; the row fault order is a number of row faults occurring in a memory within a target time period, and the target time period is from a time of a last restart of a server where the memory is located to a time of occurrence of the row faults; the determination module is configured to determine a first target row fault from the plurality of row faults according to a respective row fault severity of each of the plurality of row faults; and the determination module is further configured to determine a repair method of the first target row fault according to the row fault order of the first target row fault and the row fault severity of the first target row fault.

[0018] In a possible implementation, the determination of the repair method of the first target row fault according to the row fault order of the first target row fault and the row fault severity of the first target row fault comprises: when the row fault order of the first target row fault is greater than a number threshold, and the row fault severity of the first target row fault is higher than a second severity, or the row fault order of the first target row fault is equal to the number threshold, and the row fault severity of the first target row fault is higher than the second severity, or the row fault order of the first target row fault is greater than the number threshold, and the row fault severity of the first target row fault is higher than or equal to the second severity, the repair method of the first target row fault is a hardware row replacement method; or when the row fault order of the first target row fault is equal to the number threshold, and the row fault severity of the first target row fault is equal to the second severity, the repair method of the first target row fault is one of the hardware row replacement method or a software row replacement method; otherwise, the repair method of the first target row fault is the software row replacement method.

[0019] In a possible implementation, the row fault information specifically comprises the row fault order and a health score of the row fault, and the health score is used to identify the row fault severity.

[0020] In a possible implementation, the determination apparatus further comprises a processing module, and the processing module is configured to input address information and a number of Bit faults and / or Cell faults in the row faults included in the plurality of row fault information to a scoring model to obtain the row fault severity of the plurality of row faults; and the scoring model is configured to evaluate the row fault severity.

[0021] In a possible implementation, the determination module is configured to determine the first target row fault from the plurality of row faults according to the respective row fault severity of each of the plurality of row faults, wherein the plurality of row faults are row faults occurring in the memory within a same restart time interval; the restart time interval is used to indicate a time period from a time of a last restart of the server to a time of a current restart of the server; and the row fault severity of the first target row fault is greater than or equal to a first severity.

[0022] In a possible implementation manner, the determining apparatus further includes a repairing module; the determining module is configured to determine a second target row fault from at least one non-target row fault according to respective severities of the at least one non-target row fault when there is a free row in the redundant storage area in the memory; the at least one non-target row fault is a non-target row fault occurring in the memory in the same restart time interval; the severity of the second target row fault is higher than or equal to the third severity, and the repairing manner of the second target row fault is a software row replacement manner; and the repairing module is configured to repair the second target row fault according to the repairing manner of the second target row fault.

[0023] In a third aspect, an embodiment of the present application provides a determining apparatus, including a memory and a processor, the memory being coupled with the processor; the memory is configured to store computer program codes, wherein the computer program codes include computer instructions; when the computer instructions are executed by the processor, the determining apparatus performs the method in any one of the first aspect and possible implementation manners thereof.

[0024] In a fourth aspect, an embodiment of the present application provides a computer readable storage medium, which stores computer instructions, when the computer instructions are run on a computing device, the computing device performs the method in any one of the first aspect and possible implementation manners thereof.

[0025] In a fifth aspect, an embodiment of the present application provides a computer program product, when the computer program product is run on a computer, the computer performs the method in any one of the first aspect and possible implementation manners thereof.

[0026] It should be understood that the beneficial effects achieved by the second aspect to the fifth aspect and corresponding possible implementation manners of the embodiments of the present application can refer to the technical effects of the first aspect and corresponding possible implementation manners, which will not be repeated here. BRIEF DESCRIPTION OF DRAWINGS

[0027] Figure 1 A server hardware structure schematic diagram provided by the embodiment of the present application;

[0028] Figure 2 A server hierarchical structure schematic diagram provided by the embodiment of the present application;

[0029] Figure 3 A method flowchart for determining a memory fault repairing manner provided by the embodiment of the present application Figure 1 ;

[0030] Figure 4 A row fault and restart time relationship schematic diagram provided by the embodiment of the present application;

[0031] Figure 5 A method for determining a memory fault repair method provided by an embodiment of the present application Figure 2 ;

[0032] Figure 6 A method for determining a memory fault repair method provided by an embodiment of the present application Figure 3 ;

[0033] Figure 7 A structure diagram of a determination device provided by an embodiment of the present application. DETAILED DESCRIPTION

[0034] The term "and / or" in this document merely describes an association relationship of associated objects, and indicates that there can be three relationships, for example, A and / or B can represent three cases of existence of A alone, existence of A and B simultaneously, and existence of B alone.

[0035] The terms "first" and "second" and the like in the description and claims of the present application are used to distinguish different objects, and are not used to describe a specific order of the objects. For example, the first preset severity and the second preset severity are used to distinguish different preset severities, and are not used to describe a specific order of the preset severities.

[0036] In the embodiments of the present application, the words "exemplary" or "for example" are used to mean serving as an example, instance, or illustration, in any non-limiting and non-exhaustive sense. Any embodiment or design scheme described as "exemplary" or "for example" in the embodiments of the present application should not be interpreted as being more preferred or advantageous than other embodiments or design schemes. Rather, the use of "exemplary" or "for example" is intended to present relevant concepts in a concrete manner.

[0037] The architecture scenario described in the embodiments of the present application is used to more clearly illustrate the technical solutions of the embodiments of the present application, and does not constitute a limitation on the technical solutions provided by the embodiments of the present application. It can be known by those skilled in the art that, with the evolution of computer systems, the technical solutions provided by the embodiments of the present application are also applicable to similar technical problems.

[0038] First, some concepts involved in the method, device and storage medium for determining a memory fault repair method provided by the embodiments of the present application are explained:

[0039] Row failure: a failure of a corrected error (CE) or an uncorrected error (UCE) occurring in a row (Row) in the memory, wherein the physical granularity of the memory is in descending order: Dimm, Rank, Device, Bank, Row / Column, Cell, Bit; that is, the memory failure includes at least one of the following: Dimm failure, Rank failure, Device failure, Bank failure, Row failure / Column failure, Cell failure, and Bit failure.

[0040] Figure 1 is a schematic diagram of a server provided by an embodiment of the present application, which includes a processor 101, a memory 102, a network interface 103, a bus 104, and a basic input output system (BIOS) chip 105.

[0041] The processor 101 is the control center of the server, and the processor 101 includes one or more CPUs. The CPU can be a single-CPU or a multi-CPU. The processor 101 is configured to read an operating system (OS) in the memory 102, and further generate a virtual OS unit.

[0042] The memory 102 is a cache space, which can cache an operating system program and a software application program, etc. The memory 102 is configured to interact with the processor 101, and send failure information generated in the interaction process to the BIOS chip 105.

[0043] The network interface 103 is a wired interface (port), for example, an FDDI, GE interface. Alternatively, the network interface 103 is a wireless interface. It should be understood that the network interface 103 includes a plurality of physical ports, and the network interface 103 is configured to obtain a feature set, etc.

[0044] The bus 104 is configured to connect the above processor 101, memory 102, network interface 103, and BIOS chip 105 to each other.

[0045] The BIOS chip 105 is configured to run a BIOS system (referred to as BIOS) which is an unalterable startup program inscribed on a read-only memory (ROM) of a motherboard and is the most basic software code loaded on a hardware system of a computer device. The BIOS is responsible for a self-checking program and a self-starting program of a computing system and is the first program after the computer system is started. The main function of the BIOS is to control the basic program after the computer device is started, for example, repairing a row fault sent by the memory 102 when the server is started, wherein each row fault in the memory is caused by a plurality of Bit faults and / or Cell faults; that is, when the number of Bit faults and / or Cell faults in the memory reaches a threshold, the memory reports a row fault. It should be noted that the BIOS chip 105 described below performs a certain step (such as a step of repairing a fault of the memory), which can be understood as that the processor calls the BIOS chip 105 to perform the step.

[0046] Optionally, the server can further include a baseboard management controller (BMC) chip; the BMC chip can be integrated on the motherboard, or can also be plugged on the motherboard. The BMC system is a small operating system independent of the system of the computer device, and the BMC system has a standard network port as an external manifestation and has an independent IP firmware system. In addition, the BMC system does not depend on other hardware (such as a CPU, a memory, etc.) of the computer device, but the BMC chip can interact with the BIOS chip 105, obtain row fault information of the memory 102 sent in the BIOS chip 105, and determine a repair mode of the row fault based on the row fault information. When the BMC chip determines the repair mode of the row fault, the BMC chip sends an address of the row fault to be repaired and the repair mode of the row fault (referred to as repair information) to the BIOS chip 105, so that the BIOS chip 105 repairs the row fault according to the repair information.

[0047] Figure 1 The server shown is only a structural schematic diagram of a server applicable to the embodiments of the present application, and does not limit the server applicable to the embodiments of the present application, for example, the server can further include a persistent storage medium, a communication interface, a communication line, etc., which are not shown in the embodiments of the present application. Figure 1

[0048] The server includes a hardware layer and a software layer, and the software layer is program code running on the hardware layer. The software layer can be further divided into a plurality of layers, and the layers communicate with each other through a software interface. The software layer includes an application layer, an OS layer and a BIOS layer from top to bottom, as shown in Figure 2

[0049] ​​Application layer, including a series of program codes running application programs.

[0050] OS layer, including operating system program codes. The operating system can be Linux, Windows, or vxWorks, etc. The basic processing unit of the OS layer is a memory page. It should be noted that, in the following description, the OS layer performs a certain step, which can be understood as: the processor 101 calls the OS to perform the step.

[0051] BIOS layer, is the most basic software code loaded on the computer hardware system. The BIOS layer is a bottom layer running program below the OS layer, and is an abstraction layer between the computer hardware and the OS layer, used to set up the hardware and prepare for the OS layer to run. The main function of the BIOS layer is power-on, self-test, CPU initialization, memory initialization, detection of input and output devices, and bootable devices and ultimately booting the operating system. It should be noted that, in the following description, the BIOS layer performs a certain step, which can be understood as: the processor 101 calls the BIOS to perform the step.

[0052] Hardware layer, including processors (such as CPUs), memories, memory controllers, and other computer hardware, as shown in Figure 1 .

[0053] It should be noted that the device for executing the method for determining the memory fault repair method provided in the embodiments of the present application (referred to as the determination device) can be the BMC or the processor in the server shown in the above Figure 1 .

[0054] The method for determining the memory fault repair method provided in the embodiments of the present application, as shown in Figure 3 , the method comprises: S300-S320.

[0055] S300, the determination device acquires information of a plurality of row faults.

[0056] It should be noted that the above row fault is a CE fault or a UCE fault occurring in a row (Row) in the physical granularity of the memory.

[0057] Each row fault information in the above plurality of row fault information includes: the occurrence order of the row fault and the health score of the row fault.

[0058] The occurrence order of the row fault is the number of row faults occurring in the memory in a target time period; wherein the target time period is from the time of the last restart of the server where the memory is located to the occurrence time of the row fault; that is, the occurrence order of the row fault is the occurrence order of the row fault in a restart time interval (i.e., the row fault is the row fault occurring in the restart time interval).

[0059] For example, assuming that as shown inFigure 4 As shown, the memory successively reports row faults A-D within a restart interval of the server (point 0 to point E). Then, the occurrence order of row fault A is the number of row faults occurred by the memory within the time period from point 0 to the point of row fault A (target time period), at which time the memory only has row fault A within the target time period. Therefore, the determining apparatus can only identify one row fault within the target time period, and thus the occurrence order of row fault A is 1.

[0060] It should be noted that the occurrence order of the row fault can be obtained by the determining apparatus by counting, or can be obtained by the determining apparatus from other devices or apparatuses.

[0061] In a possible implementation, the occurrence order of the row fault can be obtained by the determining apparatus by counting. For example, after the fault occurs, the determining apparatus can obtain row fault information from the BIOS, including a timestamp of the occurrence of the row fault, and the determining apparatus can count the occurrence order of the row fault within a restart interval according to the timestamp.

[0062] In another possible implementation, the determining apparatus can directly obtain the occurrence order of the row fault from other devices or apparatuses. It should be noted that if the determining apparatus is the BMC, the other devices also include the processor, and if the determining apparatus is the processor, the other devices also include the BMC.

[0063] The health score of the row fault is obtained by inputting the address information and the number of Bit faults and / or Cell faults in the row fault into the scoring model.

[0064] It should be understood that each row fault in the memory is caused by multiple Bit faults and / or Cell faults; that is, when the number of Bit faults and / or Cell faults in the memory reaches a threshold, the memory will report a row fault.

[0065] The scoring model is used to evaluate the severity of the row fault and is trained before step 400. Specifically, the scoring model can use the address information and the number of Bit faults and / or Cell faults in multiple sets of row fault information as training data to train the model; wherein the label of each set of training data is the first health score of the row fault corresponding to the training data. The scoring model can be trained using the processor 101 in the server 100, or can be trained using other devices and then stored in the server 100 for use by the determining apparatus.

[0066] It should be noted that the specific implementation of S300 above can be: the determining device actively obtains information on multiple row faults from other devices; or the other devices actively send information on multiple row faults to the determining device. It should also be noted that if the determining device is a BMC, then the other devices also include the processor; if the determining device is a processor, then the other devices also include the BMC. Specifically, this application does not limit the method of obtaining information on multiple row faults described above.

[0067] S310, The determining device determines the first target row fault from the multiple row faults based on the severity of each row fault.

[0068] The aforementioned multiple row failures refer to row failures that occur in memory within the same restart time interval; where the restart time interval is used to indicate the period from the start time of the last restart of the server where the memory resides to the end time of the current restart of the server.

[0069] For example, such as Figure 3 As shown, point 0 represents the time of the server's first restart, and point E represents the time of the server's second restart. Points AD represent four row faults that occurred in the server's memory between the first restart and the second restart. The restart time intervals are used to indicate the period from point 0 to point E; the multiple row faults are row faults AD corresponding to point AD.

[0070] It should be noted that the specific implementation of S310 mentioned above includes two implementation methods.

[0071] Method 1: The determining device randomly selects the first target row fault from multiple row faults.

[0072] The first target row fault mentioned above is any one of the multiple row faults mentioned above. For example, such as... Figure 4 As shown, if there is a row fault AD within a restart interval, the last row fault D is identified as the first target row fault.

[0073] Method 2: The determining device identifies the first target row fault from among the multiple row faults based on the severity of each fault.

[0074] A health score can be used to identify the severity of a row fault, and the first target row fault mentioned above is the row fault with the highest / greatest severity among multiple row faults (e.g., severity greater than or equal to the first severity level). That is, when the health score is higher, the severity of the row fault is higher, and the first target row fault is the row fault with the highest / greatest health score among multiple row faults; or, when the health score is lower, the severity of the row fault is higher, and the first target row fault is the row fault with the lowest / greatest health score among multiple row faults.

[0075] For example, assume that the multiple row faults are Figure 4 corresponding to points A-D in FIG. 4. The health score of row fault A is 30, the health score of row fault B is 40, the health score of row fault C is 60, and the health score of row fault D is 68. When the health score is larger, the row fault is more serious. Then, the determining apparatus determines the row fault D with the highest health score as the first target row fault. Alternatively, when the health score is smaller, the row fault is more serious. Then, the determining apparatus determines the row fault A with the highest health score as the first target row fault.

[0076] It should be noted that the number of the first target row faults can be one or multiple, and the number of the first target row faults is not limited in the embodiments of the present application.

[0077] S320, the determining apparatus determines the repair mode of the first target row fault according to the occurrence order of the first target row fault and the severity of the first target row fault.

[0078] The repair mode of the first target row fault includes the hPPR mode or the sPPR mode.

[0079] When the health score of the row fault is used to represent the severity of the row fault, and the occurrence order of the row fault corresponds to a larger value and the severity of the row fault is higher, the row fault is more likely to be repaired by the hPPR.

[0080] It should be noted that the specific implementation of S320 is as shown in Figure 5 , including (S510-S520) or (S510 and S530).

[0081] S510, the determining apparatus determines whether the first target row fault meets a target condition according to the occurrence order of the first target row fault and the severity of the first target row fault.

[0082] The target condition is that when the occurrence order of the first target row fault is greater than a number threshold, and the severity of the first target row fault is higher than a second severity, or the occurrence order of the first target row fault is equal to the number threshold, and the severity of the first target row fault is higher than the second severity, or the occurrence order of the first target row fault is greater than the number threshold, and the severity of the first target row fault is higher than or equal to the second severity:

[0083] When the health score is used to represent the severity, there are two cases:

[0084] When the health score is greater, the row fault is more serious, the target condition includes: the occurrence order of the first target row fault is greater than the number threshold, and the health score of the first target row fault is greater than the first health score; or, the occurrence order of the first target row fault is equal to the number threshold, and the health score of the first target row fault is greater than the first health score, or, the occurrence order of the first target row fault is greater than the number threshold, and the health score of the first target row fault is greater than or equal to the first health score.

[0085] When the health score is smaller, the row fault is more serious, the target condition includes: the occurrence order of the first target row fault is greater than the number threshold, and the health score of the first target row fault is less than the first health score; or, the occurrence order of the first target row fault is equal to the number threshold, and the health score of the first target row fault is less than the first health score, or, the occurrence order of the first target row fault is greater than the number threshold, and the health score of the first target row fault is less than or equal to the first health score.

[0086] S520: When the first target row fault meets the target condition, determining the repair mode of the first target row fault includes: hPPR.

[0087] S530: When the first target row fault does not meet the target condition, determining the repair mode of the first target row fault includes: sPPR.

[0088] It should be noted that when the occurrence order of the first target row fault is equal to the number threshold, and the severity of the first target row fault is equal to the second severity; the repair mode of the first target row fault can be hPPR, or sPPR.

[0089] For example, assuming that the number threshold is 3, and the first health score is 70. Assuming that the occurrence order of the first target row fault is 4, and the health score is 71, the repair mode of the first target row fault is hPPR. When the occurrence order of the first target row fault is 4, and the health score is 60, or the repair mode of the first target row fault is sPPR.

[0090] Optionally, the target condition can also be: the occurrence order of the first target row fault is lower than the preset number threshold; or, the severity of the first target row fault is lower than the severity corresponding to the first health score.

[0091] At this time, when the first target row fault meets the target condition, the repair mode of the first target row fault is determined to include: sPPR; when the first target row fault does not meet the target condition, the repair mode of the first target row fault is determined to include: hPPR.

[0092] It should be noted that any one of the above multiple row fault determines the repair method can be achieved by the above S320.

[0093] It should be noted that the execution time of S320 can be after the determination device receives the first target row fault, that is, the determination device receives a row fault and determines the repair method of the row fault; or the determination device can execute after the first target row fault occurs and the server where the memory is located is restarted for the first time. The specific execution time of S310 is not limited in the present application.

[0094] Optionally, after the determination device determines the repair method of the first target row fault, the first target row fault needs to be repaired, which specifically includes S321.

[0095] S321, the determination device repairs the first target row fault according to the repair method of the first target row fault.

[0096] It should be noted that the process of repairing the first target row fault according to the above repair method includes replacing the free row in the redundant storage area of the memory with the fault row in the memory storage area where the first target row fault is located, wherein the free row refers to the storage row Row in the redundant storage area of the memory which is not used to replace the fault row in the storage area.

[0097] When the repair method is sPPR, the repair time (i.e. the execution time of S321) is the next restart time of the server where the memory is located after the first target row fault occurs. When the execution time of S320 is after the determination device receives the first target row fault, the execution time of S321 is the first restart time of the server after the first target row fault occurs. The effective time of the repaired sPPR is from the triggering of sPPR to the next restart of the server.

[0098] For example, as shown in Figure 4 The server starts from the time of the first restart event (i.e. point 0) to the time of the second restart event of the server (i.e. point E); the storage of the server has 4 row fault events, which are row faults A-D; assuming that the row fault C corresponding to point C is the first target row fault, and the repair method of row fault C is sPPR, the determination device triggers sPPR to repair the row fault when the server occurs the second restart event (i.e. point E); the effective time of the sPPR is from the time of the second restart event of the server to the time of the third restart event of the server (i.e. point H).

[0099] When the repair mode is hPPR, the repair time can be the next time of server restart in which the memory is located after the first target row fault occurs; and the effective time after repair is from triggering hPPR to permanent.

[0100] It should be noted that the specific implementation of S321 includes:

[0101] The first implementation: the determining apparatus replaces the first target row fault with the free row in the redundant storage area in the memory according to the repair mode of the first target row fault; that is, the free row in the redundant storage area in the memory is used to replace the fault row pointed by the address of the first target row fault.

[0102] The second implementation: the determining apparatus sends the repair mode of the first target row fault and the address of the first target row fault to other apparatuses in the server, so that the other apparatuses repair the first target row fault according to the repair mode, such as replacing the first target row fault with the free row in the redundant storage area in the memory according to the repair mode of the first target row fault. It should be noted that if the determining apparatus is a BMC, the other apparatuses also include a processor, and if the determining apparatus is a processor, the other apparatuses also include a BMC.

[0103] It should be understood that the address of the first target row fault is used to make the target apparatus determine the fault row in which the first target row fault is located according to the address.

[0104] The method for determining the memory fault repair mode provided by the embodiments of the present application is to determine the repair mode of the first target row fault according to the occurrence order of the first target row fault and the health score of the first target row fault, wherein the health score of the first target row fault is used to represent the severity of the first target row fault; and the first target row fault is repaired according to the determined repair mode. Compared with the traditional way of repairing the first target row fault according to the preset sPPR or hPPR, the scheme of the embodiments of the present application can adaptively select the repair mode of PPR according to the occurrence order of the first target row fault and the severity of the first target row fault, so as to solve the problems of resource waste of the redundant storage area in the memory and reduction of memory reliability caused by the inconsistency between the actual repair mode required by the row fault and the preset repair mode in the traditional preset mode.

[0105] Further, when the way of determining the first target row fault is way 2 in S310; compared with the traditional way of repairing the last occurred row fault in a restart time interval. Embodiments of the application are according to the health scores of the plurality of row faults, determining the row fault with higher severity from the plurality of row faults as the first target row fault; then, repairing the first target row fault with higher severity; thereby avoiding repairing the row fault with lower severity while ignoring the row fault with higher severity, thus, improving the stability of the memory and reducing the probability of service interruption.

[0106] Optionally, in combination with Figure 3 As shown in the method, after the determining device performs S310 or S321, if there is a free row in the redundant storage area in the memory, the determining device performs S610-S630; if there is no free row in the redundant storage area in the memory, the determining device ends the execution of the method. Figure 6 S610, the determining device determines a second target row fault from the at least one non-target row fault according to the severity of each non-target row fault.

[0107] It should be noted that the non-target row fault is a row fault in a restart time interval except the first target row fault determined in S310 above, and the at least one non-target row fault is a non-target row fault occurred in the memory in a restart time interval.

[0108] The severity of the second target row fault is higher than the third severity, and the severity of the second target row fault is lower than the severity of the first target row fault.

[0109] S620, the determining device judges whether the repair way of the second target row fault is sPPR.

[0110] The determination method of the repair way of the second target row fault includes:

[0111] The first implementation mode specifically includes: presetting a repair way for each non-target row fault, and the repair way of the second target row fault is preset. Or; after determining the second target row fault, presetting a repair way for the second target row fault.

[0112] The second implementation mode: according to the occurrence order of the second target row fault and the health score of the second target row fault, the specific determination method is similar to S320 above, which will not be repeated here.

[0113] Exemplarily, as shown in the method, after the determining device performs S310 or S321, if there is a free row in the redundant storage area in the memory, the determining device performs S610-S630; if there is no free row in the redundant storage area in the memory, the determining device ends the execution of the method.

[0114] Figure 4 ​The points A-D in the table correspond to the row faults A-D; the health score of the row fault A is 30, the repair mode of the row fault A is sPPR; the health score of the row fault B is 40, the repair mode of the row fault B is sPPR; the health score of the row fault C is 65, the repair mode of the row fault C is sPPR; the health score of the row fault D is 78, the repair mode of the row fault D is hPPR; the health score corresponding to the preset severity B is 60; when the health score is greater, the severity of the row fault is higher, and the first target row fault is the row fault D. After processing the first target row fault, the determining device determines the row fault C with a health score higher than 60 and a repair mode of sPPR from the three non-target row faults (i.e., the row faults A-C) as a row fault to be processed.

[0115] When the repair mode of the second target row fault is sPPR, S630 is executed.

[0116] It can be understood that the repair mode of the second target row fault is sPPR because the effective time of sPPR is a restart time interval, and the row replaced with the row fault in the redundant storage space in the sPPR mode is released when the first restart time interval ends. When there is a row fault with high severity in the next restart time interval, the idle row is used to replace the fault row.

[0117] When the repair mode of the second target row fault is hPPR, the method ends.

[0118] S630, the determining device repairs the second target row fault according to the repair mode of the second target row fault.

[0119] It can be understood that, because the repair time of hPPR and sPPR in the existing PPR technology is the time after the occurrence of the row fault and the first restart time of the server where the memory is located, the execution time of S630 is the time after the occurrence of the second target row fault and the first restart time of the server where the memory is located.

[0120] It should be noted that the implementation of S630 is similar to that of S321, and the specific description of S630 can refer to the related description of S321 above, which will not be repeated here.

[0121] Compared with the traditional method of repairing only the first target row fault, the method for determining a memory fault repair method provided in the embodiments of the present application can, after repairing the first target row fault, determine a second target row fault with a higher severity degree and an sPPR repair method from at least one non-target row fault, and repair the second target row fault, thereby improving the utilization rate of the redundant storage area and the reliability of the memory.

[0122] Correspondingly, the embodiments of the present application provide a determination apparatus for performing each step of the method for determining a memory fault repair method. The determination apparatus can be divided into functional modules according to the method examples described above. For example, each functional module can be divided according to each function, or two or more functions can be integrated into one processing module. The integrated module can be implemented in the form of hardware or in the form of a software functional module. The division of modules in the embodiments of the present application is illustrative, and is only a logical functional division. In actual implementation, another division mode can be used.

[0123] In the case of dividing each functional module according to each function, Figure 7 A possible structural schematic diagram of the determination apparatus involved in the above embodiments is shown. As shown in the figure, Figure 7 The determination apparatus includes an acquisition module 701 and a determination module 702.

[0124] The acquisition module 701 is configured to acquire information of a plurality of row faults, for example, to perform step S300 in the method embodiments.

[0125] The determination module 702 is configured to determine a first target row fault from the plurality of row faults according to a severity degree of each row fault, for example, to perform step S310 in the method embodiments.

[0126] The determination module 702 is further configured to determine a repair method of the first target row fault according to an occurrence order of the first target row fault and the severity degree of the first target row fault, for example, to perform step S320 in the method embodiments.

[0127] Optionally, the determination apparatus further includes a processing module 703.

[0128] The processing module 703 is configured to input address information and a number of Bit faults and / or Cell faults in the row faults included in the information of the plurality of row faults to a scoring model to obtain the severity degrees of the plurality of row faults.

[0129] Optionally, the determining module 702 is configured to determine the first target row fault from the plurality of row faults according to respective severities of the plurality of row faults.

[0130] Optionally, the determining apparatus further includes a repairing module 704.

[0131] The determining module 702 is configured to determine the second target row fault from the at least one non-target row fault according to respective severities of the at least one non-target row fault, e.g., performing step S320 in the method embodiment.

[0132] The repairing module 704 is configured to repair the second target row fault according to the repairing manner of the second target row fault, e.g., performing step S630 in the method embodiment.

[0133] The modules of the determining apparatus can also be configured to perform other actions in the method embodiments, and all related contents of the steps in the method embodiments can be cited in the function description of the corresponding functional modules, which will not be repeated here.

[0134] Part or all of the steps in the determining module 702, the processing module 703 and the repairing module 704 can be implemented by the processor 101 executing the codes in the memory 102. Figure 1

[0135] ​In the above embodiments, all or part can be implemented by software, hardware, firmware or any combination thereof. When implemented by software, all or part can be implemented in the form of a computer program product. The computer program product includes one or more computer instructions. When loaded and executed on a computer, all or part generates the processes or functions in the embodiments of the present application. The computer can be a general purpose computer, a special purpose computer, a computer network or other programmable apparatus. The computer instructions can be stored in a computer readable storage medium or transferred from one computer readable storage medium to another, for example, the computer instructions can be transferred from one website, computer, server or data center to another via wired (such as coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (such as infrared, wireless, microwave, etc.) mode. The computer readable storage medium can be any available medium accessible by a computer or a data storage device such as a server, data center, etc. integrated with one or more available media. The available medium can be a magnetic medium (such as a floppy disk, a magnetic disk, a magnetic tape), an optical medium (such as a digital video disc (DVD)), or a semiconductor medium (such as a solid state drive (SSD)), etc.

[0136] Through the description of the above embodiments, those skilled in the art can clearly understand that, for the convenience and brevity of description, only the above division of functional modules is taken as an example, and in actual application, the above functions can be completed by different functional modules according to needs, that is, the internal structure of the device is divided into different functional modules to complete all or part of the functions described above. The specific working process of the system, device and unit described above can refer to the corresponding process in the foregoing method embodiments, which will not be repeated here.

[0137] In several embodiments provided in the present application, it should be understood that the disclosed system, device and method can be implemented in other ways. For example, the device embodiments described above are only schematic, for example, the division of the modules or units is only a logical function division, and actual implementation can have another division manner, for example, a plurality of units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between the shown or discussed each other can be indirect coupling or communication connection through some interfaces, devices or units, and can be electrical, mechanical or other forms.

[0138] The units described as separate components may or may not be physically separate, and the components displayed as units may or may not be physical units, that is, may be located in one place, or may be distributed to multiple network units. Part or all of the units can be selected according to actual needs to achieve the purpose of the embodiment scheme.

[0139] In addition, each functional unit in each embodiment of the present application can be integrated in one processing unit, or each unit can be physically present alone, or two or more units can be integrated in one unit. The integrated unit can be realized in the form of hardware or in the form of a software functional unit.

[0140] The integrated unit, if realized in the form of a software functional unit and sold or used as an independent product, can be stored in a computer-readable storage medium. Based on such understanding, the technical solutions of the present application, essentially or the part that contributes to the prior art, or all or part of the technical solutions can be embodied in the form of a software product. The computer software product is stored in a storage medium, including a number of instructions to make a computer device (which can be a personal computer, a server, or a network device, etc.) or a processor execute all or part of the steps of the methods described in each embodiment of the present application. The aforementioned storage medium includes: flash memory, mobile hard disk, read-only memory, random access memory, magnetic disk or optical disk, and various media that can store program codes.

[0141] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any changes or replacements within the technical scope disclosed in the present application should be covered in the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. A method for determining memory fault repair methods, characterized in that, The method includes: Information on multiple row failures is obtained, wherein the row failure information includes: the order of the row failures and the severity of the row failures; the order of occurrence of the row failures is the number of row failures that occurred in the memory within a target time period, and the target time period is from the time of a single restart of the server where the memory resides to the time of occurrence of the row failure; A first target row fault is determined from the plurality of row faults based on the severity of each of the plurality of row faults; When the occurrence order of the first target row fault is greater than the quantity threshold, and the severity of the first target row fault is higher than the second severity; or, the occurrence order of the first target row fault is equal to the quantity threshold, and the severity of the first target row fault is higher than the second severity; or, the occurrence order of the first target row fault is greater than the quantity threshold, and the severity of the first target row fault is higher than or equal to the second severity: The repair method for the first target row fault is a hardware row replacement method; Alternatively, when the order of occurrence of the first target row fault is equal to the quantity threshold, and the severity of the first target row fault is equal to the second severity level: The repair method for the first target row fault is either a hardware row replacement method or a software row replacement method; Otherwise, the fault in the first target line is repaired by software line replacement.

2. The method according to claim 1, characterized in that, The information on row faults specifically includes: the order of the row faults and the health score of the row faults, wherein the health score is used to identify the severity of the row faults.

3. The method according to claim 1 or 2, characterized in that, The information regarding the multiple row faults also includes: address information and the number of bit faults and / or cell faults within the row faults; the method further includes: The address information and quantity are input into the scoring model to obtain the severity of the multiple row faults; the scoring model is used to assess the severity of the row faults.

4. The method according to claim 1 or 2, characterized in that, Determining the first target row fault from the plurality of row faults includes: Based on the severity of each of the multiple row faults, the first target row fault is determined from the multiple row faults; wherein, the multiple row faults are row faults that occur in the memory within the same restart time interval; the restart time interval is used to indicate the time period from the start time of the last restart of the server to the end time of the current restart of the server; the severity of the first target row fault is greater than or equal to a first severity level.

5. The method according to claim 1 or 2, characterized in that, The method further includes: When there are free rows in the redundant storage area of ​​the memory, a second target row fault is determined from the at least one non-target row fault according to the severity of each of the at least one non-target row faults; wherein, the at least one non-target row fault is a non-target row fault that occurs in the memory within the same restart time interval; the severity of the second target row fault is higher than or equal to the third severity, and the repair method of the second target row fault is software row replacement. Repair the second target row fault according to the repair method for the second target row fault.

6. A determining device, characterized in that, The determining device includes: an acquisition module and a determining module; The acquisition module is used to acquire information on multiple row faults, wherein the row fault information includes: the order of the row faults and the severity of the row faults; the order of occurrence of the row faults is the number of row faults that occurred in the memory within a target time period, and the target time period is from the time of a single restart of the server where the memory resides to the time of occurrence of the row fault; The determining module is configured to determine a first target row fault from the plurality of row faults based on the severity of each of the plurality of row faults. The determining module is further configured to, when the occurrence order of the first target row fault is greater than the quantity threshold and the severity of the first target row fault is higher than the second severity; or, the occurrence order of the first target row fault is equal to the quantity threshold and the severity of the first target row fault is higher than the second severity; or, the occurrence order of the first target row fault is greater than the quantity threshold and the severity of the first target row fault is higher than or equal to the second severity: the repair method for the first target row fault is a hardware row replacement method; Alternatively, when the occurrence order of the first target row fault is equal to the quantity threshold, and the severity of the first target row fault is equal to the second severity level: the repair method for the first target row fault is one of the hardware row replacement method or the software row replacement method; Otherwise, the fault in the first target line is repaired by software line replacement.

7. The determining device according to claim 6, characterized in that, The information on row faults specifically includes: the order of the row faults and the health score of the row faults, wherein the health score is used to identify the severity of the row faults.

8. The determining device according to claim 6 or 7, characterized in that, The determining device further includes: a processing module; The processing module is used to input the address information and number of bit faults and / or cell faults in the row faults included in the information of the multiple row faults into the scoring model to obtain the severity of the multiple row faults; the scoring model is used to evaluate the severity of the row faults.

9. The determining device according to claim 6 or 7, characterized in that, The determining module is configured to determine the first target row fault from the plurality of row faults based on the severity of each row fault; wherein the plurality of row faults are row faults that occur in the memory within the same restart time interval; the restart time interval is used to indicate the time period from the start time of the last restart of the server to the end time of the current restart of the server; the severity of the first target row fault is greater than or equal to a first severity level.

10. The determining device according to claim 6 or 7, characterized in that, The determining device further includes: a repair module; The determining module is configured to, when there are free rows in the redundant storage area of ​​the memory, determine a second target row fault from the at least one non-target row fault based on the severity of each of the at least one non-target row faults; wherein the at least one non-target row fault is a non-target row fault that occurs in the memory within the same restart time interval; the severity of the second target row fault is higher than or equal to the third severity, and the repair method for the second target row fault is a software row replacement method; The repair module is used to repair the second target row fault according to the repair method for the second target row fault.

11. A computing device, characterized in that, The device includes a memory and a processor, the memory being coupled to the processor; the memory is used to store computer program code, the computer program code including computer instructions; when the computer instructions are executed by the processor, the processor causes the processor to perform the method as described in any one of claims 1 to 5.

12. A server, characterized in that, It includes a memory, a processor, and a BMC; at least one of the BMC or the processor is used to perform the method as described in any one of claims 1 to 5.

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