Display device, personal immersive system using the same, and mobile terminal system
By using switching elements on the display panel of a personal immersive device, and processing pixel data separately according to the needs of the focus area and the non-focus area, the problem of difficulty in reducing power consumption in the prior art is solved, and efficient energy efficiency performance is achieved.
Patent Information
- Application Number
- CN202210514861.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2021-05-28
- Filing Date
- 2022-05-11
- Publication Date
- 2025-05-23
- Estimated Expiration
- 2042-05-11
AI Technical Summary
Existing personal immersive devices have difficulty maintaining perceived image quality while reducing power consumption and cannot reduce power consumption to satisfactory levels.
By introducing a switching element on the display panel, adjacent sub-pixels are electrically connected or separated in response to a control signal, and pixel data is processed separately in the focus area and the non-focus area, reducing the brightness and resolution of the non-focus area.
Without reducing image quality, power consumption and electromagnetic interference (EMI) are significantly reduced, improving the energy efficiency performance of the device.
Smart Images

Figure CN115410508B_ABST
Abstract
Description
[0001] CROSS-REFERENCE TO RELATED APPLICATIONS
[0002] This application claims priority to and the benefit of Korean Patent Application No. 10-2021-0068873, filed on May 28, 2021, the disclosure of which is incorporated herein by reference. Technical Field
[0003] The present disclosure relates to a display device and a personal immersive system and a mobile terminal system using the display device. Background Art
[0004] Virtual reality technology is developing fastest in the fields of defense, architecture, tourism, film, multimedia and games. Virtual reality refers to the use of stereoscopic image technology to perceive a specific environment or situation similar to the real environment.
[0005] Various forms of personal immersive devices have been developed, such as head mounted displays (HMDs), face mounted displays (FMDs), and glasses type displays (EGDs). Personal immersive devices are divided into virtual reality (VR) devices and augmented reality (AR) devices.
[0006] Although there have been various studies on reducing power consumption in personal immersive devices without degrading perceived image quality, the power consumption cannot be reduced to a satisfactory level. Summary of the invention
[0007] The object of the present disclosure is to address the above-mentioned needs and / or problems.
[0008] The present disclosure provides a personal immersive system and a mobile terminal system capable of reducing power consumption without reducing perceived image quality.
[0009] The object of the present disclosure is to address the above-mentioned needs and / or problems.
[0010] A display device according to an embodiment of the present disclosure may include: a display panel arranged with multiple data lines, multiple gate lines, and multiple sub-pixels electrically connected to the data lines and the gate lines; and a display driver configured to drive the display panel by writing pixel data into the sub-pixels.
[0011] At least a portion of the display panel may include a switching element configured to electrically connect adjacent sub-pixels to each other in response to a first logic value of a control signal and to electrically separate adjacent sub-pixels from each other in response to a second logic value of the control signal.
[0012] Upon receiving pixel data to be written to a focus area on the display panel at which the user is gazing, the display driver may apply a second logic value of the control signal to the switching element.
[0013] Upon receiving pixel data to be written to a non-focus area outside the focus area on the display panel, the display driver may apply a first logic value of the control signal to the switching element.
[0014] A personal immersive system according to an embodiment of the present disclosure may include: a system controller configured to make a resolution of an input image in a non-focus area outside a focus area lower than a resolution of an input image in a focus area at which a user is looking; and a display driver configured to write pixel data of a focus area and pixel data of a non-focus area into pixels of a display panel, provide a black grayscale voltage to at least some pixels of the non-focus area on the display panel, and generate a control signal for making the brightness of the non-focus area lower than the brightness of the focus area.
[0015] A mobile terminal system according to an embodiment of the present disclosure may include: a system controller configured to make a resolution of an input image in a non-focus area outside a focus area lower than a resolution of an input image in a focus area focused by a user; and a display driver configured to write pixel data of a focus area and pixel data of a non-focus area into pixels of a display panel, provide a black grayscale voltage to at least some pixels of the non-focus area on the display panel, and generate a control signal for making the brightness of the non-focus area lower than the brightness of the focus area.
[0016] In each of the personal immersive system and the mobile terminal system, at least a portion of a screen of the display panel may include a switching element configured to connect adjacent sub-pixels to each other in response to a first logic value of a control signal, and to separate adjacent sub-pixels from each other in response to a second logic value of the control signal.
[0017] In the present disclosure, a switching element can be used to drive all pixels in a non-focus area other than a focus area that a user is looking at at once, and a black grayscale voltage can be applied to some pixels in the non-focus area to reduce the brightness of the non-focus area that the user cannot perceive, thereby reducing power consumption without reducing image quality. Since the focus area is reproduced at a high resolution on the display panel, the image quality perceived by the user is hardly degraded.
[0018] In the present disclosure, power consumption and electromagnetic interference (EMI) may be reduced by reducing the amount of pixel data transmitted to a data driver and the number of conversions in a non-focus area.
[0019] The effects of the present disclosure are not limited to those mentioned above, and other effects not mentioned will be clearly understood by those skilled in the art from the description of the claims. BRIEF DESCRIPTION OF THE DRAWINGS
[0020] The above and other objects, features and advantages of the present disclosure will become more apparent to those skilled in the art by describing in detail exemplary embodiments thereof with reference to the accompanying drawings, in which:
[0021] Figure 1 is a block diagram schematically illustrating a display device according to an embodiment of the present disclosure;
[0022] Figure 2 is a diagram illustrating a focus area on a screen;
[0023] Figure 3 is a flow chart illustrating the operation of the display driver;
[0024] Figure 4A and Figure 4B is a specific example Figure 1 A diagram of a display driver and a display panel shown;
[0025] Figure 5 is a circuit diagram illustrating an example of a pixel circuit;
[0026] Figure 6 is a diagram illustrating the operation of a display driver in a focus area;
[0027] Figure 7 is an equivalent circuit diagram schematically illustrating the operation of adjacent sub-pixels in a focus area;
[0028] Figure 8 is a diagram illustrating the operation of a display driver in a non-focus area;
[0029] Figure 9 is an equivalent circuit diagram schematically illustrating the operation of adjacent sub-pixels in a non-focus area;
[0030] Figure 10 and Figure 11 is a circuit diagram illustrating a switching element connected to three adjacent sub-pixels;
[0031] Figure 12 and Figure 13 is a circuit diagram illustrating a switching element connected to four adjacent sub-pixels;
[0032] Figure 14 is a diagram illustrating an example in which the brightness of a non-focus area gradually decreases as the distance from the focus area increases;
[0033] Figure 15 is a diagram illustrating a row of pixels in a non-focus area;
[0034] Figure 16 is an example for transferring the data to be written Figure 15A diagram of input / output signals of a timing controller for data in pixels of one pixel row shown;
[0035] Figure 17 is a diagram illustrating a row of pixels passing through a focus area and a non-focus area;
[0036] Figure 18 is an example for transferring the data to be written Figure 17 A diagram of input / output signals of a timing controller for data in pixels of one pixel row shown;
[0037] Figure 19 is a schematic diagram illustrating a display driver according to another embodiment of the present disclosure;
[0038] Figure 20 is an example Figure 19 A circuit diagram of the operation of the data driver in the focus area shown in ;
[0039] Figure 21 is an example Figure 19 0 is a circuit diagram of the operation of the data driver in a non-focus area. DETAILED DESCRIPTION
[0040] The advantages and features of the present disclosure and methods for implementing the same will be more clearly understood from the embodiments described below with reference to the accompanying drawings. However, the present disclosure is not limited to the following embodiments, but may be implemented in various different forms. On the contrary, the present embodiment will make the disclosure of the present disclosure more complete and enable those skilled in the art to fully understand the scope of the present disclosure. The present disclosure is limited only within the scope of the appended claims.
[0041] The shapes, sizes, proportions, angles, quantities, etc. shown in the accompanying drawings for describing the embodiments of the present disclosure are merely examples, and the present disclosure is not limited thereto. Throughout this specification, the same reference numerals generally represent the same elements. In addition, when describing the present disclosure, detailed descriptions of known related technologies may be omitted to avoid unnecessarily obscuring the subject matter of the present disclosure.
[0042] Terms such as "including," "comprising," "having," and "consisting of" used herein are generally intended to allow the addition of other components unless these terms are used with the term "only." Any reference to the singular may include the plural unless explicitly stated otherwise.
[0043] Even if not explicitly stated, components are interpreted as including ordinary margins of error.
[0044] When terms such as “on,” “above,” “below,” and “next” are used to describe the positional relationship between two components, one or more components may be located between the two components unless these terms are used together with the term “immediately” or “directly.”
[0045] The terms "first", "second", etc. may be used to distinguish components, but the function or structure of a component is not limited by the sequence number or the name of the component in front of the component.
[0046] Like reference numerals may refer to substantially like elements throughout this disclosure.
[0047] The following embodiments may be combined or combined with each other in part or in whole, and may be linked and operated in various technical ways. These embodiments may be performed independently of each other or in association with each other.
[0048] In the following description, when it is determined that the detailed description of a known function or configuration related to the present disclosure may unnecessarily obscure the gist of the present disclosure, the detailed description thereof will be omitted.
[0049] Hereinafter, various embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.
[0050] Reference Figure 1 and Figure 2 , the display device of the present disclosure includes a display panel 100, a system controller 300, a display driver 200, and the like.
[0051] The system controller 300 may include a main circuit board of a television (TV) system, a computer system, a set-top box, a navigation system, a mobile terminal system, a wearable system, or a virtual / augmented reality system (hereinafter referred to as a "VR / AR system"). In the following, it should be noted that the system controller 300 is mainly described based on a virtual reality system, but is not limited thereto.
[0052] The system controller 300 is connected to the sensor 310, the camera 320, etc. The system controller 300 also includes an external device interface connected to a memory or an external video source, a user interface for receiving a user command, a power supply for generating electricity, etc. The external device interface, the user interface, the power supply, etc. are omitted in the figure. The system controller 300 adjusts the resolution of the focus area and the non-focus area by using a graphic image processing unit such as a graphic processing unit (GPU) for performing image processing of an input image. The external device interface can be implemented with various well-known interface modules, such as a universal serial bus (USB) and a high-definition multimedia interface (HDMI).
[0053] The system controller 300 transmits the pixel data of the input image and the timing signal synchronized therewith to the display driver 200. The system controller 300 analyzes the image data from the camera 320, which captures the left and right eyes of the user using a preset eye tracking algorithm to estimate the focus area to which the left and right eyes of the user are pointed. The system controller 300 adjusts the resolution of the input image in the focus area and the non-focus area outside the focus area by using a foveated rendering algorithm. The system controller 300 converts the pixel data resolution of the input image according to the resolution of the focus area and the non-focus area by using a scaler.
[0054] In the case of a VR / AR system, since the user's eyes are very close to the screen AA of the display panel 100, a high resolution greater than or equal to 4K is required. The foveated rendering algorithm can improve the resolution of pixel data corresponding to the focus area displayed on the display panel 100 by using pupil position information, and can reduce the amount of transmitted data and the number of conversions by repeatedly constructing the same data based on a predetermined pixel block in a non-focus area outside the focus area. The foveated rendering algorithm can reduce the amount of data transmitted to the display driver 200 by 80% or more by encoding the pixel data of the pixels to be written in the focus area as a representative value.
[0055] The system controller 300 may transmit high-resolution data to the display driver 200 by increasing or not decreasing the resolution of pixel data to be written to the pixels of the focus area on the display panel 100. In this regard, the system controller 300 may gradually or stepwise decrease the resolution of the pixel data from the center to the edge of the focus area. The system controller 300 significantly decreases the resolution of the non-focus area to reduce the amount of data transmission and the number of conversions.
[0056] In VR / AR systems, due to the inherent characteristics of the optic nerve, users can only perceive low-resolution images reproduced in pixels in non-focus areas outside the focus area. Figure 2 The settings shown provide a range of resolution compression that reduces data transfer while not reducing perceived image quality.
[0057] In the VR system, considering the distance between the user's pupil and the screen AA, the focus area can be set to a size with a diameter of 2.8 mm. The focus area can be divided into N (N is a positive integer greater than or equal to 2) areas from the center to the edge. In the case of dividing the focus area into three areas with different resolutions, if the pixel data resolution of the first area FR1 corresponding to the center of the focus area is 100%, the pixel data resolution of the second area FR2 outside the first area FR1 can be reduced to 25%, and the pixel data resolution of the third area FR3 outside the second area FR2 can be reduced to 11.1%. The resolution of the non-focus area NFR can be 6.2%. The diameter of the first area FR1 can be set to 1.2 mm, the diameter of the second area FR2 can be set to 1.9 mm, and the diameter of the third area FR3 can be set to 2.8 mm, but are not limited to this. In the VR system, the focus area can be approximately 2% of the entire screen AA.
[0058] The sensor 310 includes various sensors such as a gyro sensor and an acceleration sensor. The sensor 310 transmits the outputs of the various sensors to the system controller 300. The system controller 300 may receive the outputs of the sensor 310 and move the pixel data of the image displayed on the screen AA in synchronization with the movement of the user. Therefore, the position of the focus area on the screen AA may be changed in synchronization with the movement of the pupil and the head of the user.
[0059] like Figure 3 As shown, when the display driver 200 receives pixel data of an input image from the system controller 300 through the interface receiving circuit (step S1), the display driver 200 writes the pixel data into the pixels of the display panel 100. The display driver 200 can reduce the brightness of the pixel data written into the pixels of the non-focus area to reduce power consumption.
[0060] The display driver 200 writes high-resolution pixel data to the pixels of the focus area on the screen AA of the display panel 100 (steps S2 and S3). The resolution of the pixel data in the focus area may be gradually or stepwise reduced from the center to the edge. On the other hand, the display driver 200 writes low-resolution pixel data to the pixels of the non-focus area outside the focus area, and makes the brightness of the non-focus area lower than the brightness of the focus area (steps S2 and S4).
[0061] Figure 4A and Figure 4B is a specific example Figure 1 A diagram of a display driver and a display panel is shown.
[0062] Reference Figure 4A, the display device of the present disclosure includes a first display panel 100A, a second display panel 100B, and a display driver for driving the first display panel 100A and the second display panel 100B.
[0063] The first display panel 100A and the second display panel 100B may be implemented as a display panel for displaying an image in a flat panel display device such as a liquid crystal display device (LCD) or an electroluminescent display device. According to the material of the light-emitting layer, the electroluminescent display device may be divided into an inorganic light-emitting display device and an organic light-emitting display device. An example of an inorganic light-emitting display device is a quantum dot display device. Hereinafter, the display device will be mainly described as an organic light-emitting display device, but is not limited thereto.
[0064] The first display panel 100A may be a display panel for the left eye, and the second display panel 100B may be a display panel for the right eye, but is not limited thereto. In the case of a mobile terminal system such as a smartphone, the left eye image and the right eye image may be displayed together on the display panel. Figure 4B On the screen AA of one display panel 100 shown. In the case of a smartphone, a VR mode is supported as an example of a partial mode. In the VR mode of the smartphone, the left eye image and the right eye image can be displayed separately on one display panel. In the mobile terminal system according to the present disclosure, the left eye image and the right eye image can be displayed on one display panel in the VR mode, and the brightness of the image displayed in the non-focus area outside the high-resolution focus area can be controlled to be lower than the brightness in the focus area of each left eye image and right eye image.
[0065] Each display panel 100A and 100B includes a data line to which pixel data of an input image is applied, a gate line (or a scanning line) to which a gate signal is applied, and pixels arranged in a matrix form by a cross structure of the data line and the gate line. An image is displayed in a pixel array arranged on a screen AA of the display panel 100A and 100B.
[0066] Each pixel may be divided into sub-pixels 101 such as a red sub-pixel, a green sub-pixel, and a blue sub-pixel to reproduce colors. Each pixel may also include a white sub-pixel. In the case of an organic light-emitting display device, each sub-pixel 101 may include Figure 5 The pixel circuit shown is, but not limited to, this.
[0067] In a personal immersive system such as a VR / AR system, a left-eye image having lower brightness in a non-focus area than in a focus area may be displayed on the first display panel 100A. A right-eye image having lower brightness in a non-focus area than in a focus area may be displayed on the second display panel 100B.
[0068] existFigure 4A In the display panel 100A and the display panel 100B, the pixel rows L1, L2, ..., Ln include a row of pixels on which pixel data is simultaneously written for one horizontal period. When the resolution of the screen AA is m*n, the screen AA includes n pixel rows L1, L2, ..., Ln. Figure 4B In the display panel 100 , data are simultaneously written into pixels P of one pixel line.
[0069] The display driver 200 writes data of an input image to the display panels 100A and 100B. The display driver 200 includes data drivers 111 and 112, gate drivers 121 and 122, a timing controller 130, and the like.
[0070] The first data driver 111 and the first gate driver 121 are connected to the first display panel 100A to drive the first display panel 100A under the control of the timing controller 130. The second data driver 112 and the second gate driver 122 are connected to the second display panel 100B to drive the second display panel 100B under the control of the timing controller 130.
[0071] In the case of mobile terminal systems, such as Figure 4B As shown, the data driver and the timing controller may be built into the drive IC D-IC.
[0072] The data drivers 111 and 112 convert pixel data from the timing controller 130 into a data voltage using the gamma compensation voltage and output the data voltage to the data line 102. The data drivers 111 and 112 convert black gray data set separately from the pixel data of the input image into a black gray voltage using the gamma compensation voltage under the control of the timing controller 130, and can output the black gray voltage to the data line 102. Therefore, the pixel data voltage or the black gray voltage can be applied to each sub-pixel 101 via the data line 102.
[0073] The gate drivers 121 and 122 output gate signals (or scan signals) synchronized with pixel data to the gate lines 104. The gate drivers 121 and 122 include shift registers for sequentially supplying gate signals to the gate lines G1 to Gn by shifting pulses of the gate signals.
[0074] The timing controller 130 transmits the pixel data of the input image received from the system controller 300 to the data drivers 111 and 112. The timing controller 130 may transmit the black grayscale data together with the pixel data to the data drivers 111 and 112. The timing controller 130 receives a timing signal synchronized with the pixel data of the input image from the system controller 300, and controls the operation timing of the data drivers 111 and 112 and the gate drivers 121 and 122 based on the timing signal.
[0075] The timing controller 130 may count the pixel data of the input image as a clock to determine the position of the pixel where the pixel data is written. The timing controller 130 transmits a control signal for controlling the pixel brightness of the focus area and the non-focus area to the data drivers 111 and 112, and if the pixel data of the input image is to be written to the pixel belonging to the non-focus area, activates a control signal for reducing the pixel brightness to control the pixel brightness of the non-focus area to be lower than the pixel brightness of the focus area.
[0076] exist Figure 4B In the embodiment, the driving IC D-IC may be electrically connected to the system controller 300 through a flexible printed circuit (FPC), and may be electrically connected to the gate driver 120 and the data line 102 on the display panel 100. The driving IC D-IC includes a data driver and a timing controller. Therefore, the driving IC D-IC converts the pixel data received from the system controller 300 into a data voltage to be provided to the data line 102, and controls the operation timing of the gate driver 120. The driving IC D-IC generates a control signal for reducing the brightness of the pixel P in the non-focus area, so that the brightness of the pixel P in the non-focus area is reduced in response to the control signal.
[0077] In a mobile terminal system such as a smartphone, a left eye image with lower brightness in a non-focus area and a right eye image with lower brightness in a non-focus area can be displayed on one display panel 100 .
[0078] Each sub-pixel 101 includes a pixel circuit for driving the light-emitting element OLED. The pixel circuit is not limited to Figure 5 The situation shown.
[0079] Reference Figure 5 The pixel circuit includes a light emitting element OLED, a driving element DT for providing current to the light emitting element OLED, a switching element M01 for connecting the data line 102 to the driving element DT in response to a scan pulse SCAN, and a capacitor Cst connected to the gate of the driving element DT. Each of the driving element DT and the switching element M01 can be implemented with a transistor.
[0080] The pixel driving voltage VDD is applied to the first electrode of the driving element DT through the power line 103. The switching element M01 is turned on in response to the gate-on voltage of the gate signal SCAN to provide the data voltage Vdata to the gate of the driving element DT and the capacitor Cst. The driving element DT supplies current to the light emitting element OLED according to the gate-source voltage Vgs to drive the light emitting element OLED.
[0081] The anode of the light emitting element OLED is connected to the second electrode of the driving element DT, and the cathode is connected to the low potential voltage source VSS. When the forward voltage between the anode and the cathode is equal to or greater than the threshold voltage, the light emitting element OLED turns on to emit light. The capacitor Cst is connected between the gate and source of the driving element DT to maintain the gate-source voltage Vgs of the driving element DT.
[0082] like Figure 7 and Figure 9 As shown, in at least a portion of the screen AA, adjacent sub-pixels can be connected through the switch element SW. When pixel data is written into the sub-pixel in the focus area and black grayscale data is written into the sub-pixel adjacent thereto, if the sub-pixel is short-circuited through the switch element SW, the current I OLED The brightness of the pixel data is reduced by discharging the adjacent sub-pixels. The switch element SW can be implemented by a transistor.
[0083] The display driver 200 may write pixel data into any one of n (n is a positive integer greater than or equal to 2) sub-pixels adjacent to each other in the non-focus area, and may write preset black grayscale data into other sub-pixels. Figure 8 and Figure 9 As shown, when pixel data of a sub-pixel to be written to a non-focus area is received, the timing controller 130 can apply a control signal BREN of an activation logic value for controlling the on / off of the switching element SW to the control electrode (or gate) of the switching element SW to turn on the switching element SW, thereby controlling the brightness of the non-focus area to be lower than the brightness of the focus area.
[0084] Figure 6 is a diagram illustrating the operation of the display driver in a focus area. Figure 7 is an equivalent circuit diagram schematically illustrating the operation of adjacent sub-pixels in a focus area.
[0085] Reference Figure 6 and Figure 7 , the timing controller 130 receives the pixel data DATA of the input image from the system controller 300 through the interface receiving circuit. As described above, the pixel data DATA of the non-focus area has a lower resolution than the pixel data DATA of the focus area.
[0086] The interface receiving circuit can encode N (N is a positive integer greater than or equal to 2) pixel data into a data packet and send it to the timing controller 130. The decoder in the timing controller 130 can decode each received data packet and transmit the N pixel data to the data driver 110 in sequence.
[0087] The timing controller 130 includes a control signal output terminal 130 a. The data driver 110 includes a control signal input terminal 110 a and an output terminal 110 b. The data driver 110 converts the pixel data D received from the timing controller 130 into a data voltage Vdata and supplies it to the data line 102 .
[0088] In at least a portion of the screen AA, adjacent sub-pixels SP1 and SP2 are connected to each other through a switching element SW. The switching element SW may be connected between anodes of the light emitting elements OLED in the adjacent sub-pixels SP1 and SP2, but is not limited thereto.
[0089] When receiving pixel data of the focus area, the timing controller 130 outputs a control signal BREN of an inactive logic value, for example, a logic value of 0 (or low). As a result, the switch element SW connected between the adjacent sub-pixels SP1 and SP2 in the focus area is turned off, so that the sub-pixels SP1 and SP2 are electrically separated from each other. In this case, the data voltage Vdata of the pixel data is independently charged in each of the sub-pixels SP1 and SP2. Therefore, the current I OLED The light flows through the light emitting element OLED in each of the sub-pixels SP1 and SP2 of the focus area, and the light emitting element OLED emits light at a brightness corresponding to a gray level of the pixel data.
[0090] Figure 8 is a diagram illustrating the operation of the display driver in a non-focus area. Figure 9 is an equivalent circuit diagram schematically illustrating the operation of adjacent sub-pixels in a non-focus area.
[0091] Reference Figure 8 and Figure 9, when receiving the pixel data DATA of the non-focus area, the timing controller 130 may send the black grayscale data B stored in the memory together with the pixel data D to the data driver 110. When receiving the data of the non-focus area, the data driver 110 provides the data voltage Vdata of the pixel data to the odd data lines 102 and provides the black grayscale voltage Vblk to the even data lines 102. Therefore, the data voltage Vdata of the pixel data is applied to one of the adjacent sub-pixels SP1 and SP2 in the non-focus area, and the black grayscale voltage Vblk is applied to the other sub-pixel. In the case of the sub-pixel to which the black grayscale voltage Vblk is applied, the driving element DT of the sub-pixel is not turned on, but due to the current applied from its adjacent sub-pixel through the switching element SW, the current will flow through the light-emitting element OLED, so that the light-emitting element OLED can emit low brightness light. If the black grayscale voltage Vblk is applied to all sub-pixels connected through the switching element SW, the current will not flow through the light-emitting element OLED in the sub-pixel, so that the sub-pixel does not emit light.
[0092] Upon receiving pixel data of the non-focus area, the timing controller 130 outputs a control signal BREN of an activation logic value, for example, a logic value 1 (or high). As a result, the switch element SW connected between the adjacent sub-pixels SP1 and SP2 in the non-focus area is turned on. When the switch element SW is turned on, the anodes of the light emitting elements OLED formed in the adjacent sub-pixels SP1 and SP2 are short-circuited.
[0093] When the sub-pixels SP1 and SP2 are short-circuited by the switching element SW, the data voltage Vdata of the pixel data is charged into the first sub-pixel SP1, and the black grayscale voltage Vblk is applied to the second sub-pixel SP2. As a result, the current I flowing through the light emitting element OLED of the first sub-pixel SP1 OLED The electric current flows through two light emitting elements OLED formed in adjacent sub-pixels SP1 and SP2.
[0094] If it is assumed that the light emitting elements OLED formed in the adjacent sub-pixels SP1 and SP2 have the same electrical characteristics when the switch element SW is turned on, since the impedances of the two light emitting elements OLED are the same, half of the current I OLED As a result, the amount of current flowing through the light emitting elements OLED in the adjacent sub-pixels SP1 and SP2 connected to the switching element SW is reduced to about 1 / 2 (I OLED / 2) level.
[0095] When the adjacent sub-pixels SP1 and SP2 in the non-focus area are short-circuited by the switching element SW, even if the pixel data of the peak white grayscale (or the highest grayscale) is applied to the sub-pixels in the focus area and the non-focus area, the brightness of the sub-pixels in the non-focus area becomes lower than the brightness of the sub-pixels in the focus area. Therefore, in the present disclosure, power consumption can be significantly reduced by reducing the brightness in the non-focus area without causing the user to perceive image quality degradation.
[0096] The switching element for reducing the brightness of the sub-pixel in the non-focus area can be as follows Figures 10 to 13 By using these sub-pixels, the brightness of the pixels in the non-focus area can be gradually reduced as the distance from the focus area increases. Figure 14 As shown, the non-focus region NFR can be divided into a first non-focus region NFR1 close to the focus region FR and a second non-focus region NFR2 relatively far from the focus region FR. The first non-focus region NFR1 is a pixel region between the focus region FR and the second non-focus region NFR2.
[0097] The first non-focal area NFR1 may include Figure 7 and Figure 9 The second non-focus region NFR2 may include Figures 10 to 13 Sub-pixels SP1 to SP4 are shown in FIG.
[0098] exist Figure 10 and Figure 11 In the embodiment shown, three sub-pixels are connected to each other via a switch element SW. Figure 11 As shown in FIG. 1 , when the switch element SW is turned on, the current flowing through the light emitting element OLED of the sub-pixel can be reduced to about 1 / 3 (I OLED / 3). Figure 12 and Figure 13 In the embodiment shown, four sub-pixels are connected to each other via a switch element SW. Figure 13 As shown in FIG. 1 , when the switch element SW is turned on, the current flowing through the light emitting element OLED of the sub-pixel can be reduced to about 1 / 4 (I OLED / 4). Therefore, as the number of sub-pixels to which the switching element SW is connected increases, the brightness of the non-focus regions NFR1 and NFR2 can be controlled to be lower.
[0099] When applying pixel data of the same grayscale to all pixels of the screen AA, you can use Figure 7 and Figure 9 The pixel circuit shown controls the brightness of the first non-focus area NFR1 to be lower than the brightness of the focus area FR, and can use Figures 10 to 13The pixel circuit shown in FIG. 1 controls the brightness of the second non-focus region NFR2 to be lower than the brightness of the first non-focus region NFR1 .
[0100] The control signal BREN may be generated, and the number of bits in the control signal BREN corresponds to the number of pixel groups divided in one pixel row. For example, when one pixel row is divided into ten pixel groups, the timing controller 130 may output a 10-bit control signal BREN[9:0] for one horizontal period.
[0101] Figure 15 is a diagram illustrating one pixel row in a non-focus area. Figure 16 is an example for transferring the data to be written Figure 15 FIG. 1 is a diagram showing input / output signals of a timing controller for the data of pixels in a pixel row. Figure 16 , "TCON" represents the timing controller 130. "D" is pixel data, and "B" is black grayscale data. "SOP" is a start code assigned to the beginning of pixel data of one pixel row input to the timing controller 130, and "EOP" is an end code assigned to the end of pixel data of one pixel row. Assume that the first pixel row L1 includes only sub-pixels of the non-focus region NFR. In this case, the timing controller 130 may receive the pixel data of the input image, add the black grayscale data between the pixel data to be applied to the first pixel row L1 during the first horizontal period, and send it to the data driver 110. For example, the timing controller 130 may send data decoded into a pair of data including pixel data D and black grayscale data B to the data driver 110.
[0102] Figure 17 is a diagram illustrating one pixel row passing through a focus area and a non-focus area. Figure 18 is an example for transferring the data to be written Figure 17 A diagram of input / output signals of a timing controller for pixel data in one pixel row is shown.
[0103] Figure 17The i-th (i is a positive integer) pixel row Li shown in may exist in the focus area that the user is gazing at. When the user's gaze moves, the focus area also moves. The timing controller 130 may receive the pixel data of the input image, and rearrange the data of the sub-pixels to be written in the non-focus area NFR into a pair of data decoded as pixel data D and black grayscale data B in the pixel data to be applied to the i-th pixel row Li during the i-th horizontal period. Then, the timing controller 130 may send the data to the data driver 110 in synchronization with the activated logic value of the control signal BREN. In addition, the timing controller 130 may send the pixel data D of the sub-pixels of the focus area FR to the data driver 110 in synchronization with the inactivated logic value of the control signal BREN in the pixel data to be applied to the i-th pixel row Li.
[0104] exist Figure 16 and Figure 18 , the timing controller 130 receives pixel data DATA0 to DATAX, and transmits a total of X pixel data of sub-pixels to be written to one pixel row to the data driver 110 using the decoder. In N_DATA0 to N-DATAX, "8" is the number of repetitions of the same pixel data. When the decoder receives one pixel data, such as DATA0, it sends the pixel data according to the number of times defined by the number of repetitions. "SOP (start of packet)" is the start code of a data packet containing pixel data of one pixel row, and "EOP (end of packet)" is the end code of the data packet.
[0105] Figure 19 is a diagram illustrating a display driver according to another embodiment of the present disclosure.
[0106] Reference Figure 19 , the timing controller 131 receives the pixel data of the input image from the system controller 300 through the interface receiving circuit. As described above, the resolution of the pixel data D of the non-focus region NFR is lower than the resolution of the pixel data D of the focus region FR.
[0107] In at least a portion of the screen AA, adjacent sub-pixels SP1 and SP2 are connected through a switching element SW. The switching element SW is connected between anodes of the light emitting elements OLED in the adjacent sub-pixels SP1 and SP2.
[0108] When receiving the pixel data D of the focus region FR, the timing controller 131 outputs the control signal BREN of the inactive logic value. When receiving the pixel data D of the non-focus region NFR, the timing controller 131 outputs the control signal BREN of the active logic value.
[0109] The data driver 111 receives the pixel data D and the control signal BREN from the timing controller 130. The data driver 111 converts the black gray data B into a black gray voltage in response to the active logic value of the control signal BREN. When the control signal BREN is an inactive logic value, the data driver 111 does not output the black gray voltage. In the present embodiment, the timing controller 131 may not output the black gray data, and may generate the black gray voltage in the data driver 111.
[0110] In the focus region FR, the switch element SW connected between the adjacent sub-pixels SP1 and SP2 is turned off to electrically separate the sub-pixels SP1 and SP2 from each other. OLED The electric current flows through the light emitting element OLED in each of the sub-pixels SP1 and SP2 of the focus region FR, so that the light emitting element OLED emits light at a brightness corresponding to a gray level of the pixel data.
[0111] In the non-focus region NFR, the switch element SW connected between the adjacent sub-pixels SP1 and SP2 is turned on to transfer the current I OLED Allocation to the light emitting elements OLED formed in the sub-pixels SP1 and SP2 causes the luminance of the sub-pixels SP1 and SP2 to decrease.
[0112] Figure 20 is an example Figure 19 0 is a circuit diagram of the operation of the data driver 111 in the focus area shown in FIG.
[0113] Reference Figure 20 , the data driver 111 includes a plurality of pixel data channels CH1 and CH3 and a plurality of switchable channels CH2 and CH4.
[0114] Each of the pixel data channels CH1 and CH3 converts the pixel data D to be written to the pixels of the focus region FR and the non-focus region NFR into a data voltage Vdata and outputs the data voltage. When receiving the pixel data D of the focus region FR, each of the switchable channels CH2 and CH4 converts the pixel data D into a data voltage Vdata to output the data voltage, and when receiving the pixel data D of the non-focus region NFR, each of the switchable channels CH2 and CH4 outputs a black grayscale voltage Vblk.
[0115] Each of the channels CH1 to CH4 includes a sample-and-hold connected to a signal transmission unit SR of a shift register, a digital-to-analog converter (hereinafter referred to as “DAC”), and an output buffer SA.
[0116] The shift register includes a signal transmission unit SR for sequentially shifting input data. The multiplexer MUX and the first demultiplexer DEMUX1 are alternately connected between the signal transmission units SR. For example, the multiplexer MUX may be connected between the Mth (M is a positive integer) signal transmission unit SR(M) and the (M+1)th signal transmission unit SR(M+1). The first demultiplexer DEMUX1 may be connected between the (M+1)th signal transmission unit SR(M+1) and the (M+2)th signal transmission unit SR(M+2). When the multiplexer MUX is connected to the input end of the signal transmission unit SR, the first demultiplexer DEMUX1 is connected to the output end of the signal transmission unit SR. In addition, the first demultiplexer DEMUX1 is connected to the input end of the next signal transmission unit SR, and the multiplexer MUX is connected to the output end of the next signal transmission unit SR.
[0117] Each switchable channel CH2 and CH4 further comprises a second demultiplexer DEMUX2 connected between the DAC and the output buffer SA.
[0118] Upon receiving the pixel data D of the sub-pixel to be written to the focus region FR, the timing controller 131 outputs the control signal BREN of the inactive logic value. In this case, in response to the inactive logic value of the control signal BREN, the multiplexer MUX and the first demultiplexer DEMUX1 connect the adjacent signal transmission units SR to each other to allow the pixel data D to be sequentially transmitted to the next signal transmission unit SR. The multiplexer MUX may transmit the pixel data from the Mth signal transmission unit SR(M) to the (M+1)th signal transmission unit SR(M+1) in response to the inactive logic value of the control signal BREN, and may transmit the pixel data from the Mth signal transmission unit SR(M) to the first demultiplexer DEMUX1 in response to the active logic value of the control signal BREN. The first demultiplexer DEMUX1 can transmit pixel data from the (M+1)th signal transmission unit SR(M+1) to the (M+2)th signal transmission unit SR(M+2) in response to the inactive logic value of the control signal BREN, and can transmit pixel data from the Mth signal transmission unit SR(M) to the (M+2)th signal transmission unit SR(M+2) in response to the active logic value of the control signal BREN.
[0119] In channels CH1 to CH4 , the sample holder SH samples data received from the signal transmission unit SR of the shift register and simultaneously outputs the sampled data in synchronization with a clock.
[0120] The DAC of each pixel data channel CH1 and CH3 converts the pixel data from the sample holder SH into a data voltage Vdata and outputs the data voltage The data voltage Vdata outputted from the DAC of each pixel data channel CH1 and CH3 is applied to the data line 102 through the output buffer SA.
[0121] The DAC of each switchable channel CH2 and CH4 converts the pixel data from the sample holder SH into a data voltage Vdata and outputs the data voltage.
[0122] A first input terminal of the second demultiplexer DEMUX2 is connected to the output terminal of the DAC of the switchable channels CH2 and CH4, and a black gray voltage Vblk is applied to a second input terminal of the second demultiplexer DEMUX2. An output terminal of the second demultiplexer DEMUX2 is connected to an input terminal of an output buffer SA provided in the switchable channels CH2 and CH4. The black gray voltage Vblk may be generated within the data driver 111 or may be generated from the outside and applied to the second demultiplexer DEMUX2.
[0123] The second demultiplexer DEMUX2 applies the data voltage Vdata from the DAC to the output buffer SA in response to the inactive logic value of the control signal BREN. The second demultiplexer DEMUX2 applies the black grayscale voltage Vblk to the output buffer SA in response to the active logic value of the control signal BREN. As a result, in the focus region FR, the data voltage Vdata from the DAC of the switchable channels CH2, CH4 is applied to the data line 102 through the second demultiplexer DEMUX2 and the output buffer SA.
[0124] When the data driver 111 receives the pixel data of the focus area, the data driver outputs the data voltage Vdata of the pixel data in all the channels CH1 to CH4.
[0125] Figure 21 is an example data driver in Figure 15 and Figure 16 A circuit diagram showing the operation in a non-focus area.
[0126] Reference Figure 21, when receiving the pixel data D of the sub-pixel to be written in the non-focus region NFR, the timing controller 131 outputs the control signal BREN of the activation logic value. In this case, in response to the activation logic value of the control signal BREN, the multiplexer MUX and the first demultiplexer DEMUX1 connect the signal transmission units SR of the pixel data channels CH1 and CH3 to each other through the bypass line passing through the signal transmission unit SR of the switchable channels CH2 and CH4. Therefore, when the data driver 111 receives the pixel data of the non-focus region NFR, the pixel data D is sequentially transmitted only through the signal transmission units of the pixel data channels CH1 and CH3 in the shift register. In this case, the pixel data D is not transmitted to the signal transmission units SR, the sample holder SH, and the DAC in the switchable channels CH2 and CH4.
[0127] In the pixel data channels CH1 and CH3 , the sample holder SH samples the data received from the signal transmission unit SR of the shift register and simultaneously outputs the sampled data in synchronization with the clock.
[0128] The DAC of each pixel data channel CH1 and CH3 converts the pixel data from the sample holder SH into a data voltage Vdata and outputs the data voltage The data voltage Vdata outputted from the DAC of each pixel data channel CH1 and CH3 is applied to the data line 102 through the output buffer SA.
[0129] In the DAC of each switchable channel CH2 and CH4, the second demultiplexer DEMUX2 connects the black gray voltage Vblk to the input terminal of the output buffer SA in response to the activation logic value of the control signal BREN. Therefore, in the non-focus area, the black gray voltage Vblk is applied to the data line 102 through the second demultiplexer DEMUX2 of each switchable channel CH2 and CH4 and the output buffer SA.
[0130] The above-mentioned objectives to be achieved by the present disclosure, means for achieving the objectives and effects of the present disclosure do not specifically describe the essential features of the claims, and therefore, the scope of the claims is not limited to the disclosure of the present disclosure.
[0131] Although the embodiments of the present disclosure have been described in more detail with reference to the accompanying drawings, the present disclosure is not limited thereto and may be implemented in many different forms without departing from the technical concept of the present disclosure. Therefore, the embodiments disclosed in the present disclosure are only for illustrative purposes and are not intended to limit the technical concept of the present disclosure. The scope of the technical concept of the present disclosure is not limited thereto. Therefore, it should be understood that the above-mentioned embodiments are exemplary in all aspects and do not limit the present disclosure. The scope of protection of the present disclosure shall be based on the attached claims, and all technical concepts within their equivalent scope shall be understood to fall within the scope of protection of the present disclosure.
Claims
1. A display device, include: A display panel, wherein the display panel is arranged with a plurality of data lines, a plurality of gate lines, and a plurality of sub-pixels electrically connected to the data lines and the gate lines; as well as a display driver configured to drive the display panel by writing pixel data to the sub-pixels, Wherein, at least a portion of the display panel includes: a switching element configured to electrically connect adjacent sub-pixels to each other in response to a first logic value of the control signal, and to electrically separate adjacent sub-pixels from each other in response to a second logic value of the control signal, The display driver is configured to apply the second logic value of the control signal to the switch element when receiving pixel data to be written to a focus area on the display panel where the user is looking, and to apply the first logic value of the control signal to the switch element when receiving pixel data to be written to a non-focus area other than the focus area on the display panel. Wherein, the display driver comprises: a timing controller configured to receive pixel data of the focus area and pixel data of the non-focus area; and a data driver configured to convert the pixel data from the timing controller into a data voltage to supply the data voltage to the data line, and supply a black gray voltage to the data line, Wherein, the data driver comprises: a plurality of pixel data channels configured to convert pixel data to be written into sub-pixels of the focus area and the non-focus area into data voltages and output the data voltages; a plurality of switchable channels configured to convert pixel data into data voltages and output the data voltages when receiving pixel data of the focus area, and to output a black grayscale voltage when receiving pixel data of the non-focus area; a shift register including a plurality of signal transmission units configured to sequentially shift pixel data received from the timing controller; a multiplexer, the multiplexer being connected between the Mth signal transmission unit and the M+1th signal transmission unit, where M is a positive integer; and a first demultiplexer, wherein the first demultiplexer is connected between the M+1th signal transmission unit and the M+2th signal transmission unit, Wherein, the switchable channels include: A sample holder, the sample holder being connected to a signal transmission unit of the shift register; a digital-to-analog converter configured to convert the pixel data from the sample-and-hold device into a data voltage; an output buffer configured to output a data voltage from the digital-to-analog converter to a data line; and A second demultiplexer is connected between the digital-to-analog converter and the output buffer.
2. The display device according to claim 1, in, The pixel data to be written to the sub-pixels of the focus area includes data having a higher resolution than the pixel data to be written to the sub-pixels of the non-focus area.
3. The display device according to claim 2, in, The display driver is configured to write pixel data into one of n adjacent sub-pixels in the non-focus area, and write preset black grayscale data into other sub-pixels, where n is a positive integer greater than or equal to 2.
4. The display device according to claim 1, in, When pixel data of the same grayscale are written into the sub-pixels of the focus area and the non-focus area, the brightness of the non-focus area is lower than the brightness of the focus area.
5. The display device according to claim 1, in, The non-focus area is divided into two or more pixel areas whose brightness gradually decreases as the distance from the focus area increases.
6. The display device according to claim 1, in, The timing controller is configured to generate a control signal of the first logic value when receiving pixel data of the non-focus area, and to generate a control signal of the second logic value when receiving pixel data of the focus area.
7. The display device according to claim 6, in, The timing controller includes an output terminal for outputting the control signal, and the data driver includes an input terminal for inputting the control signal.
8. The display device according to claim 6, in, Upon receiving the pixel data of the non-focus area, the timing controller adds black grayscale data between the pixel data and transmits the black grayscale data to the data driver.
9. The display device according to claim 8, in, The data driver is configured to convert the black grayscale data into a black grayscale voltage and provide the black grayscale voltage to the data line of the non-focus area.
10. The display device according to claim 1, in, The switch element is configured to electrically connect anodes of light emitting elements of adjacent sub-pixels to each other in response to a first logic value of the control signal, and to electrically separate anodes of light emitting elements of adjacent sub-pixels from each other in response to a second logic value of the control signal.
11. The display device according to claim 1, in, The pixel data channel includes: A sample holder, the sample holder being connected to a signal transmission unit of the shift register; a digital-to-analog converter configured to convert the pixel data from the sample-and-hold device into a data voltage; and An output buffer is configured to output a data voltage from the digital-to-analog converter to a data line.
12. The display device according to claim 1, in, The multiplexer is configured to transmit pixel data from the Mth signal transmission unit to the M+1th signal transmission unit in response to the second logic value of the control signal, and transmit pixel data from the Mth signal transmission unit to the first demultiplexer in response to the first logic value of the control signal, The first demultiplexer is configured to transmit pixel data from the M+1th signal transmission unit to the M+2th signal transmission unit in response to the second logic value of the control signal, and to transmit pixel data from the Mth signal transmission unit to the M+2th signal transmission unit in response to the first logic value of the control signal.
13. The display device according to claim 12, in, The second demultiplexer comprises: a first input terminal connected to an output terminal of the digital-to-analog converter; a second input terminal, through which a black grayscale voltage is applied; and an output terminal connected to the output buffer, The second demultiplexer is configured to apply the data voltage from the digital-to-analog converter to the output buffer in response to the second logic value of the control signal, and to apply the black grayscale voltage to the output buffer in response to the first logic value of the control signal.
14. A personal immersive system, include: a system controller configured to make the resolution of the input image in the non-focus area outside the focus area lower than the resolution of the input image in the focus area at which the user is gazing; as well as a display driver configured to write pixel data of a focus area and pixel data of a non-focus area into pixels of a display panel, provide a black grayscale voltage to at least some pixels of the non-focus area on the display panel, and generate a control signal for making the brightness of the non-focus area lower than the brightness of the focus area, wherein at least a portion of the screen of the display panel includes a switch element, the switch element being configured to connect adjacent sub-pixels to each other in response to a first logic value of a control signal, and to separate adjacent sub-pixels from each other in response to a second logic value of the control signal, Wherein, the display driver comprises: a timing controller configured to receive pixel data of the focus area and pixel data of the non-focus area; and a data driver configured to convert the pixel data from the timing controller into a data voltage to supply the data voltage to the data line, and supply a black gray voltage to the data line, Wherein, the data driver comprises: a plurality of pixel data channels configured to convert pixel data to be written into sub-pixels of the focus area and the non-focus area into data voltages and output the data voltages; a plurality of switchable channels configured to convert pixel data into data voltages and output the data voltages when receiving pixel data of the focus area, and to output a black grayscale voltage when receiving pixel data of the non-focus area; a shift register including a plurality of signal transmission units configured to sequentially shift pixel data received from the timing controller; a multiplexer, the multiplexer being connected between the Mth signal transmission unit and the M+1th signal transmission unit, where M is a positive integer; and a first demultiplexer, wherein the first demultiplexer is connected between the M+1th signal transmission unit and the M+2th signal transmission unit, Wherein, the switchable channels include: A sample holder, the sample holder being connected to a signal transmission unit of the shift register; a digital-to-analog converter configured to convert the pixel data from the sample-and-hold device into a data voltage; an output buffer configured to output a data voltage from the digital-to-analog converter to a data line; and A second demultiplexer is connected between the digital-to-analog converter and the output buffer.
15. The personal immersive system of claim 14, in, The display panel comprises: a first display panel on which a left-eye image having a brightness in a non-focus area lower than that in a focus area is displayed; and A second display panel is provided on which a right eye image having a brightness in a non-focus area lower than a brightness in a focus area is displayed.
16. A mobile terminal system, include: a system controller configured to make the resolution of the input image in the non-focus area outside the focus area lower than the resolution of the input image in the focus area at which the user is gazing; as well as a display driver configured to write pixel data of a focus area and pixel data of a non-focus area into pixels of a display panel, provide a black grayscale voltage to at least some pixels of the non-focus area on the display panel, and generate a control signal for making the brightness of the non-focus area lower than the brightness of the focus area, wherein at least a portion of the screen of the display panel includes a switch element, the switch element being configured to connect adjacent sub-pixels to each other in response to a first logic value of a control signal, and to separate adjacent sub-pixels from each other in response to a second logic value of the control signal, Wherein, the display driver comprises: a timing controller configured to receive pixel data of the focus area and pixel data of the non-focus area; and a data driver configured to convert the pixel data from the timing controller into a data voltage to supply the data voltage to the data line, and supply a black gray voltage to the data line, Wherein, the data driver comprises: a plurality of pixel data channels configured to convert pixel data to be written into sub-pixels of the focus area and the non-focus area into data voltages and output the data voltages; a plurality of switchable channels configured to convert pixel data into data voltages and output the data voltages when receiving pixel data of the focus area, and to output a black grayscale voltage when receiving pixel data of the non-focus area; a shift register including a plurality of signal transmission units configured to sequentially shift pixel data received from the timing controller; a multiplexer, the multiplexer being connected between the Mth signal transmission unit and the M+1th signal transmission unit, where M is a positive integer; and a first demultiplexer, wherein the first demultiplexer is connected between the M+1th signal transmission unit and the M+2th signal transmission unit, Wherein, the switchable channels include: A sample holder, the sample holder being connected to a signal transmission unit of the shift register; a digital-to-analog converter configured to convert the pixel data from the sample-and-hold device into a data voltage; an output buffer configured to output a data voltage from the digital-to-analog converter to a data line; and A second demultiplexer is connected between the digital-to-analog converter and the output buffer.
17. The mobile terminal system according to claim 16, in, A left eye image and a right eye image are displayed on the display panel, the left eye image having lower brightness in the non-focus area than in the focus area, and the right eye image having lower brightness in the non-focus area than in the focus area.
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