A memristor based on titanium dioxide / oxide / two-dimensional easily oxidizable thin layer and its preparation method

Abstract

The present invention relates to a memristor based on titanium dioxide / tin oxide / two-dimensional easily oxidized thin layers and a preparation method thereof. The method comprises: transferring the two-dimensional easily oxidized thin layer to a substrate using a mechanical exfoliation method; depositing a first electrode and a second electrode at both ends of the two-dimensional easily oxidized thin layer; heating the substrate in air to form a thin oxide layer with stable resistive switching behavior on the surface of the two-dimensional easily oxidized thin layer; depositing a thin layer of metal Ti on the oxide layer; heating the substrate in air to oxidize the metal Ti layer to form a thin TiO2 layer; and depositing a third electrode on the TiO2 layer. This memristor combines the stable resistive switching behavior exhibited by the oxide layer with the different oxygen vacancy concentrations in the titanium dioxide and oxide layers. The memristive behavior exhibits spatial electric field direction dependence, presenting the advantages of low power consumption, high resistivity, high stability, and ease of preparation.

Description

Technical Field

[0001] The present invention relates to the fourth field of passive basic component devices, and in particular to a memristor based on titanium dioxide / oxide / two-dimensional easily oxidizable thin layer and a preparation method thereof. Background Art

[0002] The three basic passive components in traditional circuit theory can be derived from the algebraic relationship between the four fundamental variables: current, voltage, charge, and magnetic flux. At the end of the 20th century, a fourth, lost passive basic circuit component was proposed, characterizing the relationship between charge and magnetic flux, and was named the memristor. Titanium is highly susceptible to oxidation, forming titanium dioxide. In 2008, HP Labs discovered that the hysteresis loop that appears during a voltage sweep in titanium dioxide is a memristive phenomenon, and constructed a memristive device model. However, the current flowing in the high-resistance state of titanium dioxide is still large, making it difficult to achieve extremely high integration density and resulting in high power consumption. Summary of the Invention

[0003] The primary purpose of the present invention is to provide a titanium dioxide / oxide / two-dimensional easily oxidized thin layer memristor and its preparation method, wherein the memristor uses a two-dimensional easily oxidized thin layer with high doping rate and high mobility (for example, a two-dimensional single crystal SnSe2 thin layer or a two-dimensional BP thin layer), which is heated in air to form an oxide thin layer with stable resistive switching behavior (for example, a SnO2 thin layer or a PO4 thin layer). x Thin layer), a two-dimensional easily oxidized thin layer and its oxide thin layer and titanium dioxide construct a heterojunction, which combines the stable resistive switching behavior characteristics exhibited by the oxide thin layer, and combines the different characteristics of oxygen vacancy concentrations in titanium dioxide and the oxide thin layer. The resistive behavior shows dependence on the direction of the spatial electric field, presenting the advantages of low power consumption, high resistivity, high stability and easy preparation.

[0004] The present invention provides a simple and easy preparation method. This preparation method uses a mechanical exfoliation process to obtain a two-dimensional easily oxidizable thin layer. The two-dimensional easily oxidizable thin layer is then heated in air to obtain a thin oxide layer with stable resistive switching behavior. A thin titanium layer is deposited on the oxide layer. The Ti layer is then heated in air to obtain a thin layer of TiO2, forming a memristor with a titanium dioxide / oxide / two-dimensional easily oxidizable thin layer heterojunction. This preparation method is simple, technically mature, with readily available equipment, low cost, and strong operability.

[0005] The present invention provides a method for preparing a memristor based on titanium dioxide / oxide / two-dimensional easily oxidizable thin layer, comprising the following steps:

[0006] A mechanical exfoliation method was used to transfer the two-dimensional easily oxidizable thin layer onto the substrate;

[0007] Depositing a first electrode and a second electrode at both ends of the two-dimensional easily oxidizable thin layer;

[0008] Heating the substrate in air to form an oxide thin layer with stable resistive switching behavior on the surface of the two-dimensional easily oxidizable thin layer;

[0009] Depositing a metal Ti thin layer on the oxide thin layer;

[0010] heating the substrate in air to oxidize the metal Ti thin layer to form a TiO2 thin layer;

[0011] A third electrode is deposited on the TiO2 thin layer.

[0012] Furthermore, the two-dimensional easily oxidized thin layer is a SnSe2 thin layer with a thickness of 20 to 40 nm or a BP thin layer with a thickness of 10 to 20 nm.

[0013] Furthermore, in the step of transferring the two-dimensional easily oxidizable thin layer to the substrate using a mechanical stripping method, a tape is used to adhere the two-dimensional easily oxidizable thin layer to obtain a tape adhered with a two-dimensional easily oxidizable thin layer, and PDMS is used to adhere the tape with the two-dimensional easily oxidizable thin layer to obtain a two-dimensional easily oxidizable thin layer / PDMS. The PDMS with one side adhered to the two-dimensional easily oxidizable thin layer is covered on the surface of the substrate. By utilizing the different adhesion properties of the material to the substrate and the PDMS, the PDMS is lifted to obtain the two-dimensional easily oxidizable thin layer transferred to the surface of the substrate. The two-dimensional easily oxidizable thin layer (for example, a SnSe2 thin layer) obtained by this stripping method is larger and more uniform than the two-dimensional easily oxidizable thin layer (such as a SnSe2 thin layer) obtained by directly stripping a two-dimensional easily oxidizable thin layer tape (such as a SnSe2 single crystal tape) from the substrate, and has less residual adhesive.

[0014] Furthermore, when the two-dimensional easily oxidized thin layer is a SnSe2 thin layer, the substrate is placed in the air and heated at a temperature of 100°C to 200°C for 0.5 to 3 hours to obtain a thin layer of SnO2 with a thickness of 1 to 10 nm. This method can more easily obtain a thin layer of SnO2, eliminating the need for complex chemical adjustments to form a SnO2 thin layer. This method uses a lower heating temperature and reduces the complex process of preparing a SnO2 thin layer.

[0015] When the two-dimensional easily oxidized thin layer is a BP thin layer, the substrate is placed in air and heated at a temperature of 60°C to 150°C for 0.5 to 3 hours to obtain a PO thin layer with a thickness of 1 to 10 nm. x .

[0016] Furthermore, the steps of depositing a metal Ti thin layer and forming a TiO2 thin layer include selecting an electron beam evaporation process to deposit an 8-10 nm Ti thin layer on the oxide thin layer at a deposition rate of 0.01-0.02 nm / s, heating the substrate in air, setting the heating temperature to 100°C to 150°C, and heating time to 0.5-2 hours to obtain an 8-10 nm thin layer of TiO2.

[0017] Furthermore, the step of depositing the first electrode and the second electrode at both ends of the two-dimensional easily oxidized thin layer includes depositing a Cr / Au metal layer at both ends of the two-dimensional easily oxidized thin layer, with the Cr layer having a thickness of 8 to 10 nm and the Au layer having a thickness of 40 to 60 nm, followed by annealing in argon gas at an annealing temperature of 100 to 150° C. and an annealing time of 20 to 40 minutes.

[0018] Furthermore, the step of depositing a third electrode on the TiO2 thin layer includes depositing a Cr / Au metal layer on the TiO2 thin layer, with the Cr layer having a thickness of 8 to 10 nm and the Au layer having a thickness of 40 to 60 nm, followed by annealing in argon at an annealing temperature of 100 to 200°C for 20 to 60 minutes.

[0019] The present invention also provides a titanium dioxide / oxide / tin diselenide-based memristor, comprising a substrate; a two-dimensional easily oxidizable thin layer located on the substrate; a first electrode and a second electrode provided at both ends of the two-dimensional easily oxidizable thin layer; an oxide thin layer located on the two-dimensional easily oxidizable thin layer; a TiO2 thin layer located on the oxide thin layer; and a third electrode located on the TiO2 thin layer; wherein the oxide thin layer is obtained by heating the two-dimensional easily oxidizable thin layer in air, and has stable resistive switching behavior.

[0020] Furthermore, the two-dimensional easily oxidized thin layer is a single crystal SnSe2 thin layer with a thickness of 20 to 40 nm, and the corresponding oxide thin layer is a SnO2 thin layer with a thickness of 1 to 10 nm;

[0021] The two-dimensional easily oxidized thin layer is a BP thin layer with a thickness of 10 to 20 nm, and the corresponding oxide thin layer is a PO thin layer with a thickness of 1 to 10 nm. x Thin layer.

[0022] Furthermore, the thickness of the TiO2 thin layer is 8 to 10 nm; and the substrate is a SiO2 / Si substrate.

[0023] Compared with the prior art, the present invention has at least the following beneficial effects:

[0024] The present invention selects a two-dimensional easily oxidized thin layer with advantages such as a layered two-dimensional structure film, a high doping rate, a high mobility, and easy peeling, heats and oxidizes an oxide thin layer in air, heats a Ti thin layer in air to obtain a TiO2 thin layer, and constructs a three-layer heterojunction of titanium dioxide / oxide / two-dimensional easily oxidized thin layer to form a memristor with variable resistance. The two-dimensional easily oxidized thin layer is, for example, a thin layer of SnSe2 or a thin layer of BP, and the SnO2 thin layer or PO obtained by oxidation is x The thin layer and the TiO2 thin layer contain different concentrations of oxygen vacancies. The oxygen vacancies can be separated or accumulated under the guidance of the electric field, and have variable resistance behavior, which enables the memristor to obtain a higher resistance state, lower power consumption, and faster resistance change speed.

[0025] The memristor prepared by the present invention has memristive behavior. In one embodiment, the setting voltage of the memristor is -0.7 to -0.2V, and the recovery voltage is 0.2 to 0.7V. The setting voltage is the range corresponding to the resistance dropping to low resistance, and the recovery voltage is the voltage range corresponding to the resistance returning to high resistance, wherein the ratio of high resistance to low resistance is about 10 3 The memristor of the present invention has the characteristics of low power consumption, high stability, and easy preparation, which is conducive to promoting the further development and application of memristors and memories. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 Schematic diagram of a SnSe2 / SnO2 / TiO2 memristor device according to an embodiment of the present invention.

[0027] Figure 2 This is an optical microscope image of the SnSe2 / SnO2 / TiO2 memristor prepared in one embodiment of the present invention.

[0028] Figure 3 These are images of an optical microscope during the preparation process of one embodiment of the present invention, wherein (a) is an optical image of a SnSe2 thin layer; (b) is an optical image of a TiO2 thin layer formed after heating the Ti thin layer.

[0029] Figure 4 This is a data curve of the SnSe2 / SnO2 / TiO2 memristor prepared according to one embodiment of the present invention. DETAILED DESCRIPTION

[0030] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the drawings of the present invention. The described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, other embodiments obtained by ordinary technicians in this field without making creative work are all within the scope of protection of the present invention. The experimental methods described in the following examples are all conventional methods unless otherwise specified; the reagents and materials, unless otherwise specified, can be obtained from public commercial channels.

[0031] Spatially relative terms such as "below," "beneath," "below," "above," "upper," etc. are used in this specification to explain the positioning of one element relative to a second element. These terms are intended to encompass different orientations of the device in addition to different orientations than those depicted in the figures.

[0032] In addition, the use of terms such as "first," "second," and the like to describe various elements, layers, regions, sections, and the like is not intended to be limiting. The use of "having," "containing," "including," and "comprising" are open-ended terms that indicate the presence of stated elements or features, but do not exclude additional elements or features, unless the context clearly indicates otherwise.

[0033] The present invention provides a memristor based on titanium dioxide / oxide / two-dimensional easily oxidized thin layer. The memristor comprises a substrate, a two-dimensional easily oxidized thin layer, an oxide thin layer, a TiO2 thin layer, a first electrode, a second electrode, and a third electrode. The substrate is a SiO2 / Si substrate, and the two-dimensional easily oxidized thin layer is transferred to the SiO2 / Si substrate via a mechanical exfoliation process. The two-dimensional easily oxidized thin layer has advantages such as a layered two-dimensional structure, high mobility, and easy exfoliation. In a preferred embodiment, the two-dimensional easily oxidized thin layer is a SnSe2 thin layer with a thickness of 20 to 40 nm. In another preferred embodiment, the two-dimensional easily oxidized thin layer is a BP thin layer with a thickness of 10 to 20 nm.

[0034] The two-dimensional easily oxidized thin layer is provided with a first electrode and a second electrode, respectively. The first and second electrodes are Cr / Au electrode layers, where the Cr layer is 8 to 10 nm thick and the Au layer is 40 to 60 nm thick. The layer is then annealed in argon at a temperature of 100 to 150°C for 20 to 40 minutes.

[0035] The oxide layer is arranged on the surface of the two-dimensional easily oxidized thin layer. After the first and second electrodes are arranged, the substrate is heated in air, and the surface of the two-dimensional easily oxidized thin layer is oxidized to obtain an oxide layer. In a preferred embodiment, when the two-dimensional easily oxidized thin layer is a SnSe2 thin layer, a SnO2 thin layer of 1 to 10 nm can be obtained by heating at a temperature of 100 to 200°C and a heating time of 0.5 to 3 hours. In another preferred embodiment, when the two-dimensional easily oxidized thin layer is a BP thin layer, a PO layer of 1 to 10 nm can be obtained by heating at a temperature of 60 to 150°C and a heating time of 0.5 to 3 hours. x Thin layer.

[0036] A thin TiO2 layer with a thickness of 6 to 10 nm is deposited on the oxide layer. A thin Ti layer is first deposited on the oxide layer using UV laser lithography and electron beam evaporation. The Ti layer is then heated in air to oxidize the TiO2 layer. A third electrode is placed on the TiO2 layer. The third electrode is a Cr / Au layer with a thickness of 8 to 10 nm and a thickness of 40 to 60 nm. The layer is then annealed in argon at a temperature of 100 to 150°C for 20 to 40 minutes.

[0037] The memristor exhibits excellent memristive behavior, with extremely low set voltage of -0.7V to -0.2V and recovery voltage of 0.2 to 0.7V, and a high resistance ratio of 10 3 .

[0038] Figure 1 The device schematic diagram of the SnSe2 / SnO2 / TiO2 memristor of the present invention is shown. The device utilizes a thin layer of SnSe2 to be heated and oxidized in air to obtain a thin layer of SnO2, reducing the steps of the existing SnO2 preparation process, utilizing the high mobility of SnSe2 to improve the stability of resistance value change, and utilizing the existing technology to evaporate a thin layer of Ti, and then utilizing the fact that Ti is easily oxidized to prepare a thin layer of TiO2, thereby achieving Figure 1 The structure of the device diagram schematic.

[0039] Figure 2 The optical microscope image of the SnSe2 / SnO2 / TiO2 memristor prepared in one embodiment of the present invention is shown, wherein the first electrode and the second electrode are respectively arranged at both ends of the thin SnSe2 layer, and the third electrode is arranged on the thin TiO2 layer.

[0040] Figure 3In the figure, (a) shows the optical image of a thin layer of SnSe2. The thickness of this thin layer of SnSe2 is 20 to 40 nm. A first electrode and a second electrode are respectively set at both ends of the thin layer of SnSe2. After annealing, the electrodes are in close contact with the thin layer of SnSe2. (b) shows that a thin layer of Ti is obtained by heating and oxidizing a thin layer of TiO2. The corresponding color on the substrate is blue, which is consistent with the color of the thin layer of TiO2 on the substrate, indicating that a thin layer of Ti is obtained by oxidation.

[0041] Figure 4 The curve data of the SnSe2 / SnO2 / TiO2 memristor scanned from 0V->-0.7V->0V->0.7V->0V shows that the memristor has good memristive behavior, extremely low setup voltage and recovery voltage, low power consumption, and high resolution. The arrows in the figure indicate the data collected sequentially during the voltage scan. It can be found that the initial state of the memristor is a high resistance state. Under the action of the electric field from 0->-0.7V, this is called a negative electric field. The direction of the negative electric field is indicated by the third electrode. Toward the first electrode, the voltage scan corresponds to the first and third electrodes. Under the action of a negative electric field, oxygen vacancies within the memristor accumulate to form a conductive channel, causing the resistance to drop instantaneously to a low resistance state. When the voltage drops from 0 to 0.7 V, the resistance returns instantaneously to a high resistance state. Under a positive voltage, when the voltage exceeds the recovery voltage, the memristor returns to a high resistance state. Oxygen vacancies disperse from the accumulated state under the positive electric field, disconnecting the conductive channel. This demonstrates that the memristor has variable resistance and is dependent on the direction of the electric field.

[0042] According to the data curve of the SnSe2 / SnO2 / TiO2 memristor, the memristor utilizes the different oxygen vacancy concentrations in thin layers of SnO2 and thin layers of TiO2. Oxygen vacancies diffuse at their interface, making the configuration higher. The negative electric field is used to control the accumulation of oxygen vacancies on the inert electrode to form a conductive channel. Under the action of a positive electric field, the oxygen vacancies disperse and the conductive channel is disconnected. At the same time, due to the diffusion of oxygen vacancies at the interface of different binary metal oxides, the memristor is converted to a high resistance value more quickly, reducing the disadvantages of a single thin layer of TiO2 with extremely high high-resistance current, long switching time and high power consumption. The SnSe2 / SnO2 / TiO2 memristor has the characteristics of low power consumption, high stability, and easy preparation, which is conducive to promoting the further development and application of memristors and memory.

[0043] In order to make the memristor of the present invention clearer, the preparation method of the detector is described in detail below.

[0044] First, the SiO2 / Si growth substrate was soaked in acetone solution, isopropyl alcohol solution, and deionized water, respectively, with each soaking lasting for 5 minutes.

[0045] Then, a mechanical stripping process was used. The single-crystal SnSe2 was adhered to the tape to obtain the SnSe2 single-crystal tape, and the SnSe2 single-crystal tape was adhered to the PDMS to obtain the SnSe2 / PDMS. The PDMS with the SnSe2 side adhered was covered on the surface of the SiO2 / Si substrate. After light pressure for 45 seconds, the PDMS was lifted up, and then a thin SnSe2 layer with a thickness of 20 to 40 nm was selected under an optical microscope.

[0046] Then, the ultraviolet laser lithography process was used to etch the table of the first electrode and the second electrode. The substrate containing the SnSe2 thin layer was placed on the suction cup of the glue spreader. The glue spreading rate was set to 4000 revolutions per second and the glue spreading time was set to 1 minute. It was then placed on a heating table and cured at 100°C for 1 minute. The table was then etched using ultraviolet laser lithography.

[0047] A 10nm thick Cr layer and a 50nm thick Au layer were deposited using electron beam evaporation and thermal evaporation at a rate of 0.01nm / s. After deposition, the substrate was placed in acetone for ten minutes to dissolve the photoresist and remove the excess Cr / Au layer. The substrate was then annealed in argon in a glove box at 150°C for 30 minutes.

[0048] The substrate was then taken out of the glove box and placed in air for heating at 150° C. for 3 hours to obtain a 1 to 10 nm SnO 2 layer on the above SnSe 2 thin layer.

[0049] Consistent with the above-mentioned steps of photolithography of the first electrode and the second electrode, an ultraviolet laser photolithography process is used to etch the mesa of thin Ti deposition on the thin layer of SnO2, and an electron beam evaporation process is used to evaporate a 10nm Ti layer with an evaporation rate of 0.01nm / s. Then it is placed in the air and heated at a heating temperature of 150°C for 2 hours to obtain a 10nm thin layer of TiO2.

[0050] The third electrode was then formed using electron beam evaporation and thermal evaporation, with a 10nm Cr layer and a 50nm Au layer deposited at a rate of 0.01nm / s. The wafer was then placed in an acetone bath for ten minutes to remove the photoresist. The wafer was then rinsed with water using a syringe. As the photoresist dissolved in the acetone, the excess gold film also fell off. The wafer was then placed in deionized water and the surface was dehydrated using a nitrogen gun. The device was then annealed in an argon atmosphere at 150°C for 30 minutes in a glove box to enhance contact between the different materials and improve device stability, resulting in the final SnSe2 / SnO2 / TiO2 memristor.

[0051] The above embodiments are preferred implementation modes of the present invention, but the implementation modes of the present invention are not limited to the above embodiments. Any other changes, modifications, substitutions, combinations, and simplifications that do not deviate from the spirit and principles of the present invention should be considered as equivalent replacement methods and are included in the scope of protection of the present invention.

Claims

1. A method for preparing a memristor based on titanium dioxide / oxide / two-dimensional easily oxidizable thin layer, characterized in that: The following steps are involved: The mechanical exfoliation method is used to transfer the SnSe2 or BP two-dimensional easily oxidized thin layer onto the substrate; Depositing a first electrode and a second electrode at both ends of the two-dimensional easily oxidizable thin layer; The substrate is heated in air, and the surface of the two-dimensional easily oxidized thin layer forms SnO2 or PO with stable resistive switching behavior. x Thin oxide layer; Depositing a metal Ti thin layer on the oxide thin layer; heating the substrate in air to oxidize the metal Ti thin layer to form a TiO2 thin layer; A third electrode is deposited on the TiO2 thin layer.

2. The preparation method according to claim 1, characterized in that The two-dimensional easily oxidized thin layer is a SnSe2 thin layer with a thickness of 20-40 nm or a BP thin layer with a thickness of 10-20 nm.

3. The preparation method according to claim 1 or 2, characterized in that In the step of transferring the two-dimensional easily oxidizable thin layer to the substrate by using a mechanical stripping method, a tape is used to adhere the two-dimensional easily oxidizable thin layer to obtain a tape with a two-dimensional easily oxidizable thin layer adhered thereto, PDMS is used to adhere the tape with the two-dimensional easily oxidizable thin layer to obtain a two-dimensional easily oxidizable thin layer / PDMS, the PDMS with one side adhered to the two-dimensional easily oxidizable thin layer is covered on the surface of the substrate, and the PDMS is lifted up to obtain the two-dimensional easily oxidizable thin layer transferred to the surface of the substrate.

4. The preparation method according to claim 2, characterized in that When the two-dimensional easily oxidized thin layer is a SnSe2 thin layer, the substrate is placed in air and heated at a temperature of 100° C. to 200° C. for 0.5 to 3 hours to obtain a thin layer of SnO2 with a thickness of 1 to 10 nm; When the two-dimensional easily oxidized thin layer is a BP thin layer, the substrate is placed in air and heated at a temperature of 60°C to 150°C for 0.5 to 3 hours to obtain a PO thin layer with a thickness of 1 to 10 nm. x .

5. The preparation method according to claim 1, 2 or 4, characterized in that The steps of depositing a metal Ti thin layer and forming a TiO2 thin layer include using an electron beam evaporation process to deposit an 8-10 nm Ti thin layer on the oxide thin layer, heating the substrate in air, setting the heating temperature to 100° C. to 150° C. for 0.5 to 2 hours, and obtaining an 8-10 nm thin layer of TiO2.

6. The preparation method according to claim 3, characterized in that The step of depositing a first electrode and a second electrode at both ends of the two-dimensional easily oxidized thin layer includes depositing a Cr / Au metal layer at both ends of the two-dimensional easily oxidized thin layer, with the Cr layer having a thickness of 8 to 10 nm and the Au layer having a thickness of 40 to 60 nm, and then annealing in argon gas at an annealing temperature of 100 to 150° C. for 20 to 40 minutes.

7. The preparation method according to claim 3, characterized in that The step of depositing a third electrode on the TiO2 thin layer includes depositing a Cr / Au metal layer on the TiO2 thin layer, wherein the Cr layer has a thickness of 8 to 10 nm and the Au layer has a thickness of 40 to 60 nm, and then annealing in argon at an annealing temperature of 100 to 200° C. for 20 to 60 minutes.

8. A memristor based on titanium dioxide / oxide / two-dimensional easily oxidizable thin layer, characterized in that: The invention comprises a substrate; a SnSe2 or BP two-dimensional easily oxidized thin layer on the substrate, wherein the two ends of the two-dimensional easily oxidized thin layer are provided with a first electrode and a second electrode; a SnO2 or PO4 two-dimensional easily oxidized thin layer on the substrate; x An oxide thin layer; a TiO2 thin layer located on the oxide thin layer; and a third electrode located on the TiO2 thin layer; wherein the oxide thin layer is obtained by heating the two-dimensional easily oxidized thin layer in air, and has stable resistive switching behavior.

9. The memristor according to claim 8, characterized in that The two-dimensional easily oxidized thin layer is a single crystal SnSe2 thin layer with a thickness of 20-40 nm, and the corresponding oxide thin layer is a SnO2 thin layer with a thickness of 1-10 nm; The two-dimensional easily oxidized thin layer is a BP thin layer with a thickness of 10-20 nm, and the corresponding oxide thin layer is a PO thin layer with a thickness of 1-10 nm. x Thin layer.

10. The memristor according to claim 8 or 9, characterized in that: The thickness of the TiO2 thin layer is 8-10 nm; and the substrate is a SiO2 / Si substrate.

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