Interface circuit and communication circuit based on M-LVDS bus

Abstract

This specification provides an interface circuit and communication circuit based on an M-LVDS bus. The interface circuit connects a first component and a second component. The interface circuit includes: a first M-LVDS transceiver located at the first component end, a second M-LVDS transceiver located at the second component end, a terminating resistor, and a control module. The control module determines the current communication direction and, based on the current communication direction, controls the terminating resistor to be connected to either the first or second M-LVDS transceiver as the receiving end, and controls the terminating resistor not to be connected to either the first or second M-LVDS transceiver as the transmitting end. This specification embodiment can significantly save power.

Description

Technical Field

[0001] One or more embodiments of this specification relate to electronic circuit technology, and more particularly to interface circuits and communication circuits based on the M-LVDS bus. Background Technology

[0002] M-LVDS is an abbreviation for Multipoint Low Voltage Differential Signaling, belonging to LVDS (Low Voltage Differential Signaling) technology. The M-LVDS bus is suitable for industrial control, telecommunications infrastructure, and computer peripheral interface applications, offering higher transmission rates and lower power consumption, thus significantly reducing system costs.

[0003] The M-LVDS bus optimizes multi-point interconnect applications. Multi-point interconnect applications refer to interconnect applications where multiple drivers or receivers share a single physical link. The M-LVDS bus allows for the connection of various components; for example, it can connect a controller to multiple EEPROMs (electrically erasable programmable read-only memory) to optimize multi-point interconnect applications between the controller and EEPROMs.

[0004] Currently, the M-LVDS bus is being widely adopted. Therefore, how to design interface circuits based on the M-LVDS bus to further reduce power consumption has become an important issue. Summary of the Invention

[0005] This specification describes one or more embodiments of an interface circuit and communication circuit based on the M-LVDS bus, which can reduce power consumption.

[0006] According to a first aspect, an interface circuit based on an M-LVDS bus is provided, wherein the interface circuit connects a first component and a second component; the interface circuit includes:

[0007] The system includes a first M-LVDS transceiver located at the first component end, a second M-LVDS transceiver located at the second component end, a terminating resistor, and a control module; among which...

[0008] The control module is used to determine the current communication direction, and according to the current communication direction, control the termination resistor to be connected to either the first M-LVDS transceiver or the second M-LVDS transceiver as the receiver, and control the termination resistor not to be connected to either the first M-LVDS transceiver or the second M-LVDS transceiver as the sender.

[0009] in,

[0010] Each M-LVDS transceiver includes a read driver and a write driver;

[0011] The control module controls the termination resistor to be connected to the input terminal of the read driver in the M-LVDS transceiver that acts as the receiver.

[0012] The control module includes: a first control module located at the first component end and a second control module located at the second component end;

[0013] The terminating resistor includes: a first terminating resistor located at the first component end and a second terminating resistor located at the second component end;

[0014] The first control module is used to control the first termination resistor to disconnect from the first M-LVDS transceiver when it is determined that the first M-LVDS transceiver is the sender based on the current communication direction.

[0015] The second control module is used to control the second terminating resistor to connect to the read driver in the second M-LVDS transceiver when the second M-LVDS transceiver is determined to be the receiver based on the current communication direction.

[0016] The control module includes: an analog switch;

[0017] The analog switch determines the current communication direction based on the level of the received read / write enable signal.

[0018] The control module includes any one of the following: electromagnetic switch; air switch; relay switch; electronic switch;

[0019] Then, the control module determines the current communication direction based on the received control commands.

[0020] The terminating resistors include two resistors of equal resistance connected in series.

[0021] The first component and the second component are: one of the controller and the other of the EEPROM.

[0022] According to a second aspect, a communication circuit based on an M-LVDS bus is provided, wherein the communication circuit includes a first component, a second component, and an interface circuit based on an M-LVDS bus provided in any embodiment of this specification.

[0023] The first component and the second component are: one of the controller and the other of the EEPROM.

[0024] The physical distance between the first component and the second component is greater than a predetermined value.

[0025] Wherein, the number M of the second components is greater than a predetermined number, and one of the first components is connected to M of the second components through an interface circuit based on the M-LVDS bus provided in any embodiment of this specification.

[0026] The interface circuit and communication circuit based on the M-LVDS bus provided in the embodiments of this specification have at least the following beneficial effects:

[0027] 1. By associating the connection method of the termination resistor with the communication direction, dynamic connection of the termination resistor is achieved.

[0028] 2. A dynamic approach that only connects the terminating resistor when the component is acting as a receiver prevents the connection of the terminating resistor when the component is acting as a transmitter, thus avoiding additional and unnecessary power consumption, saving power, and making it more practical.

[0029] 3. For situations where a large number of components are connected at both ends of the M-LVDS bus (such as a controller connecting 10 EEPROMs) or for long-distance transmission between two components, since no terminating resistor is required on the M-LVDS transceiver side as the transmitter, power utilization can be significantly improved, resulting in substantial power savings. Attached Figure Description

[0030] To more clearly illustrate the technical solutions in the embodiments or prior art of this specification, the drawings used in the description of the embodiments or prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this specification. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0031] Figure 1 This is a schematic diagram of the interface circuit based on the M-LVDS bus in one embodiment of this specification.

[0032] Figure 2This is a schematic diagram of the circuit structure of an interface circuit based on the M-LVDS bus in one embodiment of this specification.

[0033] Figure 3 This is a schematic diagram of the communication circuit based on the M-LVDS bus in one embodiment of this specification. Detailed Implementation

[0034] The solution provided in this specification will now be described with reference to the accompanying drawings.

[0035] First, it should be noted that the terminology used in the embodiments of this invention is for the purpose of describing specific embodiments only and is not intended to limit the invention. The singular forms “a,” “the,” and “the” used in the embodiments of this invention and the appended claims are also intended to include the plural forms, unless the context clearly indicates otherwise.

[0036] See Figure 1 In one embodiment of this specification, an interface circuit based on the M-LVDS bus is proposed. See also Figure 1 and Figure 3 The interface circuit based on the M-LVDS bus connects the first component and the second component; the interface circuit includes:

[0037] The system includes a first M-LVDS transceiver located at the first component end, a second M-LVDS transceiver located at the second component end, a terminating resistor, and a control module; among which...

[0038] The control module is used to determine the current communication direction, and according to the current communication direction, control the termination resistor to be connected to either the first M-LVDS transceiver or the second M-LVDS transceiver as the receiver, and control the termination resistor not to be connected to either the first M-LVDS transceiver or the second M-LVDS transceiver as the sender.

[0039] As can be seen, the interface circuit based on the M-LVDS bus proposed in the embodiments of this specification can connect terminating resistors on the M-LVDS bus, thereby achieving impedance matching. Furthermore, the connection method of the terminating resistors is associated with the communication direction; that is, when a component is acting as a data transmitter, a terminating resistor is not connected to the M-LVDS transceiver side of that component, but only when the component is acting as a data receiver will a terminating resistor be connected to the M-LVDS transceiver side of that component. Therefore, dynamic connection of the terminating resistors is achieved.

[0040] Communication between two components is typically bidirectional. That is, at one moment, the first component acts as the data sender and the second component as the data receiver; at another moment, the first component acts as the data receiver and the second component as the data sender. Thus, each component requires a termination resistor for impedance matching. If termination resistors are connected to both the first and second components, each resistor consumes power, resulting in unnecessary power consumption for the sender. This is because impedance matching is not required when the component is acting as a sender; in other words, the sender component can function without a termination resistor. Therefore, this embodiment, based on the bidirectional communication characteristics of two components and the fact that impedance matching is only required for the data receiver, adopts the aforementioned dynamic scheme of connecting termination resistors only when the component is acting as a receiver. This prevents the additional, unnecessary power consumption that would result from connecting termination resistors to the sender component as well.

[0041] In one embodiment of this specification, see [link to embodiment]. Figure 2 Each M-LVDS transceiver includes a read driver and a write driver;

[0042] When implementing the control terminal resistor connection to the M-LVDS transceiver acting as the receiver, specifically, the control module connects the control terminal resistor to the input terminal of the read driver in the M-LVDS transceiver acting as the receiver.

[0043] In one embodiment of this specification, a circuit structure for controlling the connection of termination resistors may be included on each of the two communicating components. The specific implementation is as follows:

[0044] The control module includes: a first control module located at the first component end and a second control module located at the second component end;

[0045] The terminating resistor includes: a first terminating resistor located at the first component end and a second terminating resistor located at the second component end;

[0046] The first control module is used to control the first terminating resistor to disconnect from the first M-LVDS transceiver when the first M-LVDS transceiver is determined to be the transmitter based on the current communication direction.

[0047] The second control module is used to control the second terminating resistor to connect to the read driver in the second M-LVDS transceiver when the second M-LVDS transceiver is determined to be the receiver based on the current communication direction.

[0048] In one embodiment of this specification, the control module includes: an analog switch;

[0049] The analog switch determines the current communication direction based on the level of the received read / write enable signal, that is, which M-LVDS transceiver is the sender and which M-LVDS transceiver is the receiver.

[0050] In other embodiments of this specification, the control module includes any one of the following: an electromagnetic switch; an air switch; a relay switch; an electronic switch;

[0051] At this point, the control module determines the current communication direction based on the received control commands.

[0052] In one embodiment of this specification, the termination resistor includes two resistors of equal resistance connected in series.

[0053] The following example uses the control module as an analog switch, and the termination resistor includes two resistors of equal resistance connected in series, to illustrate the circuit structure that includes connection control of the termination resistor on the two communicating components side.

[0054] See Figure 2 M-LVDS transceiver 1 is located on the component 1 side (e.g., M-LVDS transceiver 1 is integrated into component 1, or connected externally to component 1), and M-LVDS transceiver 2 is located on the component 2 side (e.g., M-LVDS transceiver 2 is integrated into component 2, or connected externally to component 2). Each M-LVDS transceiver includes a write driver and a read driver, wherein the write driver is... Figure 2 The driver with a triangular graphic in the middle, which inputs the DI signal (i.e., the write signal) at the input terminal, is a read driver. Figure 2 The driver, shaped like a triangle, outputs the RO signal (read signal) at its output terminal. On the M-LVDS transceiver 1 side, an analog switch and two resistors of equal resistance connected in series are connected to the read driver and the write driver, respectively. Similarly, on the M-LVDS transceiver 2 side, another analog switch and two resistors of equal resistance connected in series are connected to the read driver and the write driver, respectively.

[0055] See Figure 2 For example, if component 1 needs to send data to component 2, that is, M-LVDS transceiver 1 on the component 1 side acts as the sender, and M-LVDS transceiver 2 on the component 2 side acts as the receiver. On the component 1 side, the analog switch connected to M-LVDS transceiver 1 will... Figure 2When the read / write enable signal of the analog switch on the left is set to low, the analog switch will disconnect when it detects the low-level read / write enable signal. This disconnects the terminating resistor on the M-LVDS transceiver 1 side from the M-LVDS transceiver 1, meaning that there is no terminating resistor connected to the M-LVDS transceiver 1 side (the transmitting side). Simultaneously, on the component 2 side, the analog switch (on the left) connected to the M-LVDS transceiver 2 will be disconnected. Figure 2 When the read / write enable signal of the analog switch on the right is set to high, the analog switch will connect when it detects the high-level read / write enable signal, thus connecting the termination resistor on the M-LVDS transceiver 2 side to M-LVDS transceiver 2. See [link to relevant documentation]. Figure 2 The termination resistor is connected to the read driver in the M-LVDS transceiver 2, that is, a termination resistor is connected on the side of the M-LVDS transceiver 2, which is the receiver.

[0056] See Figure 2 On the M-LVDS transceiver 1 side, the DI write signal enters the write driver and becomes a differential signal output, which is transmitted along the M-LVDS bus to the M-LVDS transceiver 2 side. Because the two terminating resistors on the M-LVDS transceiver 2 side are connected to the bus, a high-quality DI write signal can be obtained. After the DI write signal enters the read driver of the M-LVDS transceiver 2, the RO read signal is output.

[0057] The circuit structure described above, which controls the connection of termination resistors on the two communicating components, is suitable for short-distance communication, and is even more suitable for long-distance communication.

[0058] For short-range communication, the control module and termination resistor can be multiplexed between the M-LVDS transceivers on both component sides.

[0059] In one embodiment of this specification, a communication circuit based on the M-LVDS bus is proposed, see [link to documentation]. Figure 3 The communication circuit includes a first component, a second component, and an interface circuit based on the M-LVDS bus as proposed in any embodiment of this specification.

[0060] In one embodiment of this specification, the two components are: a controller and one and the other of an EEPROM.

[0061] In the case of long-distance communication, power loss has a more significant impact on the quality of transmitted signals. Therefore, the embodiments in this specification are more suitable for long-distance communication. In this case, the physical distance between the first and second communicating components is greater than a predetermined value, which is long-distance communication.

[0062] When a large number of components communicate through an M-LVDS bus, power loss has a more significant impact on the quality of the transmitted signal. Therefore, the embodiments in this specification are more suitable for situations where a large number of components communicate. In this case, the number M of the second components is greater than a predetermined number, where M is a positive integer. Furthermore, a first component connects to M second components through the interface circuit based on the M-LVDS bus provided in the embodiments of this specification.

[0063] This specification provides, in one embodiment, a computer-readable storage medium having a computer program stored thereon, which, when executed in a computer, causes the computer to perform the methods of any embodiment in the specification.

[0064] This specification provides a computing device according to one embodiment, including a memory and a processor, wherein the memory stores executable code, and the processor executes the executable code to perform the method of any embodiment of the specification.

[0065] It is understood that the structures illustrated in the embodiments of this specification do not constitute a specific limitation on the apparatus of the embodiments of this specification. In other embodiments of the specification, the above-described apparatus may include more or fewer components than illustrated, or combine some components, or split some components, or have different component arrangements. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.

[0066] The various embodiments in this specification are described in a progressive manner. Similar or identical parts between embodiments can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments. In particular, the apparatus embodiments are basically similar to the method embodiments, so the description is relatively simple; relevant parts can be referred to the descriptions of the method embodiments.

[0067] Those skilled in the art will recognize that, in one or more of the examples above, the functions described in this invention can be implemented using hardware, software, widgets, or any combination thereof. When implemented in software, these functions can be stored in a computer-readable medium or transmitted as one or more instructions or code on a computer-readable medium.

[0068] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of the present invention. It should be understood that the above description is only a specific embodiment of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made on the basis of the technical solution of the present invention should be included within the scope of protection of the present invention.

Claims

1. An interface circuit based on the M-LVDS bus, wherein, The interface circuit connects the first component and the second component; the interface circuit includes: The system includes a first M-LVDS transceiver located at the first component end, a second M-LVDS transceiver located at the second component end, a terminating resistor, and a control module; wherein the first component and the second component transmit and receive data. The terminating resistor includes: a first terminating resistor located at the first component end and a second terminating resistor located at the second component end; Each M-LVDS transceiver includes: a read driver and a write driver; Each terminating resistor consists of two resistors of equal resistance connected in series. The control module is used to determine the current communication direction, designating the first M-LVDS transceiver and the second M-LVDS transceiver as the sender and receiver respectively. Two resistors with equal resistance values ​​located at the same end as the receiver, the read driver and write driver of the M-LVDS transceiver (as the receiver) are connected in series. The two resistors with equal resistance values ​​located at the same end as the sender are disconnected from the read driver and write driver of the M-LVDS transceiver (as the sender).

2. The interface circuit according to claim 1, wherein, The control module includes: a first control module located at the first component end and a second control module located at the second component end; The first control module is used to control the first termination resistor to disconnect from the first M-LVDS transceiver when it is determined that the first M-LVDS transceiver is the sender based on the current communication direction. The second control module is used to control the second terminating resistor to connect to the read driver in the second M-LVDS transceiver when the second M-LVDS transceiver is determined to be the receiver based on the current communication direction.

3. The interface circuit according to any one of claims 1 to 2, wherein, The control module includes: analog switches; The analog switch determines the current communication direction based on the level of the received read / write enable signal.

4. The interface circuit according to any one of claims 1 to 2, wherein, The control module includes any one of the following: electromagnetic switch; air switch; relay switch; electronic switch; Then, the control module determines the current communication direction based on the received control commands.

5. The interface circuit according to claim 1, wherein, The first component and the second component are: one of the controller and the other of the EEPROM.

6. A communication circuit based on the M-LVDS bus, wherein, The communication circuit includes a first component, a second component, and an interface circuit based on the M-LVDS bus as described in any one of claims 1 to 5.

7. The communication circuit according to claim 6, wherein, The first component and the second component are: one of the controller and the other of the EEPROM.

8. The communication circuit according to claim 6, wherein the physical distance between the first component and the second component is greater than a predetermined value; And / or, The number M of the second components is greater than a predetermined number, and one of the first components is connected to M of the second components through an interface circuit based on the M-LVDS bus as described in any one of claims 1 to 5.

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