An N-polar GaN-based rectifier chip and its preparation method and application

Abstract

The present invention discloses an N-polarity GaN-based rectifier chip, a preparation method thereof, and an application thereof. The N-polarity GaN-based rectifier chip of the present invention comprises an SiC substrate, a low-temperature N-polarity GaN buffer layer, an SiN insertion layer, a high-temperature N-polarity GaN buffer layer, an AlGaN barrier layer, an N-polarity GaN channel layer, and a passivation layer which are sequentially stacked, and further comprises an ohmic contact cathode, a Schottky contact anode, and a T-shaped metal electrode. The N-polarity GaN-based rectifier chip of the present invention has advantages such as good frequency characteristics, small barrier layer height, low ohmic contact resistance, and low turn-on voltage, and can effectively improve the rectification efficiency of a radio frequency front end, and is suitable for large-scale popularization and application in fields such as microwave energy transmission, detection, and communication.

Description

Technical Field

[0001] The present invention relates to the technical field of high-frequency rectifier chips, and particularly relates to an N-polarity GaN-based rectifier chip, a preparation method thereof, and an application thereof. Background Art

[0002] In application scenarios such as high-power microwave wireless energy transmission and high-performance limiting, higher and higher requirements are put forward for the frequency and power characteristics of the core component rectifier diode. GaN materials have characteristics such as a large bandgap width and a high breakdown field strength. Through the strong polarization effect, the AlGaN / GaN heterojunction material can generate a two-dimensional electron gas with a density as high as 10 13 cm 2 and a mobility as high as 2000 cm 2 ·V -1 ·s -1 . Therefore, the planar GaN rectifier diode has good application prospects in the high-frequency field.

[0003] However, the current planar GaN rectifier diode faces huge challenges, specifically as follows: 1) Limited by the heteroepitaxial technology, GaN materials, especially N-polarity GaN materials, still have a relatively high density of dislocations and defects, and it is difficult to further improve the device performance; 2) The planar GaN rectifier diode is a surface device, and the conductive channel is only dozens of nanometers away from the device surface, and it is easily affected by surface states to generate current collapse, affecting the high-frequency performance of the device, and high-quality passivation means are required; 3) There is an extremely high Schottky barrier between the GaN material and the metal, resulting in a high turn-on voltage of the diode, affecting the device efficiency.

[0004] Therefore, it is of great significance to develop a GaN-based rectifier chip with advantages such as good frequency characteristics, a small barrier layer height, a low ohmic contact resistance, and a low turn-on voltage. Summary of the Invention

[0005] The purpose of the present invention is to provide an N-polarity GaN-based rectifier chip, a preparation method thereof, and an application thereof.

[0006] The technical solution adopted by the present invention is:

[0007] An N-polarity GaN-based rectifier chip, which comprises an SiC substrate, a low-temperature N-polarity GaN buffer layer, an SiN insertion layer, a high-temperature N-polarity GaN buffer layer, an AlGaN barrier layer, an N-polarity GaN channel layer, and a passivation layer that are sequentially stacked, and further comprises an ohmic contact cathode, a Schottky contact anode, and a T-shaped metal electrode; the ohmic contact cathode and the Schottky contact anode are both arranged on one side of the N-polarity GaN channel layer away from the AlGaN barrier layer; the passivation layer covers the ohmic contact cathode and the Schottky contact anode; the Schottky contact anode is in a T shape, and the lower end thereof passes through the N-polarity GaN channel layer to contact the AlGaN barrier layer; the ohmic contact cathode and the Schottky contact anode are respectively connected with a T-shaped metal electrode.

[0008] Preferably, the thickness of the low-temperature N-polarity GaN buffer layer is 700 nm to 1100 nm.

[0009] Preferably, the thickness of the SiN insertion layer is 20 nm to 60 nm.

[0010] Preferably, the thickness of the high-temperature N-polarity GaN buffer layer is 1600 nm to 2200 nm.

[0011] Preferably, the thickness of the AlGaN barrier layer is 20 nm to 30 nm.

[0012] Preferably, the thickness of the N-polarity GaN channel layer is 90 nm to 160 nm.

[0013] Preferably, the composition of the ohmic contact cathode includes at least one of Ti, Al, Ni, and Au.

[0014] Preferably, the composition of the Schottky contact anode includes at least one of Ti and Au.

[0015] Preferably, the composition of the T-shaped metal electrode includes at least one of Ti, Au, and Al.

[0016] Preferably, the composition of the passivation layer includes at least one of SiN and SiO2.

[0017] A preparation method of the N-polarity GaN-based rectifier chip as described above comprises the following steps:

[0018] 1) Epitaxially grow a low-temperature N-polarity GaN buffer layer, an SiN insertion layer, a high-temperature N-polarity GaN buffer layer, an AlGaN barrier layer, and an N-polarity GaN channel layer on the SiC substrate in sequence;

[0019] 2) Perform photolithography, development, and etching to expose the cathode region and the anode groove region, and then perform evaporation, stripping, and annealing to form an ohmic contact cathode and a T-shaped Schottky contact anode;

[0020] 3) Grow a passivation layer;

[0021] 4) Perform photolithography, development, and etching, and then perform evaporation and lift-off to form a T-shaped metal electrode, thus obtaining an N-polarity GaN-based rectifier chip.

[0022] Preferably, the low-temperature N-polarity GaN buffer layer in step 1) is prepared by pulsed laser deposition (PLD).

[0023] Preferably, the SiN insertion layer in step 1) is prepared by atomic layer deposition (ALD) or low-pressure chemical vapor deposition (LPCVD).

[0024] Preferably, the high-temperature N-polarity GaN buffer layer, the AlGaN barrier layer, and the N-polarity GaN channel layer in step 1) are all prepared by metalorganic chemical vapor deposition (MOCVD).

[0025] Preferably, the etching method in steps 2) and 4) is one of inductively coupled plasma etching (ICP), atomic layer etching (ALE), and wet etching.

[0026] Preferably, the annealing atmosphere in step 2) is an N2 atmosphere.

[0027] Preferably, the passivation layer in step 3) is prepared by chemical vapor deposition (CVD) or atomic layer deposition (ALD).

[0028] An electronic device, which comprises the above-mentioned N-polarity GaN-based rectifier chip.

[0029] The beneficial effects of the present invention are as follows: The N-polarity GaN-based rectifier chip of the present invention has advantages such as good frequency characteristics, small barrier layer height, low ohmic contact resistance, and low turn-on voltage. It can effectively improve the rectification efficiency of the RF front end and is suitable for large-scale popularization and application in fields such as microwave energy transmission, detection, and communication.

[0030] Specifically:

[0031] 1) The N-polarity GaN-based rectifier chip of the present invention uses N-polarity GaN as the channel layer. Compared with the ordinary Ga-polarity channel layer, the N-polarity device can flexibly control the distance between the conductive channel and the device surface, and thus can improve the frequency characteristics of the chip;

[0032] 2) The present invention directly forms an ohmic contact and a Schottky contact on the N-polarity GaN channel layer, which can effectively reduce the barrier layer height, and finally a rectifier chip with low ohmic contact resistance and low turn-on voltage can be obtained;

[0033] 3) In the N-polarity GaN-based rectifier chip of the present invention, a SiN insertion layer is introduced, which can effectively reduce the defect density and surface roughness of the GaN material. Description of the Drawings

[0034] Figure 1 It is a schematic structural diagram of the N-polarity GaN-based rectifier chip of the present invention.

[0035] Description of the drawing reference numerals: 10, SiC substrate; 20, low-temperature N-polarity GaN buffer layer; 30, SiN insertion layer; 40, high-temperature N-polarity GaN buffer layer; 50, AlGaN barrier layer; 60, N-polarity GaN channel layer; 70, ohmic contact cathode; 80, Schottky contact anode; 90, passivation layer; 100, T-shaped metal electrode.

[0036] Figure 2 It is a schematic diagram of the full width at half maximum of the epitaxial wafer prepared in step 7) of Example 1.

[0037] Figure 3 It is the forward I-V characteristic curve of the N-polarity GaN-based rectifier chip of Example 1.

[0038] Figure 4 It is the forward I-V characteristic curve of the conventional rectifier chip of the comparative example. Detailed Description of the Invention

[0039] The present invention will be further explained and described below in conjunction with specific embodiments.

[0040] Example 1:

[0041] An N-polarity GaN-based rectifier chip (the schematic structural diagram is as Figure 1 shown), which comprises an SiC substrate 10, a low-temperature N-polarity GaN buffer layer 20, a SiN insertion layer 30, a high-temperature N-polarity GaN buffer layer 40, an AlGaN barrier layer 50, an N-polarity GaN channel layer 60, and a passivation layer 90 that are stacked in sequence, and further comprises an ohmic contact cathode 70, a Schottky contact anode 80, and a T-shaped metal electrode 100; the ohmic contact cathode 70 and the Schottky contact anode 80 are both arranged on the side of the N-polarity GaN channel layer 60 away from the AlGaN barrier layer 50; the passivation layer 90 covers the ohmic contact cathode 70 and the Schottky contact anode 80; the Schottky contact anode 80 is T-shaped and its lower end passes through the N-polarity GaN channel layer 60 to contact the AlGaN barrier layer 50; the ohmic contact cathode 70 and the Schottky contact anode 80 are respectively connected with a T-shaped metal electrode 100.

[0042] The preparation method of the above N-polarity GaN-based rectifier chip comprises the following steps:

[0043] 1) Substrate selection: Use a 6H-SiC substrate and select the C plane as the epitaxial surface;

[0044] 2) Substrate cleaning: Place the 6H-SiC substrate in deionized water and ultrasonically clean it at room temperature for 3 min to remove the contaminant particles on the surface of the 6H-SiC substrate. Then, wash it successively with hydrochloric acid, acetone, and ethanol to remove the surface organic matter, and dry it with dry nitrogen;

[0045] 3) Grow a low-temperature N-polar GaN buffer layer: Use the PLD technique to grow a low-temperature N-polar GaN buffer layer with a thickness of 1000 nm on the 6H-SiC substrate. The substrate temperature is 250 °C, the plasma flow rate of nitrogen is 3.5 sccm, and the RF activation power is 450 W; in the PLD technique, the substrate rotation speed is 10 r / min, the target-substrate distance is 5 cm, the laser wavelength is 248 nm, the laser energy is 250 mJ / p, and the frequency is 20 Hz; the Ga source is a GaN target with a purity of 99.99%;

[0046] 4) Grow a SiN insertion layer: Use the ALD technique to grow a SiN insertion layer with a thickness of 30 nm on the low-temperature N-polar GaN buffer layer;

[0047] 5) Grow a high-temperature N-polar GaN buffer layer: Use the MOCVD technique to grow a high-temperature N-polar GaN buffer layer with a thickness of 2000 nm on the SiN insertion layer. The temperature of the reaction chamber is 1100 °C, and the pressure of the reaction chamber is 200 Torr;

[0048] 6) Grow an AlGaN barrier layer: Use the MOCVD technique to grow an AlGaN barrier layer with a thickness of 22 nm on the high-temperature N-polar GaN buffer layer. The temperature of the reaction chamber is 1200 °C, and the pressure of the reaction chamber is 200 Torr;

[0049] 7) Grow an N-polar GaN channel layer: Use the MOCVD technique to grow an N-polar GaN channel layer with a thickness of 100 nm on the AlGaN barrier layer. The temperature of the reaction chamber is 1200 °C, and the pressure of the reaction chamber is 200 Torr. The growth of the epitaxial structure is completed to obtain an epitaxial wafer;

[0050] 8) Clean the epitaxial wafer: Place the epitaxial wafer in deionized water and ultrasonically clean it at room temperature for 3 min to remove the surface contaminant particles. Then, wash it successively with hydrochloric acid, acetone, and ethanol to remove the surface organic matter, and dry it with dry nitrogen;

[0051] 9) Coat the epitaxial wafer with photoresist, and after photolithography and development, expose the mesa isolation area and the marker point area;

[0052] 10) Perform ICP etching on the mesa isolation and marker point regions. The etching reactive gas is a mixed gas of Cl2 and BCl3, the pressure is 5 mTorr, the upper RF power is 300 W, the lower RF power is 50 W, and the etching time is 150 s;

[0053] 11) Spin-coat photoresist, expose and develop the epitaxial wafer to expose the cathode region in the active area;

[0054] 12) Evaporate, strip the metal and anneal to form an ohmic contact cathode. The annealing atmosphere is N2 atmosphere, the annealing temperature is 850 °C, the holding time is 30 s, the heating rate is 40 °C / s, and the material of the ohmic contact cathode is an alloy formed by Ti, Al, Ni, and Au;

[0055] 13) Spin-coat photoresist, expose and develop the epitaxial wafer to expose the anode region in the active area;

[0056] 14) Perform ICP etching on the anode region. The etching reactive gas is a mixed gas of Cl2 and BCl3, the pressure is 5 mTorr, the upper RF power is 300 W, the lower RF power is 50 W, the etching time is 100 s, re-spin-coat photoresist, photolithography, development, evaporation, stripping of the metal and annealing to form a T-shaped Schottky contact anode. The annealing atmosphere is N2 atmosphere, the annealing temperature is 550 °C, the holding time is 3 min, the heating rate is 15 °C / s, and the material of the Schottky contact anode is an alloy formed by Ti and Au;

[0057] 15) Grow an SiN layer and perform passivation to form an SiN passivation layer, then perform photolithography and etching to lead out the metal electrodes of the cathode and anode to form a T-shaped metal electrode. The etching reactive gas is SF6, the pressure is 5 mTorr, the upper RF power is 300 W, the lower RF power is 50 W, the etching rate is 1 nm / s, and the material of the T-shaped metal electrode is an alloy formed by Ni and Au, thus obtaining an N-polarity GaN-based rectifier chip.

[0058] Performance test:

[0059] The full width at half maximum schematic diagram of the epitaxial wafer prepared in step 7) of this embodiment is as Figure 2 shown. The forward I-V characteristic curve of the N-polarity GaN-based rectifier chip of this embodiment is as Figure 3 shown.

[0060] It can be seen from Figure 2 and Figure 3 that the full width at half maximum of the (002) and (102) planes of GaN are 324 arcseconds and 370 arcseconds respectively, and the turn-on voltage of the N-polarity GaN-based rectifier chip of this embodiment is only 0.2 V, showing excellent material characteristics and electrical characteristics.

[0061] Example 2:

[0062] An N-polarity GaN-based rectifier chip, whose structure is the same as that of Example 1.

[0063] The preparation method of the above N-polarity GaN-based rectifier chip includes the following steps:

[0064] 1) Substrate selection: A 4H-SiC substrate is used, and the C plane is selected as the epitaxial surface;

[0065] 2) Substrate cleaning: The 4H-SiC substrate is placed in deionized water and ultrasonically cleaned at room temperature for 3 min to remove the sticky particles on the surface of the 4H-SiC substrate, and then successively washed with hydrochloric acid, acetone, and ethanol to remove the surface organic matter, and dried with dry nitrogen;

[0066] 3) Growing a low-temperature N-polarity GaN buffer layer: Using the PLD technique, a low-temperature N-polarity GaN buffer layer with a thickness of 800 nm is grown on the 4H-SiC substrate. The substrate temperature is 250 °C, the plasma flow rate of nitrogen is 3.5 sccm, and the RF activation power is 450 W; In the PLD technique, the substrate rotation speed is 10 r / min, the target-substrate distance is 5 cm, the laser wavelength is 248 nm, the laser energy is 250 mJ / p, and the frequency is 20 Hz; The Ga source is a GaN target with a purity of 99.99%;

[0067] 4) Growing a SiN insertion layer: Using the ALD technique, a SiN insertion layer with a thickness of 50 nm is grown on the low-temperature N-polarity GaN buffer layer;

[0068] 5) Growing a high-temperature N-polarity GaN buffer layer: Using the MOCVD technique, a high-temperature N-polarity GaN buffer layer with a thickness of 1800 nm is grown on the SiN insertion layer. The temperature of the reaction chamber is 1100 °C, and the pressure of the reaction chamber is 200 Torr;

[0069] 6) Growing an AlGaN barrier layer: Using the MOCVD technique, an AlGaN barrier layer with a thickness of 25 nm is grown on the high-temperature N-polarity GaN buffer layer. The temperature of the reaction chamber is 1200 °C, and the pressure of the reaction chamber is 200 Torr;

[0070] 7) Growing an N-polarity GaN channel layer: Using the MOCVD technique, an N-polarity GaN channel layer with a thickness of 150 nm is grown on the AlGaN barrier layer. The temperature of the reaction chamber is 1200 °C, and the pressure of the reaction chamber is 200 Torr. The epitaxial structure growth is completed to obtain an epitaxial wafer;

[0071] 8) Cleaning the epitaxial wafer: The epitaxial wafer is placed in deionized water and ultrasonically cleaned at room temperature for 3 min to remove the surface sticky particles, and then successively washed with hydrochloric acid, acetone, and ethanol to remove the surface organic matter, and dried with dry nitrogen;

[0072] 9) A photoresist is coated on the epitaxial wafer. After photolithography and development, the mesa isolation region and the marker point region are exposed;

[0073] 10) ICP etching is performed on the mesa isolation and marker point regions. The etching reactive gas is a mixed gas of Cl2 and BCl3, the pressure is 5 mTorr, the upper radio frequency power is 300 W, the lower radio frequency power is 50 W, and the etching time is 200 s;

[0074] 11) A photoresist is spin-coated, and the epitaxial wafer is exposed and developed to expose the cathode region in the active region;

[0075] 12) Metal is evaporated, stripped, and annealed to form an ohmic contact cathode. The annealing atmosphere is an N2 atmosphere, the annealing temperature is 850 °C, the holding time is 30 s, the heating rate is 40 °C / s, and the material of the ohmic contact cathode is an alloy formed by Ti, Al, Ni, and Au;

[0076] 13) A photoresist is spin-coated, and the epitaxial wafer is exposed and developed to expose the anode region in the active region;

[0077] 14) ICP etching is performed on the anode region. The etching reactive gas is a mixed gas of Cl2 and BCl3, the pressure is 5 mTorr, the upper radio frequency power is 300 W, the lower radio frequency power is 50 W, the etching time is 150 s, the photoresist is re-spin-coated, and photolithography, development, evaporation, stripping of metal, and annealing are performed to form a T-shaped Schottky contact anode. The annealing atmosphere is an N2 atmosphere, the annealing temperature is 550 °C, the holding time is 3 min, the heating rate is 15 °C / s, and the material of the Schottky contact anode is an alloy formed by Ti and Au;

[0078] 15) An SiN layer is grown and passivated to form an SiN passivation layer. Then, photolithography and etching are performed to lead out the metal electrodes of the cathode and anode to form a T-shaped metal electrode. The etching reactive gas is SF6, the pressure is 5 mTorr, the upper radio frequency power is 300 W, the lower radio frequency power is 50 W, the etching rate is 1 nm / s, and the material of the T-shaped metal electrode is an alloy formed by Ni and Au, thus obtaining an N-polarity GaN-based rectifier chip.

[0079] After testing (the testing method is the same as that in Example 1), the full width at half maximum test result of the epitaxial wafer prepared in step 7) of this example is similar to that in Example 1, and the I-V characteristic curve of the N-polarity GaN-based rectifier chip in this example is similar to that in Example 1. The turn-on voltage is only 0.25 V, and it also shows excellent material characteristics and electrical characteristics.

[0080] Comparative example:

[0081] A conventional rectifier chip, and its preparation method includes the following steps:

[0082] 1) Substrate selection: Use a 4H-SiC substrate and select the Si plane as the epitaxial surface;

[0083] 2) Substrate cleaning: Place the 4H-SiC substrate in deionized water and ultrasonically clean it at room temperature for 3 min to remove the contaminant particles on the surface of the 4H-SiC substrate. Then, successively wash it with hydrochloric acid, acetone, and ethanol to remove the surface organic matter, and dry it with dry nitrogen;

[0084] 3) Growth of GaN buffer layer: Use MOCVD technology to grow a GaN buffer layer with a thickness of 800 nm on the 4H-SiC substrate. The temperature of the reaction chamber is 1100 °C, and the pressure of the reaction chamber is 200 Torr;

[0085] 4) Growth of GaN channel layer: Use MOCVD technology to grow a GaN channel layer with a thickness of 150 nm on the GaN buffer layer. The temperature of the reaction chamber is 1200 °C, and the pressure of the reaction chamber is 200 Torr;

[0086] 5) Growth of AlGaN barrier layer: Use MOCVD technology to grow an AlGaN barrier layer with a thickness of 25 nm on the GaN channel layer. The temperature of the reaction chamber is 1200 °C, and the pressure of the reaction chamber is 200 Torr. After the growth of the epitaxial structure is completed, an epitaxial wafer is obtained;

[0087] 6) Cleaning of the epitaxial wafer: Place the epitaxial wafer in deionized water and ultrasonically clean it at room temperature for 3 min to remove the surface contaminant particles. Then, successively wash it with hydrochloric acid, acetone, and ethanol to remove the surface organic matter, and dry it with dry nitrogen;

[0088] 7) Coating photoresist on the epitaxial wafer, performing photolithography and development to expose the mesa isolation region and the marker point region;

[0089] 8) Perform ICP etching on the mesa isolation and marker point regions. The etching reaction gas is a mixed gas of Cl2 and BCl3, the pressure is 5 mTorr, the upper radio frequency power is 300 W, the lower radio frequency power is 50 W, and the etching time is 200 s;

[0090] 9) Spin-coat photoresist, perform exposure and development on the epitaxial wafer to expose the cathode region in the active region;

[0091] 10) Evaporate, strip the metal and anneal to form an ohmic contact cathode. The annealing atmosphere is N2 atmosphere, the annealing temperature is 850 °C, the holding time is 30 s, the heating rate is 40 °C / s, and the material of the ohmic contact cathode is an alloy formed by Ti, Al, Ni, and Au;

[0092] 11) Spin-coat photoresist, perform exposure and development on the epitaxial wafer to expose the anode region in the active region;

[0093] 12) The anode region is etched by ICP. The etching reactive gas is a mixed gas of Cl2 and BCl3, with a pressure of 5 mTorr, an upper RF power of 300 W, a lower RF power of 50 W, and an etching time of 150 s. The photoresist is spin-coated again, followed by photolithography, development, evaporation, metal stripping, and annealing to form a T-shaped Schottky contact anode. The annealing atmosphere is N2, the annealing temperature is 550 °C, the holding time is 3 min, and the heating rate is 15 °C / s. The material of the Schottky contact anode is an alloy formed by Ti and Au;

[0094] 13) A SiN layer is grown and passivated to form a SiN passivation layer. Then, photolithography and etching are performed to form the metal electrodes for the cathode and anode, resulting in a T-shaped metal electrode. The etching reactive gas is SF6, with a pressure of 5 mTorr, an upper RF power of 300 W, a lower RF power of 50 W, and an etching rate of 1 nm / s. The material of the T-shaped metal electrode is an alloy formed by Ni and Au, thus obtaining a conventional rectifier chip.

[0095] Performance test:

[0096] The forward I-V characteristic curve of the conventional rectifier chip in this comparative example is as Figure 4 shown.

[0097] It can be seen from Figure 4 that: the turn-on voltage of the conventional rectifier chip in this comparative example is 0.5 V, which is significantly higher than that of the N-polarity GaN-based rectifier chips in Example 1 and Example 2, indicating that its electrical characteristics are significantly worse.

[0098] The above embodiments are the preferred embodiments of the present invention. However, the embodiments of the present invention are not limited to the above embodiments. Any other changes, modifications, substitutions, combinations, and simplifications made without departing from the spirit and principle of the present invention shall be equivalent replacement methods and are all included in the protection scope of the present invention.

Claims

1. An N-polarity GaN-based rectifier chip, characterized in that, The composition includes an SiC substrate, a low-temperature N-polarity GaN buffer layer, an SiN insertion layer, a high-temperature N-polarity GaN buffer layer, an AlGaN barrier layer, an N-polarity GaN channel layer, and a passivation layer that are sequentially stacked. It also includes an ohmic contact cathode, a Schottky contact anode, and a T-shaped metal electrode; the ohmic contact cathode and the Schottky contact anode are both arranged on the side of the N-polarity GaN channel layer away from the AlGaN barrier layer; the passivation layer covers the ohmic contact cathode and the Schottky contact anode; the Schottky contact anode is T-shaped and its lower end passes through the N-polarity GaN channel layer to contact the AlGaN barrier layer; the ohmic contact cathode and the Schottky contact anode are respectively connected to a T-shaped metal electrode.

2. The N-polarity GaN-based rectifier chip according to claim 1, characterized in that: The thickness of the low-temperature N-polarity GaN buffer layer is 700 nm to 1100 nm; the thickness of the SiN insertion layer is 20 nm to 60 nm; the thickness of the high-temperature N-polarity GaN buffer layer is 1600 nm to 2200 nm; the thickness of the AlGaN barrier layer is 20 nm to 30 nm; the thickness of the N-polarity GaN channel layer is 90 nm to 160 nm.

3. The N-polarity GaN-based rectifier chip according to claim 1 or 2, characterized in that: The composition of the ohmic contact cathode includes at least one of Ti, Al, Ni, and Au; the composition of the Schottky contact anode includes at least one of Ti and Au.

4. The N-polarity GaN-based rectifier chip according to claim 1 or 2, characterized in that: The composition of the T-shaped metal electrode includes at least one of Ti, Au, and Al.

5. The N-polarity GaN-based rectifier chip according to claim 1 or 2, characterized in that: The composition of the passivation layer includes at least one of SiN and SiO2.

6. A method for preparing an N-polar GaN-based rectifying chip according to any one of claims 1 to 5, characterized in that, It includes the following steps: 1) Epitaxially grow a low-temperature N-polarity GaN buffer layer, an SiN insertion layer, a high-temperature N-polarity GaN buffer layer, an AlGaN barrier layer, and an N-polarity GaN channel layer on the SiC substrate in sequence; 2) Perform photolithography, development, and etching to expose the cathode region and the anode groove region, and then perform evaporation, lift-off, and annealing to form an ohmic contact cathode and a T-shaped Schottky contact anode; 3) Grow a passivation layer; 4) Perform photolithography, development, and etching, and then perform evaporation and lift-off to form a T-shaped metal electrode, thus obtaining an N-polarity GaN-based rectifier chip.

7. The preparation method according to claim 6, characterized in that: In step 1), the low-temperature N-polarity GaN buffer layer is prepared by pulsed laser deposition; in step 1), the SiN insertion layer is prepared by atomic layer deposition or low-pressure chemical vapor deposition; in step 1), the high-temperature N-polarity GaN buffer layer, the AlGaN barrier layer, and the N-polarity GaN channel layer are all prepared by metalorganic chemical vapor deposition.

8. The preparation method according to claim 6 or 7, characterized in that: The etching method in steps 2) and 4) is one of inductively coupled plasma etching, atomic layer etching, and wet etching.

9. The preparation method according to claim 6 or 7, characterized in that: In step 3), the passivation layer is prepared by chemical vapor deposition or atomic layer deposition.

10. An electronic device, characterized in that, The composition includes the N-polarity GaN-based rectifier chip according to any one of claims 1 to 5.

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