A high-precision RC oscillator circuit

Abstract

The present invention provides a high-precision RC oscillator circuit, comprising: a current bias circuit, a charge-discharge circuit, an adjustable resistor network circuit, a first chopping control switch, a second chopping control switch, a comparator circuit, and a clock non-overlapping circuit; the input end of the current bias circuit receives an external bias current, the output end is connected to the charge-discharge circuit and the adjustable resistor network circuit respectively through the first chopping control switch, the output ends of the charge-discharge circuit and the adjustable resistor network circuit are connected to the comparator circuit through the second chopping control switch, the output end of the comparator circuit is connected to the input end of the clock non-overlapping circuit, and the output end of the clock non-overlapping circuit is connected to the charge-discharge circuit, the first chopping control switch, and the second chopping control switch respectively. The present invention can effectively avoid the influence of the comparator offset voltage and realize a high-precision clock signal under different environments by adjusting the reference voltage control signal generated by the adjustable resistor and temperature compensation.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuits, and in particular to a high-precision RC oscillator circuit. Background Art

[0002] With the development of large-scale integrated circuits, especially in more system-on-chip (SoC) applications, oscillator circuits have become an increasingly important module. Oscillators are categorized into resistor-capacitor (RC) oscillators, inductor-capacitor (LC) oscillators, crystal oscillators, and tuning-fork oscillators. RC oscillators output an oscillating signal by charging and discharging a capacitor, and the frequency of the oscillating signal is adjusted by adjusting the value of the capacitor or resistor. Compared to other types of oscillators, RC oscillators have the advantages of a simple structure and low power consumption. However, the frequency accuracy of the output oscillation signal of existing RC oscillators is relatively low, generally believed to be within a range of 1%-10%, and is easily affected by factors such as power supply voltage and temperature. Therefore, improving the accuracy of oscillators is currently a major research area for RC oscillators.

[0003] The traditional RC oscillator circuit requires two comparators, a bandgap reference voltage, a current bias circuit, and an RC charge-discharge circuit. The bias current charges the capacitor, which is then compared with the threshold voltage V1, triggering a voltage jump at the comparator output. This voltage jump is fed back to the charge-discharge circuit to start discharging the capacitor. When the voltage drops to the threshold voltage V2, the comparator output voltage jumps again, and the circuit enters a cyclic mode. This continuous charging and discharging of the capacitor causes the comparator output to form a periodic high-low level transition, which, after passing through the RS trigger, forms an oscillating clock output. Its frequency is determined by the charge-discharge time, as well as the capacitance, current, and comparator errors and delays. Due to various errors, the frequency of this structure varies greatly and the structure is also relatively complex.

[0004] The prior art (CN108011590A) proposes a high-precision, adjustable, low-power RC oscillator. This solution uses an anti-offset comparator circuit to compare the capacitor charge and discharge voltage with a reference voltage to obtain a periodic oscillation control signal. However, this solution is still relatively complex and requires the design of a relatively accurate reference voltage. This solution can eliminate the error caused by the offset voltage of the comparator, but the error of the charge and discharge circuit itself will still cause a large error. Summary of the Invention

[0005] In view of this, an embodiment of the present application provides a high-precision RC oscillator circuit to completely eliminate the influence of the error and temperature coefficient of the charging and discharging current.

[0006] The embodiments of the present application provide the following technical solutions: a high-precision RC oscillator circuit, comprising: a current bias circuit, a charge-discharge circuit, an adjustable resistor network circuit, a first chopping control switch, a second chopping control switch, a comparator circuit, and a clock non-overlapping circuit;

[0007] The current bias circuit has an input end for receiving an external bias current, an output end connected to the charge-discharge circuit and the adjustable resistance network circuit respectively through the first chopper control switch, the output ends of the charge-discharge circuit and the adjustable resistance network circuit are connected to the input end of the comparator circuit through the second chopper control switch, the output end of the comparator circuit is connected to the input end of the clock non-overlapping circuit, and the output end of the clock non-overlapping circuit is connected to the charge-discharge circuit, the first chopper control switch, and the second chopper control switch respectively;

[0008] The current bias circuit outputs a bias current signal I1 and a bias current signal I2 through an internal current mirror. The first chopper control switch receives the bias current signal I1, the bias current signal I2 and the periodic pulse signal generated by the clock non-overlapping circuit, and alternates according to a period to output the bias current signal I1 and the bias current signal I2 to the charge-discharge circuit and the adjustable resistor network circuit, or to the adjustable resistor network circuit and the charge-discharge circuit respectively. The charge-discharge circuit receives the bias current signal I1 / bias current signal I2 and the The clock non-overlapping circuit generates a periodic pulse signal, outputs a triangular wave signal to the second chopper-controlled switch, the adjustable resistor network circuit receives the bias current signal I1 / bias current signal I2, generates an adjustable reference voltage, and outputs it to the second chopper-controlled switch, the comparator circuit receives the triangular wave signal and the reference voltage to achieve RC oscillation output, and the clock non-overlapping circuit converts the periodic signal output by the comparator into four non-overlapping clock signals for controlling the charge and discharge circuit, the first chopper-controlled switch, and the second chopper-controlled switch.

[0009] Furthermore, the current bias circuit includes a current mirror composed of three P-type transistors, which converts the input external bias current into equal bias current signals I1 and I2, and outputs them to the first chopper control switch.

[0010] Furthermore, the charge and discharge circuit includes a first charge and discharge circuit and a second charge and discharge circuit, the first charge and discharge circuit includes a first switch and a first capacitor, the second charge and discharge circuit includes a second switch and a second capacitor, and the first switch and the second switch are respectively controlled by two non-overlapping clock signals generated by the clock non-overlapping circuit.

[0011] Further, the first chopping control switch and the second chopping control switch each include four switches, and the four switches are respectively controlled by four non-overlapping clock signals generated by the clock non-overlapping circuit;

[0012] The first chopper control switch is used to alternately output the bias current signal I1 and the bias current signal I2 to the first charge-discharge circuit and the adjustable resistor network circuit, or to the adjustable resistor network circuit and the second charge-discharge circuit, respectively, in a periodic manner;

[0013] The second chopping control switch is used to alternately output the voltage Vcp of the first charge and discharge circuit and the reference voltage Vref of the adjustable resistor network circuit, or the voltage Vcn of the second charge and discharge circuit and the reference voltage Vref of the adjustable resistor network circuit, to the positive terminal and negative terminal of the comparator circuit respectively.

[0014] Furthermore, the adjustable resistor network circuit includes an adjustable resistor R and a temperature compensation resistor RTC connected in series, and is configured to receive the bias current signal and generate a reference voltage control signal.

[0015] Furthermore, the adjustable resistor R includes a plurality of parallel resistor units connected in series, the parallel resistor unit includes the first small resistor and the large resistor connected in parallel, and one end of the large resistor is connected in series with a MOSFET switch tube.

[0016] Furthermore, the resistance of the large resistor is at least 50 times the resistance of the first small resistor.

[0017] Compared to the prior art, the at least one technical solution employed in the embodiments of this specification achieves at least the following beneficial effects: Through a simple design approach, the embodiments of the present invention, while employing only a single comparator, effectively avoid the effects of comparator offset voltage. By adjusting the reference voltage control signal generated by an adjustable resistor and temperature compensation, high-precision clock output is achieved in various environments. Fine-tuning accuracy can be achieved to 0.5% under various process conditions, with temperature drift as low as 0.75ppm / °C. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following briefly introduces the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0019] Figure 1 is a schematic diagram of a circuit according to an embodiment of the present invention;

[0020] Figure 2 is a specific circuit diagram of an embodiment of the present invention;

[0021] Figure 3 1 is a working waveform diagram of key signals in the circuit of an embodiment of the present invention;

[0022] Figure 4 The frequency initial value adjustment and temperature compensation circuit in the embodiment of the present invention;

[0023] Figure 5 It is a clock non-overlapping circuit in an embodiment of the present invention;

[0024] Figure 6 is a comparator circuit in an embodiment of the present invention. DETAILED DESCRIPTION

[0025] The embodiments of the present application are described in detail below with reference to the accompanying drawings.

[0026] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of this application can be combined with each other. The present invention will be described in detail below with reference to the accompanying drawings and in combination with the embodiments, and the technical solutions of the present invention will be clearly and completely described. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0027] like Figure 1 As shown, an embodiment of the present invention provides a high-precision RC oscillator circuit, comprising: a current bias circuit, a charge and discharge circuit, an adjustable resistance network circuit, a first chopping control switch, a second chopping control switch, a comparator circuit, and a clock non-overlapping circuit;

[0028] The current bias circuit has an input end for receiving an external bias current, an output end connected to the charge-discharge circuit and the adjustable resistance network circuit respectively through the first chopper control switch, the output ends of the charge-discharge circuit and the adjustable resistance network circuit are connected to the input end of the comparator circuit through the second chopper control switch, the output end of the comparator circuit is connected to the input end of the clock non-overlapping circuit, and the output end of the clock non-overlapping circuit is connected to the charge-discharge circuit, the first chopper control switch, and the second chopper control switch respectively;

[0029] The current bias circuit outputs a bias current signal I1 and a bias current signal I2 through an internal current mirror. The first chopper control switch receives the bias current signal I1, the bias current signal I2 and the periodic pulse signal generated by the clock non-overlapping circuit, and alternates according to a period to output the bias current signal I1 and the bias current signal I2 to the charge-discharge circuit and the adjustable resistor network circuit, or to the adjustable resistor network circuit and the charge-discharge circuit respectively. The charge-discharge circuit receives the bias current signal I1 / bias current signal I2 and the clock non-overlapping circuit. The overlapping circuit generates a periodic pulse signal and outputs a triangular wave signal to the second chopper-controlled switch. The adjustable resistor network circuit receives the bias current signal I1 / bias current signal I2, generates an adjustable reference voltage control signal VREF, and outputs it to the second chopper-controlled switch. The comparator circuit receives the triangular wave signal and the reference voltage to achieve RC oscillation output. The clock non-overlapping circuit converts the periodic signal output by the comparator into four non-overlapping clock signals for controlling the charge and discharge circuit, the first chopper-controlled switch, and the second chopper-controlled switch.

[0030] The technical solution provided by the present invention is further described below with reference to the accompanying drawings and specific embodiments.

[0031] Figure 1 A high-precision, adjustable, temperature-compensated RC oscillator provided in an embodiment of the present invention includes a current bias circuit, a charge-discharge switch and a capacitor circuit, an adjustable resistor network, a first chopping control switch, a second chopping control switch, a high-precision comparator circuit, and a clock non-overlapping resistor.

[0032] Figure 2 The diagram shows the implementation of some specific circuits in the embodiment of the present invention.

[0033] The current bias circuit is composed of a current mirror composed of three P-type transistors, which converts the input current Iref into two equal currents. The bias current signal I1 and the bias current signal I2 are output to the first chopper control switch.

[0034] The first chopping control switch is composed of four switches of equal size, which receive the output bias current signal I1 and the bias current signal I2 from the current bias circuit. The four switches are respectively controlled by four non-overlapping clock signals output by non-overlapping clocks, namely phi0, phi0b, phi1, and phi1; the bias current signal I1 and the bias current signal I2 are controlled and output alternately to the charge and discharge circuit and the adjustable resistor network, or the adjustable resistor network and the charge and discharge circuit according to a cycle.

[0035] The charge and discharge circuit consists of two switches of equal size and two equal capacitors C1 and C2; the two switches are controlled by two non-overlapping clock signals output by non-overlapping clocks, namely phi0b and phi1b, and the voltage Vcp on the switch capacitor C1 and the voltage Vcn on the switch capacitor C2 are output to the second chopping control switch.

[0036] The adjustable resistor network circuit is composed of an adjustable resistor R and a temperature compensation resistor RTC, receives a bias current passing through a first chopping control switch, and generates a reference voltage VREF.

[0037] The second chopping control switch consists of four switches of equal size, which receive the output voltages Vcp and Vcn from the capacitor charging and discharging circuit, and the output voltage VREF of the adjustable resistor network; the four switches are controlled by four non-overlapping clock signals output by non-overlapping clocks, namely phi0, phi0b, phi1, and phi1; through the second chopping control circuit, Vcp, Vref and Vref, Vcn are output to the positive and negative terminals of the high-speed comparator in turn.

[0038] Figure 3 The waveform diagram of the key signals during normal operation of the embodiment of the present invention is shown. During normal operation, the clock output is composed of two phases, phi0 and phi1, which are periodically alternating.

[0039] In the phi0 stage, the current I1 starts to charge the charge and discharge capacitor C1, and the voltage of C1 is output to the positive terminal of the comparator. The current I2 flows through the trimming resistor, and the voltage on the resistor is output to the negative terminal of the comparator. When the voltage on C1 is charged to exceed the voltage on the resistor, the comparator triggers the level conversion from low to high. At this time, considering the current, capacitance and offset voltage of the comparator, we get

[0040] T0*I1=C*(V ref1 -V os )=C*(I2*RV os )

[0041]

[0042] In the phi1 stage, the current I2 starts to charge the charge and discharge capacitor C2, and the voltage of C2 is output to the negative terminal of the comparator. The current I1 flows through the trimming resistor R, and the voltage on the resistor is output to the positive terminal of the comparator. When the voltage on C2 is charged to exceed the voltage on the resistor, the comparator triggers the level conversion from high to low. At this time, considering the current, capacitance and offset voltage of the comparator, we get

[0043] T1*I2=C*(V ref2 +V os)=C*(I1*R+V os )

[0044]

[0045] From then on, the circuit returns to the phi0 stage and continues to cycle through the phi0 and phi1 stages. The output clock cycle is (1) + (2) plus the delay of the comparator.

[0046]

[0047] Equation (3) shows that the output period, affected by current error and comparator offset, has been reduced to second-order, negligible output error. The output period is now solely dependent on R, C, and the comparator delay. The output period is independent of current value, mismatch, capacitor mismatch, and comparator offset voltage. Therefore, simply adjusting the process parameters of the resistors and capacitors can yield a high-precision clock output. However, due to temperature drift in the resistors, capacitors, and comparator delay, temperature offset compensation is also necessary.

[0048] like Figure 4 As shown, Figure 4 The adjustable resistor network circuit in an embodiment of the present invention is shown as comprising an adjustable resistor R and a temperature compensation resistor RTC in series. The adjustable resistor R comprises a plurality of parallel resistor units connected in series, each of which comprises a first small resistor and a large resistor connected in parallel, with one end of the large resistor connected in series with a MOSFET switch.

[0049] The trimming network is an improved circuit that uses a large parallel resistor and a series switch. When the switch transistor M0 is off, the equivalent resistance between RB0 is R. When the switch transistor M0 is on, the equivalent resistance between RB0 is the parallel combination of R and 100R.

[0050]

[0051] Where Reff is the equivalent resistance value, Rdson is the on-resistance of the switch, and the resistance difference ΔR before and after the switch is turned on and off is:

[0052]

[0053] When the resistance R is equal to that of Rdson, or when the resistance R is greater than that of Rdson, the resistance of Rdson is relatively small relative to that of 101R. Ignoring Rdson, the resistance value adjusted by this trimming position is approximately 0.01R.

[0054] The trimming circuit further includes a temperature compensation resistor RTC, since the output clock period is mainly determined by RC.

[0055]

[0056] Ignoring the second-order temperature coefficient, the above formula can be simplified to

[0057] T period (T) = R(T nom )*C(T nom )(1+(TC1 R +TC1 C )*((TT nom ))

[0058] The temperature coefficient of the resistor R and the charge and discharge capacitor C are added together to determine the temperature coefficient of the final output clock cycle. Since the temperature coefficients of R and C are different in the process, they cannot cancel each other out. The temperature compensation resistor described in the present invention is a resistor of a different type from the trimming resistor. The temperature coefficient of this type of resistor is different from that of the trimmable resistor. The resistance value of the compensation resistor is reasonably selected so that the temperature coefficient of the resistor is exactly compensated (TC1 R +TC1 C ).

[0059] In this embodiment, the resistors used in the resistance-trimming network are low-positive temperature-coefficient resistors, while the capacitors are negative temperature-compensating resistors. Temperature compensation utilizes a different type of resistor with a temperature coefficient hundreds of times greater than that of the trimming network resistors. Because of this significant difference in temperature coefficients, a significantly smaller resistor of this type, connected in series, can achieve lower temperature drift without trimming the compensation resistor. In this embodiment, the final trimmed temperature coefficient can be as low as 0.75ppm / °C.

[0060] Figure 5 FIG2 shows a clock non-overlapping circuit according to an embodiment of the present invention. The circuit is a traditional clock non-overlapping circuit composed of two NAND gates and eight inverters, and is used to generate clock signals with four non-overlapping edges.

[0061] Figure 6 The figure shows a high-speed comparator circuit according to an embodiment of the present invention. The offset voltage of this high-speed comparator circuit is eliminated by chopping control at the front end of the oscillator, so the size selection is relatively flexible, primarily considering comparison speed. This high-speed comparator is a high-gain comparator consisting of three amplifier stages. The first two stages are high-speed, low-gain pre-amplifiers, and the third stage is a relatively high-gain decision stage.

[0062] The embodiment of the present invention eliminates the influence of the offset error of the charging and discharging circuit and the comparator while using only one comparator, and achieves high-precision clock signal output under different environments by adjusting the reference voltage control signal generated by the adjustable resistor and temperature compensation.

[0063] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in the present application should be included in the scope of protection of the present application. Therefore, the scope of protection of the present application should be based on the scope of protection of the claims.

Claims

1. A high-precision RC oscillator circuit, characterized in that: include: A current bias circuit, a charge and discharge circuit, an adjustable resistance network circuit, a first chopping control switch, a second chopping control switch, a comparator circuit, and a clock non-overlapping circuit; The current bias circuit has an input end for receiving an external bias current, an output end connected to the charge-discharge circuit and the adjustable resistance network circuit respectively through the first chopper control switch, the output ends of the charge-discharge circuit and the adjustable resistance network circuit are connected to the input end of the comparator circuit through the second chopper control switch, the output end of the comparator circuit is connected to the input end of the clock non-overlapping circuit, and the output end of the clock non-overlapping circuit is connected to the charge-discharge circuit, the first chopper control switch, and the second chopper control switch respectively; The current bias circuit outputs a bias current signal I1 and a bias current signal I2 through an internal current mirror. The first chopper control switch receives the bias current signal I1, the bias current signal I2, and a periodic pulse signal generated by the clock non-overlapping circuit, and alternately outputs the bias current signal I1 and the bias current signal I2 to the charge-discharge circuit and the adjustable resistor network circuit, or to the adjustable resistor network circuit and the charge-discharge circuit, respectively. The charge and discharge circuit receives the bias current signal I1 / bias current signal I2 and the periodic pulse signal generated by the clock non-overlapping circuit, and outputs a triangular wave signal to the second chopper-controlled switch. The adjustable resistor network circuit receives the bias current signal I1 / bias current signal I2, generates an adjustable reference voltage, and outputs it to the second chopper-controlled switch. The comparator circuit receives the triangular wave signal and the reference voltage to achieve RC oscillation output. The clock non-overlapping circuit converts the periodic signal output by the comparator into four non-overlapping clock signals for controlling the charge and discharge circuit, the first chopper-controlled switch, and the second chopper-controlled switch.

2. The high-precision RC oscillator circuit according to claim 1, characterized in that: The current bias circuit includes a current mirror composed of three P-type transistors, which converts the input external bias current into equal bias current signals I1 and I2, and outputs them to the first chopper control switch.

3. The high-precision RC oscillator circuit according to claim 1, wherein: The charge and discharge circuit includes a first charge and discharge circuit and a second charge and discharge circuit, the first charge and discharge circuit includes a first switch and a first capacitor, the second charge and discharge circuit includes a second switch and a second capacitor, and the first switch and the second switch are respectively controlled by two non-overlapping clock signals generated by the clock non-overlapping circuit.

4. The high-precision RC oscillator circuit according to claim 3, characterized in that: The first chopping control switch and the second chopping control switch each include four switches, and the four switches are respectively controlled by four non-overlapping clock signals generated by the clock non-overlapping circuit; The first chopper control switch is used to alternately output the bias current signal I1 and the bias current signal I2 to the first charge-discharge circuit and the adjustable resistor network circuit, or to the adjustable resistor network circuit and the second charge-discharge circuit, respectively, in a periodic manner; The second chopping control switch is used to alternately output the voltage Vcp of the first charge and discharge circuit and the reference voltage Vref of the adjustable resistor network circuit, or the voltage Vcn of the second charge and discharge circuit and the reference voltage Vref of the adjustable resistor network circuit, to the positive terminal and negative terminal of the comparator circuit respectively.

5. The high-precision RC oscillator circuit according to claim 1, wherein: The adjustable resistor network circuit includes an adjustable resistor R and a temperature compensation resistor RTC connected in series, and is used to receive the bias current signal and generate a reference voltage control signal.

6. The high-precision RC oscillator circuit according to claim 5, characterized in that: The adjustable resistor R includes a plurality of parallel resistor units connected in series. The parallel resistor unit includes a first small resistor and a large resistor connected in parallel. One end of the large resistor is connected in series with a MOSFET switch tube.

7. The high-precision RC oscillator circuit according to claim 6, characterized in that: The resistance of the large resistor is at least 50 times the resistance of the first small resistor.

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