Full-process low-frequency signal parallel synchronous search method

Abstract

The present invention relates to the technical field of communication signal processing, and in particular provides a parallel synchronous search method for low-frequency signals throughout the whole process, including the steps of: acquiring an input signal, acquiring a plurality of local synchronous codes with different rates, performing square loop search calculations, and acquiring corresponding correlation values; acquiring the maximum value of the correlation values greater than the synchronous threshold, and outputting the maximum correlation amplitude corresponding to the correlation value; calculating the synchronous credibility, acquiring the starting point of the received data based on the maximum synchronous credibility and determining the rate of the received data, and receiving data at this rate; judging whether the data reception time has ended, and if not, repeating steps S1-S3 to update the maximum synchronous credibility. The present invention realizes fast and accurate synchronization of a short synchronization header with a low signal-to-noise ratio and automatic rate identification by continuously searching for the synchronous signal through multiple loops and updating the synchronous information, solves the problem of false synchronization / missing synchronization existing in the existing methods, and can still ensure stable and reliable reception of data information in the case of false start.

Description

Technical Field

[0001] The present invention relates to the technical field of communication signal processing, and in particular, to a method for parallel synchronous search of low-frequency signals throughout the whole process. Background Art

[0002] Low-frequency signals have small atmospheric attenuation, can penetrate deeper seawater and strata, and are suitable for mine through-earth communication, long-distance communication, and underwater communication. However, the atmospheric noise of low-frequency channels is large, complex and variable, and the signals are often completely submerged in the noise. In the worst case, the signal-to-noise ratio is as low as about -10 dB, and it is difficult to synchronously identify the signals.

[0003] Currently, after receiving a carrier signal, a low-frequency communication system first performs filtering processing, then demodulates the signal, and performs synchronous detection based on the demodulated data. After traditional communication systems perform carrier, symbol, and frame synchronization, they consider that the signal starting point has been found and stop synchronous search until the data reception is completed and then start the synchronous search for the next data. The maximum correlation value among them is used as the starting point of the signal, and the synchronous search is stopped without judging whether this starting point is the real signal starting point. It will not start the synchronous search again until the next frame of information arrives. Once a misjudgment occurs, data information will be lost; this method has problems such as large synchronous errors and slow speed under complex noise conditions, so it is only applicable to occasions with relatively high signal-to-noise ratios of signals. However, in practical applications, the signal-to-noise ratio of signals is often low, so data virtual and missed start situations occur frequently, and data cannot be effectively received. To cope with the misjudgment caused by such problems, it is necessary to lengthen the synchronization header, making the synchronization header length reach 128 to 512 bits. The long synchronization header will occupy additional communication resources and bring large communication overheads.

[0004] Generally, to reduce communication overheads, the length of the low-frequency receiving synchronization header should usually be less than 128 bits. When using the traditional synchronization method to search for low-signal-to-noise ratio signals, the short synchronization code will cause frequent data virtual / missed start phenomena, seriously affecting the correct data reception rate. Therefore, low-frequency communication poses higher requirements for the fast synchronization of short synchronization codes. To solve the above problems, the whole-process parallel synchronization algorithm of the present invention realizes the fast and accurate synchronization of weak signals and automatic rate recognition. Summary of the Invention

[0005] The present invention provides a method for parallel synchronous search of low-frequency signals throughout the whole process, which is used to solve the defects in the prior art that using a long synchronization header occupies additional communication resources and data virtual / missed start situations occur frequently, realizes the fast and accurate synchronization of weak signals and automatic rate recognition, reduces data virtual / missed start phenomena, and stably and reliably receives data information.

[0006] The present invention provides a method for parallel synchronous search of low-frequency signals throughout the whole process, which is characterized by including:

[0007] S1 Obtain the input signal and obtain multiple local synchronization codes with different rates; for each local synchronization code with a different rate, perform square loop search calculations on the input signal simultaneously to obtain each group of correlation values corresponding to each rate;

[0008] S2 Compare each correlation value with the synchronization threshold at the same rate, obtain the maximum value of the correlation values greater than the synchronization threshold in each group of correlation values, and output the maximum correlation amplitude corresponding to each group of correlation values respectively;

[0009] S3 Calculate the synchronization credibility corresponding to each rate based on the maximum correlation amplitude and the synchronization threshold corresponding to each group of correlation values, obtain the starting point of the received data based on the maximum synchronization credibility and determine the rate of the received data, and perform data reception at this rate;

[0010] S4 When performing data reception, determine whether the data reception time has ended. If not, repeat steps S1 - S3 to continuously obtain new maximum synchronization credibility. If the new maximum synchronization credibility is greater than the original maximum synchronization credibility, update the starting point of the received data and the rate of the received data according to the new maximum synchronization credibility, and re - perform data reception at this rate.

[0011] Specifically, in step S1, obtain N groups of correlation values R i (n) corresponding to N rates through square loop search calculations;

[0012] Obtain the input signal x(t) and obtain the local synchronization codes y i (t) of N rates, and apply the formula:

[0013]

[0014] where the length of the input signal is m·T C , and the local synchronization codes y i (t) of the N rates are generated by m - sequences, m is the length of the synchronization code, 1 ≤ i ≤ N, N = 1 - 8;

[0015] T 0 is the sampling signal time interval; T C is the synchronization code chip width; n is the number of sliding chips, n = 1, 2,..., k; where k is the number of data received each time, k = T C / T 0 .

[0016] Specifically, before step S2, it includes calculating the synchronization threshold T i :

[0017]

[0018] Calculate and obtain the synchronization threshold T of the i - th ratei ;

[0019] Where α is the synchronous leakage start probability.

[0020] Specifically, step S2 includes:

[0021] Compare the N groups of correlation values with the corresponding N synchronous thresholds respectively to determine whether there is a correlation value in the i-th group of correlation values that is greater than the corresponding synchronous threshold;

[0022] If there is, obtain the correlation value M i (n) in the i-th group of correlation values that is greater than the corresponding synchronous threshold, and judge the maximum value in the i-th group of correlation values M i (n), and calculate to obtain the maximum correlation amplitude S i :

[0023] S i = max{M i (n)} / 1.414, i = 1, 2,..., N.

[0024] Specifically, step S2 also includes:

[0025] If there is no correlation value in the i-th group of correlation values that is greater than the corresponding synchronous threshold, then set the data reception time as t = t + kT 0 , and go to the next signal sampling point to repeat step S1 and subsequent steps.

[0026] Where step S3 includes:

[0027] Based on the maximum correlation amplitude S i corresponding to the i-th group of correlation values and the synchronous threshold T i , take the ratio of the maximum correlation amplitude S i and the synchronous threshold T i to calculate the synchronous credibility of the i-th group, and obtain the maximum synchronous credibility:

[0028] W = max{S i / T i}.

[0029] Specifically, step S3 includes:

[0030] After obtaining the maximum synchronous credibility, obtain the value of the maximum correlation amplitude S i corresponding to the maximum synchronous credibility W, and determine the correlation value M i corresponding to S i (n);

[0031] Based on the number n of sliding chips corresponding to the correlation value M i (n), at time t + n·T Cis the starting point of the received data, with M i (n), the i-th rate corresponding to the i-th group of correlation values is the rate of the received data, and let the data reception time be t = t + kT 0 .

[0032] Specifically, step S4 includes:

[0033] If it is determined that the data reception time has ended, the received data is decoded, all synchronization credibility is cleared, and steps S1 - S3 are repeatedly executed when receiving subsequent data.

[0034] The present invention also provides an electronic device, including a memory, a processor, and a computer program stored on the memory and executable on the processor. When the processor executes the program, the steps of any of the above-mentioned low-frequency signal parallel synchronization search methods are implemented.

[0035] The present invention also provides a non-transitory computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps of any of the above-mentioned low-frequency signal parallel synchronization search methods are implemented.

[0036] A full-process low-frequency signal parallel synchronization search method provided by the present invention has at least the following technical effects compared with the prior art:

[0037] (1) Using a square loop model to design a synchronization search algorithm can adapt to synchronization search under low signal-to-noise ratio, carry out normalized synchronization threshold calculation, and can adapt to signal amplitude changes;

[0038] (2) Converting synchronization correlation values of various different rates into unified synchronization credibility comparisons can accurately determine which rate the data information comes from. When there is strong signal interference, it can start data reception while continuing to search for a new synchronization signal when a short synchronization header has a false start, realizing full-process parallel synchronization search for each chip of all rates;

[0039] (3) By continuously searching for synchronization signals in multiple cycles and updating synchronization information, it realizes fast and accurate synchronization of short synchronization headers with low signal-to-noise ratio and automatic rate identification. It can still ensure that real data signals are not missed during short synchronization, realizing reliable reception of short synchronization header information with low signal-to-noise ratio, improving the reliability and effectiveness of low-frequency communication. Solving the problems of false synchronization / missing synchronization in existing low-frequency signal processing methods, realizing fast and accurate synchronization of weak signals and automatic rate identification, overcoming the phenomena of data false start / missing start, and still ensuring stable and reliable reception of data information in case of false start. Description of the Drawings

[0040] To more clearly illustrate the technical solutions in the present invention or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0041] Figure 1 is one of the schematic flowcharts of the full-process low-frequency signal parallel synchronous search method provided by the present invention;

[0042] Figure 2 is the second of the schematic flowcharts of the full-process low-frequency signal parallel synchronous search method provided by the present invention. Detailed implementation manners

[0043] To make the objectives, technical solutions, and advantages of the present invention clearer, the following will clearly and completely describe the technical solutions in the present invention in conjunction with the drawings in the present invention. Obviously, the described embodiments are some, but not all, of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts fall within the scope of protection of the present invention.

[0044] The terms "including" and "having" in the specification, claims, and above-mentioned drawings of this application, as well as any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or modules is not limited to the listed steps or modules, but may optionally further include steps or modules not listed, or may optionally further include other steps or modules inherent to these processes, methods, products, or devices.

[0045] The following explanations are given for the relevant definitions involved in this application:

[0046] Sampling time interval T 0 : The time interval between two data received by the receiving device;

[0047] Synchronization code: A group of bits used for the receiving device to detect the synchronization between the sequence and the input signal is called a synchronization code;

[0048] Synchronization code length m: The number of bits included in the synchronization code is called the synchronization code length;

[0049] Synchronization code chip width T C : Each bit included in the synchronization code is called a chip, and the time occupied by each bit is called the synchronization code chip width, which is set by the communication system;

[0050] Synchronization leakage start probability α: The ratio of the number of data not received by the receiving device to the total transmitted data during the data reception test. After demodulating the signal, the signal-to-noise ratio and the synchronization leakage start probability can be calculated from the demodulated data.

[0051] In one embodiment, as Figure 1-2 shown, a full-process low-frequency signal parallel synchronization search method provided by the present invention includes step S1 square loop synchronization search calculation; S2 synchronization threshold decision calculation; S3 synchronization credibility calculation; S4 data reception processing, specifically including:

[0052] In step S1, the square loop synchronization search calculation includes:

[0053] Obtain the input signal and obtain multiple local synchronization codes with different rates; for each local synchronization code with a different rate, perform square loop search calculations on the input signal respectively to obtain each group of correlation values corresponding to each rate;

[0054] Specifically, in step S1, N groups of correlation values R i (n) corresponding to N rates are obtained through square loop search calculation;

[0055] Obtain the input signal x(t) and obtain N local synchronization codes y i (t), and apply the formula:

[0056]

[0057] where the length of the input signal is m·T C , and the N local synchronization codes y i (t) are generated by the m-sequence, m is the length of the synchronization code, 1≤i≤N, N = 1 to 8;

[0058] T 0 is the sampling signal time interval; T C is the synchronization code chip width; n is the number of sliding chips, n = 1, 2,..., k; where k is the number of data received each time, k = T C / T 0 ;

[0059] Furthermore, calculate the synchronization threshold:

[0060] Obtain the synchronization threshold T i under the condition of input amplitude normalization:

[0061]

[0062] Calculate and obtain the synchronization threshold T i for the i-th rate;

[0063] Among them, α is the synchronous leakage start probability;

[0064] It should be noted that through the normalized synchronization threshold calculation, the algorithm can adapt to the signal amplitude change;

[0065] Further, perform the threshold decision step, and execute step S2:

[0066] S2 compares each correlation value with the synchronization threshold at the same rate respectively, obtains the maximum value of the correlation values greater than the synchronization threshold in each group of correlation values, and outputs the maximum correlation amplitude corresponding to each group of correlation values respectively;

[0067] Specifically, step S2 includes:

[0068] Compare the N groups of correlation values with the N synchronization thresholds corresponding to the respective rates, and determine whether there are correlation values greater than the corresponding synchronization threshold in the i-th group of correlation values;

[0069] If there are, obtain the correlation value M i (n) greater than the corresponding synchronization threshold in the i-th group of correlation values, and judge the maximum value in the i-th group of correlation values M i (n), and calculate to obtain the maximum correlation amplitude S i :

[0070] S i = max{M i (n)} / 1.414, i = 1, 2,..., N.

[0071] Specifically, step S2 also includes:

[0072] If there are no correlation values greater than the corresponding synchronization threshold in the i-th group of correlation values, then set the data reception time as t = t + kT 0 , and go to the next signal sampling point to repeat step S1 and the subsequent steps.

[0073] Further, calculate the synchronization credibility based on the maximum correlation amplitude and the synchronization threshold calculated in the above steps, including:

[0074] S3 calculates the synchronization credibility corresponding to each rate based on the maximum correlation amplitude and the synchronization threshold corresponding to each group of correlation values, obtains the starting point of the received data based on the maximum synchronization credibility, determines the rate of the received data, and performs data reception at this rate;

[0075] Among them, step S3 includes:

[0076] Based on the maximum correlation amplitude S i corresponding to the i-th group of correlation values and the synchronization threshold T i , take the maximum correlation amplitude S i and the synchronization threshold T iCalculate the synchronization credibility of the i-th group based on the ratio, and obtain the maximum synchronization credibility:

[0077] For each correlation value corresponding to the rate synchronization code, calculate the synchronization credibility corresponding to this group of data, and obtain the maximum value of the synchronization credibility from the synchronization credibilities obtained from the data corresponding to all rates, that is:

[0078] W = max{S i / T i};

[0079] Specifically, step S3 includes:

[0080] After obtaining the maximum synchronization credibility, obtain the value of the maximum correlation amplitude S i corresponding to the maximum synchronization credibility W, and determine the correlation value M i corresponding to S i (n);

[0081] Based on the number n of sliding chips corresponding to the correlation value M i (n), with time t + n·T C as the starting point of the received data, with the i-th rate corresponding to the i-th group of correlation values corresponding to M i (n) as the rate of the received data, and let the data reception time be t = t + kT 0 ;

[0082] It should be noted that through the calculation and comparison method of synchronization credibility, the synchronization correlation values of various different rates are converted into unified synchronization credibility comparisons, which can accurately judge which rate the data information comes from; especially when there is strong signal interference, when a short synchronization header has a false start, start data reception while continuing to search for a new synchronization signal, so as to achieve full-rate parallel synchronization search for each chip in the whole process. When the real data information arrives, capture the synchronization signal to replace the false start signal, update the synchronization information by continuously searching for the synchronization signal in multiple cycles, and still ensure that the real data signal is not missed when the short synchronization overhead is small;

[0083] Furthermore, process the received data to determine whether it is necessary to repeat steps S1 - S3 to update the maximum synchronization credibility, specifically including:

[0084] When performing data reception in S4, judge whether the data reception time has ended. If it has not ended, repeat steps S1 - S3 to continuously obtain a new maximum synchronization credibility. If the new maximum synchronization credibility is greater than the original maximum synchronization credibility, update the received data starting point and the received data rate according to the new maximum synchronization credibility, and restart data reception at this rate;

[0085] Specifically, in the whole-process full-rate synchronous parallel search method provided by the present invention, during the whole process of data reception, if it is still within the data reception time, while initially searching for a synchronization signal and transferring to the data reception processing step, the synchronous search at the full rate is still carried out, and the maximum synchronization credibility calculated initially is compared with the synchronization credibility calculated from the current synchronization information;

[0086] When a synchronization signal with a greater synchronization credibility is subsequently searched, it is determined that the previous synchronization is a false start, the correct synchronization information is selected, the synchronization data is accurately found, and the current data reception is updated and re-received to ensure that no information reception is missed, realizing reliable reception of short synchronization header and low signal-to-noise ratio information.

[0087] Furthermore, step S4 further includes:

[0088] If it is determined that the data reception time has ended, the corresponding maximum correlation amplitude is determined according to the maximum value of the synchronization credibility calculated previously, thereby obtaining the corresponding number n of sliding chips, and then determining the starting point of the received data, and receiving the data at the rate corresponding to the data with the highest synchronization credibility;

[0089] For example, the maximum correlation amplitude corresponding to the highest synchronization credibility W is S 2 , S 2 The corresponding correlation value is M 2 (n), M 2 (n) is the correlation value greater than the synchronization threshold in the second group of correlation values, corresponding to the rate 2 synchronization code, and thus it is determined to receive the data at the rate 2 corresponding to the second group of correlation values;

[0090] Decode the received data, clear all synchronization credibilities, and repeat steps S1 - S3 when receiving subsequent data, so as to ensure that when receiving the next signal data, the correct synchronization information is selected, the synchronization signal is searched through multi-cycle uninterruptedly and the synchronization information is updated, and it is still possible to ensure that no real data signal is missed when the short synchronization overhead is small.

[0091] As Figure 2 shown, the whole-process low-frequency signal parallel synchronous search method provided by the present invention includes the steps of:

[0092] Receive the input signal x(t);

[0093] Perform synchronous search algorithms for rates 1 to N respectively, and calculate the corresponding groups of correlation values for the current rate through the input signal and the local synchronous signals y n (t) of rates 1 to N;

[0094] Perform threshold decision on each group of correlation values respectively, compare all the correlation values, and retain the correlation values M i greater than the decision threshold Ti (n); if there is no correlation value greater than the decision threshold T i , then perform synchronous search calculation on the synchronization code of the next data sampling point;

[0095] Perform synchronous reliability calculation and comparison to obtain the current maximum synchronous reliability;

[0096] If the data reception time has not ended, repeat the above steps to continue searching for higher synchronous reliability points; if the data reception time has ended, perform decoding based on the current maximum synchronous reliability calculated.

[0097] In one implementation, the full - process low - frequency signal parallel synchronous search method provided by the present invention includes:

[0098] (1) Square - loop search correlation calculation steps:

[0099] As an example, assume the input carrier signal

[0100] where, a n = 1, -1, 1, -1, 1, -1, 1, -1, and n(t) is Gaussian white noise obeying the normal distribution of (0, 1), and perform square - loop search correlation calculation simultaneously with the local synchronization signal y i (t) at N = 4 rates (for example, rate 1 = 1 bit / s, rate 2 = 2 bit / s, rate 3 = 4 bit / s, rate 4 = 8 bit / s);

[0101] For easy understanding, assume that the four local synchronization signals are generated by m - sequences with lengths of 2, 4, 8, and 16 respectively, and are respectively:

[0102] where:

[0103] a 1 = 1, -1;

[0104] a 2 = 1, 1, -1, -1;

[0105] a 3 = 1, -1, 1, -1, 1, -1, 1, -1;

[0106] a 4 = 1, -1, 1, 1, -1, -1, -1, 1, 1, -1, 1, -1, 1, -1, 1, -1;

[0107] Perform square - loop search correlation calculation on the input signal x(t) simultaneously with the local synchronization codes y i (t) at N = 4 rates respectively to obtain N = 4 groups of correlation values Ri (n):

[0108]

[0109] wherein, the length of the input signal is m·T C , N local synchronization codes y i (t) are generated by the m-sequence, 1 ≤ i ≤ N;

[0110] In this embodiment, it is assumed that N = 4; is the sampling signal time interval; is the synchronization code chip width; m = 2, 4, 8, 16 is the length of the synchronization code; n is the number of sliding chips, n = 1, 2,..., k; where k is the number of data received each time,

[0111] In this embodiment, it is assumed that 4 groups of correlation values R i (n) are respectively:

[0112] R 1 = 1.2, 0.35;

[0113] R 2 = -0.8, 0.75, 0.65, -0.46;

[0114] R 3 = -1.28, 5.6, 0.4, -0.62, -0.8, 0.75, 0.65, -0.46;

[0115] R 4 = 0.43, 0.51, 0.41, 0.54, -0.84, 0.72, 0.66, -0.42, -0.32, 0.75, 0.35, 0.32, -0.76, 0.92, 0.48, -0.28;

[0116] (2) Calculate the synchronization threshold:

[0117] According to m = 2, 4, 8, 16, N = 4, false start probability α = 10 -5 , substitute into the following formula to calculate the synchronization thresholds at each rate:

[0118]

[0119] The calculation results are as follows: T 1 = 6.785, T 2 = 4.8, R 3 = 3.393, T 4 = 2.4;

[0120] (3) Threshold decision steps:

[0121] Compare the relevant values at each corresponding moment with the synchronization threshold R 1 with the synchronization threshold R 1 = 6.785;

[0122] Compare the relevant values at each corresponding moment with the synchronization threshold T 2 with the synchronization threshold T 2 = 4.8;

[0123] Compare the relevant values at each corresponding moment with the synchronization threshold T 3 with the synchronization threshold T 3 = 3.393;

[0124] Compare the relevant values at each corresponding moment with the synchronization threshold T 4 with the synchronization threshold T 4 = 2.4;

[0125] Only when the second relevant value 5.6 in R 3 exceeds its synchronization threshold T 3 = 3.393, record it as M 3 (2), and return to step (1) at other moments to continue the relevant calculations of the square loop search;

[0126] Find the maximum correlation amplitude of M 3 (2), denoted as S 3 :

[0127] S 3 = max{M 3 (2)} / 1.141 = 5.6 / 1.414 = 3.96;

[0128] (4) Synchronization credibility calculation:

[0129] Calculate the synchronization credibility W:

[0130]

[0131] Compare the maximum synchronization credibility W, which corresponds to S 3 and S 3 corresponds to M 3 (2), M 3 (2) corresponds to rate 3, the number of sliding chips for rate 3 = 4 bit / s is 2, and the time corresponding to 2 is 1 / 8 s * 2, that is, determine this time as the starting point of the received data, and transfer to receive data at rate 3 = 4 bit / s; at the same time, let t = t + kT 0 and continue to continuously perform steps (1) to (4);

[0132] (5) Data reception processing steps:

[0133] When processing data reception, check whether the data reception time has ended. If the data reception time has not ended, continue to wait for a new W value and compare the W values obtained each time. If the currently obtained W value is greater than the original W value, replace the original W value with the current W value and restart data reception.

[0134] If the data reception time has ended, start decoding, clear the synchronization credibility, and continue to receive subsequent data in steps (1) to (4).

[0135] The present invention also provides an electronic device, which may include: a processor, a communications interface, a memory, and a communication bus. Among them, the processor, the communications interface, and the memory complete communication with each other through the communication bus. The processor can call the logical instructions in the memory to execute a full-process low-frequency signal parallel synchronization search method provided by each of the above methods, which successively includes steps: a synchronization search algorithm, a synchronization threshold decision, a synchronization credibility calculation and comparison, data reception processing, and data reception processing judgment. The specific steps of this method will not be elaborated here.

[0136] In addition, when the logical instructions in the above-mentioned memory are implemented in the form of a software functional unit and sold or used as an independent product, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or a part of this technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in various embodiments of the present invention. The foregoing storage medium includes: USB flash drives, mobile hard disks, read-only memories (ROMs), random access memories (RAMs), magnetic disks, or optical discs, etc., which can store program codes.

[0137] On the other hand, the present invention also provides a computer program product. The computer program product includes a computer program stored on a non-transitory computer-readable storage medium. The computer program includes program instructions. When the program instructions are executed by a computer, the computer can execute a full-process low-frequency signal parallel synchronization search method provided by each of the above methods, which successively includes steps: a synchronization search algorithm, a synchronization threshold decision, a synchronization credibility calculation and comparison, data reception processing, and data reception processing judgment. The specific steps of this method will not be elaborated here.

[0138] In another aspect, the present invention also provides a non-transitory computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, it implements a full-process low-frequency signal parallel synchronous search method provided by the above-mentioned various methods, which sequentially includes steps: synchronous search algorithm, synchronous threshold decision, synchronous credibility calculation and comparison, data reception processing, and data reception processing judgment. The specific steps of this method will not be elaborated here.

[0139] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed to multiple network units. Some or all of the modules can be selected according to actual needs to achieve the purpose of the solution of this embodiment. Those of ordinary skill in the art can understand and implement it without creative efforts.

[0140] Through the description of the above embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus a necessary general hardware platform, and of course, it can also be implemented by hardware. Based on this understanding, the essence of the above technical solution, or the part that contributes to the prior art, can be embodied in the form of a software product. The computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods described in each embodiment or some parts of the embodiments.

[0141] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit them. Although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions described in the foregoing embodiments or equivalently replace some of the technical features. These modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for parallel synchronous search of low-frequency signals throughout the whole process, characterized in that, it includes: S1 Obtain the input signal and obtain multiple local synchronization codes with different rates; For each local synchronization code with a different rate, perform square-loop search calculations on the input signal simultaneously to obtain each group of correlation values corresponding to each rate; S2 Compare each correlation value with the synchronization threshold at the same rate, obtain the maximum value of the correlation values greater than the synchronization threshold in each group of correlation values, and output the maximum correlation amplitude corresponding to each group of correlation values respectively; S3 Calculate the synchronization credibility corresponding to each rate based on the maximum correlation amplitude and the synchronization threshold corresponding to each group of correlation values, obtain the starting point of the received data based on the maximum synchronization credibility and determine the rate of the received data, and perform data reception at this rate; S4 When performing data reception, determine whether the data reception time has ended. If it has not ended, repeat steps S1 - S3 to continuously obtain new maximum synchronization credibility. If the new maximum synchronization credibility is greater than the original maximum synchronization credibility, update the starting point of the received data and the rate of the received data according to the new maximum synchronization credibility, and re-perform data reception at this rate; In step S1, N sets of correlation values corresponding to N rates are obtained through square loop search and calculation ; Obtain an input signal , obtain local synchronization codes at N rates , apply the formula: ； Among them, the length of the input signal is , and the local synchronization codes of the N rates are generated by the m-sequence, is the length of the synchronization code, , ; is the sampling signal time interval; is the chip width of the synchronization code; n is the number of chips for sliding, ; where k is the number of data received each time, ; Step S3 includes: Based on the maximum correlation amplitude corresponding to the i-th group of correlation values and the synchronization threshold , take the ratio of the maximum correlation amplitude and the synchronization threshold to calculate the synchronization credibility of the i-th group, and obtain the maximum synchronization credibility: 。 2. The method for parallel synchronous search of low-frequency signals throughout the whole process according to claim 1, characterized in that, Before step S2, it includes calculating a synchronization threshold : ； Calculate and obtain the synchronization threshold for the i-th rate ; where α is the probability of synchronization leakage start.

3. The method for parallel synchronous search of low-frequency signals throughout the whole process according to claim 2, characterized in that, Step S2 includes: Compare N groups of correlation values with the corresponding N synchronization thresholds respectively, and determine whether there are correlation values greater than the corresponding synchronization thresholds in the i-th group of correlation values; If it exists, obtain the correlation values in the i-th group of correlation values that are greater than the corresponding synchronization threshold , and judge the i-th group of correlation values to find the maximum value among them, and calculate the maximum correlation amplitude of the i-th group : 。 4. The method for parallel synchronous search of low-frequency signals throughout the whole process according to claim 3, characterized in that, Step S2 includes: If there is no correlation value greater than the corresponding synchronization threshold in the i-th group of correlation values, let the data reception time be , and go to the next signal sampling point to repeat step S1 and subsequent steps.

5. The method for parallel synchronous search of low-frequency signals throughout the whole process according to claim 4, characterized in that, Step S3 includes: After obtaining the maximum synchronization credibility, obtain the maximum correlation amplitude corresponding to the maximum synchronization credibility W value, and determine the corresponding correlation value ; Based on the relevant values The corresponding number of sliding chips n, with time As the starting point of the received data, with The i-th rate corresponding to the i-th group of relevant values is the rate of the received data, and let the data reception time be .

6. The method for parallel synchronous search of low-frequency signals throughout the whole process according to claim 4, characterized in that, Step S4 includes: If it is determined that the data reception time has ended, decode the received data, clear all synchronization credibility, and repeat steps S1 - S3 when receiving subsequent data.

7. An electronic device, including a memory, a processor, and a computer program stored on the memory and executable on the processor, characterized in that, when the processor executes the program, it implements the steps of the low-frequency signal parallel synchronous search method according to any one of claims 1 to 6.

8. A non-transitory computer-readable storage medium, on which a computer program is stored, characterized in that, when the computer program is executed by a processor, it implements the steps of the low-frequency signal parallel synchronous search method according to any one of claims 1 to 6.

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