An exception processing method and device, a PCIe card device, and a storage medium

Abstract

The application provides an exception processing method and device, a PCIe card equipment and a storage medium, and relates to the field of PCIe equipment.The method is applied to a PCIe driver, and the method comprises the following steps: when it is detected that an exception occurs in the PCIe card equipment, a link interrupt event corresponding to the PCIe card equipment is sent to a user mode driver, so that the user mode driver stops issuing an IO operation to the PCIe card equipment; a downlink port of the PCIe card equipment is shielded, so as to shield event information sent by a downlink equipment connected to the downlink port to the user mode driver; and when the shielding is completed, the PCIe card equipment is reinitialized.The PCIe driver can be used for bidirectional shielding, so that the user mode driver and the PCIe card equipment are completely isolated, any interaction between the user mode driver and the PCIe card equipment is avoided, a false impression that the PCIe card equipment has been physically disconnected is created, and then the PCIe card equipment can be reinitialized, so that the PCIe card equipment can be reinitialized without restarting a storage system, and then the processing efficiency of the PCIe card equipment exception problem can be improved.

Description

Technical Field

[0001] This invention relates to the field of PCIe devices, and particularly to an anomaly handling method, apparatus, PCIe card device, and computer-readable storage medium. Background Technology

[0002] PCIe cards (Peripheral Component Interconnect Express, a high-speed serial computer expansion bus standard) are common devices in storage systems. In related technologies, for hot-swappable PCIe cards, the user-space driver typically restarts the storage system to refresh the PCIe card when it detects an anomaly. However, this approach not only reduces the efficiency of handling PCIe card anomalies but also increases the overall instability of the storage system, hindering system operation and maintenance. Summary of the Invention

[0003] The purpose of this invention is to provide an exception handling method, apparatus, PCIe card device, and computer-readable storage medium that can completely isolate the user-mode driver from the PCIe card device, avoid any interaction between the user-mode driver and the PCIe card device, and reinitialize the PCIe card device in the isolated state, thereby improving the efficiency of handling PCIe card device exceptions.

[0004] To address the aforementioned technical problems, this invention provides an exception handling method applied to a PCIe driver, the method comprising:

[0005] When an abnormality is detected in the PCIe card device, a link interruption event corresponding to the PCIe card device is sent to the user-mode driver so that the user-mode driver stops sending IO operations to the PCIe card device.

[0006] The downlink port of the PCIe card device is blocked to prevent the downlink device connected to the downlink port from sending event information to the user-mode driver;

[0007] Upon completion of the shielding process, the PCIe card device is reinitialized.

[0008] Optionally, the user-mode driver stops issuing I / O operations to the PCIe card device, including:

[0009] The user-mode driver discards IO operations in the command queue that need to be sent to the PCIe card device.

[0010] Optionally, after sending the link interruption event corresponding to the PCIe card device to the user-mode driver, the method further includes:

[0011] The user-mode driver identifies an abnormal I / O operation that has been sent to the PCIe card device but has not received a response.

[0012] Accordingly, after reinitializing the PCIe card device, the process also includes:

[0013] When the initialization of the PCIe card device is completed, a link connection event corresponding to the PCIe card device is sent to the user-mode driver so that the user-mode driver reissues the abnormal IO operation.

[0014] Optionally, after sending the link interruption event corresponding to the PCIe card device to the user-mode driver, the method further includes:

[0015] Upon receiving the link interruption confirmation request sent by the user-space driver, the link interruption confirmation information is returned to the user-space driver.

[0016] Optionally, before detecting an anomaly in the PCIe card device, the following is also included:

[0017] Periodically receive heartbeat information sent by the PCIe card device;

[0018] When it is detected that the PCIe card device fails to send the heartbeat information within a preset period, it is determined that the PCIe card device is malfunctioning.

[0019] Optionally, before detecting an anomaly in the PCIe card device, the following is also included:

[0020] The system reads the memory data of the PCIe card device, and determines that the PCIe card device is malfunctioning when it is determined that the memory data cannot be read or that the memory data is incorrect.

[0021] Optionally, shielding the downlink port of the PCIe card device includes:

[0022] The downlink port is software-masked, and the user-space driver is simulated to respond to the event information sent by the downlink device to the user-space driver.

[0023] The present invention also provides an exception handling device applied to a PCIe driver, the method comprising:

[0024] The event sending module is used to send a link interruption event corresponding to the PCIe card device to the user-mode driver when an abnormality is detected in the PCIe card device, so that the user-mode driver stops sending IO operations to the PCIe card device.

[0025] A shielding module is used to shield the downlink port of the PCIe card device to prevent the device connected to the downlink port from sending event information to the user-mode driver;

[0026] An initialization module is used to reinitialize the PCIe card device when the shielding is completed.

[0027] The present invention also provides a PCIe card device, comprising:

[0028] Memory, used to store computer programs;

[0029] A processor for implementing the exception handling method described above when executing the computer program.

[0030] The present invention also provides a computer-readable storage medium storing computer-executable instructions, which, when loaded and executed by a processor, implement the exception handling method described above.

[0031] This invention provides an exception handling method applied to a PCIe driver. The method includes: when an exception is detected in a PCIe card device, sending a link interruption event corresponding to the PCIe card device to a user-mode driver, so that the user-mode driver stops issuing I / O operations to the PCIe card device; blocking the downlink port of the PCIe card device to block event information sent by downlink devices connected to the downlink port to the user-mode driver; and reinitializing the PCIe card device after the blocking is completed.

[0032] As can be seen, when the PCIe driver in this invention detects an anomaly in the PCIe card device, it first sends a link interruption event to the user-space driver to stop the user-space driver from issuing I / O operations to the PCIe card device. Subsequently, the PCIe driver also masks the downlink ports in the PCIe card device to prevent downlink devices connected to the downlink ports from sending event information to the user-space driver and to prevent the user-space driver from obtaining relevant information about these devices. In other words, this invention can perform bidirectional software shielding between the user-space driver and the PCIe card device through the PCIe driver, completely isolating the user-space driver from the PCIe card device and the downlink devices connected to the PCIe card device's downlink ports. This prevents the user-space driver from communicating with the PCIe card device and the downlink devices, thus creating the illusion that the PCIe card device has been physically disconnected from the user-space device. This allows for direct reinitialization of the PCIe card device without restarting the storage system, thereby improving the efficiency of handling PCIe card device anomalies. The present invention also provides an anomaly handling device, a PCIe card device, and a computer-readable storage medium, which have the above-mentioned beneficial effects. Attached Figure Description

[0033] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0034] Figure 1 A flowchart of an exception handling method provided in an embodiment of the present invention;

[0035] Figure 2 This is a structural block diagram of an anomaly handling device provided in an embodiment of the present invention. Detailed Implementation

[0036] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0037] In related technologies, in hot-swappable PCIe card devices, when the user-mode driver detects an anomaly in the card device, it typically restarts the storage system to refresh the PCIe card device. However, this approach can easily affect the normal operation of other working cards. For example, if a storage system has multiple cards, and each card handles a large number of I / O operations, when one card malfunctions and requires a system restart, other cards not only experience increased workload, affecting the overall performance of the storage system, but also potentially impacting the overall stability of the storage system if other cards also malfunction. In other words, this approach not only reduces the efficiency of handling PCIe card device anomalies but also increases the overall instability of the storage system, hindering system operation and maintenance. Therefore, this invention provides an anomaly handling method that completely isolates the user-mode driver from the PCIe card device, avoiding any interaction between them, and reinitializes the PCIe card device in an isolated state, thereby improving the efficiency of handling PCIe card device anomalies. Please refer to [reference needed]. Figure 1 , Figure 1 A flowchart of an exception handling method provided in an embodiment of the present invention, the method may include:

[0038] S101. When an abnormality is detected in the PCIe card device, a link interruption event corresponding to the PCIe card device is sent to the user-mode driver so that the user-mode driver stops sending IO operations to the PCIe card device.

[0039] To facilitate understanding, a brief introduction to the hardware environment applicable to the embodiments of this invention is provided first. The embodiments of this invention mainly involve a user-mode driver, a PCIe driver, and a PCIe card device. The user-mode driver is specifically located in the host device, while the PCIe driver is located in the PCIe card device. Since the PCIe card device needs to interact with the user-mode driver through the PCIe driver, the PCIe driver acts as an intermediary between the user-mode driver and the PCIe card device. Furthermore, it should be noted that the PCIe card device also has a downstream port, which can connect to other downstream devices; simultaneously, the user-mode driver can also interact with these downstream devices connected through the downstream port via the PCIe card device. The embodiments of this invention do not limit the specific user-mode driver, PCIe driver, and PCIe card device; they can be configured according to actual application requirements.

[0040] Based on the above hardware system description, in this embodiment of the invention, when the PCIe driver detects an anomaly in the PCIe card device, it first shields the user-mode driver side to prevent the user-mode driver from sending any information to the PCIe card device. Specifically, when the driver determines that the PCIe card device is abnormal, it can first send a link down event corresponding to the PCIe card device to the user-mode driver to notify the user-mode driver to stop sending IO operations to the PCIe card device. The link down event is used to notify the user-mode driver that the downlink port of the PCIe card device is in a link down state. It should be particularly noted that the IO operations here refer to IO operations that pass through the PCIe card device, that is, including IO operations sent directly to the PCIe card device and IO operations sent to downlink devices connected to the downlink port of the PCIe card device. It is understood that when the user-mode driver receives the link down event, it should first stop generating the above IO operations; in addition, the user-mode driver should also discard (abort) any IO operations already written to the command queue and sent to the PCIe card device. It should be noted that the embodiments of the present invention do not limit the specific form of the link interruption event, and relevant technologies of PCIe devices can be referred to. The embodiments of the present invention also do not limit the specific execution method of the discard processing, and relevant technologies of user-space drivers can be referred to.

[0041] In one possible scenario, the user-mode driver stops issuing I / O operations to the PCIe card device, which may include:

[0042] Step 11: The user-space driver discards IO operations in the command queue that need to be sent to the PCIe card device.

[0043] Furthermore, it should be noted that since I / O operations are reply-based, meaning the executor of an I / O operation needs to return response information to the initiator to inform them of the current execution status of the I / O operation (e.g., completion, failure, etc.). Considering that when a link interruption event is received, the user-space driver may have already issued several I / O operations to the PCIe card device and has not received responses from the PCIe card device or the downlink device connected to its downlink port for these I / O operations, the user-space driver can statistically determine such abnormal I / O operations and wait for the PCIe card device to complete initialization before re-issuing these abnormal I / O operations. It is understood that after completing the re-initialization of the PCIe card device, the PCIe driver should notify the user-space driver that the device is back online so that the user-space driver can perform the aforementioned resending process. Specifically, the PCIe driver can achieve the above notification effect by sending a link up event to the user-space driver. It should be noted that the embodiments of this invention do not limit the specific form of the link up event; relevant technologies of PCIe devices can be referenced.

[0044] In one possible scenario, after sending the link interruption event corresponding to the PCIe card device to the user-mode driver, the following may also be included:

[0045] Step 21: The user-space driver identifies abnormal I / O operations that have been sent to the PCIe card device but have not received a response;

[0046] Accordingly, after reinitializing the PCIe card device, it may also include:

[0047] Step 22: When the initialization of the PCIe card device is completed, send the link connection event corresponding to the PCIe card device to the user-mode driver so that the user-mode driver reissues the abnormal IO operation.

[0048] Of course, user-space drivers can also handle the above-mentioned abnormal I / O operations in other ways. You can also refer to the relevant technologies of user-space drivers and set them according to the actual application requirements.

[0049] Furthermore, in this embodiment of the invention, anomalies in the PCIe card device are detected by the PCIe driver. The advantage of using a driver for anomaly detection is that it allows for timely detection and repair of PCIe card device anomalies before the user-space driver perceives them, thus avoiding excessive negative impact on the normal operation of the storage system. It should be noted that this embodiment of the invention does not limit how the PCIe driver perceives or actively detects anomalies in the PCIe card device. For example, a heartbeat mechanism can be set between the PCIe card device and the PCIe driver, meaning the PCIe card device can periodically send heartbeat information to the PCIe driver. If the PCIe driver does not receive the aforementioned heartbeat information within a preset period, it can be determined that the PCIe card device is experiencing an anomaly and requires repair.

[0050] In one possible scenario, prior to detecting an anomaly in the PCIe card device, the following may also be included:

[0051] Step 31: Periodically receive heartbeat information sent by the PCIe card device;

[0052] Step 32: When it is detected that the PCIe card device has not sent heartbeat information within the preset period, it is determined that the PCIe card device is abnormal.

[0053] It should be noted that the embodiments of the present invention do not limit the specific preset period time, and can be set according to actual application needs. It is understood that the shorter the preset period time, the faster the PCIe driver can detect anomalies in the PCIe card device, but this will consume more computational resources. Therefore, the aforementioned preset period time can be set after balancing computational load and anomaly detection requirements. The embodiments of the present invention also do not limit the specific form of the heartbeat information, and can also be set according to actual application needs. Furthermore, the PCIe driver can also actively detect anomalies in the PCIe card. For example, the driver can actively read the memory data of the PCIe card device. If it is determined that the memory data contains errors (such as garbled characters), or if the memory data cannot be obtained at all, it indicates that the PCIe card device is abnormal and requires anomaly repair.

[0054] In one possible scenario, prior to detecting an anomaly in the PCIe card device, the following may also be included:

[0055] Step 41: Read the memory data of the PCIe card device, and if it is determined that the memory data cannot be read or the memory data is incorrect, determine that the PCIe card device is malfunctioning.

[0056] It should be noted that the embodiments of the present invention do not limit which memory data in the PCIe card device the PCIe driver needs to determine the device abnormality, nor does it limit whether the memory data reading action is executed independently or together with other operations. For example, when certain specific operations need to be executed based on the memory data of the PCIe card device, the abnormality of the PCIe card device can be detected at the same time during the execution of this specific operation. It can be set according to the actual application requirements.

[0057] S102. Block the downlink port of the PCIe card device to block the event information sent by the device connected to the downlink port to the user-mode driver.

[0058] In this embodiment of the invention, the PCIe driver further shields the downlink port. This is because the downlink port of the PCIe card device is not physically disconnected. In other words, if the downlink port is not shielded, the user-mode driver can still interact with the PCIe card device and its downlink devices, and can view which downlink devices are connected to the PCIe card device's downlink port and obtain specific information about these downlink devices. These interactions can easily interfere with the initialization process of the PCIe card device. In addition, considering that the user-mode driver may have issued some abnormal IO operations that were not responded to by the PCIe card device or the downlink devices connected through the downlink port, the responses of the PCIe card device and the downlink devices to these abnormal IO operations will also interfere with the re-initialization of the PCIe card device. Furthermore, the downlink devices may also actively send event information to the user-mode driver, and this sending action will also interfere with the re-initialization of the PCIe card device. Therefore, the PCIe driver needs to shield the downlink port to avoid any interaction between the user-mode driver and the PCIe card device and its downlink devices.

[0059] Furthermore, it is understood that during the PCIe card device's reinitialization process, the aforementioned downlink devices are still operational, meaning they send event information to the user-space driver via the PCIe card device. To avoid interfering with the normal operation of the downlink devices, in this embodiment of the invention, the PCIe driver also needs to take over all events passing through the downlink interface, i.e., take over the event chain to prevent interference. Specifically, when the PCIe driver receives event information sent by the downlink devices to the user-space driver, it needs to simulate the user-space driver's response to these event information to ensure that the downlink devices can complete the corresponding operations. It should be noted that this embodiment of the invention does not limit the specific event information sent by the downlink devices, nor does it limit how the PCIe driver simulates the user-space driver's response to the event information sent by each downlink device; relevant user-space driver technologies can be referenced.

[0060] In one possible scenario, blocking the downlink port of a PCIe card device may include:

[0061] Step 51: Software-mask the downlink port and simulate a user-space driver to respond to event information sent from the downlink device to the user-space driver.

[0062] It should be noted that the embodiments of the present invention do not limit the specific method of software shielding the downlink port, and relevant technologies of PCIe devices can be referred to.

[0063] Furthermore, user-space drivers may also send other information to the PCIe card device, and the PCIe driver needs to isolate this other information from the PCIe card device. For example, when a user-space driver receives a link interruption event, it needs to send a link interruption acknowledgment request to the PCIe card device to confirm the interruption status. In this case, to prevent the PCIe card device and the downstream devices connected to its downstream port from replying to this request, the PCIe driver needs to block this request from the PCIe card device and the downstream devices, and return a link interruption acknowledgment message (ACK) to the user-space driver to inform it that the PCIe card device has been disconnected.

[0064] In one possible scenario, after sending the link interruption event corresponding to the PCIe card device to the user-mode driver, the following may also be included:

[0065] Step 61: Upon receiving a link interruption confirmation request from the user-space driver, return link interruption confirmation information to the user-space driver.

[0066] S103. When the shielding is complete, reinitialize the PCIe card device.

[0067] After bidirectional software shielding, all downlink devices under the PCIe card device can be considered physically disconnected from the user-mode driver. At this time, the PCIe card device will not be affected by any interference and can begin the re-initialization process. It should be noted that the embodiments of the present invention do not limit the re-initialization process of the PCIe card device; relevant technologies for PCIe card devices can be referred to.

[0068] Based on the above embodiments, when the PCIe driver in this invention detects an anomaly in the PCIe card device, it first sends a link interruption event to the user-space driver to stop the user-space driver from issuing I / O operations to the PCIe card device. Subsequently, the PCIe driver also masks the downlink ports in the PCIe card device to prevent downlink devices connected to the downlink ports from sending event information to the user-space driver and to prevent the user-space driver from obtaining relevant information about these devices. In other words, this invention can perform bidirectional software shielding between the user-space driver and the PCIe card device through the PCIe driver, completely isolating the user-space driver from the PCIe card device and the downlink devices connected to the PCIe card device's downlink ports. This prevents the user-space driver from communicating with the PCIe card device and the downlink devices, creating the illusion that the PCIe card device has been physically disconnected from the user-space device. This allows for direct reinitialization of the PCIe card device without restarting the storage system, thereby improving the efficiency of handling PCIe card device anomalies.

[0069] Based on the above embodiments, the exception handling method described below is illustrated with specific examples. This method specifically includes three steps:

[0070] 1. Construct a link down event.

[0071] The PCIe driver can send a link interruption event to the user-space driver according to the format of the PCIe card event received by the user-space driver. This is to notify the driver that the downlink port of the PCIe card device is in a link interruption state. At this time, the user-space driver may have already sent some IO operations in the command queue. Therefore, when receiving this event, the user-space driver can discard the IO operations in the command queue that have not yet been sent to the PCIe card device. For abnormal IO operations that have been sent to the PCIe card device but have not yet received a response from the device, the upper layer of the user-space driver will determine whether to resend them.

[0072] 2. Take over the event chain

[0073] Since the downlink port of the PCIe card is not actually interrupted, the user-space driver can still interact with the PCIe card device and view which downlink devices are connected to the downlink port, as well as obtain specific information about these devices. Furthermore, some user-space drivers may send link interruption acknowledgment messages to the PCIe card device after receiving a link interruption event. These interactions can easily affect the PCIe card device's initialization process. Therefore, to avoid interference from other commands, the PCIe driver needs to temporarily block all devices under the downlink port and take over all events of that downlink port, ensuring no information is transmitted to the driver to prevent interference. Simultaneously, upon receiving a link interruption acknowledgment message from the user-space driver, the PCIe driver should return a link interruption acknowledgment message to the user-space driver.

[0074] 3. Reinitialize the card to restore service.

[0075] When all devices in the downlink ports of the PCIe card are invisible to the driver, it can be assumed that there are no devices on the PCIe card, and the card can be initialized with confidence, and the card initialization process can be carried out.

[0076] The following describes the exception handling apparatus, PCIe card device, and computer-readable storage medium provided in the embodiments of the present invention. The exception handling apparatus, PCIe card device, and computer-readable storage medium described below can be referred to in correspondence with the exception handling method described above.

[0077] Please refer to Figure 2 , Figure 2 This is a structural block diagram of an exception handling device provided in an embodiment of the present invention. The device is applied to a PCIe driver and may include:

[0078] Event sending module 201 is used to send a link interruption event corresponding to the PCIe card device to the user-mode driver when an abnormality is detected in the PCIe card device, so that the user-mode driver stops sending IO operations to the PCIe card device.

[0079] The shielding module 202 is used to shield the downlink port of the PCIe card device to block the event information sent by the device connected to the downlink port to the user-mode driver.

[0080] Initialization module 203 is used to reinitialize the PCIe card device when the shielding is completed.

[0081] Optionally, the user-mode driver stopping the issuance of I / O operations to the PCIe card device may include:

[0082] User-space drivers discard I / O operations in the command queue that need to be sent to PCIe card devices.

[0083] Optionally, after sending the link interruption event corresponding to the PCIe card device to the user-space driver, the following may also be included:

[0084] The user-space driver has identified an abnormal I / O operation that was sent to the PCIe card device but did not receive a response.

[0085] Accordingly, after reinitializing the PCIe card device, the following also applies:

[0086] When the initialization of the PCIe card device is completed, a link connection event corresponding to the PCIe card device is sent to the user-mode driver so that the user-mode driver can reissue the abnormal IO operation.

[0087] Optionally, after sending the link interruption event corresponding to the PCIe card device to the user-space driver, the following may also be included:

[0088] Upon receiving a link interruption acknowledgment request from the user-space driver, the system returns link interruption acknowledgment information to the user-space driver.

[0089] Optionally, before detecting an anomaly in the PCIe card device, it may also include:

[0090] Periodically receive heartbeat information sent by PCIe card devices;

[0091] When a PCIe card device fails to send heartbeat information within a preset period, it is determined that the PCIe card device is malfunctioning.

[0092] Optionally, before detecting an anomaly in the PCIe card device, it may also include:

[0093] Read the memory data of the PCIe card device, and determine that the PCIe card device is malfunctioning if the memory data cannot be read or is incorrect.

[0094] Optionally, shielding the downlink port of the PCIe card device may include:

[0095] The downlink port is software-masked, and a user-space driver is simulated to respond to event information sent from the downlink device to the user-space driver.

[0096] This invention also provides a PCIe card device, which may include:

[0097] Memory, used to store computer programs;

[0098] A processor is used to implement the exception handling methods described above when executing a computer program.

[0099] Since the embodiments of the PCIe card device part correspond to the embodiments of the exception handling method part, please refer to the description of the embodiments of the exception handling method part for the embodiments of the PCIe card device part, and will not be repeated here.

[0100] This invention also provides a computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps of the exception handling method described in any of the above embodiments.

[0101] Since the embodiments of the computer-readable storage medium portion correspond to the embodiments of the exception handling method portion, the embodiments of the storage medium portion are described in the description of the embodiments of the exception handling method portion, and will not be repeated here.

[0102] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the apparatus disclosed in the embodiments, since it corresponds to the method disclosed in the embodiments, the description is relatively simple; relevant parts can be referred to the method section.

[0103] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this invention.

[0104] The steps of the methods or algorithms described in conjunction with the embodiments disclosed herein can be implemented directly by hardware, a software module executed by a processor, or a combination of both. The software module can be located in random access memory (RAM), main memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, removable disk, CD-ROM, or any other form of storage medium known in the art.

[0105] The above provides a detailed description of the anomaly handling method, apparatus, PCIe card device, and storage medium provided by the present invention. Specific examples have been used to illustrate the principles and implementation methods of the invention. The descriptions of the embodiments above are merely for the purpose of helping to understand the method and core ideas of the present invention. It should be noted that those skilled in the art can make various improvements and modifications to the present invention without departing from its principles, and these improvements and modifications also fall within the protection scope of the claims of the present invention.

Claims

1. An abnormality processing method characterized by comprising: The method applied to a PCIe driver comprises: When detecting that a PCIe card device is abnormal, sending a link interrupt event corresponding to the PCIe card device to a user mode driver to make the user mode driver stop issuing IO operations to the PCIe card device; Shielding a downstream port of the PCIe card device to shield event information sent by a downstream device connected to the downstream port to the user mode driver; Reinitializing the PCIe card device when the shielding is completed; The shielding of the downstream port of the PCIe card device comprises: Software shielding the downstream port and simulating the user mode driver to respond to the event information sent by the downstream device to the user mode driver.

2. The abnormality processing method according to claim 1, characterized by, The user mode driver stopping issuing IO operations to the PCIe card device comprises: The user mode driver discarding IO operations in a command queue to be issued to the PCIe card device.

3. The abnormality processing method according to claim 2, characterized by, After sending the link interrupt event corresponding to the PCIe card device to the user mode driver, the method further comprises: The user mode driver determining abnormal IO operations that have been sent to the PCIe card device but have not received a reply; Correspondingly, after reinitializing the PCIe card device, the method further comprises: When the initialization of the PCIe card device is completed, sending a link connection event corresponding to the PCIe card device to the user mode driver to make the user mode driver reissue the abnormal IO operations.

4. The abnormality processing method according to claim 1, characterized by, After sending the link interrupt event corresponding to the PCIe card device to the user mode driver, the method further comprises: When receiving a link interrupt confirmation request sent by the user mode driver, returning link interrupt confirmation information to the user mode driver.

5. The abnormality processing method according to claim 1, characterized by, Before detecting that the PCIe card device is abnormal, the method further comprises: Periodically receiving heartbeat information sent by the PCIe card device; When detecting that the PCIe card device does not send the heartbeat information within a preset period of time, determining that the PCIe card device is abnormal.

6. The abnormality processing method according to claim 1, characterized by, Before detecting that the PCIe card device is abnormal, the method further comprises: Reading memory data of the PCIe card device, and when determining that the memory data cannot be read or the memory data is incorrect, determining that the PCIe card device is abnormal.

7. An abnormality processing apparatus characterized by comprising: The device applied to a PCIe driver comprises: An event sending module configured to send a link interrupt event corresponding to a PCIe card device to a user mode driver to make the user mode driver stop issuing IO operations to the PCIe card device when detecting that the PCIe card device is abnormal; A shielding module configured to shield a downstream port of the PCIe card device to shield event information sent by a downstream device connected to the downstream port to the user mode driver; An initialization module configured to reinitialize the PCIe card device when the shielding is completed; The shielding module is configured to: Software shield the downstream port and simulate the user mode driver to respond to the event information sent by the downstream device to the user mode driver.

8. A PCIe card device, comprising: The device comprises: A memory configured to store a computer program; A processor for implementing the abnormality processing method according to any one of claims 1 to 6 when executing the computer program.

9. A computer-readable storage medium, characterized in that, The computer readable storage medium stores computer executable instructions, and the computer executable instructions are loaded and executed by a processor to implement the abnormality processing method according to any one of claims 1 to 6.

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