A method for monitoring indium column height

Abstract

The present invention provides a method for monitoring the height of indium pillars, belonging to the technical field of indium pillar growth monitoring technology. The method comprises: obtaining a first area of ​​a photolithographic hole on a chip, and a second area of ​​the photolithographic hole excluding the indium pillar after the chip is indium-plated; calculating the hole blocking rate of the chip before and after indium plating based on the first area and the second area; and determining the actual height of the indium pillar based on the hole blocking rate and the designed height of the indium pillar. Beneficial effects: The present invention provides a method for monitoring the height of indium pillars. By calculating the hole blocking rate of indium, the deposition height of the indium pillars is monitored, thereby achieving the purpose of monitoring the indium process. The monitoring method is suitable for effective and rapid monitoring during large-scale mass production.

Description

Technical Field

[0001] The present invention relates to the technical field of indium column growth monitoring, and in particular to a method for monitoring the height of an indium column. Background Art

[0002] Mercury cadmium telluride (MCT) infrared detectors, currently a major development in the infrared detector field both domestically and internationally, are widely used in military infrared thermal imaging, aerospace, and satellite infrared remote sensing. The core of an MCT infrared detector is the detector chip, and chip manufacturing technology directly impacts its performance and determines whether the detector meets current domestic and international standards. Due to their specialized and narrow application areas and limited workforce, MCT infrared detectors lack a comprehensive set of standardized production monitoring mechanisms, as do silicon-based chips. This is a significant factor in the low yield of MCT infrared chips, and establishing an efficient and controllable process monitoring mechanism is therefore essential for the development of MCT chips.

[0003] The preparation of indium pillars is one of the core processes in chip manufacturing. Indium grows in two directions in the photolithographic hole. Vertical growth is the effective growth direction of indium, while lateral indium growth will block the vertical growth of indium. The vertical growth of indium can be monitored by destructive monitoring with the help of scanning electron microscopy (SEM), but its monitoring efficiency is very low and cannot be used for large-scale mass production monitoring. Summary of the Invention

[0004] In order to solve the above technical problems, the present invention provides a method for monitoring the height of an indium column.

[0005] The technical problem solved by the present invention can be achieved by adopting the following technical solutions:

[0006] A method for monitoring the height of an indium column, comprising:

[0007] Obtaining a first area of ​​a photolithographic hole on a chip, and a second area of ​​the photolithographic hole excluding the indium column after the chip is indium-plated;

[0008] Calculating the pore blocking rate of the chip before and after indium plating based on the first area and the second area;

[0009] The actual height of the indium column is determined according to the pore blocking rate and the designed height of the indium column.

[0010] Preferably, the method for obtaining the first area includes:

[0011] After the chip is photolithographically processed according to a first predetermined pattern, the photolithographically processed chip is placed under a microscope and photographed to obtain a first image;

[0012] Analyze and process the first image to obtain the first area.

[0013] Preferably, the method for obtaining the second area includes:

[0014] Placing the indium-plated chip under a microscope and photographing it to obtain a second picture;

[0015] Analyze and process the second image to obtain the second area.

[0016] Preferably, the microscope takes pictures at a preset magnification.

[0017] Preferably, the preset multiple is 1000 times.

[0018] Preferably, the calculation method of the pore plugging rate includes:

[0019]

[0020] Wherein, B represents the first area; A represents the second area; and Pr represents the pore blocking rate.

[0021] Preferably, the method for determining the actual height of the indium column includes:

[0022] Comparing the pore blocking rate with a preset pore blocking threshold interval to obtain a comparison result; each of the pore blocking threshold intervals corresponds to a correlation relationship, and the correlation relationship is used to characterize the correspondence between the actual height of the indium column, the designed height of the indium column, and the pore blocking rate;

[0023] The actual height of the indium column is determined according to the correlation relationship corresponding to the hole blocking threshold interval obtained by matching the comparison result.

[0024] Preferably, the correlation is determined based on multiple groups of the hole blocking rates, the designed heights of the indium pillars, and the actual heights of the indium pillars under different photolithography processes, including:

[0025] Acquire multiple sets of experimental data under the same photolithography process, wherein the experimental data include actual heights of the indium pillars corresponding to different hole blocking rates and different indium pillar design heights;

[0026] Fitting is performed on the experimental data to obtain the correlation relationship.

[0027] Preferably, the first area is the area of ​​all the photolithographic holes on the chip, and the second area is the area of ​​all the photolithographic holes excluding indium pillars; or

[0028] The first area is the area of ​​a single photolithography hole on the chip, and the second area is the area of ​​the single photolithography hole excluding the indium column.

[0029] Preferably, the chip is a mercury cadmium telluride chip.

[0030] The advantages or beneficial effects of the technical solution of the present invention are:

[0031] The present invention provides a method for monitoring the height of an indium column. The method monitors the deposition height of the indium column by calculating the pore blocking rate of indium, thereby achieving the purpose of monitoring the indium process. The monitoring method can be applied to effective and fast monitoring during large-scale mass production. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 A schematic flow chart of a method for monitoring the height of an indium column in a preferred embodiment of the present invention;

[0033] Figure 2 This is a flow chart of a specific implementation of a method for obtaining a first area in a preferred embodiment of the present invention;

[0034] Figure 3 This is a schematic diagram of a chip after photolithography in a preferred embodiment of the present invention;

[0035] Figure 4 This is a schematic diagram of a specific implementation of the first picture in a preferred embodiment of the present invention;

[0036] Figure 5 This is a flow chart of a specific implementation of a method for obtaining the second area in a preferred embodiment of the present invention;

[0037] Figure 6 This is a schematic diagram of a chip after indium plating in a preferred embodiment of the present invention;

[0038] Figure 7 This is a schematic diagram of a specific implementation of the second picture in a preferred embodiment of the present invention;

[0039] Figure 8 1 is a flow chart illustrating a specific implementation of a method for determining the actual height of an indium column in a preferred embodiment of the present invention;

[0040] Figure 9 This is a cross-sectional schematic diagram of a chip after indium plating in a preferred embodiment of the present invention. DETAILED DESCRIPTION

[0041] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making any creative efforts shall fall within the scope of protection of the present invention.

[0042] It should be noted that, in the absence of conflict, the embodiments of the present invention and the features in the embodiments may be combined with each other.

[0043] The present invention will be further described below with reference to the accompanying drawings and specific embodiments, but they are not intended to limit the present invention.

[0044] See also Figure 1 In a preferred embodiment of the present invention, based on the above-mentioned problems existing in the prior art, a method for monitoring the height of an indium column is provided, comprising:

[0045] Step S1. Obtain a first area of ​​a photolithographic hole 3 on a chip 1, and a second area of ​​the photolithographic hole excluding the indium column after the chip 1 is indium-plated;

[0046] As a preferred embodiment, the chip 1 is a mercury cadmium telluride chip.

[0047] Specifically, in this embodiment, chip 1 uses mercury cadmium telluride (HgCdTe, abbreviated as MCT) semiconductor material. Mercury cadmium telluride material is mainly used in the field of far-infrared detection. It is an important infrared detector material and can be used to manufacture mercury cadmium telluride infrared detectors. It has the advantages of small electron effective mass, high electron mobility, and fast response speed.

[0048] See also Figure 2-4 As a preferred embodiment, the method for obtaining the first area includes:

[0049] Step S11. After the chip 1 is photolithographically patterned according to a first predetermined pattern, the photolithographically patterned chip 1 is placed under a microscope (OM) and photographed to obtain a first image;

[0050] Step S12: Analyze and process the first image to obtain a first area.

[0051] Specifically, in this embodiment, first, a first predetermined pattern is photoetched on the chip 1. Preferably, the first predetermined pattern is a pattern required in the actual production process. As an example and not a limitation, the first predetermined pattern can be a square hole, a circular hole, a diamond hole, a combination of other regular patterns, or an irregular pattern and a combination thereof. The specific shape of the pattern is not limited here.

[0052] Then, the chip 1 with the pattern photolithography is placed under a microscope to take a first magnified picture.

[0053] In the above-mentioned photolithography process, the negative photoresist 2 is evenly spin-coated on the surface of the chip 1, and then undergoes pre-baking, exposure, post-baking, and development to present a first predetermined pattern.

[0054] Furthermore, in the first image, there is a significant difference in grayscale between the areas with photoresist and those without photoresist. The first area is determined by analyzing and counting the grayscale of the first image. The first area is the area of ​​a single photolithographic hole 3 or the area of ​​all photolithographic holes 3.

[0055] Furthermore, the analysis process of the first image can be directly processed using existing image analysis software.

[0056] As a preferred embodiment, the microscope takes pictures at a preset magnification.

[0057] Specifically, in this embodiment, since the photolithographic holes 3 are very small, it is necessary to use a microscope to magnify the image of the chip 1 after photolithography until it reaches a suitable magnification and then take a picture.

[0058] Furthermore, the microscope is magnified to a preset magnification, which can be set according to actual needs. As a preferred embodiment, the preset magnification is preferably 1000 times.

[0059] Before obtaining the second area, a layer of indium is deposited on the photolithographic chip 1 using a coating device, and then the indium grows into an indium column 4. Furthermore, the indium growth direction includes lateral growth and vertical growth.

[0060] Furthermore, the indium deposition process can be achieved by using a preset number of evaporation processes. Preferably, a single evaporation process is used to evaporate the indium layer at a set coating temperature. Alternatively, a double evaporation process is used to first evaporate a metal film on the photolithographic chip 1, and then evaporate a layer of indium;

[0061] Furthermore, in the process of evaporating indium, a thermal evaporation process is used to deposit indium, and the above-mentioned photoresist 2 is controlled at the same time. At a growth temperature of 100°C, the opening on the first photoresist is reduced to 6um, and the second photoresist will be maintained at about 9um. The first photoresist and the second photoresist can be any one of SUN-116p, SUN-110p, SUN-1170p, AZ4620, AZ6112, AZ6124, or AZ6130, respectively. Preferably, the first photoresist is SUN-116p, and the second photoresist is preferably AZ4620. Preferably, in this embodiment, the photolithography process using the second photoresist is taken as an example.

[0062] Furthermore, the photolithography process involved in the above-mentioned photolithography patterning process is hard contact photolithography.

[0063] See also Figure 5-7 As a preferred embodiment, the method for obtaining the second area includes:

[0064] Step S13. Place the indium-plated chip 1 under a microscope and take a second picture;

[0065] Step S14: Analyze and process the second image to obtain a second area.

[0066] Specifically, in this embodiment, after the above-mentioned evaporation, the excess indium layer on the chip 1 is not peeled off, and the chip 1 is directly placed on a microscope to take a second magnified picture, and the magnification of the second picture is the same as that of the first picture.

[0067] In the second picture above, there is a big difference in grayscale between the areas with indium and the areas without indium. The second area of ​​the part of the photolithographic hole excluding the indium column after the chip 1 is indium-plated is obtained by processing with existing image analysis software. Preferably, since the lateral growth of indium on the side wall of the photoresist 2 will block part of the photolithographic hole 3, the part of the photolithographic hole 3 not blocked by indium is Figure 7 The area corresponding to the mark 5 is the second area. The second area can be the area of ​​a single photolithography hole 3 that is not blocked by indium, or the area of ​​all photolithography holes 3 that are not blocked by indium.

[0068] Step S2. Calculate the pore blocking rate of the chip 1 before and after indium plating based on the first area and the second area;

[0069] As a preferred embodiment, the calculation method of the pore blocking rate includes:

[0070]

[0071] Wherein, B represents the first area; A represents the second area; and Pr represents the pore blocking rate.

[0072] Step S3: Determine the actual height of the indium pillar 4 according to the pore blocking rate and the designed height of the indium pillar 4.

[0073] See also Figure 8 As a preferred embodiment, the method for determining the actual height of the indium column 4 includes:

[0074] Step S31. Compare the hole blocking rate with a preset hole blocking threshold interval to obtain a comparison result; each hole blocking threshold interval corresponds to a correlation relationship, which is used to characterize the correspondence between the actual height of the indium pillar 4, the designed height of the indium pillar, and the hole blocking rate;

[0075] Step S32: Determine the actual height of the indium pillar 4 according to the correlation relationship corresponding to the hole blocking threshold interval obtained by matching the comparison result.

[0076] Specifically, during the indium vapor deposition process, a scanning electron microscope (SEM) can be used to examine the growth of the indium column 4 (element symbol: In) in the cross section. It can be found that for chips 1 with severe pore blockage, the indium column 4 tends to grow horizontally, while for chips 1 with less severe pore blockage, the indium column 4 tends to grow vertically, that is, different pore blockage rates correspond to different indium column 4 heights. Through a large amount of data and simulations, the relationship between the actual height of the indium column 4 and the pore blockage rate can be determined.

[0077] Furthermore, in order to improve the accuracy of the fitting equation, the pore blocking rate can be segmented into multiple preset pore blocking threshold intervals, and a piecewise function can be used to represent the above correlation relationship to more accurately determine the height of the indium pillar 4.

[0078] As a preferred embodiment, the correlation is determined based on multiple sets of hole blocking rates, indium column design heights, and actual heights of the indium column 4 under different photolithography processes, including:

[0079] Acquire multiple sets of experimental data under the same photolithography process, including actual heights of the indium pillars 4 corresponding to different hole blocking rates and different indium pillar design heights;

[0080] The experimental data were fitted to obtain the correlation relationship.

[0081] Specifically, in this embodiment, the above correlation relationship is determined in advance by fitting equations using a large amount of experimental data.

[0082] For the 9um lithography pattern, through comparative calculation and simulation, the fitting equation for the correlation between the actual height of the indium pillar 4 and the designed height of the indium pillar 4 and the blocking rate is:

[0083]

[0084] Wherein, B represents the first area; A represents the second area; h represents the designed height of the indium column 4, which can be set according to actual needs; and y represents the actual height of the indium column 4.

[0085] As a preferred embodiment, the first area is the area of ​​all the photolithography holes 3 on the chip 1 , and the second area is the area of ​​all the photolithography holes 3 excluding the indium pillars 4 .

[0086] As a preferred embodiment, the first area may also be the area of ​​a single photolithographic hole 3 on the chip 1 , and the second area is the area of ​​the single photolithographic hole 3 excluding the indium pillar 4 .

[0087] Furthermore, the actual height of the indium pillars 4 deposited is determined by the blocking rate, so that the height difference of all the indium pillars 4 in the entire chip 1 can be analyzed and simulated, thereby analyzing the uniformity of the effective vertically grown indium pillars 4 .

[0088] The above technical solution has the following advantages or beneficial effects: the present invention provides a method for monitoring the height of indium columns, which monitors the deposition height of indium columns by calculating the indium blocking rate, thereby achieving the purpose of monitoring the indium process. The monitoring method can be applied to effective and fast monitoring during large-scale mass production.

[0089] The above description is only a preferred embodiment of the present invention and does not limit the implementation mode and protection scope of the present invention. For those skilled in the art, it should be aware that all solutions obtained by equivalent substitutions and obvious changes made using the content of this specification and illustrations should be included in the protection scope of the present invention.

Claims

1. A method for monitoring the height of an indium column, characterized in that: include: Obtaining a first area of ​​a photolithographic hole on a chip, and a second area of ​​the photolithographic hole excluding the indium column after the chip is indium-plated; Calculating the pore blocking rate of the chip before and after indium plating based on the first area and the second area; Determine the actual height of the indium column according to the blocking rate and the designed height of the indium column; The method for determining the actual height of the indium column includes: Comparing the pore blocking rate with a preset pore blocking threshold interval to obtain a comparison result; Each of the hole blocking threshold intervals corresponds to a correlation relationship, and the correlation relationship is used to represent a correspondence between the actual height of the indium column, the designed height of the indium column, and the hole blocking rate; The actual height of the indium column is determined according to the correlation relationship corresponding to the hole blocking threshold interval obtained by matching the comparison result.

2. The method for monitoring the height of an indium column according to claim 1, wherein: The method for obtaining the first area includes: After the chip is photolithographically processed according to a first predetermined pattern, the photolithographically processed chip is placed under a microscope and photographed to obtain a first image; Analyze and process the first image to obtain the first area.

3. The method for monitoring the height of an indium column according to claim 1, wherein: The method for obtaining the second area includes: Placing the indium-plated chip under a microscope and photographing it to obtain a second picture; Analyze and process the second image to obtain the second area.

4. The method for monitoring the height of an indium column according to claim 2 or 3, wherein: The microscope is used to take photos at a preset magnification.

5. The method for monitoring the height of an indium column according to claim 4, wherein: The preset magnification is 1000 times.

6. The method for monitoring the height of an indium column according to claim 1, wherein: The calculation method of the pore blocking rate includes: ； Wherein, B represents the first area; A represents the second area; and Pr represents the pore blocking rate.

7. The method for monitoring the height of an indium column according to claim 1, wherein: The correlation relationship is determined based on multiple groups of the blocking rates, the designed heights of the indium pillars, and the actual heights of the indium pillars under different photolithography processes, including: Acquire multiple sets of experimental data under different photolithography processes, wherein the experimental data include actual heights of the indium pillars corresponding to different hole blocking rates and different indium pillar design heights; Fitting is performed on the experimental data to obtain the correlation relationship.

8. The method for monitoring the height of an indium column according to claim 1, wherein: The first area is the area of ​​all the photolithographic holes on the chip, and the second area is the area of ​​all the photolithographic holes excluding indium pillars; or The first area is the area of ​​a single photolithography hole on the chip, and the second area is the area of ​​the single photolithography hole excluding the indium column.

9. The method for monitoring the height of an indium column according to claim 1, wherein: The chip is a mercury cadmium telluride chip.

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