amplification device

Abstract

An amplifier device (1) of the present application includes an amplifier (20) including an amplification transistor (21) that amplifies an input high-frequency signal, a bias circuit (40) connected to the amplifier (20), an inductor (50) connected in series between the amplifier (20) and the bias circuit (40), a variable resistance circuit (70) connected to the inductor (50), and a control circuit (100). The control circuit (100) includes a measurement circuit (110) that measures a current amplification of the amplification transistor (21), and a comparison circuit (130) that compares the current amplification measured by the measurement circuit (110) with a reference value. The control circuit (100) controls the variable resistance circuit (70) based on a comparison result of the comparison circuit (130).

Description

TECHNICAL FIELD

[0001] The present application relates to an amplification device. BACKGROUND

[0002] In the past, an amplification circuit that amplifies a high-frequency signal is known. For example, in Patent Document 1, an amplification circuit that has an amplification transistor and a bias circuit that supplies a bias current to a base of the amplification transistor is disclosed.

[0003] In the amplification circuit described in Patent Document 1, a bias inductor is provided between the bias circuit and the base. The bias inductor functions as a low-pass filter that suppresses the reverse flow of the high-frequency signal to the bias circuit.

[0004] Patent Document 1: Japanese Patent Application Publication No. 2009-17494

[0005] In a case where the temperature has changed, the amplification rate of the amplification transistor changes. Therefore, in order to suppress the change in the amplification rate, it is desirable to supply an appropriate bias current that is appropriate for the change in the temperature.

[0006] However, in the above-described conventional amplification circuit, the inductance value of the bias inductor is fixed to one value. Therefore, there is a problem in that it is difficult to supply an appropriate bias current in accordance with the change in the temperature of the amplification transistor, and the degradation in the linearity of the amplification transistor cannot be suppressed. SUMMARY

[0007] Therefore, an object of the present application is to provide an amplification device that can suppress the degradation in the linearity caused by a change in the temperature.

[0008] The amplification device of one embodiment of the present application includes an amplifier including an amplification transistor that amplifies an input high-frequency signal, a bias circuit connected to the amplifier, an inductor connected in series between the amplifier and the bias circuit, a variable resistance circuit connected to the inductor, and a control circuit including a measurement circuit that measures an amplification characteristic value of the amplification transistor and a comparison circuit that compares the amplification characteristic value measured by the measurement circuit and a reference value, wherein the control circuit controls the variable resistance circuit on the basis of a comparison result of the comparison circuit.

[0009] According to the amplification device of the present application, the degradation in the linearity caused by a change in the temperature can be suppressed. BRIEF DESCRIPTION OF DRAWINGS

[0010] Figure 1 is a circuit diagram of the amplification device of Embodiment 1.

[0011] Figure 2 is a circuit diagram of the control circuit of the amplification device of Embodiment 1.

[0012] Figure 3 FIG. 1 is a circuit diagram of an amplifying device according to Embodiment 1.

[0013] Figure 4 FIG. 2 is a timing chart showing the operation of the amplifying device according to Embodiment 1.

[0014] Figure 5 FIG. 3 is a graph showing the effect of the amplifying device according to Embodiment 1.

[0015] Figure 6 FIG. 4 is a circuit diagram of a modified example of the amplifying device according to Embodiment 1.

[0016] Figure 7 FIG. 5 is a circuit diagram of an amplifying device according to Embodiment 2.

[0017] Figure 8 FIG. 6 is a circuit diagram of a control circuit of the amplifying device according to Embodiment 2.

[0018] Figure 9 FIG. 7 is a timing chart showing the operation of the amplifying device according to Embodiment 2.

[0019] Figure 10 FIG. 8 is a graph showing one example of a control signal supplied from the control circuit to the variable resistance circuit according to Embodiment 2.

[0020] Figure 11 FIG. 9 is a circuit diagram of a modified example 1 of the amplifying device according to Embodiment 2.

[0021] Figure 12 FIG. 10 is a circuit diagram of a control circuit of a modified example 2 of the amplifying device according to Embodiment 2.

[0022] Figure 13 FIG. 11 is a timing chart showing the operation of the amplifying device according to the modified example 2 of Embodiment 2. DETAILED DESCRIPTION

[0023] Hereinafter, the amplifying device according to the embodiments of the present application will be described in detail using the drawings. Furthermore, each of the embodiments described below shows one specific example of the present application. Thus, the numerical values, shapes, materials, constituent elements, arrangement and connection modes of the constituent elements, steps, order of the steps, and the like shown in the following embodiments are one example, and are not intended to limit the present application. Therefore, the constituent elements in the following embodiments that are not described in the independent claims are described as arbitrary constituent elements.

[0024] In addition, each of the drawings is a schematic view, and is not necessarily a strictly illustrated structure. Thus, for example, the scale and the like are not necessarily consistent in each of the drawings. In addition, in each of the drawings, the same reference numerals are attached to substantially the same structures, and repeated description is omitted or simplified.

[0025] In addition, in the description of the circuit structure of the present application, the so-called "direct connection" means direct connection by a connection terminal and / or a wiring conductor without passing through other circuit elements. On the other hand, "connection" includes not only the case of direct connection by a connection terminal and / or a wiring conductor, but also the case of electrical connection via other circuit elements. In addition, the so-called "connection between A and B" means connection to both A and B between A and B.

[0026] (Embodiment 1)

[0027] [1-1. Structure]

[0028] First, the configuration of the amplification device of Embodiment 1 will be described using Figure 1 The configuration of the amplification device of Embodiment 1 will be described. Figure 1 is a circuit diagram of the amplification device 1 of the present embodiment.

[0029] The amplification device 1 amplifies a high-frequency signal. The high-frequency signal is, for example, a signal according to a communication standard such as Wi-Fi (registered trademark), LTE (Long Term Evolution), or 5G (5th Generation). The amplification device 1 is, for example, connected to an antenna element, and is an amplification circuit that amplifies a high-frequency signal transmitted by the antenna element. The amplification device 1 is, for example, a power amplifier that amplifies a high-frequency signal for transmission. The amplification device 1 is, for example, provided at a front end of a mobile phone that supports multiple modes / multiple bands. The amplification device 1 is, for example, configured within an IC (Integrated Circuit) element.

[0030] As shown in Figure 1 , the amplification device 1 includes an input terminal 10, an output terminal 11, an amplifier 20 including an amplification transistor 21, a DC cut capacitor 30, a bias circuit 40, an inductor 50, a capacitor 51, a ballast resistor 60, a variable resistance circuit 70, power supply terminals 80 and 81, and a control circuit 100.

[0031] The input terminal 10 is a terminal that inputs a high-frequency signal. The input terminal 10 is, for example, connected to an RFIC (not shown) or the like.

[0032] The output terminal 11 is a terminal that outputs a high-frequency signal after the amplification transistor 21. The output terminal 11 is, for example, connected to an antenna element via a switching circuit (not shown) or the like.

[0033] The amplifier 20 includes at least one amplification transistor 21. The amplification transistor 21 is a bipolar transistor having a base, a collector, and an emitter. The amplification transistor 21 is, for example, an npn-type bipolar transistor formed using silicon (Si) or silicon germanium (SiGe).

[0034] The base of the amplification transistor 21 is an example of a control terminal. The input terminal 10 is connected via the DC cut capacitor 30. The collector of the amplification transistor 21 is connected to the output terminal 11. The emitter of the amplification transistor 21 is connected to ground (i.e., ground).

[0035] In the present embodiment, the amplifier 20 includes a plurality of amplification transistors 21. The plurality of amplification transistors 21 constitute a multi-cell type bipolar transistor. The collectors of the plurality of amplification transistors 21 are connected to each other and to the output terminal 11. The emitters of the plurality of amplification transistors 21 are connected to each other and to ground. The bases of the plurality of amplification transistors 21 are connected to the input terminal 10 via the DC cut capacitor 30. The bases of the plurality of amplification transistors 21 are connected to each other via the ballast resistors 60 and to the inductor 50. That is, one end of each of the plurality of ballast resistors 60 is connected to the base of the corresponding amplification transistor 21. The other end of each of the plurality of ballast resistors 60 is connected to the inductor 50. Further, the amplifier 20 can include only one amplification transistor 21.

[0036] The DC cut capacitor 30 removes a direct current component included in a high frequency signal input to the input terminal 10. The DC cut capacitor 30 is connected in series to a path connecting the input terminal 10 and the base of the amplification transistor 21. Specifically, one end of the DC cut capacitor 30 is connected to the input terminal 10, and the other end is connected to the base of the amplification transistor 21.

[0037] The bias circuit 40 is a circuit that supplies a bias current to the control terminal of the amplification transistor 21. The bias circuit 40 includes an emitter follower circuit. Specifically, as shown in FIG. 4, the bias circuit 40 includes transistors 41, 42, and 43, and a resistor 44. Figure 1

[0038] The transistors 41, 42, and 43 are bipolar transistors each having a base, a collector, and an emitter. The transistors 41, 42, and 43 are, for example, npn-type bipolar transistors formed using silicon (Si) or silicon germanium (SiGe).

[0039] The transistor 41 is a transistor that constitutes the emitter follower circuit. The base of the transistor 41 is connected to the base and the collector of the transistor 42, and one end of the resistor 44. The collector of the transistor 41 is connected to the power supply terminal 81. The emitter of the transistor 41 is connected to the inductor 50 via the variable resistance circuit 70. Further, the emitter of the transistor 41 can be directly connected to the inductor 50.

[0040] ​The transistor 42 has its base and collector connected to each other, and connected to one end of the resistor 44 and the base of the transistor 41. The transistor 43 has its base and collector connected to each other, and connected to the emitter of the transistor 42. The emitter of the transistor 43 is connected to ground.

[0041] The resistor 44 is connected in series between the base of the transistor 41 and the power supply terminal 80. Specifically, one end of the resistor 44 is connected to the base of the transistor 41 and the base and collector of the transistor 42. The other end of the resistor 44 is connected to the power supply terminal 80.

[0042] The bias circuit 40 thus configured supplies the collector current flowing in the transistor 41 as a bias current to the base of the amplifying transistor 21. In the present embodiment, the inductor 50, the ballast resistor 60, and the variable resistance circuit 70 are connected in series between the emitter of the emitter follower circuit included in the bias circuit 40 and the control terminal of the amplifying transistor 21. Thus, the size of the collector current of the transistor 41 is adjusted, and a bias current of an appropriate size is supplied to the base of the amplifying transistor 21.

[0043] The inductor 50 is connected in series between the emitter of the emitter follower circuit included in the bias circuit 40 and the control terminal of the amplifying transistor 21. Specifically, one end of the inductor 50 is connected to the emitter of the transistor 41 via the variable resistance circuit 70. The other end of the inductor 50 is connected to the ballast resistor 60.

[0044] The inductor 50 is a choke inductor, and functions as a low-pass filter that suppresses the inflow of a high-frequency signal input to the input terminal 10 into the bias circuit 40. However, the inductor 50 does not completely block the high-frequency signal. A part of the high-frequency signal is coupled to the transistor 41 of the bias circuit 40 via the inductor 50.

[0045] The inductor 50 is constituted by, for example, a wiring pattern formed in an IC element. For example, the inductor 50 is a spiral inductor formed using a conductive material such as metal.

[0046] The capacitor 51 is connected in parallel to the inductor 50. By connecting the capacitor 51 in parallel to the inductor 50, the impedance between the bias circuit 40 and the base of the amplifying transistor 21 can be easily increased. Specifically, even if the inductance value of the inductor 50 is reduced, the impedance can be increased by providing the capacitor 51 having a small capacitance value. Thus, the impedance can be ensured to be large, and the inductor 50 can be miniaturized.

[0047] A ballast resistor 60 is connected in series between the inductor 50 and the control terminal of the amplifying transistor 21. Specifically, one end of the ballast resistor 60 is connected to the inductor 50. The other end of the ballast resistor 60 is connected to the path connecting the DC cutoff capacitor 30 and the base of the amplifying transistor 21. That is, the other end of the ballast resistor 60 is directly electrically connected to the base of the amplifying transistor 21.

[0048] The variable resistor circuit 70 is connected to the inductor 50. In this embodiment, the variable resistor circuit 70 is an example of a variable resistor circuit connected in series with the inductor 50. Specifically, one end of the variable resistor circuit 70 is connected to the emitter of the transistor 41 that constitutes the emitter follower circuit of the bias circuit 40. The other end of the variable resistor circuit 70 is connected to one end of the inductor 50.

[0049] Alternatively, the variable resistor circuit 70 can be configured between the inductor 50 and the base of the amplifying transistor 21. Specifically, one end of the variable resistor circuit 70 can be connected to the other end of the inductor 50 (the terminal on the amplifying transistor 21 side), and the other end of the variable resistor circuit 70 can be connected to the base of the amplifying transistor 21 or the ballast resistor 60.

[0050] like Figure 1 As shown, the variable resistor circuit 70 includes two resistors R1 and R2, two switches SW1 and SW2, and two control terminals P1 and P2. Furthermore, the variable resistor circuit 70 may have only one resistor, one switch, and three or more control terminals. While the number of resistors and the number of switches may be the same, they can also be different. The number of switches and the number of control terminals may be the same.

[0051] Two resistors, R1 and R2, are connected in series. The resistance values ​​of R1 and R2 are equal. Alternatively, the resistance values ​​of R1 and R2 can be different.

[0052] The two switches SW1 and SW2 are, for example, switching elements such as MOSFETs (Metal Oxide Semiconductor Field Effect Transistors). The MOSFET is a p-type MOSFET, but it can also be an n-type MOSFET. Alternatively, a mixture of p-type and n-type MOSFETs can exist.

[0053] The switches SW1 and SW2 switch on (turn on) and off (turn off) in accordance with control signals supplied to the control terminals P1 and P2, respectively. The control terminal P1 is connected to the gate of the switch SW1. The control terminal P2 is connected to the gate of the switch SW2. By giving the control signals to each of the control terminals P1 and P2 independently, the switches SW1 and SW2 can switch on and off independently of each other, respectively.

[0054] The resistance value of the variable resistance circuit 70 can be adjusted by switching the on and off of each of the switches SW1 and SW2.

[0055] For example, in the case where both of the switches SW1 and SW2 are off, the variable resistance circuit 70 becomes a series circuit of the resistors R1 and R2. In the case where only the switch SW1 is on and the switch SW2 is off, the variable resistance circuit 70 becomes a circuit of only the resistor R2. In the case where only the switch SW2 is on and the switch SW1 is off, the variable resistance circuit 70 becomes a circuit of only the resistor R1. In the case where both of the switches SW1 and SW2 are on, the variable resistance circuit 70 becomes a circuit in which both ends (specifically, the emitter of the transistor 41 and one end of the inductor 50) are substantially short-circuited. As such, the resistance value of the variable resistance circuit 70 can be changed by the on and off of each of the switches SW1 and SW2. Specifically, the more the switches that are on, the smaller the resistance value of the variable resistance circuit 70.

[0056] The power terminal 80 is a power terminal for controlling the emitter follower of the bias circuit 40. The power terminal 81 is a power terminal for supplying a bias current. The power terminals 80 and 81 are connected to voltage sources that supply prescribed voltages, respectively.

[0057] The control circuit 100 controls the variable resistance circuit 70. The detailed structure of the control circuit 100 will be described later.

[0058] [1-2. Functions of the ballast resistor, the inductor, and the variable resistance circuit]

[0059] Generally, the amplifying transistor 21 used as a power amplifier that amplifies a high-frequency signal is biased to the AB class for the purpose of high efficiency. In addition, in order to suppress thermal runaway of the amplifying transistor 21, the ballast resistor 60 is provided between the base of the amplifying transistor 21 and the bias circuit 40.

[0060] In the case where the temperature of the amplifying transistor 21 rises, the threshold value of the amplifying transistor 21 decreases, and a large collector current easily flows. This becomes a cause of thermal runaway. This phenomenon becomes a cause of thermal deviation among the units to be enlarged in the amplifying device 1 having the multi-cell type amplifying transistor 21 as shown in FIG. 1, and becomes a problem in particular. Figure 1 In the case where the temperature of the amplifying transistor 21 rises, the threshold value of the amplifying transistor 21 decreases, and a large collector current easily flows. This becomes a cause of thermal runaway. This phenomenon becomes a cause of thermal deviation among the units to be enlarged in the amplifying device 1 having the multi-cell type amplifying transistor 21 as shown in FIG. 1, and becomes a problem in particular.

[0061] The ballast resistor 60 functions as a countermeasure against thermal runaway. Specifically, a voltage drop is generated in the ballast resistor 60 by a large bias current flowing in the ballast resistor 60, and the base potential of the amplification transistor 21 can be lowered. Thus, thermal runaway of the amplification transistor 21 caused by a large collector current accompanying a temperature rise can be suppressed.

[0062] On the other hand, the collector current of the amplification transistor 21 biased at the AB class generally increases as the RF output power increases. Thus, the DC power supplied to the amplification transistor 21 increases according to an increase in the RF output power, and the amplification transistor 21 can operate with a certain gain to a high RF output power. However, as described above, the ballast resistor 60 suppresses an increase in the collector current, and thus the gain of the amplification transistor 21 decreases through the ballast resistor 60 as the RF output power increases. In order to obtain a good EVM (Error Vector Magnitude) characteristic of the amplification device 1 for use in a transmission circuit, it is desirable to keep the gain of the amplification transistor 21 constant with respect to a change in the RF output power. That is, it is desirable to provide the ballast resistor 60 appropriately for suppressing thermal runaway, and the bias circuit 40 having a function of increasing the collector current according to a change in the RF output power.

[0063] In the present embodiment, the inductor 50 is connected between a path linking the input terminal 10 and the base of the amplification transistor 21 and the emitter of the emitter follower circuit (specifically, the transistor 41) included in the bias circuit 40. Thus, a part of the high-frequency signal supplied from the input terminal 10 to the base of the amplification transistor 21 is coupled with the bias circuit 40 via the inductor 50. By coupling a part of the high-frequency signal with the bias circuit 40, a bias current of an appropriate size can be supplied to the amplification transistor 21. Thus, the gain of the amplification transistor 21 can be easily kept constant with respect to a change in the output power.

[0064] In a case where the inductance value of the inductor 50 is small, the coupling of the high-frequency signal with the bias circuit 40 increases. In a case where the inductance value of the inductor 50 is large, the coupling of the high-frequency signal with the bias circuit 40 decreases. That is, the amount of coupling can be adjusted by adjusting the inductance value of the inductor 50. By adjusting the amount of coupling according to the characteristics of the amplification transistor 21, the gain can be easily kept constant with respect to a change in the output power.

[0065] However, it is not easy to make the inductance value of the inductor 50 variable. In order to change the inductance value, the pattern of the inductor 50 needs to be changed, and the design efficiency is poor.

[0066] On the other hand, in the amplifying device 1 of the present embodiment, the variable resistance circuit 70 is connected to the inductor 50. The inductance value of the inductor 50 is a fixed value. By changing the resistance value of the variable resistance circuit 70, the impedance between the line connecting the input terminal 10 and the base of the amplifying transistor 21 and the emitter of the transistor 41 of the bias circuit 40 can be changed. By changing the impedance, the amount of coupling of the high-frequency signal to the bias circuit 40 can be adjusted.

[0067] Therefore, in the amplifying device 1 of the present embodiment, the gain can be easily kept constant with respect to the change in the output power. Thus, the amplifying device 1 having a more suitable linearity than in the past can be realized. The variable resistance circuit 70 provided in the amplifying device 1 functions as a low-distortion resistance that reduces the distortion of the high-frequency signal on the output terminal 11 side.

[0068] Further, in the case where the heat dissipation property of the amplifying transistor 21 is high, the ballast resistor 60 can not be provided.

[0069] [1-3. Control circuit]

[0070] Next, the specific structure of the control circuit 100 will be described. Figure 2 The specific structure of the control circuit 100 will be described.

[0071] Figure 2 is a circuit diagram of the control circuit 100 of the amplifying device 1 of the present embodiment. As shown in Figure 2 , the control circuit 100 has a measurement circuit 110, a reference voltage source 120, comparison circuits 130 and 140, and a timing circuit 150.

[0072] In the present embodiment, the control circuit 100 compares the current amplification β of the amplifying transistor 21 with two reference values β1 and β2 by the two comparison circuits 130 and 140. As one example, β1 = 80 and β2 = 120 are set. The comparison circuit 130 compares the current amplification β with the reference value β1. The comparison circuit 140 compares the current amplification β with the reference value β2. Further, the control circuit 100 can include only one of the comparison circuit 130 and the comparison circuit 140, and compare the current amplification β with only one reference value.

[0073] The measurement circuit 110 measures the current amplification β of the amplifying transistor 21. The current amplification β is one example of the amplification characteristic value of the amplifying transistor 21. As shown in Figure 2 , the measurement circuit 110 includes a replica transistor 111 and a transistor 112. The measurement circuit 110 measures the current amplification of the replica transistor 111 as the current amplification β of the amplifying transistor 21.

[0074] The replica transistor 111 is a transistor with the same temperature variation characteristics as the amplifying transistor 21. The replica transistor 111 is used to monitor the current amplification rate. The replica transistor 111 is, for example, the same transistor as the amplifying transistor 21. Specifically, the replica transistor 111 includes an emitter, base, and collector with the same composition as the amplifying transistor 21.

[0075] Furthermore, the replica transistor 111 can also be a smaller transistor than the amplifying transistor 21, as long as it has the same temperature change characteristics. The replica transistor 111 can be housed within the same chip as the amplifying transistor 21. In the replica transistor 111, during the operation of the amplifying transistor 21, a temperature change occurs that is substantially equivalent to that of the amplifying transistor 21.

[0076] like Figure 2 As shown, the base of the replica transistor 111 is connected to the reference voltage source 120. The collector of the replica transistor 111, an example of the output terminal of the replica transistor 111, is connected to the drain of the transistor 112. The emitter of the replica transistor 111 is connected to ground.

[0077] A constant current Ib0 is supplied from a reference voltage source 120 to the base of the replica transistor 111. The constant current Ib0 is, for example, 10 μA. By supplying the constant current Ib0 to the base, a collector current Ic0 flows in the collector of the replica transistor 111. The magnitude of the collector current Ic0 is β × Ib0. Here, β is the current amplification rate of the replica transistor 111 and the current amplification rate of the amplifying transistor 21.

[0078] Transistor 112 is an example of a first transistor connected to the output terminal of the replica transistor 111. Transistor 112 is, for example, a p-type MOSFET. The source of transistor 112 is connected to the power supply voltage Vdd. The drain of transistor 112 is connected to the collector of the replica transistor 111. The gate of transistor 112 is connected to the gate of transistor 131 of comparator circuit 130. The gate and drain of transistor 112 are interconnected. Transistor 112 and transistor 131 form a current mirror circuit.

[0079] In this embodiment, the gate of transistor 112 is also connected to the gate of transistor 141 of comparator circuit 140. Transistor 112 and transistor 141 form a current mirror circuit.

[0080] Reference voltage source 120 generates a reference voltage Vref. Reference voltage source 120 is connected to the second input terminals of comparator 133 in comparator circuit 130 and comparator 143 in comparator circuit 140, respectively. Reference voltage source 120 supplies the reference voltage Vref to each of the second input terminals. The reference voltage Vref is, for example, 1.2V.

[0081] In addition, the reference voltage source 120 generates a constant current Ib0. The reference voltage source 120 is connected to the base of the replica transistor 111. The reference voltage source 120 supplies the constant current Ib0to the base of the replica transistor 111.

[0082] The reference voltage source 120 generates a reference voltage Vref and the constant current Ib0based on the power supply voltage Vdd. The reference voltage source 120 is supplied with an enable signal EN. The reference voltage source 120 controls the timing at which the reference voltage Vref and the constant current Ib0are supplied based on the enable signal EN.

[0083] The comparison circuit 130 compares the current amplification factor measured by the measurement circuit 110 with a reference value. Specifically, as shown in FIG. 1, the comparison circuit 130 includes a transistor 131, a resistor 132, a comparator 133, and a D-latch circuit 134. Figure 2

[0084] The transistor 131 is an example of a second transistor connected to a first input terminal of the comparator 133. The transistor 131 forms a current mirror circuit with the transistor 112. The transistor 131 is a transistor of the same polarity and the same kind as the transistor 112. In the present embodiment, the transistor 112 is a p-type MOSFET, and therefore the transistor 131 is also a p-type MOSFET.

[0085] The source of the transistor 131 is connected to the power supply voltage Vdd. The drain of the transistor 131 is connected to the first input terminal of the comparator 133. In addition, the drain of the transistor 131 is connected to ground via the resistor 132. The gate of the transistor 131 is connected to the gate of the transistor 112 of the measurement circuit 110.

[0086] Since the transistor 131 forms a current mirror circuit with the transistor 112, the current Ial flows in the drain of the transistor 131 in the case where the current Ico flows in the drain of the transistor 112. In the case where the mirror ratio of the current mirror circuit is 1:1, the current Ial is equal to the current Ico. Furthermore, the mirror ratio can not be 1:1.

[0087] The resistor 132 is connected between the drain of the transistor 131 and ground. In addition, the transistor 131 drain side terminal of the resistor 132 is connected to the first input terminal of the comparator 133. Thereby, the resistor 132 supplies a voltage Vai corresponding to the current Ial flowing in the drain of the transistor 131 to the first input terminal of the comparator 133. For example, in the case where the resistance value of the resistor 132 is Ral, the voltage Vai supplied to the first input terminal is represented by Ial x Ral. Here, since Ial = Ico = β x Iref, Vai is represented by the following equation (1). ​

[0088] (1) Va1 = β x Iref x Ra1

[0089] The comparator 133 includes a first input terminal, a second input terminal, and an output terminal. In the present embodiment, the comparator 133 is a digital comparator, and outputs a comparison result from the output terminal as a digital signal. The comparator 133 is, for example, an operational amplifier. The first input terminal is a non-inverting input terminal (+) of the operational amplifier. The second input terminal is an inverting input terminal (-) of the operational amplifier. Further, it is also possible that the first input terminal is the inverting input terminal (-), and the second input terminal is the non-inverting input terminal (+).

[0090] Specifically, the comparator 133 compares the voltage Va1 input to the first input terminal with the reference voltage Vref input to the second input terminal, and outputs a comparison result from the output terminal as a digital signal. The output digital signal is expressed by two values of a high level and a low level. For example, as shown in Equations (2) and (3), in a case where the voltage Va1 is greater than the reference voltage Vref, the digital signal becomes a high level (high), and in a case where the voltage Va1 is less than the reference voltage Vref, the digital signal becomes a low level (low).

[0091] (2) High: Va1 > Vref

[0092] (3) Low: Va1 < Vref

[0093] By substituting Equation (1) into Equations (2) and (3) respectively and solving β, the high level (high) and the low level (low) of the digital signal are expressed by Equations (4) and (5) below.

[0094] (4) High: β > Vref / (Iref x Ra1)

[0095] (5) Low: β < Vref / (Iref x Ra1)

[0096] As described above, since Vref = 1.2 V and Iref = 10 μA, Ra1 is set to 1.5 kΩ. Thereby, the right side of Equations (4) and (5) (= β1) becomes 80. That is, the high level (high) and the low level (low) of the digital signal are expressed by Equations (6) and (7) below.

[0097] (6) High: β > β1 = 80

[0098] (7) Low: β < β1 = 80

[0099] In this way, comparison of the current amplification β measured by the measurement circuit 110 and the reference value β1 can be performed. Further, by changing at least one of Vref, Iref, and Ra1, the value of the reference value β1 can be freely set.

[0100] The D latch circuit 134 is one example of a holding circuit that holds the signal output from the output terminal of the comparison circuit 133. The D latch circuit 134 holds the signal level of the digital signal for a certain period and outputs it.

[0101] The D latch circuit 134 is connected to the output terminal of the comparison circuit 133. The D latch circuit 134 has a D terminal, a G terminal, and a Q terminal. The D terminal is connected to the output terminal of the comparison circuit 133. The G terminal is connected to the timing circuit 150. The Q terminal is one output terminal of the control circuit 100 and is connected to the variable resistance circuit 70. For example, the Q terminal is connected to the control terminal PI of the variable resistance circuit 70.

[0102] The comparison circuit 140 compares the current amplification β determined by the determination circuit 110 with a reference value. The structure of the comparison circuit 140 is the same as that of the comparison circuit 130. Specifically, as shown in FIG. 4, the comparison circuit 140 includes a transistor 141, a resistor 142, a comparison circuit 143, and a D latch circuit 144. The transistor 141, the resistor 142, the comparison circuit 143, and the D latch circuit 144 correspond to the transistor 131, the resistor 132, the comparison circuit 133, and the D latch circuit 134 of the comparison circuit 130, respectively. Figure 2

[0103] The comparison circuit 140 differs from the comparison circuit 130 in that the resistance value of the resistor 142 is different from the resistance value of the resistor 132. For example, the resistance value Ra2 of the resistor 142 is 1 kΩ.

[0104] Thus, the magnitude of the voltage Va2 input to the first input terminal of the comparison circuit 143 is different from the magnitude of the voltage Va1 input to the first input terminal of the comparison circuit 133. Therefore, the comparison circuit 143 can output a comparison result different from the reference value of the comparison circuit 133. That is, the comparison circuit 140 performs a comparison different from the reference value of the comparison circuit 130. Specifically, the high level (high) and the low level (low) of the digital signal output from the comparison circuit 143 are represented by the following equations (8) and (9).

[0105] (8) High: β > Vref / (Iref x Ra2) = β2 = 120

[0106] (9) Low: β < Vref / (Iref x Ra2) = β2 = 120

[0107] By combining the equations (6) to (9), the combination of the control signals output by the control circuit 100 is as shown in FIG. 5. Figure 3 Figure 3 is a diagram showing one example of the control signals (output signals) supplied by the control circuit 100 of the present embodiment to the variable resistance circuit 70. In FIG. 6, the horizontal axis represents time, and the vertical axis represents the voltage.​​Figure 3 In this case, the output signal Vo1 indicates the signal level of the digital signal output from the comparison circuit 130. The output signal Vo2 indicates the signal level of the digital signal output from the comparison circuit 140.

[0108] Since the output terminal of the comparison circuit 130 is connected to the control terminal P1 of the variable resistance circuit 70, the on-off of the switch SW1 is controlled by the signal level of the output signal Vo1. In the case where the signal level of the output signal Vo1 is low, the switch SW1 becomes conductive (on). In the case where the signal level of the output signal Vo1 is high, the switch SW1 becomes non-conductive (off).

[0109] Since the output terminal of the comparison circuit 140 is connected to the control terminal P2 of the variable resistance circuit 70, the on-off of the switch SW2 is controlled by the signal level of Vo2. In the case where the signal level of Vo2 is low, the switch SW2 becomes conductive (on). In the case where the signal level of Vo2 is high, the switch SW2 becomes non-conductive (off).

[0110] With this configuration, in the case where the current amplification ratio β is smaller than the reference value β1 (= 80), since both of the switches SW1 and SW2 become conductive, the resistance value of the variable resistance circuit 70 is substantially 0. In the case where the current amplification ratio β is larger than the reference value β1 and smaller than the reference value β2 (= 120), since the switch SW1 becomes non-conductive and the switch SW2 becomes conductive, the resistance value of the variable resistance circuit 70 is equal to the resistance value of the resistance R1. In the case where the current amplification ratio β is larger than the reference value β2, since both of the switches SW1 and SW2 become non-conductive, the resistance value of the variable resistance circuit 70 is equal to the sum of the resistance value of the resistance R1 and the resistance value of the resistance R2.

[0111] As such, the larger the current amplification ratio β, the larger the resistance value of the variable resistance circuit 70 that the control circuit 100 can make. Thus, although the details thereof will be described later, Figure 5 but the deterioration of the linearity caused by the variation of the ambient temperature of the amplification transistor 21 can be suppressed.

[0112] [1-4. Operation]

[0113] Next, the operation of the amplification device 1 will be described. Figure 4 is a timing chart showing the operation of the amplification device 1 of the present embodiment. Specifically, Figure 4 shows the main signals processed by the control circuit 100 of the amplification device 1 over time.

[0114] The amplifier 1 operates based on the enable signal EN. Specifically, when the enable signal EN is high, it operates to amplify the high-frequency signal for transmission. The period during which the enable signal EN is high includes the setting period of the amplifier 20 and the transmission period of the high-frequency signal RF.

[0115] The setting period is the time from when amplifier 1 is started (i.e., from when the enable signal EN becomes high) to when the high-frequency signal RF is input. The transmission period is the time during which the high-frequency signal RF is input to amplifier 1. Furthermore, in wireless communication, the transmitted data is generally divided into multiple packets and transmitted one packet at a time. To reduce current consumption, amplifier 1 is started slightly before transmitting the data and turned off after the data transmission is completed.

[0116] During the setup of amplifier 20, the timing signal Vt goes high, and the control circuit 100 operates, executing the measurement circuit 110 to measure the current amplification rate β, and the comparison circuits 130 and 140 to compare the current amplification rate β with reference values ​​β1 and β2, respectively. Thus, before transmitting the high-frequency signal RF, the switching on and off of switches SW1 and SW2 of the variable resistor circuit 70 is controlled based on the comparison results, adjusting the resistance value of the variable resistor circuit 70.

[0117] Even if the current amplification ratio β of the amplifying transistor 21 varies due to changes in ambient temperature, the linearity degradation caused by the variation in current amplification ratio β can be suppressed by adjusting the resistance value of the variable resistor circuit 70 before transmitting the high-frequency signal. Furthermore, the linearity degradation caused by variations in the current amplification ratio β of the amplifying transistor 21 due to process variations can also be suppressed.

[0118] In this embodiment, since comparator circuit 130 and comparator circuit 140 respectively include D latch circuit 134 and D latch circuit 144, the comparison result is held for a certain period of time. Specifically, the comparison result is held at least until the end of the transmission period. In this embodiment, the comparison result is held until the enable signal EN switches from a high level to a low level.

[0119] like Figure 4 As shown, during the period when the comparison result is maintained, the signal levels of output signals Vo1 and Vo2 are kept constant. Therefore, the on / off states of switches SW1 and SW2 in the variable resistor circuit 70 are maintained. Thus, it is possible to suppress changes in the gain and other characteristics of the amplification transistor 21 due to variations in the variable resistor circuit 70 during the transmission of the high-frequency signal RF.

[0120] [1-5. Effects, etc.]

[0121] As above, the amplification device 1 of the present embodiment includes the amplifier 20 including the amplification transistor 21 that amplifies an input high-frequency signal, the bias circuit 40 connected to the amplifier 20, the inductor 50 connected in series between the amplifier 20 and the bias circuit 40, the variable resistance circuit 70 connected to the inductor 50, and the control circuit 100. The control circuit 100 includes the measurement circuit 110 that measures the current amplification β of the amplification transistor 21, and the comparison circuit 130 or the comparison circuit 140 that compares the current amplification β measured by the measurement circuit 110 with the reference value β1 or the reference value β2. The control circuit 100 controls the variable resistance circuit 70 based on the comparison result of the comparison circuit 130 or the comparison circuit 140.

[0122] Thus, it is possible to adjust the coupling amount of the high-frequency signal to the bias circuit 40 by controlling the variable resistance circuit 70 based on the comparison result of the current amplification β of the amplification transistor 21 with the reference value β1 and the reference value β2. By adjusting the coupling amount to an appropriate value, an appropriate magnitude of bias current is supplied to the base of the amplification transistor 21. Therefore, the gain of the amplification transistor 21 is easily kept constant with respect to a change in output power.

[0123] For example, in a case where the current amplification β varies due to temperature variation of the amplification transistor 21, it is possible to supply an appropriate bias current according to the magnitude of the current amplification β, and adjust the impedance of the bias circuit 40. Thus, it is possible to suppress deterioration in linearity of the amplification characteristics caused by temperature variation of the amplification transistor 21.

[0124] Hereinafter, the effects will be described based on the specific structure of the amplification device 1.

[0125] Figure 5 is a graph showing the effects of the amplification device 1 of the present embodiment. Figure 5 (a) to (c) of show the relationship between the output power and the gain of the amplification transistor 21. In each graph, the horizontal axis shows the output power, and the vertical axis shows the gain.

[0126] As shown in (a) of Figure 5 In the amplification transistor 21 biased at the AB class, as shown in (a) of, gain expansion easily occurs in a case where the current amplification β is large. That is, the larger the output power, the larger the gain. On the contrary, in a case where the current amplification β is small, gain compression easily occurs. That is, the larger the output power, the smaller the gain. Like this, distortion of the gain occurs according to the magnitude of the current amplification β, and the linearity of the amplification transistor 21 deteriorates.

[0127] In addition, as shown in (b) of Figure 5In the case where the bias is the AB class and the ballast resistor is small, as shown in (b), gain expansion is easily generated in the amplification transistor 21. In contrast, in the case where the ballast resistor is large, gain compression is easily generated.

[0128] In the present embodiment, the gain expansion and the gain compression are cancelled out by changing the resistance value of the variable resistance circuit 70 that functions as a part of the ballast resistor of the amplification transistor 21. Thus, as shown in (c), the distortion of the gain can be suppressed regardless of the size of the current amplification β. That is, the deterioration of the linearity caused by the temperature variation of the amplification transistor 21 can be suppressed. Figure 5

[0129] Specifically, in the case where the current amplification β is large, the resistance value of the variable resistance circuit 70 is increased. For example, in the case where the current amplification β is larger than the reference value β2, as shown in (b), since the output signal Vo1 and the output signal Vo2 are both high, the switches SW1 and SW2 become non-conductive, and the resistance value of the variable resistance circuit 70 is increased. Thus, the gain compression generated by increasing the resistance value of the variable resistance circuit 70 can be used to cancel out the gain expansion caused by the large current amplification β. Figure 3

[0130] In addition, in the case where the current amplification β is small, the resistance value of the variable resistance circuit 70 is decreased. For example, in the case where the current amplification β is smaller than the reference value β1, as shown in (a), since the output signal Vo1 and the output signal Vo2 are both low, the switches SW1 and SW2 are conducted, and the resistance value of the variable resistance circuit 70 is decreased. Thus, the gain expansion generated by decreasing the resistance value of the variable resistance circuit 70 can be used to cancel out the gain compression caused by the small current amplification β. Figure 3

[0131] In addition, it is not necessary to test the amplification device 1 in advance, and it is not necessary to store the measured results of the current amplification β in an eFuse. Since the bias current is not adjusted on the basis of the information stored in the eFuse, it is not necessary to secure an area in which the eFuse and its control circuit are provided. Thus, the control circuit 100 can be miniaturized. According to the amplification device 1 of the present embodiment, not only the deterioration of the linearity caused by the process variation can be suppressed, but also the deterioration of the linearity caused by the dynamic change in the ambient temperature and the like can be suppressed. That is, the amplification device 1 can compensate for the static and dynamic distortion characteristics.

[0132] In addition, for example, the measurement circuit 110 measures the current amplification of a replica transistor 111 having the same temperature variation characteristic as the amplification transistor 21 as the current amplification β of the amplification transistor 21. The amplification transistor 21 and the replica transistor 111 are both bipolar transistors.​​​

[0133] Thus, since the current amplification β of the amplification transistor 21 can not be directly measured, the structure of the measurement circuit 110 can be simplified.

[0134] Further, for example, the measurement circuit 110 includes a transistor 112 connected to an output terminal of the replica transistor 111. The comparison circuit 130 includes a comparator 133 including a first input terminal, a second input terminal, and an output terminal, and a transistor 131 connected to the first input terminal of the comparator 133. A reference voltage Vref corresponding to a reference value is input to the second input terminal. The transistor 112 and the transistor 131 form a current mirror circuit.

[0135] Thus, since the same current as the current flowing in the replica transistor 111 can flow into the comparison circuit 130, the current can be simply converted into a voltage in the comparison circuit 130, and then compared with the reference voltage Vref. That is, by replacing the current amplification β with a voltage and comparing, comparison can be simply and highly accurately performed, and the output thereof can be used to compensate for the distortion characteristic.

[0136] Further, for example, the control circuit 100 further includes a reference voltage source 120 connected to the second input terminal and generating the reference voltage Vref.

[0137] Thus, since a constant voltage and a constant current can be stably supplied, the accuracy of comparison can be improved.

[0138] Further, for example, the comparator 133 outputs a comparison result as a digital signal from the output terminal.

[0139] Thus, the resistance value of the variable resistance circuit 70 can be adjusted by digital control.

[0140] Further, for example, the variable resistance circuit 70 includes a resistance Rl and a switch SWl connected to the resistance Rl. The switch SWl switches on and off based on a digital signal.

[0141] Thus, the resistance value of the variable resistance circuit 70 can be simply changed by on and off of the switch.

[0142] Further, for example, the control circuit 100 further includes a holding circuit holding a signal input to the first input terminal or a signal output from the output terminal. Further, for example, the holding circuit is a D latch circuit connected to the output terminal.

[0143] Thus, by holding the signal for a certain period, the resistance value of the variable resistance circuit 70 can be maintained for a certain period.

[0144] In addition, for example, the holding circuit holds during the period in which the high-frequency signal is input to the amplifying device 1.

[0145] Thus, since the resistance value of the variable resistance circuit 70 can be suppressed from fluctuating during transmission of the high-frequency signal, the current amplification β can be suppressed from fluctuating in the transmission of the high-frequency signal, and the signal strength of the high-frequency signal can be suppressed from changing discretely.

[0146] [1-6. Modification]

[0147] Next, a modification of Embodiment 1 will be described using Figure 6 A modification of Embodiment 1 will be described. In the following description, the description will be focused on the points different from Embodiment 1, and the description of the common points will be omitted or simplified.

[0148] Figure 6 is a circuit diagram of the amplifying device 2 of the present modification. As shown in Figure 6 , the amplifying device 2 is provided with a variable resistance circuit 71 instead of the variable resistance circuit 70 as compared with the amplifying device 1. In addition, a resistance 31 is connected in parallel with the DC cut-off capacitor 30, constituting a stabilizing circuit. By providing the stabilizing circuit, the stability (K factor) of oscillation with respect to the low-frequency region can be improved. Further, it is also possible not to provide the resistance 31 as with Figure 1 .

[0149] The variable resistance circuit 71 is connected to the terminal of the bias circuit 40 side of the inductor 50 and the path linking the input terminal 10 and the base of the amplifying transistor 21. Specifically, the variable resistance circuit 71 connects the path linking the input terminal 10 and the DC cut-off capacitor 30 and the path linking the emitter of the transistor 41 of the bias circuit 40 (i.e., the emitter of the emitter follower circuit) and the inductor 50. That is, the variable resistance circuit 71 functions as a bypass path from the input terminal 10 to the emitter of the transistor 41 of the bias circuit 40. A part of the high-frequency signal input to the input terminal 10 flows to the bias circuit 40 via the variable resistance circuit 71, and is coupled with the bias circuit 40. Thus, as with Embodiment 1, the amount of coupling of the high-frequency signal with the bias circuit 40 can be adjusted by adjusting the resistance value of the variable resistance circuit 71.

[0150] The variable resistance circuit 71 is provided with two resistances R1 and R2, two switches SW1 and SW2, and two control terminals P1 and P2. The connection relationship of the elements of the variable resistance circuit 71 is different from that of the variable resistance circuit 70 of Embodiment 1.

[0151] Specifically, the resistance R1 and the switch SW1 are connected in series. The resistance R2 and the switch SW2 are connected in series. The series circuit of the resistance R1 and the switch SW1 and the series circuit of the resistance R2 and the switch SW2 are connected in parallel.

[0152] With this configuration, in the case where the switches SW1 and SW2 are on, the resistance value of the variable resistance circuit 71 is smaller than that of either of the resistors R1 and R2 because the variable resistance circuit 71 is a parallel resistance of the resistors R1 and R2. In the case where only the switch SW1 is on and the switch SW2 is off, the variable resistance circuit 71 becomes a circuit having only the resistor R1. In the case where only the switch SW2 is on and the switch SW1 is off, the variable resistance circuit 71 becomes a circuit having only the resistor R2. In the case where the switches SW1 and SW2 are off, the variable resistance circuit 71 becomes an open state. In this way, the resistance value of the variable resistance circuit 71 can be changed according to the on / off of each of the switches SW1 and SW2. Specifically, the more the switches that are on, the smaller the resistance value of the variable resistance circuit 71.

[0153] In the amplifying device 2 of the present modified example as well, as with the case of the ballast resistor of the embodiment 1 shown in (b) of Figure 5 In the case where the resistance of the variable resistance circuit 71 is small, gain expansion is easily generated. In the case where the resistance of the variable resistance circuit 71 is large, gain compression is easily generated.

[0154] Therefore, as with the embodiment 1, by changing the resistance value of the variable resistance circuit 71 according to the magnitude of the current amplification β, the gain expansion and the gain compression can be canceled out from each other. Thus, as shown in (c) of Figure 5 , the distortion of the gain can be suppressed regardless of the magnitude of the current amplification β.

[0155] Specifically, in the case where the current amplification β is large, the resistance value of the variable resistance circuit 71 is increased. For example, in the case where the current amplification β is larger than the reference value β2, as shown in Figure 3 , since both the output signal Vo1 and the output signal Vo2 are high, the switches SW1 and SW2 become off, and the resistance value of the variable resistance circuit 71 is increased. Thus, the gain compression generated by increasing the resistance value of the variable resistance circuit 71 can be used to cancel out the gain expansion caused by the large current amplification β.

[0156] In addition, in the case where the current amplification β is small, the resistance value of the variable resistance circuit 71 is decreased. For example, in the case where the current amplification β is smaller than the reference value β1, as shown in Figure 3 , since both the output signal Vo1 and the output signal Vo2 are low, the switches SW1 and SW2 are on, and the resistance value of the variable resistance circuit 71 is decreased. Thus, the gain expansion generated by decreasing the resistance value of the variable resistance circuit 71 can be used to cancel out the gain compression caused by the small current amplification β.

[0157] Furthermore, the structure of the variable resistor circuit 70 and the variable resistor circuit 71 is not particularly limited. As long as the resistance value of the variable resistor circuit 70 or the variable resistor circuit 71 can be changed based on the output signal output from the control circuit 100 to suppress the distortion of the gain of the amplifying transistor 21, it is acceptable.

[0158] (Implementation Method 2)

[0159] Next, the amplification device of Embodiment 2 will be described. The main difference between the amplification device of Embodiment 2 and the amplification device of Embodiment 1 lies in the specific structure of the control circuit and the variable resistor circuit. The control circuit of this embodiment utilizes analog signals. The following description will focus on the differences from Embodiment 1, omitting or simplifying descriptions of common points.

[0160] [2-1. Structure]

[0161] First, use Figure 7 The structure of the amplification device in Embodiment 2 will be described. Figure 7 This is a circuit diagram of the amplification device 3 in this embodiment.

[0162] like Figure 3 As shown, amplification device 3 and Figure 1 Compared to the amplification device 1 shown, the variable resistor circuit 70 and the control circuit 100 are replaced by a variable resistor circuit 270 and a control circuit 200. The specific structure of the control circuit 200 will be explained later.

[0163] The variable resistor circuit 270 includes a transistor TR and a control terminal P. Furthermore, the variable resistor circuit 270 may have two or more transistors and control terminals. For example, multiple transistors TR may be connected in series or in parallel. The multiple transistors TR may be transistors with the same characteristics or transistors with different characteristics.

[0164] The transistor TR is a MOSFET. Specifically, the transistor TR is a p-type MOSFET. When the voltage applied to the control terminal P of the transistor TR is changed, the resistance value of the transistor TR changes. Specifically, the on-resistance of the transistor TR varies according to the signal level (signal voltage magnitude) of the control signal supplied to the control terminal P.

[0165] That is, the variable resistor circuit 270 uses the change in the on-resistance of the transistor TR as the variable resistor. Since the variable resistor circuit 270 may not contain a resistor, it can be miniaturized.

[0166] [2-2. Control Circuit]

[0167] Next, useFigure 8 The detailed configuration of the control circuit 200 will be described.

[0168] Figure 8 is a circuit diagram of the control circuit 200 of the amplifying device 3 of the present embodiment. As shown, the control circuit 200 includes the measurement circuit 110, the reference voltage source 120, a comparison circuit 230, and the timing circuit 150. The measurement circuit 110, the reference voltage source 120, and the timing circuit 150 are the same as those of Embodiment 1. Figure 8

[0169] The comparison circuit 230 includes a transistor 131, a resistor 132, a comparator 233, a transmission gate 234, and a capacitor 235. The transistor 131 and the resistor 132 are the same as those of Embodiment 1. Thus, the same current Ial as the current Ico flowing in the replica transistor 111 flows in the resistor 132.

[0170] The comparator 233 includes a first input terminal, a second input terminal, and an output terminal. In the present embodiment, the comparator 233 is an analog comparator, and outputs a comparison result as an analog signal from the output terminal. The comparator 233 is, for example, an operational amplifier. The first input terminal is a non-inverting input terminal (+) of the operational amplifier. The second input terminal is an inverting input terminal (−) of the operational amplifier. Further, it is also possible that the first input terminal is the inverting input terminal (−), and the second input terminal is the non-inverting input terminal (+).

[0171] The comparator 233 compares a voltage Val input to the first input terminal with a reference voltage Vref input to the second input terminal, and outputs a comparison result as an analog signal from the output terminal. Specifically, the comparator 233 is a differential amplifier that amplifies and outputs a difference between the voltage Val and the reference voltage Vref. The larger the difference between the voltage Val and the reference voltage Vref, the larger the signal level of the analog signal output.

[0172] The transmission gate 234 includes a terminal 234a and a terminal 234b connected to the comparator 233, and switches the conduction and non-conduction between the terminal 234a and the terminal 234b. Specifically, the transmission gate 234 includes two transistors of different polarities. For example, the transmission gate 234 includes a p-type MOSFET and an n-type MOSFET whose sources and drains are connected to each other. One of the connected sources and drains is the terminal 234a, and the other is the terminal 234b. Control signals of different polarities are input to the gates of the p-type MOSFET and the n-type MOSFET, respectively. Thus, the p-type MOSFET and the n-type MOSFET can be simultaneously conducted, and can be simultaneously non-conducted. In the present embodiment, a timing signal Vt from the timing circuit 150 is input to the gates of the MOSFETs.

[0173] ​The terminal 234a of the transmission gate 234 is an example of the first terminal, and is connected to the connection portion of the transistor 131 and the resistor 132. The terminal 234b of the transmission gate 234 is an example of the second terminal, and is connected to the comparator 233. Specifically, the terminal 234b is connected to the first input terminal of the comparator 233.

[0174] The transmission gate 234 can make the potentials of the terminal 234a and the terminal 234b each be equal with high precision. For example, in a case where the voltage Va1 of the terminal 234a increases, the gate-source voltage of the n-type MOSFET becomes insufficient, and a case where the n-type MOSFET does not conduct can occur. In this case, since conduction of the p-type MOSFET can be ensured, the terminal 234a and the terminal 234b can be held at the same potential.

[0175] The capacitor 235 is connected in shunt to the terminal 234b. That is, one end of the capacitor 235 is connected to the terminal 234b, and the other end is connected to the ground. The capacitor 235 holds a signal that is the signal passing through the transmission gate 234, and is the signal input to the comparator 233. Specifically, the voltage Va1 of the terminal 234a of the transmission gate 234 is held in the capacitor 235.

[0176] Further, the transmission gate 234 and the capacitor 235 can also be connected to the output terminal of the comparator 233. For example, the terminal 234a of the transmission gate 234 is an example of the second terminal, and is connected to the output terminal of the comparator 233. The terminal 234b of the transmission gate 234 is an example of the first terminal, and is connected to the control terminal P of the variable resistance circuit 270. The capacitor 235 is connected to the terminal 234b.

[0177] [2-3. Operation]

[0178] Next, the operation of the amplification device 3 will be described. Figure 9 is a timing chart showing the operation of the amplification device 3 of the present embodiment. Specifically, Figure 9 shows the main signals processed by the control circuit 200 of the amplification device 3 over time.

[0179] In the present embodiment, the timing circuit 150 makes the timing signal Vt a high level while the enable signal EN is a high level. Due to this, since the transmission gate 234 conducts, a charge is accumulated in the capacitor 235 based on the voltage Va1 of the connection point of the transistor 131 and the resistor 132. The capacitor 235 finally holds the voltage Va1.

[0180] Since the first input terminal of the comparator 233 is connected to the capacitor 235, the output signal Vo1 output from the output terminal of the comparator 233 also changes in accordance with the change in the voltage held in the capacitor 235. Specifically, as shown in FIG. 22, the signal level of the output signal Vo1 rises from 0 V while the timing signal Vt becomes the high level, and then is held at a certain signal level. Figure 9

[0181] After the timing signal Vt changes to the low level, the voltage Va1 is also held in the capacitor 235. Therefore, the signal level of the output signal Vo1 is maintained during the transmission of the high-frequency signal RF. In the case where the enable signal EN becomes the low level, the charge accumulated in the capacitor 235 is released, and the signal level of the output signal Vo1 also becomes 0 V.

[0182] As shown in FIG. 23, the signal level of the output signal Vo1 is determined on the basis of the difference between the current amplification β and the reference value β0. Figure 10

[0183] Figure 10 is a graph showing one example of the control signal (output signal) supplied to the variable resistance circuit 270 in the present embodiment. In Figure 10 , the horizontal axis represents the current amplification β, and the vertical axis represents the signal level of the control signal output as an analog signal from the comparison circuit 230.

[0184] As shown in FIG. 24, the greater the measured current amplification β is than the reference value β0 of the current amplification corresponding to the reference voltage Vref, the greater the signal level of the output signal Vo1 is. The smaller the measured current amplification β is than the reference value β0, the smaller the signal level of the output signal Vo1 is. The signal level of the output signal Vo1 changes smoothly with respect to the current amplification β. Further, β0 is set to 100 as one example, but the value is not particularly limited. Figure 10 The reference value β0 is represented by the following equation (10).

[0185] (10) β0 = Vref / (Iref x Ra1)

[0186] Since Vref = 1.2 V and Iref = 10 μA, Ra1 is set to 1.2 kΩ. Thus, β0 = 100 can be made.

[0187] The output terminal of the comparison circuit 230 is connected to the control terminal P of the variable resistance circuit 270 shown in FIG. 25. The transistor TR is controlled on the basis of the control signal (output signal Vo1) input to the control terminal P.

[0188] Figure 10

[0189] ​​​​The transistor TR is a p-type MOSFET. Therefore, the smaller the signal level of the output signal Vo1 input to the control terminal P, the smaller the on-resistance of the transistor TR. For example, in the case where the current amplification β is smaller than β0, the resistance value of the variable resistance circuit 270 is small because the on-resistance of the transistor TR is small. Thus, as in Embodiment 1, the gain expansion (a) caused by the small current amplification β can be offset by the gain expansion (b) generated by reducing the resistance value of the variable resistance circuit 270. Figure 5 Figure 5

[0190] The larger the signal level of the output signal Vo1 input to the control terminal P, the larger the on-resistance of the transistor TR. For example, in the case where the current amplification β is larger than β0, the resistance value of the variable resistance circuit 270 is large because the on-resistance of the transistor TR is large. Thus, as in Embodiment 1, the gain expansion (a) caused by the large current amplification β can be offset by the gain compression (b) generated by increasing the resistance value of the variable resistance circuit 270. Figure 5 Figure 5

[0191] Further, the transistor TR can also be an n-type MOSFET. In this case, the graph shown in FIG. 6 can be line-symmetrical with respect to the reference value β0. That is, the larger the measured current amplification β is than the reference value β0 of the current amplification corresponding to the reference voltage Vref, the smaller the signal level of the output signal Vo1 can be. The smaller the measured current amplification β is than the reference value β0, the larger the signal level of the output signal Vo1 can be. Figure 10

[0192] [2-4. Effects, etc.]

[0193] As described above, in the amplifying device 3 of the present embodiment, the comparator 233 outputs the comparison result as an analog signal from the output terminal.

[0194] Thus, the resistance value of the variable resistance circuit 270 can be adjusted by analog control.

[0195] Further, for example, the variable resistance circuit 270 includes a transistor TR having a control terminal P connected to the output terminal.

[0196] Thus, a variable resistance circuit suitable for an analog signal can be realized. For example, a variable resistance circuit capable of changing the resistance value in a small size and with high accuracy can be realized.

[0197] ​​​​​Further, for example, the holding circuit includes a transmission gate 234 including a terminal 234a and a terminal 234b connected to the comparator 233, switching the conduction and non-conduction of the terminal 234a and the terminal 234b, and a capacitor 235 connected in shunt to the terminal 234a or the terminal 234b. Further, for example, the terminal 234a is connected to the transistor 131. The terminal 234b is connected to the first input terminal of the comparator 233. The capacitor 235 is connected to the terminal 234b.

[0198] Thus, the influence of the voltage fluctuation of the terminal 234a of the transmission gate 234 is suppressed, and the capacitor 235 can be held at the voltage Va1 generated in the resistor 132 with high precision. Therefore, since the measurement precision of the voltage amplification ratio β can be improved, the appropriate bias current can be supplied to the amplification transistor 21, and the impedance of the bias circuit 40 is adjusted. Thus, the deterioration of the linearity of the amplification transistor 21 can be suppressed.

[0199] Further, since the capacitor 235 holds the voltage, for example, the resistance value fluctuation of the variable resistance circuit 270 during the transmission of the high frequency signal can be suppressed, and thus the gain variation of the amplification transistor 21 in the transmission of the high frequency signal can be suppressed.

[0200] [2-5. Modified example]

[0201] Next, a modified example of the embodiment 2 will be described. In the following description, the description will be made focusing on the difference from the embodiment 2, and the description of the common points will be omitted or simplified.

[0202] [2-5-1. Modified example 1]

[0203] First, the use of the variable resistance circuit 270 will be described. Figure 11 A modified example 1 will be described. Figure 11 is a circuit diagram of the amplification device 4 of the present modified example.

[0204] As shown in Figure 11 , the amplification device 4 differs from the amplification device 3 in the connection position of the variable resistance circuit 270. Further, similarly to the modified example of the embodiment 1, the resistor 31 is connected in parallel to the DC cut-off capacitor 30.

[0205] Specifically, in the amplification device 4, the variable resistance circuit 270 functions as a bypass path from the input terminal 10 to the emitter of the transistor 41 of the bias circuit 40, similarly to the variable resistance circuit 71 of the modified example of Embodiment 1. That is, a part of the high-frequency signal input to the input terminal 10 flows into the bias circuit 40 via the variable resistance circuit 270, and is coupled to the bias circuit 40. Therefore, similarly to Embodiment 2, the amount of coupling of the high-frequency signal to the bias circuit 40 can be adjusted by adjusting the resistance value of the variable resistance circuit 270.

[0206] In the amplification device 4 of the present modified example, similarly to the case of the ballast resistor of Embodiment 1 shown in (b) above, in the case where the resistance of the variable resistance circuit 270 is small, gain expansion is easily generated. Conversely, in the case where the resistance of the variable resistance circuit 270 is large, gain compression is easily generated. Figure 5

[0207] Therefore, similarly to Embodiment 2, by varying the resistance value of the variable resistance circuit 270 in accordance with the magnitude of the current amplification β, the gain expansion and the gain compression can be canceled out from each other. Thus, as shown in (c) of FIG. 8, the distortion of the gain can be suppressed regardless of the magnitude of the current amplification β. Figure 5

[0208] The smaller the signal level of the output signal Vo1 input to the control terminal P is, the smaller the on-resistance is for the variable resistance circuit 270. For example, in the case where the current amplification β is smaller than β0, since the on-resistance of the transistor TR decreases, the resistance value of the variable resistance circuit 270 decreases. Thus, similarly to Embodiment 1, the gain compression ( (b) of FIG. 6) generated by the decrease in the resistance value of the variable resistance circuit 270 can be used to cancel out the gain expansion ( (a) of FIG. 6) caused by the smaller current amplification β. Figure 5 Figure 5 The larger the signal level of the output signal Vo1 input to the control terminal P is, the larger the on-resistance is for the variable resistance circuit 270. For example, in the case where the current amplification β is larger than β0, since the on-resistance of the transistor TR increases, the resistance value of the variable resistance circuit 270 increases. Thus, similarly to Embodiment 1, the gain expansion ( (a) of FIG. 6) generated by the increase in the resistance value of the variable resistance circuit 270 can be used to cancel out the gain compression ( (b) of FIG. 6) caused by the larger current amplification β.

[0209] Figure 5 Figure 5 [2-5-2. Modified Example 2]

[0210] [2-5-2. Modified Example 2] ​​​​​

[0211] Next, using Figure 12 A modification 2 will be described. Figure 12 is a circuit diagram of the control circuit 300 of the amplifying device of the present modification.

[0212] As Figure 12 shown, the control circuit 300 has the comparison circuit 330 instead of the comparison circuit 230 compared with the control circuit 200 of the embodiment 2. In addition, the control circuit 300 does not have the timing circuit 150.

[0213] The comparison circuit 330 includes the transistor 131, the resistor 132, and the comparator 233. The comparison circuit 330 does not have the transmission gate 234 and the capacitor 235. That is, the comparison circuit 330 has a structure in which the transmission gate 234 and the capacitor 235 are omitted from the comparison circuit 230 of the embodiment 2. Specifically, the first input terminal of the comparator 233 is directly connected to the connection portion of the transistor 131 and the resistor 132.

[0214] Figure 13 is a flowchart showing the operation of the amplifying device of the present modification. While the enable signal EN is at the high level, the voltage Va1 generated at the connection portion of the transistor 131 and the resistor 132 is input to the first input terminal of the comparator 233. According to the change in the voltage Va1, the output signal Vo1 output from the output terminal of the comparator 233 also changes.

[0215] The comparison circuit 330 of the present modification does not include the transmission gate 234 and the capacitor 235, and thus the measurement result of the current amplification ratio β is reflected in the control of the variable resistance circuit 270 in real time. Therefore, for example, even in the transmission of the high-frequency signal RF, the resistance value of the variable resistance circuit 270 can be adjusted to an appropriate value. Thus, it is possible to promptly cope with the operation of the distortion compensation circuit including the temperature variation due to self-heating, and it is possible to suppress the degradation of the linearity of the amplifying transistor 21.

[0216] (Other)

[0217] The above describes the amplifying device of the present application based on the above-described embodiments and modifications thereof, but the present application is not limited to the above-described embodiments.

[0218] For example, the amplifying transistor 21, the replica transistor 111, or the transistors 41, 42, or 43 can also be a bipolar transistor formed using gallium arsenide (GaAs). In addition, the amplifying transistor 21 and the replica transistor 111 can also be a bipolar transistor of the pnp type. In the case of the bipolar transistor of the pnp type, the above-described connection relationship of the emitter and the collector can be reversed.

[0219] Also, for example, the amplification transistor 21, the replica transistor 111, or the transistors 41, 42, or 43 can not be bipolar transistors, for example, but can be transistors of the transconductance type. Specifically, the amplification transistor 21, the replica transistor 111, or the transistors 41, 42, or 43 can be FETs such as MOSFETs or JFETs. The gate, the drain, and the source of the FETs correspond to the base, the collector, and the emitter, respectively.

[0220] Also, in this case, in the comparator, instead of the current amplification ratio of the replica transistor 111, the transconductance of the replica transistor 111, which is a transconductance element, is compared. The transconductance is one example of the amplification characteristic value of the amplification transistor 21.

[0221] Specifically, the replica transistor 111 of Figure 2 , Figure 8 or Figure 12 is made a transconductance element of the same kind as the amplification transistor 21. Specifically, the replica transistor 111 has a gate, a source, and a drain of the same composition as the amplification transistor 21. By supplying the gate voltage Vgo of the replica transistor 111 from the reference voltage source 120, the transconductance of the replica transistor 111 can be measured and compared.

[0222] As such, the amplification transistor 21 and the replica transistor 111 can both be transconductance elements. The measurement circuit 110 can measure the transconductance of the replica transistor 111.

[0223] Thus, variations caused by temperature variations and process deviations of the transconductance can be compensated for.

[0224] Also, the bias circuit 40 can include a source follower circuit instead of the emitter follower circuit. In this case, the inductor 50 is arranged in series between the source of the source follower circuit and the control terminal of the amplification transistor 21.

[0225] Also, the transistors 112, 131, and 141 can be bipolar transistors.

[0226] Also, for example, in the comparison circuit 130 and the comparison circuit 140, comparison with mutually different reference values is achieved by making the resistance value Ral of the resistor 132 different from the resistance value Ra2 of the resistor 142, but is not limited thereto. For example, the resistance value Ral of the resistor 132 can be made equal to the resistance value Ra2 of the resistor 142. In this case, it is only necessary to make the reference voltages input to the respective second input terminals of the comparator 133 and the comparator 143 different. For example, a structure equivalent to the control circuit 100 of Embodiment 1 can be achieved by making the reference voltage input to the comparator 143 larger than the reference voltage input to the comparator 133.

[0227] In addition, for example, the control circuit 100 can include three or more comparison circuits that perform comparison with mutually different reference values. In this case, the variable resistance circuit 70 or the variable resistance circuit 71 can include three or more switches and a control terminal. The control circuit 200 or the control circuit 300 can likewise include two or more comparison circuits that perform comparison with mutually different reference values.

[0228] Furthermore, modes obtained by various modifications of each embodiment conceived by those skilled in the art, and modes realized by arbitrarily combining the constituent elements and functions in each embodiment within a range not departing from the gist of the present application are also included in the present application.

[0229] The present application can be widely used as an amplification circuit of a high frequency module provided in a front end section supporting a multi-band, for example, in a communication device such as a mobile phone.

[0230] Explanation of Reference Numerals

[0231] 1, 2, 3, 4... amplification device; 10... input terminal; 11... output terminal; 20... amplifier; 21... amplification transistor; 30... DC cut capacitor; 31, 44, 132, 142... resistor; 40... bias circuit; 41, 42, 43, 112, 131, 141... transistor; 50... inductor; 51, 235... capacitor; 60... ballast resistor; 70, 71, 270... variable resistance circuit; 80, 81... power supply terminal; 100, 200, 300... control circuit; 110... measurement circuit; 111... replica transistor; 120... reference voltage source; 130, 140, 230, 330... comparison circuit; 133, 143, 233... comparator; 134, 144D... latch circuit; 150... timing circuit; 234... transmission gate; 234a, 234b... terminal; P, P1, P2... control terminal; R1, R2... resistor; SW1, SW2... switch; TR... transistor.

Claims

1. An amplification device, comprising: An amplifier, comprising an amplifying transistor, which amplifies the input high-frequency signal; The bias circuit is connected to the amplifier mentioned above; An inductor is connected in series between the amplifier and the bias circuit. A variable resistor circuit, connected in series or in parallel with the aforementioned inductor; and Control circuit, The above control circuit includes: The measuring circuit measures the amplification characteristics of the aforementioned amplifying transistor; and The comparator circuit compares the amplification characteristic value measured by the above-mentioned measurement circuit with the reference value. The control circuit described above controls the variable resistor circuit based on the comparison result of the comparison circuit described above.

2. The amplification device according to claim 1, wherein, The aforementioned measuring circuit measures the current amplification rate or transconductance of a replica transistor having the same temperature change characteristics as the aforementioned amplifying transistor as the amplification characteristic value of the aforementioned amplifying transistor.

3. The amplification device according to claim 2, wherein, Both the aforementioned amplifying transistor and the aforementioned replicating transistor are bipolar transistors. The aforementioned measuring circuit measures the current amplification of the aforementioned replica transistor.

4. The amplification device according to claim 2, wherein, Both the aforementioned amplifying transistor and the aforementioned replicating transistor are transconductance devices. The aforementioned measuring circuit measures the transconductance of the aforementioned replicated transistor.

5. The amplification apparatus according to any one of claims 2 to 4, wherein, The aforementioned measurement circuit includes a first transistor connected to the output terminal of the aforementioned replica transistor. The above comparator circuit includes: A comparator, comprising a first input terminal, a second input terminal, and an output terminal; and The second transistor is connected to the first input terminal of the comparator. Input a reference voltage corresponding to the reference value to the second input terminal. The first transistor and the second transistor form a current mirror circuit.

6. The amplification device according to claim 5, wherein, The control circuit described above also includes a reference voltage source, which is connected to the second input terminal to generate the reference voltage.

7. The amplification device according to claim 5, wherein, The comparator outputs the comparison result as a digital signal from the output terminal.

8. The amplification device according to claim 7, wherein, The above variable resistor circuit includes: Resistance; and The switch is connected to the aforementioned resistor. The aforementioned switch switches between conducting and non-conducting states based on the aforementioned digital signal.

9. The amplification device according to claim 5, wherein, The comparator outputs the comparison result as an analog signal from the output terminal.

10. The amplification device according to claim 9, wherein, The variable resistor circuit described above includes a transistor, and the transistor has a control terminal connected to the output terminal.

11. The amplification device according to claim 7, wherein, The control circuit described above also includes a holding circuit that holds the signal input to the first input terminal or the signal output from the output terminal.

12. The amplification device according to claim 11, wherein, The aforementioned holding circuit is a D latch circuit connected to the aforementioned output terminal.

13. The amplification device according to claim 11, wherein, The above holding circuit includes: A transmission gate, comprising a first terminal and a second terminal connected to the comparator, switches the conduction and deconduction of the first terminal and the second terminal; and The capacitor is connected in a branch circuit to either the first terminal or the second terminal.

14. The amplification device according to claim 13, wherein, The first terminal is connected to the second transistor. The second terminal is connected to the first input terminal of the comparator. The capacitor is connected to the second terminal.

15. The amplification device according to claim 11, wherein, The aforementioned holding circuit holds the signal during the period when the aforementioned high-frequency signal is input to the aforementioned amplification device.

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