A vertical LED chip structure and its manufacturing method and light-emitting device

Abstract

The present application provides a vertical LED chip structure, a manufacturing method thereof, and a light-emitting device. After the epitaxial structure is bonded to the substrate, the epitaxial structure is first etched to form a first mesa. After the first mesa is formed, the epitaxial structure is continuously etched at the first mesa until the epitaxial structure is etched through to expose the reflective layer, thereby forming a second mesa. The width of the second mesa is smaller than the width of the first mesa. The first mesa and the second mesa have a height difference. This structure can effectively reduce the internal reflection of large-angle light in the epitaxial structure, reduce the secondary absorption of light, and improve the side light output rate. A protective layer is formed on the surface of the structure formed with the first mesa and the second mesa. The protective layer covers the exposed reflective layer at the second mesa, protects the epitaxial structure and the reflective layer, and can protect the side walls of the epitaxial structure and the reflective layer from being eroded by the post-processing liquid after grinding the back of the substrate, thereby ensuring the integrity of the epitaxial structure and improving the reliability of the chip.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor devices and apparatuses, and in particular to a vertical LED chip structure, a manufacturing method thereof, and a light-emitting device. Background Art

[0002] Based on their structure, GaAs-based LEDs can be categorized into three types: face-mount, flip-chip, and vertical. Compared to traditional face-mount GaAs-based LEDs, the vertical structure offers advantages such as improved heat dissipation, the ability to carry high currents, high luminous intensity, low power consumption, and a long lifespan. These advantages have led to its widespread application in general lighting, landscape lighting, specialty lighting, automotive lighting, and other fields. As a highly promising solution for the next generation of high-power GaAs-based LEDs, the vertical structure is attracting increasing attention and research within the industry.

[0003] The first mesa between the light-emitting epitaxial structures of traditional vertical structure LED chips is a cutting path area. In order to facilitate subsequent cutting, a second mesa is usually formed in the cutting path area. In the prior art, after forming the above-mentioned first mesa, a protective layer is first formed, and then the second mesa is formed. At this time, the second mesa formed subsequently forms an exposed light-emitting epitaxial structure and a metal structure (such as a reflective layer). This results in the grinding fluid contacting the exposed light-emitting epitaxial structure and metal structure when the back-gold electrode is subsequently formed and the substrate is ground and thinned, causing damage to the LED chip and affecting the reliability of the chip.

[0004] In view of the above, it is necessary to provide a solution that can prevent the processing liquid from damaging the LED chip during the substrate back surface processing process. Summary of the Invention

[0005] In view of the above-mentioned defects in the process of forming a vertical LED chip in the prior art, the present invention provides a vertical LED chip structure and a manufacturing method thereof and a light-emitting device to solve one or more of the above-mentioned problems.

[0006] One embodiment of the present invention provides a method for preparing a vertical LED chip structure, comprising the following steps:

[0007] preparing an epitaxial structure, the epitaxial structure comprising a semiconductor layer of a first conductivity type, a light emitting layer, and a semiconductor layer of a second conductivity type stacked in sequence;

[0008] Providing a substrate having a front surface and a back surface opposite to the front surface;

[0009] Bonding the epitaxial structure to the front surface of the substrate, wherein the side where the second conductive type semiconductor layer is located is bonded to the substrate;

[0010] Performing a first etching on the epitaxial structure at a position corresponding to the cutting area to form a first mesa, exposing the sidewalls of the first conductive type semiconductor layer and the light-emitting layer, wherein the surface of the first mesa is the second conductive type semiconductor layer;

[0011] performing a second etching on the epitaxial structure at the first mesa to form a second mesa, exposing a sidewall of the second conductive type semiconductor layer;

[0012] forming a protective layer on the surface and sidewalls of the first mesa, the surface and sidewalls of the second mesa, and the surface of the epitaxial structure;

[0013] A back electrode is formed on the back side of the substrate, and the back electrode is electrically connected to the second conductivity type semiconductor layer.

[0014] Optionally, preparing the epitaxial structure further comprises the following steps:

[0015] providing a temporary substrate;

[0016] Depositing a semiconductor layer of a first conductivity type, a light emitting layer, and a semiconductor layer of a second conductivity type in sequence on the front surface of the temporary substrate;

[0017] forming a second electrode above the semiconductor layer of the second conductivity type, the second electrode comprising a current blocking layer and a transparent conductive layer adjacent to the semiconductor layer of the second conductivity type, and a reflective layer formed above the current blocking layer and the transparent conductive layer, wherein the transparent conductive layer is formed in a through hole penetrating the current blocking layer and in contact with the semiconductor layer of the second conductivity type;

[0018] A bonding layer is formed above the reflective layer.

[0019] Optionally, forming a back electrode on the back surface opposite to the front surface of the substrate further comprises the following steps:

[0020] applying a grinding liquid to the back side of the substrate to perform mask thinning on the back side of the substrate;

[0021] Cleaning the thinned substrate with deionized water and drying it;

[0022] A metal layer is deposited on the back side of the substrate to form the back side electrode.

[0023] Optionally, the surface of the second mesa is the bonding layer, and at the second mesa, the protective layer covers the reflective layer to form a continuous structure with the reflective layer.

[0024] Optionally, after bonding the epitaxial structure to the front surface of the substrate, the method further includes: forming a first electrode above the semiconductor layer of the first conductivity type.

[0025] Optionally, after the second mesa is formed, the surface of the first conductive type semiconductor layer away from the light emitting layer is roughened.

[0026] Optionally, the method for preparing the vertical LED chip structure further comprises: cutting the substrate along the second surface to obtain independent LED chips.

[0027] According to another embodiment of the present application, a vertical LED chip structure is provided, comprising:

[0028] a substrate having a front surface and a back surface opposite to the front surface;

[0029] an epitaxial structure located on the front surface of the substrate, the epitaxial structure comprising a semiconductor layer of a first conductivity type, a light-emitting layer, and a semiconductor layer of a second conductivity type stacked in sequence, wherein a side of the semiconductor layer of the second conductivity type is bonded to the substrate;

[0030] a first mesa formed in the semiconductor layer of the second conductivity type corresponding to the cutting area, wherein the surface of the first mesa is the semiconductor layer of the second conductivity type;

[0031] a second mesa formed in the first mesa, wherein a surface of the second mesa is the substrate;

[0032] a protective layer formed on the surface and sidewalls of the first mesa, the surface and sidewalls of the second mesa, and the surface of the first conductive type semiconductor layer located in the cutting area;

[0033] A back electrode is formed on the back side of the substrate, and the back electrode is electrically connected to the second conductivity type semiconductor layer.

[0034] Optionally, the vertical LED chip structure further includes a first electrode formed above the first conductive type semiconductor layer.

[0035] Optionally, the vertical LED chip structure further includes:

[0036] a second electrode formed on a side of the second conductive type semiconductor layer away from the light emitting layer, the second electrode comprising a current blocking layer and a transparent conductive layer adjacent to the second conductive type semiconductor layer, and a reflective layer covering the current blocking layer and the transparent conductive layer, wherein the transparent conductive layer is formed in a through hole penetrating the current blocking layer and in contact with the second conductive type semiconductor layer;

[0037] A bonding layer covers the reflective layer, and the epitaxial structure is bonded to the substrate through the bonding layer.

[0038] According to another embodiment of the present application, a light-emitting device is provided, which includes the vertical LED chip structure provided in the present application.

[0039] As described above, the vertical LED chip structure, manufacturing method thereof, and light-emitting device of the present application have the following beneficial effects:

[0040] In the present application, after the epitaxial structure is bonded to the substrate, the epitaxial structure is first etched to form a first mesa, which is formed in the semiconductor layer of the second wire type of the epitaxial structure, that is, the surface of the first mesa is the semiconductor layer of the second wire type. After the first mesa is formed, the epitaxial structure is continuously etched at the first mesa until the epitaxial structure is etched through to expose the substrate, thereby forming a second mesa. The width of the second mesa is smaller than that of the first mesa, and the first mesa and the second mesa have a height difference. This structure can effectively reduce the internal reflection of large-angle light in the epitaxial structure, reduce the secondary absorption of light, and improve the side light output rate; especially for small and medium-sized chips, the side light output rate is significantly improved, and at the same time, it can reduce the influence of the scratched and melted material on the brightness, thereby improving the overall light output efficiency.

[0041] A protective layer is formed on the surface of the structure having the first mesa and the second mesa, and the protective layer covers the surface and sidewalls of the first mesa, the surface and sidewalls of the second mesa, and the surface of the epitaxial structure on both sides of the first mesa corresponding to the cutting area. The protective layer covers the exposed reflective layer at the second mesa, and protects the epitaxial structure and the reflective layer. After the protective layer is formed, the substrate is subjected to a back gold process. At this time, the protective layer can protect the sidewalls of the epitaxial structure and the reflective layer from being eroded by the post-processing solution of the back grinding and thinning of the substrate, thereby ensuring the integrity of the epitaxial structure and improving the reliability of the chip. The method of the present application does not require the addition of additional process flows and can be achieved by adjusting the process parameters of the relevant processes. Therefore, it does not cause an increase in cost and is conducive to mass production. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] Figure 1 It is a schematic structural diagram of forming a protective layer after forming a first mesa in the prior art.

[0043] Figure 2 Shown as Figure 1 Schematic diagram of the structure in which the second mesa is formed in the structure shown.

[0044] Figure 3 Shown is a schematic flow chart of a method for preparing a vertical LED chip structure provided in Example 1 of the present application.

[0045] Figure 4 and Figure 5a 、 Figure 5b Display as Figure 3 The structural schematic diagram corresponding to the process of preparing the epitaxial structure is shown.

[0046] Figure 6 Displayed as Figure 5b Schematic diagram of the structure in which the epitaxial structure is bonded to the substrate.

[0047] Figure 7 Shown as Figure 6 Schematic diagram of the structure in which the first electrode is formed.

[0048] Figure 8 Shown as Figure 6 Schematic diagram of the structure in which the first mesa is formed in the structure shown.

[0049] Figure 9 Shown as Figure 8 Schematic diagram of the structure in which the second mesa is formed in the structure shown.

[0050] Figure 10 Shown as Figure 9 Schematic diagram of the structure in which a protective layer is formed on the surface of the structure shown.

[0051] Figure 11 Shown as Figure 10 Schematic diagram of the structure in which a back electrode is formed on the back side of the substrate of the structure shown.

[0052] Figure 12 Shown is a structural schematic diagram of a vertical LED chip structure provided by the second embodiment of the present invention.

[0053] Figure 13 Shown is a schematic structural diagram of a light-emitting device provided in the third embodiment of the present invention.

[0054] Component number description

[0055] 001, light-emitting epitaxial structure; 002, protective layer; 003, first mesa; 004, second mesa; 100, vertical LED chip structure; 101, substrate; 102, epitaxial structure; 1021, semiconductor layer of first conductivity type; 1022, light-emitting layer; 1023, semiconductor layer of second conductivity type; 103, reflective layer; 104, bonding layer; 105, first electrode; 106, back electrode; 107, first mesa; 108, second mesa; 109, protective layer; 110, temporary substrate; 120, transparent conductive layer; 130, current blocking layer; 200, light-emitting device; 201, circuit substrate; 202, light-emitting unit. DETAILED DESCRIPTION

[0056] The following describes the embodiments of the present invention through specific examples. Those skilled in the art will readily understand the other advantages and benefits of the present invention from the disclosure herein. The present invention may also be implemented or applied through various other specific embodiments, and the details in this specification may be modified or altered based on different viewpoints and applications without departing from the spirit of the present invention.

[0057] like Figure 1 As shown, in the prior art, when manufacturing a vertical LED chip, after forming the first mesa 003 on the light-emitting epitaxial structure 001, a protective layer 002 is formed on the exposed surface of the epitaxial structure 001. Then, as shown in FIG. Figure 2 As shown, the light-emitting epitaxial structure 001 is continuously etched at the position of the first mesa 003 until the light-emitting epitaxial structure 001 is etched through to form the second mesa 004. Figure 2 As shown, the formation of the second mesa 004 exposes a portion of the light-emitting epitaxial structure 002. During the subsequent substrate back-metallization, a KOH solution is typically used to perform surface treatment on the backside of the ground and thinned substrate. This KOH solution can damage the exposed light-emitting epitaxial structure 002 and the metal layers (e.g., the reflective layer and / or bonding layer) exposed by the second mesa 004, thereby affecting chip reliability.

[0058] In order to solve the above problems, the present application provides a vertical LED chip structure, a manufacturing method thereof, and a light-emitting device, which are now described in detail in conjunction with the following embodiments and drawings.

[0059] Example 1

[0060] This embodiment provides a method for manufacturing a vertical LED chip structure. Figure 3 As shown, the method includes the following steps:

[0061] S101: preparing an epitaxial structure, wherein the epitaxial structure includes a semiconductor layer of a first conductivity type, a light-emitting layer, and a semiconductor layer of a second conductivity type stacked in sequence;

[0062] like Figure 4 As shown, first, a temporary substrate 110 is provided. The temporary substrate 110 can be a sapphire substrate, a silicon carbide substrate, a GaAs substrate, or other substrates suitable for growing an epitaxial layer. In this embodiment, the growth substrate is a GaAs substrate as an example.

[0063] A first conductive type semiconductor layer 1021, a light emitting layer 1022 and a second conductive type semiconductor layer 1023 are sequentially deposited on a growth substrate to form an epitaxial structure 102. For example, a chemical vapor deposition process can be used to sequentially form the above-mentioned first conductive type semiconductor layer 1021, the light emitting layer 1022 and the second conductive type semiconductor layer 1023 on a GaAs substrate.

[0064] In this embodiment, an AlGaInP-based red light epitaxial structure is taken as an example. For example, the above-mentioned first conductivity type semiconductor layer 1021 is an N-type AlGaInP layer, and the second conductivity type semiconductor layer 1023 is a P-type AlGaInP layer. The thickness of the n-type AlGaInP layer can be 0.5μm to 3μm. The light-emitting layer 1022 is a multi-quantum well layer, which includes alternately grown AlGaInP quantum well layers and AlGaInP quantum barrier layers, and the Al content in the AlGaInP quantum well layers and AlGaInP quantum barrier layers is different. Among them, the light-emitting layer 1022 can include 3 to 8 periods of AlGaInP quantum well layers and AlGaInP quantum barrier layers that are alternately stacked. As an example, the light-emitting layer 1022 includes 5 periods of AlGaInP quantum well layers and AlGaInP quantum barrier layers that are alternately stacked. Optionally, the thickness of the light-emitting layer 1022 can be 150nm to 200nm. Optionally, the second conductivity type semiconductor layer 1023 is an indium-doped p-type AlInP layer, and the thickness of the p-type AlInP layer may be 0.5 μm to 3 μm.

[0065] After forming the above-mentioned P-type AlInP layer, a second electrode is formed on the P-type AlInP layer, such as Figure 5a As shown, a transparent conductive layer 120 is first formed above the P-type AlInP layer. This transparent conductive layer 120 can be, for example, ITO, and serves as an ohmic contact layer. A reflective layer 103 is then formed. This reflective layer 103 is formed above the transparent conductive layer 120 and on the surface of the P-type AlInP layer outside the transparent conductive layer 120. As a result, the reflective layer 103 covers and wraps around the transparent conductive layer 120 to omnidirectionally reflect light radiated by the light-emitting layer 1022. Preferably, the reflective layer 103 is a fully reflective mirror structure, for example, a metal Ag reflector.

[0066] In another optional embodiment of the present application, when forming the second electrode, as shown in FIG. Figure 5b As shown, a current blocking layer 130 is first formed on the P-type AlInP layer. The current blocking layer 130 can be used as a dielectric layer of the ODR reflective structure, and is usually a low N (refractive index) material layer, such as SiN x 、SiO2、Al2O3、MgF2 etc. transparent medium layer. Then, similarly Figure 5bAs shown, a through hole is formed in the current blocking layer 130, and a transparent conductive layer 120 is formed in the through hole. The transparent conductive layer 120 may be, for example, ITO, and serves as an ohmic contact layer. A reflective layer 103 is then formed on the surface of the P-type AlInP layer above the current blocking layer 130 and the transparent conductive layer 120 to omnidirectionally reflect light radiated by the light-emitting layer 1022. Preferably, the reflective layer 103 is a fully reflective mirror structure, such as a metal Ag reflector. A bonding layer 104 is formed above the reflective layer 103. The bonding layer 104 is a metal bonding layer, such as an Au / Sn metal bonding layer.

[0067] S102: providing a substrate, wherein the substrate has a front surface and a back surface opposite to the front surface;

[0068] After the epitaxial structure 102 is grown on the temporary substrate 110 as described above, a substrate 101 is provided. This substrate 101 serves as a bonding substrate, i.e., a permanent substrate, for bonding the epitaxial structure 102. Optionally, the substrate 101 can be a Si substrate, a W / Cu substrate, or a Mo / Cu substrate. In this embodiment, the substrate is a Si substrate.

[0069] S103: Bonding the epitaxial structure to the front surface of the substrate, wherein the side where the second conductive type semiconductor layer is located is bonded to the substrate;

[0070] by Figure 5b As an example, the epitaxial structure in Figure 6 As shown, the bonding layer 104 of the epitaxial structure 102 is bonded to the front side of the substrate 101 . For example, the epitaxial structure 102 and the substrate 101 can be bonded together through the bonding layer 104 at high temperature.

[0071] Then, similarly Figure 6 As shown, the temporary substrate 110 is peeled off. For example, the temporary substrate 110 can be peeled off by using a laser peeling process or a wet etching method to improve the peeling efficiency and reduce damage to the epitaxial structure 102.

[0072] After bonding the epitaxial structure to the substrate 101 and peeling off the temporary substrate 110, as shown in FIG. Figure 7 As shown, the first electrode 105 is further formed on the surface of the exposed first conductivity type semiconductor layer 1021. The first electrode 105 can be a Ge / Au / Ni layer, an Al / Ti / Pt / Au layer, or a Cr / Pt / Au layer. In this embodiment, the first electrode 105 is preferably a NGe / Au / Ni layer.

[0073] S104: performing a first etching on the epitaxial structure at a position corresponding to the cutting area to form a first mesa, exposing the sidewalls of the first conductive type semiconductor layer and the light emitting layer, wherein the surface of the first mesa is the second conductive type semiconductor layer;

[0074] After the epitaxial structure 102 is bonded to the substrate 101, in order to facilitate subsequent cutting to obtain individual LED chips, the epitaxial structure 102 has a corresponding cutting area. The area to be etched in the cutting area is defined by a mask, such as Figure 8 As shown, the first etching is performed on the epitaxial structure 102 in the etched area. In an optional embodiment, dry etching, such as ICP etching, is used to perform the first etching on the epitaxial structure. The etching stops in the second conductive type semiconductor layer 1023, that is, the epitaxial structure 102 is not etched through, and part or all of the second conductive type semiconductor layer 1023 is retained to form Figure 8 The first mesa 107 is shown. The sidewalls of the first mesa 107 that expose the first conductivity type semiconductor layer 1021 and the light emitting layer 1022 in the epitaxial structure 102 are exposed, and the surface is the second conductivity type semiconductor layer 1023 .

[0075] S105: performing a second etching on the epitaxial structure at the first mesa to form a second mesa, exposing a sidewall of the second conductivity type semiconductor layer;

[0076] like Figure 9 As shown, after forming the first mesa 107, a second etching is performed on the epitaxial structure 102 at the first mesa 107. For example, the second etching is still performed using the ICP process. By adjusting the etching parameters, the etching width of the second etching is smaller than the etching width of the first etching. This etching penetrates the remaining second conductivity type semiconductor layer 1023 until the reflective layer 103 is exposed, forming a second mesa 108. The sidewalls of the second mesa 108 that expose the second conductivity type semiconductor layer 1023 are the surface of the reflective layer 103.

[0077] like Figure 9 As shown, the first table 107 and the second table 108 have a height difference. This structure can effectively reduce the internal reflection of large-angle light in the epitaxial structure 102, reduce the secondary absorption of light, and improve the side light output rate; especially for small and medium-sized chips, the side light output rate is significantly improved, and at the same time it can reduce the impact of scratched and melted materials on brightness, thereby improving the overall light output efficiency.

[0078] S106: forming a protective layer on the surface and sidewalls of the first mesa, the surface and sidewalls of the second mesa, and the surface of the epitaxial structure;

[0079] like Figure 10As shown, after forming the first mesa 107 and the second mesa 108, a protective layer 109 is formed on the surface of the structure. The protective layer 109 is formed on the surface and sidewalls of the first mesa 107, the surface and sidewalls of the second mesa 108, and the surface of the epitaxial structure 102. In other words, the protective layer 109 covers all exposed sidewalls of the first conductivity type semiconductor layer 1021, the light emitting layer 1022, and the second conductivity type semiconductor layer 1023, as well as the surface of the first conductivity type semiconductor layer 1021 in the cut area.

[0080] Likewise Figure 10 As shown, before forming the protective layer 109, the surface of the epitaxial structure 102 (first conductive type semiconductor layer 1021) is also roughened, for example, a nano-microstructure is formed on the surface of the epitaxial structure 102, thereby improving the light output rate of the LED chip and increasing the adhesion of the protective layer 109.

[0081] like Figure 10 As shown, the protective layer 109 covers the surface and sidewalls of the first mesa 107 and the second mesa 108, and at the same time covers the surface of the epitaxial structure 102 in the cutting area, and at the surface of the second mesa 108, the protective layer 109 contacts the reflective layer 103 to form a continuous structure. Figure 9 A continuous protective layer 109 is formed on the surface of the structure shown, which protects the epitaxial structure 102 and the reflective layer 103 by isolating the subsequent processing solution and preventing chemical corrosion.

[0082] S107: forming a back electrode on the back side of the substrate, wherein the back electrode is electrically connected to the second conductivity type semiconductor layer.

[0083] After forming the protective layer 109, Figure 11As shown, back-gold is applied to the back side of the substrate 101 to form a back electrode 106. To meet the target thickness requirement, the back side of the substrate 101 must first be thinned. For example, the substrate 101 can be thinned to approximately 100 μm by mechanical grinding and then further thinned to approximately 80 μm by polishing. During the grinding process, chemical grinding fluid residues will remain on the back side of the substrate, destroying the crystal lattice on the grinding surface and producing new grinding products, which can cause voltage anomalies in the chip. In addition, during the grinding process, a photoresist is coated on the surface of the first electrode to protect the first electrode from damage during the grinding process. After grinding, the ground surface needs to be treated to remove the photoresist on the first electrode surface, for example, using a KOH solution. The ground surface is immersed in a degumming solution composed of a mixture of sulfuric acid (98 wt.%) and hydrogen peroxide (30 wt.%) to remove the photoresist. The structure is then placed in a KOH solution to remove the grinding products on the back side of the substrate 101, ensuring that there are no potential voltage hazards on the chip. Afterwards, the grooved substrate 101 is cleaned with deionized water and dried. Then as Figure 11 As shown, metal, such as Cu, Au, or Ag, is deposited on the back side of the substrate 101 to form a back electrode 106 . The back electrode 106 is electrically connected to the second electrode for transmitting current to the second conductive type semiconductor layer 1023 .

[0084] Due to the formation of the protective layer 109 described in this embodiment, during the gold-backed process on the substrate 101, the protective layer 109 can protect the sidewalls of the epitaxial structure 102 and the reflective layer 103 from being corroded by the KOH solution, thereby ensuring the integrity of the epitaxial structure 102 and improving the reliability of the chip. The method of the present application does not require additional process steps and can be implemented by adjusting the process parameters of the relevant processes, thus avoiding any increase in cost and facilitating mass production.

[0085] form Figure 11 After the structure shown in FIG. 1 is formed, cutting is performed along the second mesa 108, cutting through the reflective layer 103, the bonding layer 104, and the substrate 101 at one time, and separating the adjacent LED chips. Figure 12 As shown, an independent LED chip is obtained. Figure 12 As shown, the epitaxial structure 102 of the cut LED chip is covered by a protective layer 109. The protective layer 109 can effectively protect the epitaxial structure 102 from damage during the cutting process. In subsequent use, the protective layer 109 can also effectively protect the epitaxial structure 102, thereby effectively improving the reliability of the LED chip.

[0086] Example 2

[0087] This embodiment provides a vertical LED chip structure. Figure 12The vertical LED chip structure 100 includes a substrate 101 and an epitaxial structure 102 bonded to the front surface of the substrate 101. The epitaxial structure can be the epitaxial structure of the embodiment 1. Figure 5a or Figure 5b The epitaxial structure shown. Preferably, Figure 5b The epitaxial structure shown. Figure 5b The epitaxial structure 102 includes a first conductive type semiconductor layer 1021, a light emitting layer 1022, and a second conductive type semiconductor layer 1023 stacked in sequence, wherein one side of the second conductive type semiconductor layer 1023 is bonded to the substrate 101. Figure 5b As shown, the epitaxial structure 102 further includes a second electrode formed on the surface of the second conductivity type semiconductor layer 1023. The second electrode includes a current blocking layer 130 adjacent to the second conductivity type semiconductor layer 1023, a transparent conductive layer 120 formed in a through hole extending through the current blocking layer 130, and a reflective layer 103 formed above the current blocking layer 130 and the transparent conductive layer 120. The reflective layer 103 omnidirectionally reflects light radiated by the light emitting layer 1022. A bonding layer 104 is formed on the surface of the reflective layer 103. The bonding layer 104 is a metal bonding layer, such as an Au / Sn metal bonding layer.

[0088] Also refer to Figure 12 The surface of the epitaxial structure 102 (first conductive type semiconductor layer 1021 ) is formed with a nanostructure, so that the surface of the epitaxial structure 102 is formed into a rough surface, which can improve the light extraction rate of the LED chip and increase the adhesion of the protective layer 109 .

[0089] The first mesa 107 is formed in the second conductive type semiconductor layer 1023 corresponding to the cutting area, and the surface of the first mesa 107 is the second conductive type semiconductor layer 1023; the sidewall of the first mesa 107 is the epitaxial structure 102, and the surface is the second conductive type semiconductor layer 1023.

[0090] The second mesa 108 is formed in the first mesa 107 ; the sidewall of the second mesa 108 is the second conductive type semiconductor layer 1023 , and the second mesa 108 penetrates the second conductive type semiconductor layer 1023 . Preferably, the surface of the second mesa is the reflective layer 103 .

[0091] A protective layer 109 is formed on the surface and sidewalls of the first mesa 107, the surface and sidewalls of the second mesa 108, and the surface of the epitaxial structure 102 in the dicing area. The protective layer 109 covers the surfaces and sidewalls of the first and second mesas 107, 108, and also covers the surface of the epitaxial structure 102 in the dicing area. On the surface of the second mesa 108, the protective layer 109 contacts the reflective layer 103, forming a continuous structure. This protective layer 109 forms a continuous protective layer 109 on the surface of the LED chip structure, isolating the epitaxial structure 102 and the reflective layer 103 from processing solutions and preventing chemical corrosion, thereby effectively improving the reliability of the LED chip.

[0092] Also refer to Figure 12 and Figure 5b A first electrode 105 is formed above the first conductivity type semiconductor layer 1021 of the epitaxial structure 102. The first electrode 105 can be a Ge / Au / Ni layer, an Al / Ti / Pt / Au layer, or a Cr / Pt / Au layer. In this embodiment, the first electrode 105 is preferably a Ge / Au / Ni layer.

[0093] The vertical LED chip structure 100 of this embodiment further includes a back electrode 106 . The back electrode 106 is formed on the back side opposite to the front side of the substrate 101 . The back electrode 106 is electrically connected to the second conductivity type semiconductor layer.

[0094] Example 3

[0095] This embodiment provides a light emitting device, such as Figure 13 As shown, the light-emitting device 200 includes a circuit substrate 201 and a light-emitting unit 202 arranged on the circuit substrate 201, wherein the light-emitting unit 202 can be the vertical LED chip structure 100 provided in the second embodiment of the present application.

[0096] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the present invention. Anyone skilled in the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by one of ordinary skill in the art without departing from the spirit and technical principles disclosed herein are intended to be covered by the claims of the present invention.

Claims

1. A method for preparing a vertical LED chip structure, characterized in that: The following steps are involved: preparing an epitaxial structure, the epitaxial structure comprising a semiconductor layer of a first conductivity type, a light emitting layer, and a semiconductor layer of a second conductivity type stacked in sequence; Providing a substrate having a front surface and a back surface opposite to the front surface; Bonding the epitaxial structure to the front surface of the substrate, wherein the side where the second conductive type semiconductor layer is located is bonded to the substrate via a bonding layer, and a reflective layer is formed between the bonding layer and the second conductive type semiconductor layer; Performing a first etching on the epitaxial structure at a position corresponding to the cutting area to form a first mesa, exposing the sidewalls of the first conductive type semiconductor layer and the light-emitting layer, wherein the surface of the first mesa is the second conductive type semiconductor layer; performing a second etching on the epitaxial structure at the first mesa to form a second mesa, exposing the sidewall of the second conductive type semiconductor layer, wherein the surface of the second mesa serves as the reflective layer; forming a protective layer on the surface and sidewalls of the first mesa, the surface and sidewalls of the second mesa, and the surface of the epitaxial structure, wherein at the second mesa, the protective layer covers the reflective layer to form a continuous structure with the reflective layer; Applying a grinding liquid to the back side of the substrate to grind and thin the back side of the substrate; A back electrode is formed on the back side of the substrate, and the back electrode is electrically connected to the second conductivity type semiconductor layer.

2. The method for preparing a vertical LED chip structure according to claim 1, wherein: The preparation of the epitaxial structure further comprises the following steps: providing a temporary substrate; Depositing a semiconductor layer of a first conductivity type, a light emitting layer, and a semiconductor layer of a second conductivity type in sequence on the front surface of the temporary substrate; forming a second electrode above the semiconductor layer of the second conductivity type, the second electrode comprising a current blocking layer and a transparent conductive layer adjacent to the semiconductor layer of the second conductivity type, the reflective layer being formed above the current blocking layer and the transparent conductive layer, wherein the transparent conductive layer is formed in a through hole penetrating the current blocking layer and in contact with the semiconductor layer of the second conductivity type; A bonding layer is formed above the reflective layer.

3. The method for preparing a vertical LED chip structure according to claim 1, wherein: Applying a grinding liquid to the back side of the substrate and performing mask thinning on the back side of the substrate further comprises the following steps: Cleaning the thinned substrate with deionized water and drying it; A metal layer is deposited on the back side of the substrate to form the back side electrode.

4. The method for preparing a vertical LED chip structure according to claim 1, wherein: After bonding the epitaxial structure to the front surface of the substrate, the method further includes: forming a first electrode above the semiconductor layer of the first conductivity type.

5. The method for preparing a vertical LED chip structure according to claim 1, wherein: After the second mesa is formed, the surface of the first conductive type semiconductor layer away from the light emitting layer is roughened.

6. The method for preparing a vertical LED chip structure according to claim 1, wherein: Also includes: The substrate is cut along the second surface to obtain independent LED chips.

7. A vertical LED chip structure, characterized in that: include: a substrate having a front surface and a back surface opposite to the front surface; an epitaxial structure located on the front surface of the substrate, the epitaxial structure comprising a semiconductor layer of a first conductivity type, a light-emitting layer, and a semiconductor layer of a second conductivity type stacked in sequence, with a reflective layer formed above the semiconductor layer of the second conductivity type; a bonding layer covering the reflective layer, wherein the epitaxial structure is bonded to the substrate by the bonding layer, wherein the side where the second conductive type semiconductor layer is located is bonded to the substrate; a first mesa formed in the semiconductor layer of the second conductivity type corresponding to the cutting area, wherein the surface of the first mesa is the semiconductor layer of the second conductivity type; a second mesa formed in the first mesa, wherein a surface of the second mesa serves as the reflective layer; a protective layer formed on the surface and sidewalls of the first mesa, the surface and sidewalls of the second mesa, and the surface of the first conductive type semiconductor layer located in the cutting area, wherein at the second mesa, the protective layer covers the reflective layer and forms a continuous structure with the reflective layer; A back electrode is formed on the back side of the substrate, and the back electrode is electrically connected to the second conductivity type semiconductor layer.

8. The vertical LED chip structure according to claim 7, characterized in that: Also included is a first electrode formed over the first conductivity-type semiconductor layer.

9. The vertical LED chip structure according to claim 7, characterized in that: Also includes: A second electrode is formed on a side of the second conductive type semiconductor layer away from the light-emitting layer, the second electrode includes a current blocking layer and a transparent conductive layer adjacent to the second conductive type semiconductor layer, the reflective layer covers the current blocking layer and the transparent conductive layer, wherein the transparent conductive layer is formed in a through hole passing through the current blocking layer and contacts the second conductive type semiconductor layer.

10. A light emitting device, characterized in that: The invention comprises a circuit substrate and a light-emitting unit located on the circuit substrate, wherein the light-emitting unit comprises the vertical LED chip structure according to any one of claims 7 to 9.

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