Decryption Method, Device and Computer Readable Storage Medium for Encrypted Password Stream Data

Abstract

The present invention provides a method, apparatus, and computer-readable storage medium for decrypting encrypted stream data. The decryption method includes: extracting encrypted stream data, where the encrypted stream data includes M groups of encrypted stream data arranged in sequence, and M is a positive integer; setting N decryption channels, and decrypting the M groups of encrypted stream data through the N decryption channels to obtain corresponding M groups of decrypted stream data, where N is not less than 2; buffering the M groups of decrypted stream data and outputting them in sequence to obtain decrypted stream data. By setting up and using multiple decryption channels to decrypt the encrypted stream data, the decryption speed is high.

Description

Technical Field

[0001] The present invention belongs to the field of integrated circuit data protection, and particularly relates to a decryption method, device and computer-readable storage medium for encrypted bitstream data. Background Art

[0002] Integrated circuits mainly include application-specific integrated circuits (ASICs), general-purpose processor chips (ARM, DSP), and field-programmable gate arrays (FPGAs), etc.

[0003] Among them, a field-programmable gate array (FPGA) is a large-scale programmable device, which is composed of programmable logic modules (CLBs), wiring resources, input / output modules (IOBs), and other IP resources (such as memories, digital signal processors, etc.). It provides users with the ability of system programmability or reconfiguration. It has both the programmability of general-purpose processor chips and the fast execution speed of application-specific integrated circuits, so it is widely used in fields such as industrial control, communication, and data center acceleration operations.

[0004] The FPGA realizes corresponding circuits by loading a design bitstream file. The bitstream file is generally stored in an external CPU or FLASH. No matter where it is stored, the content of the bitstream file can be intercepted during the process of loading the bitstream. Therefore, if the bitstream file is not encrypted, a third party can easily obtain the user's designed circuit and steal the user's intellectual property rights.

[0005] In the related art, the bitstream data is encrypted in advance by software, and the FPGA decrypts it with a corresponding key when loading the bitstream, decrypting and loading at the same time. When there are multiple groups of data in the bitstream data, the decryption module of the FPGA needs to complete the decryption of the current group of data before the next group of data arrives. However, the current decryption speed and efficiency are low and cannot adapt to high-speed encrypted bitstream data, that is, the decryption speed of the current group of data is slow, causing the next group of data to waste time waiting, which seriously limits the transmission and application of data.

[0006] Therefore, how to optimize the decryption speed of encrypted bitstream data to adapt to the input speed of encrypted bitstream data has become an urgent problem to be solved. Summary of the Invention

[0007] The present invention is to solve all or part of the above-mentioned prior art problems, and provides a decryption method and device for encrypted bitstream data, which set and utilize multiple decryption channels to decrypt the encrypted bitstream data, and have a high decryption speed.

[0008] On the one hand, the present invention provides a method for decrypting encrypted stream data. The method includes: extracting the encrypted stream data, where the encrypted stream data includes M groups of encrypted stream data arranged in sequence, and M is a positive integer; setting N decryption channels, and decrypting the M groups of encrypted stream data through the N decryption channels to obtain corresponding M groups of decrypted stream data blocks, where N is not less than 2; buffering the M groups of decrypted stream data and outputting them in sequence to obtain the decrypted stream data. By setting and using multiple decryption channels to decrypt the encrypted stream data, the decryption speed is high. By setting a buffer area before outputting the decrypted stream data to prepare for the final output of the decrypted stream data, the decryption speed and output speed of each decrypted stream data can be coordinated, and the work efficiency can be improved.

[0009] The extraction of the encrypted stream data includes: extracting M groups of encrypted stream data with a fixed data length.

[0010] Setting N decryption channels includes: the decryption speeds of the N decryption channels are equal.

[0011] In this way, multiple identical decryption channels can be formed by copying the original single decryption channel, the decryption speed can be increased by N times, the efficiency is high, the preparation and operation process flow are simplified, and the decryption speed can be effectively controlled by controlling the number of decryption channels used or adjusting the number of decryption channels set.

[0012] The decryption of the M groups of encrypted stream data through the N decryption channels includes: the M groups of encrypted stream data sequentially enter the N decryption channels in order; when M is greater than N, the first to the Nth groups of encrypted stream data sequentially enter the N decryption channels in order for decryption to obtain the corresponding first to the Nth groups of decrypted stream data, and the (N + 1)th group of encrypted stream data enters the first decryption channel after the first group of encrypted stream data is decrypted, and so on until the M groups of encrypted stream data are decrypted; when M is equal to N, the first to the Nth groups of encrypted stream data sequentially enter the Nth decryption channels in order for decryption to obtain the corresponding first to the Nth groups of decrypted stream data. By setting multiple decryption channels, decryption can be performed in a flowing water manner in turn, and the decryption speed is high.

[0013] Before decrypting the M groups of encrypted stream data, it further includes: decomposing the encrypted stream data into N sub-encrypted stream data blocks, and each decryption channel decrypts the sub-encrypted stream data block. By pre-decomposing the M groups of encrypted stream data into N sub-encrypted stream data blocks and then decrypting them through N decryption channels, the flexibility and operability of decryption are increased.

[0014] Each decryption channel synchronously decrypts the sub-encrypted stream data block. Further improve the decryption speed.

[0015] The encryption methods of the sub-encrypted cipher stream data blocks are different from each other, and each decryption channel decrypts based on the decryption method corresponding to each encryption method; and / or, the encryption keys of the sub-encrypted cipher stream data blocks are different from each other, and each decryption channel decrypts based on the decryption key corresponding to each encryption key. In this way, the security of the encrypted cipher stream data is improved, and the application scenario of the decryption method is extended. If a conventional single decryption channel is used to decrypt the encrypted cipher stream data, different decryption methods corresponding to different encryption methods or different keys need to be switched during the decryption process, which greatly affects the decryption speed.

[0016] Let the length of the i-th sub-encrypted cipher stream data block be denoted as Li, where i ∈ [1, N], and the corresponding decryption speed of the i-th sub-encrypted cipher stream data block be denoted as Vi; let the length of the j-th sub-encrypted cipher stream data block be denoted as Lj, where j ∈ [1, N], and the corresponding decryption speed of the j-th sub-encrypted cipher stream data block be denoted as Vj; among them, Lj / Vj is equal to Li / Vi. In this way, the encrypted cipher stream data can be decomposed into sub-encrypted cipher stream blocks with different data lengths, and the decryption speed of the sub-encrypted cipher stream block with a longer data length can be relatively faster, thereby optimizing the decryption speed.

[0017] The process of extracting the encrypted cipher stream data includes: obtaining the original code stream data; performing Advanced Encryption Standard (AES) encryption on the original code stream data to obtain the encrypted cipher stream data. AES encryption uses block encryption, which is beneficial for the encrypted cipher stream data to enter multiple decryption channels in groups in turn, thereby improving the decryption speed.

[0018] On the other hand, the present invention also provides a decryption device for encrypted cipher stream data. The device includes: an input module, a decryption module, and an output module; wherein, the input module is used to extract the encrypted cipher stream data, and the encrypted cipher stream data includes M groups of encrypted cipher stream data arranged in sequence, where M is a positive integer; the decryption module is used to set N decryption channels, and the M groups of encrypted cipher stream data are decrypted through the N decryption channels to obtain the corresponding M groups of decrypted cipher stream data, where N is not less than 2; the output module is used to buffer the M groups of decrypted cipher stream data and output them in sequence to obtain the decrypted cipher stream data.

[0019] The input module is used to: extract M groups of encrypted cipher stream data with a fixed data length.

[0020] The decryption module is used to: the decryption speeds of the N decryption channels are equal.

[0021] The decryption module is configured to: the M groups of encrypted cipher stream data sequentially enter N decryption channels in order; when M is greater than N, the encrypted cipher stream data of the 1st to the Nth groups sequentially enter the N decryption channels for decryption to obtain the corresponding decrypted cipher stream data of the 1st to the Nth groups, and the encrypted cipher stream data of the (N + 1)th group enters the 1st decryption channel after the encrypted cipher stream data of the 1st group is decrypted, and so on until the M groups of encrypted cipher stream data are decrypted; when M is equal to N, the encrypted cipher stream data of the 1st to the Nth groups sequentially enter the Nth decryption channel for decryption to obtain the corresponding decrypted cipher stream data of the 1st to the Nth groups.

[0022] An embodiment of the present invention further provides a computer-readable storage medium, on which a computer program is stored, and characterized in that the computer program is executed by a processor to perform the steps of the method described in any one of the above.

[0023] An embodiment of the present invention further provides a decryption device, the device includes: a processor and a memory for storing a computer program capable of running on the processor; wherein, when the processor is used to run the computer program, it executes the steps of the method described in any one of the above.

[0024] Compared with the prior art, the main beneficial effects of the present invention:

[0025] The decryption method of the encrypted cipher stream data provided by the present invention decrypts the encrypted cipher stream data by setting and using multiple decryption channels, and has a high decryption speed. Based on the decryption method, the present invention provides a corresponding decryption device, including an input module, a decryption module and an output module, which decrypts the encrypted cipher stream data by setting and using multiple decryption channels, and has a high decryption speed. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 It is a schematic diagram of the decryption process of the encrypted cipher stream data in the related art

[0027] Figure 2 It is a schematic diagram of the process of a decryption method of encrypted cipher stream data provided by an embodiment of the present invention.

[0028] Figure 3 It is a schematic diagram of an AES encryption process provided by an embodiment of the present invention.

[0029] Figure 4 It is a schematic diagram of the process of a method for loading encrypted cipher stream by FPGA provided by an embodiment of the present invention.

[0030] Figure 5 It is a decryption device for encrypted cipher stream data provided by an embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0031] The technical solutions in the specific embodiments of the present invention will be clearly and completely described below. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0032] As shown in the Figure 1 accompanying drawings, in the decryption process of the related art, the encrypted stream data is generally decrypted through a single decryption channel, and there is a certain decryption speed for a single decryption channel. When the encrypted stream data includes multiple groups of data, the decryption channel needs to complete the decryption of the current group of data before the next group of data arrives. In the conventional decryption scheme, since the speed of the data stream is not very fast, a single decryption channel can complete the decryption task. In order to improve the loading speed of the FPGA, sometimes a faster data stream is used for loading. At this time, a single decryption channel cannot complete the decryption task before the next group of data arrives.

[0033] Based on this, the embodiments of the present invention provide a method for decrypting encrypted stream data. As shown in the Figure 2 accompanying drawings, the method includes:

[0034] Step 201: Extract the encrypted stream data, where the encrypted stream data includes M groups of encrypted stream data arranged in sequence, and M is a positive integer;

[0035] Step 202: Set N decryption channels, and the M groups of encrypted stream data are decrypted through the N decryption channels to obtain corresponding M groups of decrypted stream data, where N is not less than 2;

[0036] Step 203: Buffer the M groups of decrypted stream data and output them in sequence to obtain the decrypted stream data.

[0037] In this way, by setting and using multiple decryption channels to decrypt the encrypted stream data, the decryption speed is high.

[0038] The present invention will be further described in detail below with reference to the accompanying drawings.

[0039] First, execute Step 201 to extract the encrypted stream data, where the encrypted stream data includes M groups of encrypted stream data arranged in sequence, and M is a positive integer.

[0040] Here, the encrypted cipher stream data is extracted, including: obtaining the original code stream data; performing Advanced Encryption Standard (AES) encryption on the original code stream data to obtain the encrypted cipher stream data. The original code stream data can be an FPGA code stream file. The encryption of the FPGA code stream file can use the Advanced Encryption Standard (AES). The AES encryption method includes a symmetric encryption algorithm, where symmetric encryption means that the encryption and decryption use the same key. The AES encryption process is as follows Figure 3 As shown, the code stream file of the FPGA is encrypted by software and stored in an external memory. After power-on, it is decrypted while being downloaded through an interface, thus completing the entire download and decryption operations. In actual operation, M groups of encrypted cipher stream data can be extracted with a fixed data length. AES can be a block cipher, and the block cipher can divide the plaintext into multiple groups with equal length for each group. Each group of data is encrypted each time until the entire plaintext is encrypted. In the AES standard specification, the block length can be 128 bits, that is, each block is 16 bytes (each byte is 8 bits). The length of the key can be 128 bits, 192 bits, or 256 bits. Depending on the length of the key, different numbers of encryption rounds can be adopted. Exemplarily, the general number of encryption rounds for AES-128 is 10 rounds, for AES-192 is 12 rounds, and for AES-256 is 14 rounds. Each round of the AES encryption process includes byte substitution, row shift, column mixing, and round key addition, and the decryption is the reverse process, which will not be elaborated here.

[0041] In actual operation, the code stream data can be encrypted in advance by software. When the FPGA loads the code stream, it decrypts it with the same key and loads it while decrypting. The key can be stored in a register dedicated to storing keys in the FPGA. This storage method will be lost when the FPGA is powered off, and the key needs to be retransmitted when powered on again. It can also be stored in the EFUSE. The EFUSE is a storage device that can only be erased and written once, and the content stored in it will not be affected when the FPGA is powered off.

[0042] Specifically, see the appendix Figure 4 In addition, an embodiment of the present invention also provides a method for an FPGA to load an encrypted cipher stream, including: providing the original code stream; performing software encryption; burning the code stream file to the FPGA; software issuing the key KEY to the FPGA; and the configuration controller of the FPGA realizing decryption. Here, AES encryption and decryption can be used.

[0043] Specifically, after the user designs the RTL circuit, the EDA software checks the encryption option and sets the key. After compilation, an encrypted code stream will be automatically generated. The code stream file will be burned into the FPGA or FLASH, and the key will be burned into the register or EFUSE in the FPGA that is specifically responsible for storing the key. When this key is consistent with the key in the code stream data, the FPGA configuration controller can successfully decrypt the code stream, restore the original code stream, and then implement the corresponding circuit.

[0044] Furthermore, to improve the security of the encrypted cipher stream data, different data segments of the encrypted cipher stream data can be encrypted using multiple encryption methods. For example, the header information of the plaintext can be encrypted using a first encryption method to obtain first encrypted cipher stream data; the intermediate information of the plaintext can be encrypted using a second encryption method to obtain second encrypted cipher stream data; and the tail information of the plaintext can be encrypted using a third encryption method to obtain third encrypted cipher stream data.

[0045] Here, the encryption method may also use asymmetric encryption, which means that encryption and decryption use different keys. The encryption method includes but is not limited to the Advanced Encryption Standard (AES) encryption algorithm, the Data Encryption Standard (DES) encryption algorithm, or the Block Cipher Standard (SM4) algorithm.

[0046] Here, to improve the security of the encrypted cipher stream data, multiple keys may be used for different data segments of the encrypted cipher stream data of the same encryption method. For example, the encrypted cipher stream data includes multiple groups of encrypted cipher stream data, and different groups of encrypted cipher stream data have different keys.

[0047] Next, step 202 is performed to set N decryption channels. The M sets of encrypted code stream data are decrypted through the N decryption channels to obtain corresponding M sets of decrypted code stream data, where N is not less than 2. Preferably, N is a multiple of 2. More preferably, N is an exponential multiple of 2, for example, N can be 4, 8, or 16. This is consistent with the host computer and the binary principle of the code stream data, thereby simplifying the circuit design and facilitating subsequent decomposition by the multiplexer.

[0048] Here, the M sets of encrypted code stream data can be selectively input into the N decryption channels through an input selection module. The input selection module can be, for example, an input multiplexer. For example, if M is 100 and N is 4, the 100 sets of encrypted code stream data can be input into the four decryption channels in turn through an input 4-to-1 selector.

[0049] The data lengths of each group of encrypted cipher stream data can be equal, and the decryption speeds of the N decryption channels can be equal. In this way, N identical decryption channels can be formed by copying the original single decryption channel, the decryption speed can be increased by N times, the efficiency is relatively high, the preparation and operation process flows are simplified, and the decryption speed can be effectively controlled by controlling the number of decryption channels used or adjusting the number of decryption channels set.

[0050] In some embodiments, decrypting the M groups of encrypted cipher stream data through the N decryption channels includes: the M groups of encrypted cipher stream data sequentially enter the N decryption channels in order; when M is greater than N, the first to the Nth groups of encrypted cipher stream data sequentially enter the N decryption channels in order for decryption to obtain the corresponding first to the Nth groups of decrypted cipher stream data, and the (N + 1)th group of encrypted cipher stream data enters the first decryption channel after the first group of encrypted cipher stream data is decrypted, and so on until the M groups of encrypted cipher stream data are decrypted; when M is equal to N, the first to the Nth groups of encrypted cipher stream data sequentially enter the Nth decryption channels in order for decryption to obtain the corresponding first to the Nth groups of decrypted cipher stream data.

[0051] When M is greater than N, taking N equal to 4 and M equal to 100 as an example, after the encrypted code stream enters the configuration controller, the configuration controller recognizes that it is an encrypted code stream, and then starts the decryption module to decrypt the code stream data. The code stream data is grouped by 128 bits. For example, it can be 100 groups, that is, M is 100. In some embodiments, the four decryption channels include the first to the fourth decryption channels. The 100 groups of encrypted code stream data can enter the first to the fourth decryption channels in turn through a 4-to-1 selector. Exemplarily, the first to the fourth groups of encrypted code stream data enter the first to the fourth decryption channels in sequence and output the first to the fourth groups of decrypted code stream data in sequence. The fifth to the eighth groups of encrypted code stream data enter the first to the fourth decryption channels in sequence and output the fifth to the eighth groups of decrypted code stream data in sequence. That is, the first group, the fifth group... the 97th group of encrypted code stream data enter the first decryption channel; the fourth group, the eighth group... the 100th group of encrypted code stream data enter the fourth decryption channel. Compared with the single decryption channel in the related art, the decryption channel needs to complete the decryption of the current group of data before the next group of data arrives. In actual operation, the decryption speed of each decryption channel for a group of encrypted code stream data can be equal, but there are still errors. For example, after the first to the fourth groups of encrypted code stream data enter the first to the fourth decryption channels in sequence, the third group of encrypted code stream data may be the first to complete decryption and obtain the third group of decrypted code stream data. Here, the third group of decrypted code stream data can be buffered, and after the first to the fourth groups of encrypted code stream data are all decrypted, the first to the fourth groups of decrypted code stream data are output from the buffer in sequence. In this way, by setting a buffer area before the decrypted code stream data is output to prepare for the final output of the decrypted code stream data, the decryption speed and output speed of each decrypted code stream data can be coordinated, and the work efficiency can be improved.

[0052] When M is equal to N, taking N equal to 4 and M equal to 4 as an example, the 4 groups of encrypted code stream data can enter the first to the fourth decryption channels in turn through a 4-to-1 selector and output the first to the fourth groups of decrypted code stream data in sequence.

[0053] In other embodiments, the M groups of encrypted code stream data enter the N decryption channels in sequence. The encrypted code stream data can identify whether the decryption channel is decrypting and preferentially select the decryption channel that is not decrypting. When M is greater than N, the first to the Nth groups of encrypted code stream data enter the N decryption channels in sequence for decryption. The (N + 1)th group of encrypted code stream data identifies whether the first to the Nth decryption channels are decrypting, and enters the decryption channel after any one of the first to the Nth decryption channels completes decryption. And so on until the M groups of encrypted code stream data are decrypted.

[0054] Exemplarily, the encryption cipher stream data of the 1st to 4th groups are not decrypted. After the encryption cipher stream data of the 1st to 4th groups enter the first to fourth decryption channels in sequence, the encryption cipher stream data of the 3rd group may be the first to complete decryption, obtaining the decryption cipher stream data of the 3rd group. At this time, if the encryption cipher stream data of the 5th group identifies that the third decryption channel is not decrypted, it can enter the third decryption channel. The encryption cipher stream data of the 5th to 8th groups do not need to wait for the encryption cipher stream data of the 1st to 4th groups to complete decryption and then enter the first to fourth decryption channels in sequence. Thus, the decryption speed is further improved. In actual operation, each decryption channel will have an idle signal to indicate whether the channel is decrypting, and the input selection module can allocate the incoming encryption cipher stream data to the idle decryption channel according to this signal.

[0055] In other embodiments, the M groups of encryption cipher stream data can enter the N decryption channels in any order, and each group of encryption cipher stream data includes a sequential number; after the M groups of encryption cipher stream data are decrypted, the corresponding M groups of decryption cipher stream data are obtained; the M groups of decryption cipher stream data are output in order according to the sequential number. Taking N equal to 4 and M equal to 100 as an example, the 1st to 100th groups of encryption cipher stream data include the corresponding sequential numbers from 1 to 100; the 100 groups of decryption cipher stream data can enter the 4 decryption channels in any order; for example, the third group of decryption cipher stream data corresponding to the sequential number 3 first enters the first decryption channel, obtaining a group of decryption cipher stream data corresponding to the sequential number 3; at this time, this group of decryption cipher stream data corresponding to the sequential number 3 is buffered, waiting for the encryption cipher stream data corresponding to the sequential numbers 1 and 2 to complete decryption, and then output in sequence. It should be understood that after all 100 groups of decryption cipher stream data are decrypted, they can be reorganized according to the sequential number and output in sequence.

[0056] Compared with the single decryption channel in the related art, the decryption module corresponding to the single decryption channel needs to complete the decryption of the current group of data before the next group of data arrives. In the conventional decryption scheme, since the speed of the data stream is not very fast, one decryption channel can complete the decryption task. In order to improve the loading speed of the FPGA, sometimes a faster data stream is used for loading. At this time, one decryption channel cannot complete the decryption task before the next group of data arrives. By decomposing the encryption cipher stream data and setting multiple decryption channels, the present invention can decrypt in a pipelined manner in turn, with a high decryption speed.

[0057] In some other embodiments, before decrypting the M groups of encrypted cipher stream data, it further includes: decomposing the encrypted cipher stream data into N sub-encrypted cipher stream data blocks, and each decryption channel decrypts the sub-encrypted cipher stream data blocks. The M groups of encrypted cipher stream data can be pre-decomposed into N sub-encrypted cipher stream data blocks and then decrypted simultaneously through N decryption channels, which increases the flexibility and operability of decryption. Taking 100 groups of encrypted cipher stream data as an example, the 1st to 25th groups of data can quickly enter the first buffer to obtain the first sub-encrypted cipher stream data block, the 26th to 50th groups of data can quickly enter the second buffer to obtain the second sub-encrypted cipher stream data block, the 51st to 75th groups of data can quickly enter the third buffer to obtain the third sub-encrypted cipher stream data block, and the 76th to 100th groups of data can quickly enter the fourth buffer to obtain the fourth sub-encrypted cipher stream data block. The first to fourth buffers are respectively connected to the first to fourth decryption channels, and each decryption channel decomposes the encrypted cipher stream data. In other embodiments, the encrypted cipher stream data is decomposed into m sub-encrypted cipher stream data blocks, and each decryption channel decrypts the sub-encrypted cipher stream data blocks, where m is greater than N. The m sub-encrypted cipher stream data blocks enter the N decryption channels in sequence. The N sub-encrypted cipher stream data blocks enter the N decryption channels in sequence for decryption. The (N + 1)th group of sub-encrypted cipher stream data blocks enter the first decryption channel after the first sub-encrypted cipher stream data block is decrypted, and so on until the m groups of sub-encrypted cipher stream data blocks are decrypted. Generally, the encrypted cipher stream data is decomposed into N sub-encrypted cipher stream data blocks, and corresponding decryption channels are set. The number of sub-encrypted cipher stream data blocks is adapted to the decryption channels. However, in actual operation, some decryption channels will fail during use, or the integrated circuit area is limited, making it necessary for multiple sub-encrypted cipher stream data blocks to enter multiple decryption channels in a streaming manner.

[0058] In some embodiments, the multiple groups of encrypted cipher stream data in each sub-encrypted cipher stream data block are arranged continuously. Taking N equal to 4 and M equal to 100 as an example, the first sub-encrypted cipher stream data block is the 1st to 15th groups of encrypted cipher stream data arranged continuously, the second sub-encrypted cipher stream data block is the 16th to 32nd groups of encrypted cipher stream data, the third sub-encrypted cipher stream data block is the 32nd to 86th groups of encrypted cipher stream data, and the fourth sub-encrypted cipher stream data block is the 86th to 100th groups of encrypted cipher stream data. Allocating the multiple groups of encrypted cipher stream data arranged continuously to each sub-encrypted cipher stream data block can facilitate the previous decomposition and subsequent recombination, and improve the decryption speed.

[0059] In some embodiments, the data lengths of the groups of encrypted cipher stream data in each sub-encrypted cipher stream data block are the same, the encryption methods are the same, and / or the keys are the same.

[0060] In some embodiments, each decryption channel decrypts the sub-encrypted cipher stream data blocks synchronously. In this way, the decryption speed is further improved.

[0061] In some embodiments, decomposing the encrypted stream data into N sub-encrypted stream data blocks further includes: buffering the decomposed sub-encrypted stream data blocks. In this way, by setting a buffer area before decrypting the sub-encrypted stream data blocks, it prepares for decrypting the sub-encrypted stream data blocks and improves work efficiency.

[0062] In some embodiments, the length of the i-th sub-encrypted stream data block is denoted as Li, where i ∈ [1, N], and the decryption speed of the corresponding i-th sub-encrypted stream data block is denoted as Vi; the length of the j-th sub-encrypted stream data block is denoted as Lj, where j ∈ [1, N], and the decryption speed of the corresponding j-th sub-encrypted stream data block is denoted as Vj; where Lj / Vj is equal to Li / Vi. In this way, the encrypted stream data can be decomposed into sub-encrypted stream data blocks with different data lengths, and the decryption speed of the sub-encrypted stream data block with a longer data length can be relatively faster, thereby optimizing the decryption speed.

[0063] In practical applications, referring to the appendix Figure 5 , the FPGA configuration controller may include multiple decryption channels, and the decryption speed of each decryption channel may be different. When the encrypted stream data enters multiple decryption channels through the input multiplexer, the input speed of the encrypted stream data can be increased for the decryption channel with a high decryption speed. In other cases, the different speeds of each decryption channel may be due to the manufacturing process error, or the reliability degradation during the long-term operation of a certain decryption channel. The input module can adjust the speed of the input sub-encrypted stream data blocks according to the decryption speeds of each decryption channel. In a specific embodiment, the different decryption speeds of each decryption channel are due to the decryption methods or the complexity of the keys of different decryption channels, and the sub-encrypted stream data blocks with complex encryption methods or keys can enter the decryption channels with fast decryption speeds.

[0064] In some embodiments, each of the sub-encrypted cipher stream data blocks includes data length information, a sequence number, a key number, and an encryption method number; the decryption channel calls the corresponding decryption method and key according to the encryption method number and the key number of the sub-encrypted cipher stream data block to perform decryption. For example, during the encryption phase, the encrypted cipher stream data can be divided into data of different lengths, and different encryption methods can be selected for the data of different lengths. For each sub-encrypted cipher stream data block, at the beginning of each sub-encrypted cipher stream data block, a part of the data bits is specifically used to store which encryption method is selected for this data block, which key, the sequence number of this data block, and the length of the encrypted data of this data block. Here, the decryption channel can be connected to a database, and the database includes the key corresponding to the key number and the encryption method corresponding to the encryption method number. The decryption channel calls the corresponding decryption method and key from the database according to the encryption method number and the key number of the sub-encrypted cipher stream data block to perform decryption. In this way, by means of the key number and the encryption method number, the data length of the sub-encrypted cipher stream data block can be greatly reduced. In actual operation, the database can be located in the memory of the FPGA.

[0065] In some embodiments, each decryption channel decrypts the sub-encrypted cipher stream data block, including: the sub-encrypted cipher stream data block can identify whether the decryption channel is decrypting and preferentially selects an undecrypted decryption channel. In actual operation, each decryption channel will have an idle signal to indicate whether the channel is decrypting, and the input selection module can allocate the incoming encrypted cipher stream data to the idle decryption channel according to this signal.

[0066] In actual operation, the encryption methods of the sub-encrypted cipher stream data blocks can be different, and each decryption channel decrypts based on the decryption method corresponding to each encryption method. To improve the security of the encrypted cipher stream data, different data segments of the encrypted cipher stream data can adopt multiple encryption methods. Exemplarily, the header information of the plaintext can be encrypted using a first encryption method to obtain a first encrypted cipher stream data; the middle information of the plaintext can be encrypted using a second encryption method to obtain a second encrypted cipher stream data; the tail information of the plaintext can be encrypted using a third encryption method to obtain a third encrypted cipher stream data. If a conventional single decryption channel is used to decrypt the encrypted cipher stream data, then different decryption methods corresponding to different encryption methods need to be switched during the decryption process, which greatly affects the decryption speed. In the embodiments of the present invention, the encrypted cipher stream data with different encryption methods can be decomposed into multiple sub-encrypted cipher stream data blocks. For example, the first encrypted cipher stream data using the first encryption method can be decomposed into a first sub-encrypted cipher stream data block, the second encrypted cipher stream data using the second encryption method can be decomposed into a second sub-encrypted cipher stream data block, and the third encrypted cipher stream data block using the third encryption method can be decomposed into a third sub-encrypted cipher stream data block. Each decryption channel can decrypt based on the decryption method corresponding to each encryption method.

[0067] In actual operation, the keys of the sub-encrypted cipher stream data blocks can be different, and each decryption channel decrypts based on the decryption key corresponding to each encryption key. To improve the security of the encrypted cipher stream data, multiple keys can be adopted for different data segments of the encrypted cipher stream data with the same encryption method. For example, the encrypted cipher stream data includes multiple groups of encrypted cipher stream data, and the keys of different groups of encrypted cipher stream data are different. If a conventional single decryption channel is used to decrypt the encrypted cipher stream data, then different keys need to be switched during the decryption process, which greatly affects the decryption speed. For example, the encrypted cipher stream data includes a first encrypted cipher stream data and a second encrypted cipher stream data, the key of the first encrypted cipher stream data is a first key; the key of the second encrypted cipher stream data is a second key. In the embodiments of the present invention, the encrypted cipher stream data including different keys can be decomposed into multiple sub-encrypted cipher stream data blocks. For example, the first encrypted cipher stream data using the first key can be decomposed into a first sub-encrypted cipher stream data block, and the second encrypted cipher stream data using the second key can be decomposed into a second sub-encrypted cipher stream data block. Each decryption channel decrypts based on the decryption key corresponding to each encryption key.

[0068] In this way, the security of the encrypted cipher stream data is improved, and the application scenario of the decryption method is extended.

[0069] Finally, step 203 is executed to buffer and output the M groups of the decrypted cipher stream data in sequence to obtain the decrypted cipher stream data.

[0070] Here, the M groups of decrypted cipher stream data can be output through the recombination module 551. The recombination module 551 may include, for example, an output multiplexer. Taking N equal to 4 as an example, the M groups of decrypted cipher stream data can be output in sequence through a 4-to-1 output selector. In actual operation, the obtained decrypted cipher stream data can be passed to the subsequent arithmetic unit. At the same time, by setting a buffer area before the output of the decrypted cipher stream data to prepare for the final output of the decrypted cipher stream data, the decryption speed and output speed of each decrypted cipher stream data can be coordinated, improving work efficiency.

[0071] In actual operation, the recombination module 551 can restore the decrypted M groups of encrypted cipher stream data or decrypted sub-encrypted cipher stream data blocks to the original data in the correct order by sequential numbering.

[0072] An embodiment of the present invention also provides a device for decrypting encrypted cipher stream data. Refer to the appendix Figure 5 The device includes: an input module 510, a decryption module 530, and an output module 550; wherein, the input module 510 is used to extract encrypted cipher stream data, and the encrypted cipher stream data includes M groups of encrypted cipher stream data arranged in sequence, where M is a positive integer; the decryption module 530 is used to set N decryption channels, and the M groups of encrypted cipher stream data are decrypted through the N decryption channels to obtain corresponding M groups of decrypted cipher stream data, where N is not less than 2; the output module 550 is used to buffer and output the M groups of decrypted cipher stream data in sequence to obtain decrypted cipher stream data.

[0073] The input module 510 is used to extract encrypted cipher stream data, and the encrypted cipher stream data includes M groups of encrypted cipher stream data arranged in sequence, where M is a positive integer.

[0074] Here, the input module 510 is specifically used to: obtain the original code stream data; perform Advanced Encryption Standard (AES) encryption on the original code stream data to obtain encrypted cipher stream data. The original code stream data can be an FPGA code stream file, and the encryption of the FPGA code stream file can use the Advanced Encryption Standard (AES). The AES encryption method includes a symmetric encryption algorithm, and the symmetric encryption means that the encryption and decryption use the same key. The AES encryption process is as Figure 3As shown, the bitstream file of the FPGA is encrypted by software and stored in an external memory. After power-on, it is decrypted while being downloaded through an interface, thus completing the entire download and decryption operations. In actual operation, M groups of encrypted bitstream data can be extracted with a fixed data length. AES can be a block cipher. The block cipher can divide the plaintext into multiple groups with equal length for each group, and encrypt one group of data each time until the entire plaintext is encrypted. In the AES standard specification, the block length can be 128 bits, that is, each block is 16 bytes (each byte is 8 bits). The length of the key can be 128 bits, 192 bits, or 256 bits. Different encryption rounds can be adopted according to different key lengths. Exemplarily, the general encryption rounds of AES-128 are 10 rounds, those of AES-192 are 12 rounds, and those of AES-256 are 14 rounds. Each round of the AES encryption process includes byte substitution, row shift, column mixing, and round key addition, and the decryption is the reverse process, which will not be elaborated here.

[0075] In actual operation, the bitstream data can be encrypted in advance by software, and the FPGA decrypts it with the same key when loading the bitstream, decrypting while loading. The key can be stored in a register dedicated to storing the key in the FPGA. This storage method will be lost when the FPGA is powered off, and the key needs to be retransmitted when powered on again. It can also be stored in the EFUSE. The EFUSE is a storage device that can only be written once, and the content stored in it will not be affected when the FPGA is powered off.

[0076] Specifically, after the user designs the RTL circuit, when the EDA software checks the encryption option and sets the key, an encrypted bitstream will be automatically generated after compilation. The bitstream file is burned into the FPGA or FLASH, and the key is burned into the register or EFUSE dedicated to storing the key in the FPGA. When this key is consistent with the key in the bitstream data, the FPGA configuration controller can successfully decrypt the bitstream, restore the original bitstream, and then implement the corresponding circuit.

[0077] Furthermore, to improve the security of the encrypted bitstream data, different data segments of the encrypted bitstream data can adopt multiple encryption methods. Exemplarily, the header information of the plaintext can be encrypted with the first encryption method to obtain the first encrypted bitstream data; the middle information of the plaintext can be encrypted with the second encryption method to obtain the second encrypted bitstream data; the tail information of the plaintext can be encrypted with the third encryption method to obtain the third encrypted bitstream data.

[0078] Here, the encryption method may also use asymmetric encryption, which means that encryption and decryption use different keys. The encryption method includes but is not limited to the Advanced Encryption Standard (AES) encryption algorithm, the Data Encryption Standard (DES) encryption algorithm, or the Block Cipher Standard (SM4) algorithm.

[0079] Here, to improve the security of the encrypted cipher stream data, multiple keys may be used for different data segments of the encrypted cipher stream data of the same encryption method. For example, the encrypted cipher stream data includes multiple groups of encrypted cipher stream data, and different groups of encrypted cipher stream data have different keys.

[0080] The decryption module 530 is configured to have N decryption channels 531. The M sets of encrypted code stream data pass through the N decryption channels 531 to obtain corresponding M sets of decrypted code stream data, where N is not less than 2. Preferably, N is a multiple of 2. More preferably, N is an exponential multiple of 2, for example, N can be 4, 8, or 16. This is consistent with the host computer and the binary principle of the code stream data, thereby simplifying the circuit design and facilitating subsequent decomposition by the multiplexer.

[0081] In some embodiments, the apparatus further includes an input selection module 520 configured to selectively input M sets of encrypted code stream data into N decryption channels. The input selection module may be, for example, an input multiplexer. For example, if M is 100 and N is 4, the 100 sets of encrypted code stream data may be fed alternately into the four decryption channels via an input 4-to-1 selector.

[0082] The decryption module is configured to ensure that the data length of each set of encrypted code stream data is equal and the decryption speeds of the N decryption channels are equal. Thus, by duplicating an existing single decryption channel to form N identical decryption channels, the decryption speed can be increased by N times, resulting in higher efficiency and simplified preparation and operation processes. Furthermore, the decryption speed can be effectively controlled by controlling or adjusting the number of decryption channels used.

[0083] Furthermore, the decryption module is used to: decrypt the M groups of encrypted code stream data through the N decryption channels, including: the M groups of encrypted code stream data enter the N decryption channels in sequence; when M is greater than N, the 1st to Nth groups of encrypted code stream data enter the N decryption channels in sequence for decryption, and obtain the corresponding 1st to Nth groups of decrypted code stream data, the N+1th group of encrypted code stream data enters the 1st decryption channel after the decryption of the 1st group of encrypted code stream data is completed, and so on, until the decryption of the M groups of encrypted code stream data is completed; when M is equal to N, the 1st to Nth groups of encrypted code stream data enter the N decryption channels in sequence for decryption, and obtain the corresponding 1st to Nth groups of decrypted code stream data.

[0084] When M is greater than N, taking N equal to 4 and M equal to 100 as an example, after the encrypted code stream enters the configuration controller, the configuration controller recognizes that it is an encrypted code stream, and then starts the decryption module to decrypt the code stream data. The code stream data is grouped by 128 bits. For example, it can be 100 groups, that is, M is 100. In some embodiments, the 4 decryption channels include the first to the fourth decryption channels. The 100 groups of encrypted code stream data can enter the first to the fourth decryption channels in turn through a 4-to-1 selector. Exemplarily, the 1st to 4th groups of encrypted code stream data enter the first to the fourth decryption channels in sequence and output the 1st to 4th groups of decrypted code stream data blocks in sequence. The 5th to 8th groups of encrypted code stream data enter the first to the fourth decryption channels in sequence and output the 5th to 8th groups of decrypted code stream data blocks in sequence. That is, the 1st, 5th... 97th groups of encrypted code stream data enter the first decryption channel; the 4th, 8th... 100th groups of encrypted code stream data enter the fourth decryption channel. Compared with the single decryption channel in the related art, the decryption channel needs to complete the decryption of the current group of data before the next group of data arrives. In actual operation, the decryption speed of each decryption channel for a group of encrypted code stream data can be equal, but there are still errors. For example, after the 1st to 4th groups of encrypted code stream data enter the first to the fourth decryption channels in sequence, the 3rd group of encrypted code stream data may be the first to complete decryption and obtain the 3rd group of decrypted code stream data. Here, the 3rd group of decrypted code stream data can be buffered, and after the 1st to 4th groups of encrypted code stream data are all decrypted, the 1st to 4th groups of decrypted code stream data are output from the buffer in sequence. In this way, by setting a buffer area before the decrypted code stream data block is output to prepare for the output of the final decrypted code stream data, the decryption speed and output speed of each decrypted code stream data can be coordinated, and the work efficiency can be improved.

[0085] When M is equal to N, taking N equal to 4 and M equal to 4 as an example, the 4 groups of encrypted code stream data can enter the first to the fourth decryption channels in turn through a 4-to-1 selector and output the 1st to 4th groups of decrypted code stream data in sequence.

[0086] In other embodiments, the M groups of encrypted code stream data enter the N decryption channels in sequence. The encrypted code stream data can identify whether a decryption channel is decrypting and preferentially select an undecrypted decryption channel; when M is greater than N, the 1st to Nth groups of encrypted code stream data enter the N decryption channels in sequence for decryption. The (N + 1)th group of encrypted code stream data identifies whether the 1st to Nth decryption channels are decrypting, and enters the decryption channel after any one of the 1st to Nth decryption channels completes decryption, and so on until the M groups of encrypted code stream data are decrypted.

[0087] Exemplarily, the first to fourth groups of encrypted cipher stream data are not decrypted. After the first to fourth groups of encrypted cipher stream data enter the first to fourth decryption channels in sequence, the third group of encrypted cipher stream data may be the first to complete decryption and obtain the third group of decrypted cipher stream data. At this time, if the fifth group of encrypted cipher stream data identifies that the third decryption channel is not decrypted, it can enter the third decryption channel. The fifth to eighth groups of encrypted cipher stream data do not need to wait for the first to fourth groups of encrypted cipher stream data to complete decryption and then enter the first to fourth decryption channels in sequence. In this way, the decryption speed is further improved. In actual operation, each decryption channel will have an idle signal to indicate whether the channel is decrypting, and the input selection module can allocate the incoming encrypted cipher stream data to the idle decryption channel according to this signal.

[0088] In other embodiments, the M groups of encrypted cipher stream data can enter the N decryption channels in any order, and each group of encrypted cipher stream data includes a sequence number; after the M groups of encrypted cipher stream data are decrypted, the corresponding M groups of decrypted cipher stream data are obtained; the M groups of decrypted cipher stream data are output in sequence according to the sequence number. Taking N equal to 4 and M equal to 100 as an example, the first to 100 groups of encrypted cipher stream data include the corresponding sequence numbers from 1 to 100; the 100 groups of decrypted cipher stream data can enter the 4 decryption channels in any order; for example, the third group of decrypted cipher stream data corresponding to the sequence number 3 first enters the first decryption channel to obtain a group of decrypted cipher stream data corresponding to the sequence number 3; at this time, this group of decrypted cipher stream data corresponding to the sequence number 3 is buffered, waiting for the encrypted cipher stream data corresponding to the sequence numbers 1 and 2 to complete decryption, and then output in sequence. It should be understood that after all 100 groups of decrypted cipher stream data are decrypted, they can be reorganized according to the sequence number and output in sequence.

[0089] Compared with the single decryption channel in the related art, the decryption module corresponding to the single decryption channel needs to complete the decryption of the current group of data before the next group of data arrives. In the conventional decryption scheme, because the speed of the data stream is not very fast, one decryption channel can complete the decryption task. In order to improve the loading speed of the FPGA, sometimes a faster data stream is used for loading. At this time, one decryption channel cannot complete the decryption task before the next group of data arrives. The present invention decomposes the encrypted cipher stream data and sets multiple decryption channels, which can decrypt in a pipelined manner in turn.

[0090] In some other embodiments, the input multiplexer 520 and the decryption module 530 are used to: decompose the encrypted cipher stream data into N sub-encrypted cipher stream data blocks, and each decryption channel decrypts the sub-encrypted cipher stream data block. The M groups of encrypted cipher stream data can be pre-decomposed into N sub-encrypted cipher stream data blocks and then decrypted simultaneously through N decryption channels, which increases the flexibility and operability of decryption.

[0091] In some embodiments, the input multiplexer 520 and the decryption module 530 are configured to: multiple groups of encrypted cipher stream data in each sub-encrypted cipher stream data block are arranged continuously.

[0092] In some embodiments, the input multiplexer 520 and the decryption module 530 are configured to: the data lengths of the groups of encrypted cipher stream data in each sub-encrypted cipher stream data block are the same, the encryption methods are the same, and / or the keys are the same.

[0093] In some embodiments, the input multiplexer 520 and the decryption module 530 are configured to: each sub-encrypted cipher stream data block includes data length information, sequence number, key number, and encryption method number; the decryption channel calls the corresponding decryption method and key according to the encryption method number and key number of the sub-encrypted cipher stream data block to perform decryption.

[0094] In some embodiments, the input multiplexer 520 and the decryption module 530 are configured to: the sub-encrypted cipher stream data block can identify whether the decryption channel is performing decryption, and preferentially select an undecrypted decryption channel.

[0095] In some embodiments, the input multiplexer 520 and the decryption module 530 are configured to: denote the length of the i-th sub-encrypted cipher stream data block as Li, where i ∈ [1, N], and denote the decryption speed of the i-th sub-encrypted cipher stream data block as Vi; denote the length of the j-th sub-encrypted cipher stream data block as Lj, where j ∈ [1, N], and denote the decryption speed of the j-th sub-encrypted cipher stream data block as Vj; where, Lj / Vj is equal to Li / Vi.

[0096] In actual operation, the encryption methods of the sub-encrypted cipher stream data blocks can be different, and each decryption channel decrypts based on the decryption method corresponding to each encryption method.

[0097] In actual operation, the keys of the sub-encrypted cipher stream data blocks can be different, and each decryption channel decrypts based on the decryption key corresponding to each encryption key.

[0098] The output module 550 is configured to buffer the M groups of decrypted cipher stream data blocks and output them in sequence to obtain decrypted cipher stream data.

[0099] Here, the M groups of decrypted cipher stream data can be output through the recombination module 551. The recombination module 551 can include, for example, an output multiplexer. Taking N equal to 4 as an example, the M groups of decrypted cipher stream data can be output in sequence through a 4-to-1 output selector. In actual operation, the obtained decrypted cipher stream data can be passed to a subsequent arithmetic unit.

[0100] In some embodiments, the device further includes: a buffer module 540 that buffers the decrypted encrypted cipher stream data blocks. The buffer module 540 may include a plurality of sub-buffer modules 541, and each of the sub-buffer modules 541 corresponds to the decryption channel 531 one by one. In this way, by setting a buffer area before the output of the sub-decrypted cipher stream data, it prepares for the output of the final decrypted cipher stream data and improves work efficiency.

[0101] In actual operation, the recombination module 551 may restore the decrypted M groups of encrypted cipher stream data or the decrypted sub-encrypted cipher stream data blocks to an original data in the correct order by sequential numbering.

[0102] In practical applications, the input module 510, the input selection module 520, the decryption module 530, and the output module 550 may all be implemented by a central processing unit (CPU), a microprocessor (MPU), a digital signal processor (DSP), or a field programmable gate array (FPGA) in an embedded system, etc.

[0103] An embodiment of the present invention further provides a computer-readable storage medium, on which a computer program is stored. When the computer program is run by a processor, it performs: extracting encrypted cipher stream data, where the encrypted cipher stream data includes M groups of encrypted cipher stream data arranged in sequence, and M is a positive integer; setting N decryption channels, and the M groups of encrypted cipher stream data are decrypted through the N decryption channels to obtain corresponding M groups of decrypted cipher stream data, where N is not less than 2; buffering and sequentially outputting the M groups of decrypted cipher stream data to obtain decrypted cipher stream data. The computer-readable storage medium may be a memory such as FRAM, ROM, PROM, EPROM, EEPROM, Flash Memory, magnetic surface memory, optical disc, or CD-ROM; or it may be various devices including one or any combination of the above memories, such as a mobile phone, a computer, a tablet device, a personal digital assistant, etc.

[0104] An embodiment of the present invention further provides a decryption device, the device includes: a processor and a memory for storing a computer program that can run on the processor; wherein, when the processor runs the computer program, it executes the steps of the decryption method described in any one of the above.

[0105] Some common English nouns or letters used in the present invention for the convenience of clear description are only used for exemplary reference rather than limiting interpretation or specific usage, and the protection scope of the present invention should not be limited by their possible Chinese translations or specific letters.

Claims

1. A decryption method for encrypted cipher stream data, characterized in that, Including: Extracting encrypted stream data, where the encrypted stream data includes M groups of encrypted stream data arranged in sequence, and M is a positive integer; Setting N decryption channels, through which the M groups of encrypted stream data are decrypted to obtain corresponding M groups of decrypted stream data, where N is not less than 2; Buffering the M groups of decrypted stream data and outputting them in sequence to obtain decrypted stream data; Before decrypting the M groups of encrypted stream data, it further includes: decomposing the encrypted stream data into N sub-encrypted stream data blocks, and each decryption channel decrypts the sub-encrypted stream data blocks; The encryption methods of the sub-encrypted stream data blocks are different from each other, and each decryption channel decrypts based on the decryption method corresponding to each encryption method; and / or, the encryption keys of the sub-encrypted stream data blocks are different from each other, and each decryption channel decrypts based on the decryption key corresponding to each encryption key; Denote the length of the i-th sub-encrypted stream data block as Li, i ∈ [1, N], and the decryption speed of the corresponding i-th sub-encrypted stream data block as Vi; denote the length of the j-th sub-encrypted stream data block as Lj, j ∈ [1, N], and the decryption speed of the corresponding j-th sub-encrypted stream data block as Vj, where Lj / Vj is equal to Li / Vi.

2. The decryption method according to claim 1, wherein The extracting of the encrypted stream data includes: Obtaining original stream data; Performing Advanced Encryption Standard (AES) encryption on the original stream data to obtain encrypted stream data.

3. A decryption device for encrypted cipher stream data, characterized in that, The device includes: an input module, a decryption module, and an output module; where The input module is used to extract encrypted stream data, where the encrypted stream data includes M groups of encrypted stream data arranged in sequence, and M is a positive integer; The decryption module is used to set N decryption channels, through which the M groups of encrypted stream data are decrypted to obtain corresponding M groups of decrypted stream data, where N is not less than 2; The output module is used to buffer the M groups of decrypted stream data and output them in sequence to obtain decrypted stream data; The device further includes: an input multiplexer; The input multiplexer and the decryption module are used to: decompose the encrypted stream data into N sub-encrypted stream data blocks, and each decryption channel decrypts the sub-encrypted stream data blocks; The encryption methods of the sub-encrypted stream data blocks are different, and each decryption channel decrypts based on the decryption method corresponding to each encryption method; and / or, the keys of the sub-encrypted stream data blocks are different, and each decryption channel decrypts based on the decryption key corresponding to each encryption key; The input multiplexer and the decryption module are used to: denote the length of the i-th sub-encrypted stream data block as Li, i ∈ [1, N], and the decryption speed of the corresponding i-th sub-encrypted stream data block as Vi; denote the length of the j-th sub-encrypted stream data block as Lj, j ∈ [1, N], and the decryption speed of the corresponding j-th sub-encrypted stream data block as Vj; where Lj / Vj is equal to Li / Vi.

4. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 2.

5. A decryption device, characterized in that, The apparatus includes: a processor and a memory for storing a computer program that can run on the processor; wherein, when the processor is used to run the computer program, it executes the steps of the method according to any one of claims 1 to 2.

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