Silicon wafer etching method and etching device

By staggering the center axis of the silicon wafer and the rotation axis of the stage during the spin etching process, setting point-symmetrical positions on the front and back surfaces, and using mixed acid etching, the problem of large etching margins in the center of the wafer is solved, achieving higher flatness and lower TTV.

CN115461845BActive Publication Date: 2025-09-09SHIN ETSU HANDOTAI CO LTD
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Patent Information

Application Number
CN202180030950.7
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2020-05-11
Filing Date
2021-03-02
Publication Date
2025-09-09
Estimated Expiration
2041-03-02

AI Technical Summary

Technical Problem

In the existing spin etching method, the etching process margin PV at the center of the wafer is large, resulting in a deterioration of the etching process margin PV within the wafer surface, and the TTV of the wafer after etching exceeds 5μm, which makes it difficult to meet the requirements of high flatness.

Method used

During the spin etching process, the center axis of the silicon wafer is offset by more than 15 mm from the rotation axis of the table holding the silicon wafer, the supply range of the acid etching liquid is expanded to cover the entire surface of the silicon wafer, and the front and back surfaces are set in a point-symmetrical position relationship. Etching is performed using a mixture of hydrofluoric acid, nitric acid and other acids.

Benefits of technology

The etching process allowance PV near the center of the wafer is significantly reduced, the etching process allowance PV within the wafer surface is improved, the TTV after etching is reduced, and higher flatness is achieved.

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Abstract

The present invention is a method for etching a silicon wafer, comprising: a rotational etching step in which an acid etching solution is supplied to the front, back, or both sides of a silicon wafer via a supply nozzle, and the silicon wafer is rotated to expand the supply range of the acid etching solution to cover the entire surface of the silicon wafer, thereby performing acid etching. The method is characterized in that, during the rotational etching step, the central axis of the silicon wafer is offset by at least 15 mm from the rotation axis of a stage holding the silicon wafer, and etching is performed. Therefore, an object of the present invention is to provide a method and apparatus for etching silicon wafers that can improve etching process margins.
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Description

Technical Field

[0001] The invention relates to a silicon wafer etching method and an etching device. Background Art

[0002] Typically, during the silicon wafer manufacturing process, wafers sliced ​​thinly from a single crystal ingot undergo chamfering and grinding to flatten them. This processing can introduce various scratches and deformations on the front and back of the wafer. If these become noticeable in subsequent steps, they can become a significant quality issue. Therefore, etching is typically performed to remove these scratches and deformations.

[0003] Known etching methods include a batch etching method that processes the front and back surfaces of a plurality of wafers simultaneously, and a spin etching method that processes the front and back surfaces of wafers one by one.

[0004] There are two methods depending on the purpose: treatment with an acid etching solution and treatment with an alkaline etching solution. For example, in the case of acid etching, a mixed acid containing hydrofluoric acid and nitric acid, etc., with appropriately adjusted concentrations, is generally used.

[0005] Prior art literature

[0006] Patent Literature

[0007] Patent Document 1: Japanese Patent No. 4835069 Summary of the Invention

[0008] (1) Technical issues to be resolved

[0009] A characteristic of rotary acid etching is that the etching allowance PV is large at the center of the wafer, resulting in a numerically deteriorating etching allowance PV within the wafer surface. Here, etching allowance PV refers to the difference between the maximum and minimum etching allowances within the wafer surface.

[0010] As a countermeasure for this, a method of reciprocating a nozzle in the radial direction of a wafer during etching is generally used (Patent Document 1). However, this method alone is not sufficient in achieving the desired effect.

[0011] Furthermore, in recent years, as wafer flatness is being demanded to be higher, it is not preferable for the TTV (Total Thickness Variation) of the wafer after etching to exceed 5 μm, and a method for further improving the etching margin has been desired.

[0012] The present invention has been made to solve the above-mentioned problems, and its object is to provide a method for etching a silicon wafer that can improve the etching margin of the silicon wafer by spin etching. In addition, the present invention aims to provide an etching apparatus that can improve the etching margin.

[0013] (2) Technical solution

[0014] The present invention is completed to achieve the above-mentioned purpose and provides a method for etching a silicon wafer, comprising: a rotation etching step, wherein an acid etching liquid is supplied to the front side or the back side, or both sides, of a silicon wafer through a supply nozzle, and the silicon wafer is rotated to expand the supply range of the acid etching liquid to cover the entire surface of the silicon wafer to perform acid etching, wherein, in the rotation etching step, the central axis of the silicon wafer is offset by more than 15 mm from the rotation axis of a table holding the silicon wafer to perform etching.

[0015] According to such an etching method, the etching process allowance PV near the center of the wafer can be reduced, and the etching process allowance PV within the wafer surface can be improved.

[0016] At this time, preferably, when the silicon wafer is turned over and both sides of the silicon wafer are etched, the center axis of the silicon wafer is set in a direction offset from the rotation axis of the table holding the silicon wafer, so that the front and back sides are point-symmetrically positioned relative to the center axis of the silicon wafer.

[0017] This can further improve the etching margin PV within the wafer surface.

[0018] In this case, the acid etching solution is preferably an acid etching solution containing hydrofluoric acid and nitric acid. In this case, the acid etching solution is preferably an acid etching solution further containing one or more of acetic acid, sulfuric acid, and phosphoric acid.

[0019] This allows uniform etching within the wafer surface, and ensures improvement in etching margin PV.

[0020] In this case, the silicon content in the acidic etching solution may be set to 12 g / L or more and 20 g / L or less.

[0021] This stabilizes the etching rate and enables etching to be performed efficiently at low cost.

[0022] In addition, the present invention provides an etching device, comprising at least a supply nozzle for supplying an acid etching liquid and a table for holding a silicon wafer, wherein the acid etching liquid is supplied to the front side, the back side, or both sides of the silicon wafer through the supply nozzle, and the silicon wafer is rotated to expand the supply range of the acid etching liquid to the entire surface of the silicon wafer, thereby performing acid etching by rotational etching, wherein the table can eccentrically hold the silicon wafer so that the central axis of the silicon wafer is separated from the rotation axis of the table by more than 15 mm.

[0023] According to such an etching apparatus, the etching process margin PV within the wafer surface can be improved.

[0024] (3) Beneficial effects

[0025] As described above, the etching method of the present invention is a method that can reduce the etching process allowance PV near the center of the wafer and improve the etching process allowance PV within the wafer surface. In particular, when etching both sides of a silicon wafer by flipping the front and back sides of the silicon wafer, the etching process allowance within the wafer surface can be further improved by shifting the center axis of the silicon wafer from the rotation axis of the stage holding the silicon wafer so that the front and back sides are point-symmetrical with respect to the center axis of the silicon wafer.

[0026] Furthermore, according to the etching apparatus of the present invention, the etching process margin PV near the center of the wafer can be reduced, thereby improving the etching process margin PV. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 This is a schematic diagram of an example of the etching apparatus of the present invention.

[0028] Figure 2 Is only displayed Figure 1 A diagram showing the silicon wafer and the surrounding area of ​​the stage of the etching apparatus shown.

[0029] Figure 3 It is a schematic diagram showing the state of etching the front surface of a silicon wafer using the etching method of the present invention.

[0030] Figure 4 It is a schematic diagram showing the state of etching the back side of a silicon wafer using the etching method of the present invention.

[0031] Figure 5 This is a diagram showing the distribution shape of the etching allowance in the etching method of the present invention (Example).

[0032] Figure 6 This is a schematic diagram of the front view when a silicon wafer is set so that the central axis of the silicon wafer and the rotation axis of the stage are aligned (Comparative Example 1).

[0033] Figure 7This is a schematic diagram of the back surface of a silicon wafer when the silicon wafer is set so that the central axis of the silicon wafer and the rotation axis of the stage are aligned (Comparative Example 1).

[0034] Figure 8 It is a diagram showing the distribution shape of etching allowance when etching is performed while the silicon wafer is set so that the central axis of the silicon wafer and the rotation axis of the stage are aligned (Comparative Example 1).

[0035] Figure 9 This is a schematic diagram of the front view when the silicon wafer is set so that the central axis of the silicon wafer is aligned with the rotation axis of the stage and the nozzle is reciprocated in the radial direction of the silicon wafer (Comparative Example 2).

[0036] Figure 10 This is a schematic diagram of the back side when a silicon wafer is set so that the central axis of the silicon wafer is aligned with the rotation axis of the stage and the nozzle is reciprocated in the radial direction of the silicon wafer (Comparative Example 2).

[0037] Figure 11 This figure shows the distribution shape of etching allowance when a silicon wafer is set so that the central axis of the silicon wafer coincides with the rotation axis of the stage and the nozzle is reciprocated in the radial direction of the silicon wafer (Comparative Example 2). DETAILED DESCRIPTION

[0038] Hereinafter, the present invention will be described in detail, but the present invention is not limited thereto.

[0039] As described above, there is a demand for a silicon wafer etching method and an etching apparatus capable of improving the etching margin in spin etching.

[0040] The inventors of this case have conducted repeated and in-depth research on the above-mentioned problems and have discovered that a method for etching silicon wafers can reduce the etching process allowance PV near the center of the silicon wafer and improve the etching process allowance PV within the silicon wafer surface, thereby completing the present invention. The silicon wafer etching method includes: a rotary etching step, in which an acid etching liquid is supplied to the front side or the back side, or both sides, of the silicon wafer through a supply nozzle, and the silicon wafer is rotated to expand the supply range of the acid etching liquid to cover the entire surface of the silicon wafer for acid etching. In the rotary etching step, the center axis of the silicon wafer is offset by more than 15 mm from the rotation axis of the table holding the silicon wafer for etching.

[0041] Hereinafter, description will be given with reference to the accompanying drawings.

[0042] Figure 1This is a schematic diagram showing an example of an etching apparatus according to the present invention, and is an example of an etching apparatus that can be used in the method for etching silicon wafers according to the present invention, namely, an etching apparatus 100. The silicon wafer etching apparatus according to the present invention includes at least a supply nozzle 3 for supplying an acid etching solution and a stage 2 for holding a silicon wafer. The apparatus is capable of eccentrically holding a silicon wafer 1, described in detail later, by distancing a central axis 11 of the silicon wafer 1 by at least 15 mm from a central axis 12 of the stage.

[0043] Specifically, etching apparatus 100 includes a vacuum table 2 for holding a silicon wafer 1 and a supply nozzle 3 for supplying an acid etching solution. An acid etching solution 8 containing a predetermined amount of Si dissolved therein is added to an etching solution tank 6. Silicon wafer 1 is held horizontally on vacuum table 2, with its front or back facing upward, and is held on vacuum table 2, which is connected to a vacuum source 4, via vacuum holes 10. However, the holding method for the silicon wafer of the present invention is not limited to vacuum holding, as long as eccentric holding is possible.

[0044] The vacuum adsorption stage 2 is rotated in the θ direction (rotation direction) with the center of the vacuum adsorption stage as the rotation axis 12 (central axis) by a rotation unit composed of a θ-axis motor (not shown) and a θ spindle (not shown) located below the stage.

[0045] Next, the acid etching solution 8 is supplied from the etching solution tank 6 to the supply nozzle 3 located above the vacuum adsorption stage 2 , and the acid etching solution 8 is supplied onto the silicon wafer 1 held and rotated on the vacuum adsorption stage (spin etching step).

[0046] In this case, in the spin etching step of the silicon wafer etching method of the present invention, etching is performed with the central axis of the silicon wafer offset by at least 15 mm from the rotation axis of the stage holding the silicon wafer. The method for offsetting the silicon wafer is not particularly limited. For example, the central axis of the silicon wafer 1 can be offset by at least 15 mm from the rotation axis of the stage by vacuum suction as described above.

[0047] Here, use Figure 2 Explain in detail. Figure 2 This is a diagram showing only the silicon wafer 1 and the peripheral portion of the vacuum adsorption stage 2 of the etching apparatus 100, and is a schematic diagram of an example in which the silicon wafer 1 is set at a position offset by 15 mm or more from the rotation axis 12 of the stage holding the silicon wafer. Figure 2 As shown, the central axis 11 of the silicon wafer 1 is offset from the central axis 12 of the vacuum adsorption table 2. In the silicon wafer etching method of the present invention, the offset width is 15 mm or greater. The upper limit of the offset width is not particularly limited, but is preferably 30 mm or less, taking into account the configuration of the apparatus.

[0048] As a schematic diagram of an example of an embodiment of the method for etching a silicon wafer of the present invention, Figure 3The figure shows the situation when the center axis of the front surface 21 of the etched wafer is offset from the rotation axis of the table holding the wafer by more than 15 mm, and the supply nozzle 3 is reciprocated in the radial direction of the wafer as shown by the nozzle reciprocating direction AA'. Figure 4 The display will Figure 3 Schematic diagram of an example when the front side of the wafer is flipped over to serve as the back side 22 of the wafer.

[0049] At this time, if Figure 3 、 4 As shown in FIG. 1 , when etching both sides of a silicon wafer by flipping it over, it is preferable to position the center axis 11 of the silicon wafer in a direction offset from the rotation axis 12 of the worktable 2 holding the silicon wafer so that the front and back sides are point-symmetrical with respect to the center axis of the silicon wafer. This positional relationship can further improve the etching process margin PV within the wafer surface.

[0050] The supplied acid etching solution is not particularly limited as long as it can remove scratches or processing deformations of various sizes present on the front and back surfaces of the silicon wafer. Preferably, it contains hydrofluoric acid and nitric acid, and more preferably, it further contains one or more of acetic acid, sulfuric acid, or phosphoric acid. This arrangement reliably improves the etching process allowance (PV) within the wafer surface.

[0051] The mixing ratio is not particularly limited. For example, it can be an acid etching solution mixed with 1 to 80% hydrofluoric acid and 10 to 80% nitric acid, and can also be further mixed with acetic acid, for example, 10 to 30%, sulfuric acid, for example, 10 to 25%, and phosphoric acid, for example, 10 to 50%, in any proportion, calculated in mass%.

[0052] In addition, at this time, the silicon content contained in the acid etching solution is preferably set to 12 g / L or more and 20 g / L or less. If set in this way, the etching rate is stable, and etching can be performed at low cost and high efficiency.

[0053] The acid etching liquid 8 supplied to the silicon wafer 1 moves on the silicon wafer 1 as the silicon wafer 1 rotates, and is formed into droplets 5 from the outer periphery of the silicon wafer 1 and discharged from the wafer. After the predetermined etching process margin is satisfied and the etching process is completed, the supply of the acid etching liquid 8 from the etching liquid tank 6 is stopped, and water 9 is supplied from the water supply source 7 to the supply nozzle 3, and the water 9 is supplied to the silicon wafer 1 held and rotating on the vacuum adsorption table 2 (refer to Figure 1 ).

[0054] As the silicon wafer 1 rotates, the water 9 supplied to the silicon wafer 1 moves on the silicon wafer 1, replacing the acid etching liquid 8 remaining on the silicon wafer 1 with the water 9 while being discharged from the outer periphery of the silicon wafer 1 in the form of droplets 5. After the acid etching liquid 8 on the silicon wafer 1 is replaced with water, the supply of water 9 from the water supply source 7 is stopped, and the silicon wafer 1 is rotated at a high speed, so that all the water on the silicon wafer 1 is dispersed, resulting in a dry silicon wafer 1.

[0055] The reason why the present invention uses the above-described silicon wafer etching method to reduce the etching process allowance PV near the wafer center and improve the etching process allowance PV within the wafer surface is based on the following findings.

[0056] The variation in etching allowance observed near the wafer center during acid spin etching is due to changes in the radial flow velocity distribution of the etching solution caused by wafer rotation. The etching solution flow velocity on the wafer tends to fluctuate in the collision jet region directly below the etching solution supply nozzle.

[0057] In spin etching, the nozzle that drips the etching solution is generally located at the same position as the wafer's rotation axis. Spin etching is usually performed on the front and back of the wafer separately, and the nozzle position and the wafer's rotation axis are located at the same position when etching the front and back. Figure 6 The schematic diagram of an example in which the supply nozzle 3 is located at the same position as the rotation axis of the wafer front surface 21 is shown in FIG. Figure 7 2 shows a schematic diagram of an example in which the supply nozzle 3 is located at the same position as the rotation axis of the wafer back side 22. It is believed that due to these overlapping positional relationships, the etching process allowance variation is amplified and becomes larger. Alternatively, the spin etching can also be performed by having supply nozzles on the front side and the back side respectively to etch the front and back sides simultaneously.

[0058] Therefore, in order to reduce the variation of etching process allowance near the center of the wafer, changing the positional relationship of these repetitions is an effective countermeasure. The method of changing the positional relationship between the nozzle position and the rotation axis of the wafer is generally to make the nozzle reciprocate in the radial direction of the wafer. By using this method, it is expected that the etching process allowance PV of the center of the wafer will be improved by more than 50%. Figure 9 2 shows a schematic diagram of an example in which the supply nozzle 3 is reciprocated in the radial direction of the wafer front surface 21. Figure 10 2 is a schematic diagram showing an example of a case where the supply nozzle 3 is reciprocated in the radial direction of the wafer back surface 22 .

[0059] However, even so, the etching allowance PV exceeds 50% of the average etching allowance. For example, when the average etching allowance is 10 μm, the etching allowance PV exceeds 5 μm. Therefore, the expected TTV of the wafer after etching also exceeds 5 μm.

[0060] As described above, the nozzle position and the wafer's rotation axis are located at the same position during front-side etching and back-side etching. The inventors believe that this positional relationship is the primary cause of increased etching process margin (PV), and have proposed the following etching method as a technique to further improve the etching process margin (PV). This etching method involves performing etching with the central axis of the silicon wafer offset by at least 15 mm from the rotation axis of the stage holding the silicon wafer during the spin etching process.

[0061] It can be seen that, in particular, when the silicon wafer is turned over and both sides of the silicon wafer are etched, the center axis of the silicon wafer is offset from the rotation axis of the table holding the silicon wafer so that the front and back sides are point-symmetrically positioned relative to the center axis of the silicon wafer, thereby further improving the etching processing allowance.

[0062] According to this method, by reducing the etching process allowance PV near the wafer center, the etching process allowance PV within the wafer surface can be further improved by 20%. For example, when the average etching process allowance is 10μm, the etching process allowance PV is less than 3.5μm, and the expected TTV of the wafer after etching is around 3.5μm. In this way, according to the etching method of the present invention, the etching process allowance PV near the wafer center can be reduced, thereby improving the etching process allowance PV within the wafer surface.

[0063] Example

[0064] Hereinafter, the present invention will be described in detail with reference to Examples, but the present invention is not limited thereto.

[0065] (Example)

[0066] Used Figure 1 The etching apparatus shown includes at least a stage for holding a silicon wafer to be etched and a nozzle for supplying an acid etching solution. Acid etching was performed on a silicon wafer with a diameter of 300 mm. The acid etching solution was a mixture of hydrofluoric acid and nitric acid. The mixing ratio, calculated by mass %, was 10% hydrofluoric acid and 51% nitric acid. The Si content in the acid etching solution was 20 g / L.

[0067] During acid etching, the center axis of the silicon wafer being etched is offset by 15 mm from the rotation axis of the stage holding the silicon wafer, and the front and back sides are arranged to be point-symmetrical relative to the center of the silicon wafer, so that the nozzle reciprocates in the radial direction of the silicon wafer. Figure 3 and Figure 4 The schematic diagram of the etching method at this time is shown in Figure 5The etching allowance distribution is shown in Table 1. Furthermore, the improvement rate of the etching allowance PV within the silicon wafer surface, using the entire in-plane etching allowance PV of the silicon wafer in Comparative Example 1 described in detail later as a reference, is also shown in Table 1. The allowance improvement rate (%) is defined by the following formula.

[0068] [Number 1]

[0069]

[0070] [Table 1]

[0071]

[0072] In an embodiment, Figure 3 and Figure 4 As shown in the etching schematic diagram, the center axis of the silicon wafer being etched is offset by 15 mm from the rotation axis of the stage holding the silicon wafer, and the front and back surfaces are positioned point-symmetrically with respect to the center of the silicon wafer. The nozzle is reciprocated in the radial direction of the silicon wafer. The etching process allowance distribution after etching is such that the etching process allowance PV is small near the center of the silicon wafer, and the etching process allowance PV when viewed across the entire in-plane surface is 3.5 μm. In addition, the improvement rate of the process allowance PV across the entire silicon wafer in-plane compared to Comparative Example 1 is 72%.

[0073] (Comparative Example 1)

[0074] Using the same silicon wafer and etching solution as in the example, the silicon wafer was set so that the central axis of the silicon wafer and the rotation axis of the worktable were aligned on both the front and back sides, and etching was performed. Figure 6 and Figure 7 The schematic diagram of the etching method at this time is shown in Figure 8 The etching allowance distribution shape is shown in Table 1. As described above, the machining allowance of the entire silicon wafer surface at this time is used as a reference for the machining allowance improvement rate.

[0075] (Comparative Example 2)

[0076] Using the same silicon wafer and etching solution as in the embodiment, the silicon wafer was set so that the central axis of the silicon wafer was aligned with the rotation axis of the worktable on both the front and back sides, and etching was performed by reciprocating the nozzle in the radial direction of the silicon wafer as usual. Figure 9 and Figure 10 The schematic diagram of the etching method at this time is shown in Figure 11 The etching allowance distribution shape is shown in Table 1. In addition, the etching allowance PV improvement rate within the silicon wafer surface is also shown in Table 1.

[0077] As can be seen from Table 1, the etching process allowance distribution shape when the wafer is set in a manner that the central axis of the silicon wafer is aligned with the rotation axis of the worktable on both the front and back sides (Comparative Example 1) is that the etching process allowance PV near the center of the wafer is large, and the etching process allowance PV when viewed from the entire surface is 12.4μm. In addition, in Comparative Example 2, in which the silicon wafer is set in a manner that the central axis of the silicon wafer is aligned with the rotation axis of the worktable on both the front and back sides, and the nozzle is etched by reciprocating in the radial direction of the wafer as usual, the etching process allowance distribution shape is that the etching process allowance PV near the center of the wafer is small, and the etching process allowance PV when viewed from the entire surface is 6.1μm, which is 51% improved compared to Comparative Example 1, but the process allowance PV of the entire surface of the wafer surface exceeds 5.0μm. In addition, even if the center axis of the silicon wafer and the rotation axis of the table holding the silicon wafer are offset by less than 15mm and etching is performed, the improvement in the process allowance PV of the entire surface of the wafer surface is not ideal.

[0078] On the other hand, in an embodiment of the etching method and etching device of the present invention, the center axis of the wafer and the rotation axis of the table holding the wafer are offset by more than 15 mm, and are arranged to be point-symmetrical with respect to the center of the wafer on the front and back sides, so that the nozzle reciprocates in the radial direction of the wafer. At this time, the processing allowance PV of the entire surface of the wafer is 3.5 μm, and the processing allowance PV of the entire surface of the wafer is greatly improved. Compared with Comparative Example 1, the improvement rate is increased by 72%.

[0079] As described above, according to the etching method and etching apparatus of the present invention, the etching margin can be improved.

[0080] The present invention is not limited to the above-described embodiments. The above-described embodiments are merely examples, and any configuration having substantially the same structure and achieving the same function and effect as the technical concept described in the claims of the present invention is encompassed within the technical scope of the present invention.

[0081] Description of Reference Numerals

[0082] 1...Silicon wafer, 2...Vacuum adsorption stage, 3...Supply nozzle,

[0083] 4... Vacuum source, 5... Liquid droplet, 6... Etching liquid tank, 7... Water supply source,

[0084] 8... acid etching solution, 9... water, 10... vacuum adsorption hole,

[0085] 11…the center axis of the silicon wafer, 12…the center axis of the stage,

[0086] 21…wafer front side, 22…wafer back side,

[0087] 100... Etching equipment,

[0088] θ…rotation direction, A-A'…nozzle reciprocating direction.

Claims

1. A method for etching a silicon wafer, comprising: In the spin etching process, the silicon wafer is turned over and acid etching liquid is supplied to both sides of the silicon wafer through a supply nozzle. The silicon wafer is rotated to expand the supply range of the acid etching liquid to the entire surface of the silicon wafer for acid etching. It is characterized by: In the spin etching step, etching is performed while the central axis of the silicon wafer is offset by 15 mm or more from the rotation axis of the stage holding the silicon wafer. The direction in which the central axis of the silicon wafer is offset from the rotation axis of the stage holding the silicon wafer is set so that the front and back surfaces of the silicon wafer are point-symmetrical with respect to the central axis of the silicon wafer.

2. The method for etching a silicon wafer according to claim 1, wherein: The acid etching solution is an acid etching solution containing hydrofluoric acid and nitric acid.

3. The method for etching a silicon wafer according to claim 2, wherein: The acid etching solution is set to further contain one or more of acetic acid, sulfuric acid, and phosphoric acid.

4. The method for etching a silicon wafer according to any one of claims 1 to 3, wherein: The silicon content in the acid etching solution is set to 12 g / L or more and 20 g / L or less.

5. An etching apparatus comprising at least a supply nozzle for supplying an acid etching solution and a stage for holding a silicon wafer, wherein the silicon wafer is turned over to supply the acid etching solution to both sides of the silicon wafer through the supply nozzle, and the silicon wafer is rotated to expand the supply range of the acid etching solution to the entire surface of the silicon wafer, thereby performing acid etching by spin etching. It is characterized by: The stage can hold the silicon wafer eccentrically by making the central axis of the silicon wafer be more than 15 mm away from the rotation axis of the stage. The direction in which the central axis of the silicon wafer is offset from the rotation axis of the stage holding the silicon wafer is set so that the front and back surfaces of the silicon wafer are point-symmetrical with respect to the central axis of the silicon wafer.

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